JP6646943B2 - Method for manufacturing MID circuit carrier and MID circuit carrier - Google Patents
Method for manufacturing MID circuit carrier and MID circuit carrier Download PDFInfo
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- JP6646943B2 JP6646943B2 JP2015071002A JP2015071002A JP6646943B2 JP 6646943 B2 JP6646943 B2 JP 6646943B2 JP 2015071002 A JP2015071002 A JP 2015071002A JP 2015071002 A JP2015071002 A JP 2015071002A JP 6646943 B2 JP6646943 B2 JP 6646943B2
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- 238000000034 method Methods 0.000 title claims description 18
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 239000004020 conductor Substances 0.000 claims description 34
- 239000002184 metal Substances 0.000 claims description 24
- 229910052751 metal Inorganic materials 0.000 claims description 24
- 239000000758 substrate Substances 0.000 claims description 14
- 239000000463 material Substances 0.000 claims description 12
- 238000002347 injection Methods 0.000 claims description 7
- 239000007924 injection Substances 0.000 claims description 7
- 238000001746 injection moulding Methods 0.000 claims description 7
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 claims description 5
- 229910001431 copper ion Inorganic materials 0.000 claims description 5
- 238000003698 laser cutting Methods 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 4
- 238000005452 bending Methods 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 239000010931 gold Substances 0.000 claims description 3
- -1 gold ions Chemical class 0.000 claims description 2
- 238000000926 separation method Methods 0.000 claims 2
- 230000001154 acute effect Effects 0.000 claims 1
- 238000007747 plating Methods 0.000 description 13
- 239000010949 copper Substances 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 4
- 239000000243 solution Substances 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000007596 consolidation process Methods 0.000 description 2
- 238000000608 laser ablation Methods 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 239000012778 molding material Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910001020 Au alloy Inorganic materials 0.000 description 1
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- VEQPNABPJHWNSG-UHFFFAOYSA-N Nickel(2+) Chemical compound [Ni+2] VEQPNABPJHWNSG-UHFFFAOYSA-N 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 238000013532 laser treatment Methods 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910001453 nickel ion Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000004886 process control Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
- H05K3/242—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0284—Details of three-dimensional rigid printed circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
- H05K3/182—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
- H05K3/185—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method by making a catalytic pattern by photo-imaging
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/0909—Preformed cutting or breaking line
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09118—Moulded substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09127—PCB or component having an integral separable or breakable part
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0228—Cutting, sawing, milling or shearing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
- H05K2203/107—Using laser light
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/17—Post-manufacturing processes
- H05K2203/176—Removing, replacing or disconnecting component; Easily removable component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/30—Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
- H05K2203/302—Bending a rigid substrate; Breaking rigid substrates by bending
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0014—Shaping of the substrate, e.g. by moulding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/105—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by conversion of non-conductive material on or in the support into conductive material, e.g. by using an energy beam
- H05K3/106—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by conversion of non-conductive material on or in the support into conductive material, e.g. by using an energy beam by photographic methods
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
本発明は、MID回路担持体の製造方法およびこの種のMID回路担持体に関するものである。 The present invention relates to a method for manufacturing an MID circuit carrier and to this type of MID circuit carrier.
MID(Molded Interconnect Devices)回路担持体は射出成形された回路担持体であり、3次元の成形を施した基板と、該基板の少なくとも1つの表面領域に形成された金属導電路とを有している。これにより、基板の十分に任意性のある3次元成形、または、十分に任意性があるように3次元で構成されるべき構成体の表面への導電路の組み込みが可能になる。 An MID (Molded Interconnect Devices) circuit carrier is an injection-molded circuit carrier that includes a three-dimensionally molded substrate and a metal conductive path formed in at least one surface region of the substrate. I have. This allows a sufficiently optional three-dimensional shaping of the substrate, or the incorporation of conductive paths into the surface of the structure to be configured in a sufficiently optional three-dimensional manner.
種々のMID製造方法が公知であり、たとえば2成分射出成形およびたとえばレーザーダイレクトストラクチャリング(LDS)のようなレーザーMID方法が公知である。LDSの場合、金属核、たとえば小さな金属粒子がプラスチック材料の中に受容され、プラスチック材料はその後射出成形方法によって適当に成形される。次に、レーザーによる構造化が行われ、構造化すべき表面領域に金属核を露出させる。次に、表面領域または射出成形体全体をめっき槽内で、たとえば銅イオンを含んだ溶液内でパッシブなめっきに曝す。このようにして、溶液内での金属核と銅イオンとのポテンシャル差に基づき化学被覆が発生し、この化学被覆により、一般的には非合金の銅から成る第1の金属化層が形成される。 Various MID manufacturing methods are known, for example two-component injection molding and laser MID methods such as, for example, laser direct structuring (LDS). In the case of LDS, a metal core, for example small metal particles, is received in a plastic material, which is then suitably shaped by an injection molding method. Next, laser structuring is performed, exposing the metal nuclei in the surface region to be structured. Next, the surface region or the entire injection molded body is exposed to passive plating in a plating bath, for example in a solution containing copper ions. In this way, a chemical coating is created based on the potential difference between the metal nucleus and the copper ions in the solution, which forms a first metallization layer, typically made of non-alloyed copper. You.
より肉厚の導電路を形成するため、パッシブなめっきをさらに続行することができる。しかしながら、導電路は横幅においても成長し、その結果ピッチまたはモジューラ寸法が小さいと、すなわち導電路の中心間の横方向間隔が小さいと、プロセス時間がある程度経過した後に短絡することがある。さらに、パッシブな汚染粒子があると、溶液を介して構造の中に一緒に沈積することがあり、これによって材料特性、特に延性が制限される。このように、パッシブなめっきの利点は、第一に微細なモジューラ寸法または導電路間の小さな間隔、および幅狭の導電路が形成可能なことであるが、導電路の厚さおよび材料品質が制限されている。 Passive plating can be continued further to form thicker conductive paths. However, the vias can also grow in lateral width, resulting in small pitch or modular dimensions, ie, small lateral spacing between the centers of the vias, which can cause short circuiting after some processing time. In addition, the presence of passive contaminating particles can collectively settle into the structure via the solution, which limits material properties, especially ductility. Thus, the advantages of passive plating are, firstly, the possibility of forming fine modular dimensions or small spacing between conductive paths and narrow conductive paths, but the thickness and material quality of the conductive paths are limited. Limited.
パッシブなめっきの第1の金属層を形成した後に引き続いて、アクティブなめっきを行うことができる。このため、個別に形成した導電路に、適当なめっき槽に対して電気ポテンシャルを、すなわち電圧を印加する。アクティブなめっきはプロセス技術的により高速に構成でき、より高い延性とより優れた材料特性とを備えた合目的な材料を、たとえば金とニッケルとから成る合金を形成するために使用することを可能にする。 Subsequent to the formation of the first metal layer of passive plating, active plating can follow. For this purpose, an electric potential, that is, a voltage is applied to the individually formed conductive paths to an appropriate plating tank. Active plating can be constructed faster in process technology and allows the use of purposeful materials with higher ductility and better material properties, for example to form alloys of gold and nickel To
しかしながら、小さな横幅の導電路と、たとえば150μm以下の、或いはたとえば100μm以下の微細なモジューラ寸法とを備えるように導電路構造を構成すると、アクティブなめっきのための個々の導電路の接触が部分的に困難である。 However, if the conductor structure is configured to have small lateral conductors and fine modular dimensions, for example 150 μm or less, or for example 100 μm or less, the contact of the individual conductors for active plating is partially Difficult.
本発明によれば、射出成形体は接触領域を備えるように、たとえば端子接点を備えるように構成され、該接触領域上には、少なくとも2つの導電路が接触する少なくとも1つの導線集結部が設けられている。 According to the invention, the injection-molded body is configured to have a contact area, for example to have a terminal contact, on which at least one conductor consolidation with which at least two conductive paths contact is provided. Have been.
特に、すべての導電路を接触させるために、ただ1つの導線集結部、すなわち中央の導線集結部を設ければよい。しかし、基本的には、複数の導線集結部を、たとえば複数の接触領域を、それぞれ1つの導線集結部を備えるように構成することも可能である。 In particular, only one conductor concentrator, i.e. the central conductor concentrator, has to be provided in order to make all the conductive paths contact. However, in principle, it is also possible to configure a plurality of conductors, for example a plurality of contact areas, each with one conductor.
MID製造方法で導線集結部を形成することは、第2の金属層のアクティブな電解被着のために行われ、すなわち電圧を印加してアクティブなめっきを実施するために行われる。しかし導線集結部はその後再び除去され、その結果導電路は互いに切り離される。 The formation of the conductor junction in the MID manufacturing method is performed for the active electrolytic deposition of the second metal layer, ie for applying a voltage to perform active plating. However, the wire connection is then removed again, so that the conductive paths are disconnected from one another.
本発明によれば、いくつかの利点が達成される。 According to the present invention, several advantages are achieved.
アクティブな電解めっきを行うことで、または、電圧を印加して形成することで、適当な材料を選定することができ、優れた材料特性、特に高い延性、よって高い機械的応力耐性を可能にすることができる。アクティブな電解被着は一定の条件のもとで行うことができ、その際層厚は負荷供給量によって、従って電流によって決定される。さらに、横方向への導電路の成長は、よって短絡の危険は回避することができ、或いは、少なくとも低減させることができる。 By performing active electroplating or by applying a voltage, a suitable material can be selected, and excellent material properties, particularly high ductility, and thus high mechanical stress resistance can be achieved. be able to. Active electrolytic deposition can take place under certain conditions, the layer thickness being determined by the load supply and thus by the current. Furthermore, the growth of the conductive tracks in the lateral direction can thus avoid or at least reduce the risk of short circuits.
横方向で幅狭の導電路と、微細なモジューラ寸法とを達成でき、たとえば60μmよりも小さい幅の導電路と、150μmよりも小さな、たとえば100μmよりも小さなモジューラ寸法を達成できる。というのは、導線集結部または該導線集結部と結合される接続接点は、より大きな横方向幅で形成させることができ、よって支障なく電気接触することができるからである。従って、導電路の横方向の幅とモジューラ寸法とは基本的に電解方法によって制限されていない。 Narrow conductive tracks in the lateral direction and fine modular dimensions can be achieved, for example conductive tracks with a width of less than 60 μm and modular dimensions of less than 150 μm, for example less than 100 μm. This is because the conductor junctions or the connection contacts connected to the conductor junctions can be formed with a larger lateral width and can therefore make electrical contact without hindrance. Thus, the lateral width and the modular dimensions of the conductive path are not essentially limited by the electrolytic method.
導電路は、1つの共通の導線集積部または複数の導線集結部を介して互いに接触し、この場合導線集結部はアクティブな電解被着またはアクティブなめっきのためだけに設けられているにすぎないが、その後再び除去される。これは、導電路が通常のように別個の機能に用いられるからであり、たとえば複数の電気要素の種々の接触を可能にするために用いられるからである。 The conductive paths contact one another via one common conductor stack or several conductor collectors, the conductor collectors being provided only for active electrolytic deposition or active plating. Is then removed again. This is because the conductive path is used for a separate function as usual, for example to allow various contacts of a plurality of electrical elements.
導線集結部の除去は、有利には接触領域全体の除去によって行うことができ、従って接触領域は、射出成形体の一部として一時的にのみ一緒に形成されてその後除去される薄い端子接点として形成されていてよい。 The removal of the conductor bundle can advantageously be effected by the removal of the entire contact area, so that the contact area is formed as a thin terminal contact which is formed only temporarily as part of the injection molding and is subsequently removed. It may be formed.
このため、接触領域または端子接点は規定切り離し個所を備えるように構成することができ、該規定切り離し個所でこれらはその後切り離される。従って個々の導電路は、規定切り離し個所を経て、接触領域内に設けられている少なくとも1つの導線集結部へ延在し、その結果規定切り離し個所を切り離したときにすでに個々の導電路の切り離しまたは電気的個別化が行われる。この場合、規定切り離し個所は機械的な薄肉部、すなわち特に規定破断個所として形成されていてよく、その結果機械的な破断工程はたとえば折り曲げによって、或いは、機械的切断によっても行うことができる。さらに、規定切り離し個所はレーザー切断またはレーザー切除によっても切り離すことができる。 For this purpose, the contact area or the terminal contact can be configured with a defined disconnection point, where they are subsequently disconnected. The individual conductor paths thus extend via the defined disconnection points to at least one conductor connection provided in the contact area, so that when the defined disconnection points are disconnected, the individual conductor paths are already disconnected or separated. Electrical singulation is performed. In this case, the defined breaking points can be formed as mechanically thin sections, in particular as defined breaking points, so that the mechanical breaking step can be carried out, for example, by bending or by mechanical cutting. Furthermore, the defined cut-off points can be cut off by laser cutting or laser cutting.
これによって更なる利点が可能になる。 This allows for further advantages.
比較的大きな表面領域を構造化して、めっきするだけでよい。比較的大きな表面領域は、基板の回路表面領域に加えて、導線集結部と場合によっては接続接点とのための端子接点表面領域を有しているが、しかしプロセスを遅延させない。 It is only necessary to structure and plate a relatively large surface area. The relatively large surface area has, in addition to the circuit surface area of the substrate, a terminal contact surface area for the conductor consolidation and possibly the connection contacts, but does not slow down the process.
接触領域を切り離すことにより、高い確実性で個々の導電路の電気的切り離しまたは個別化が行われる。 By decoupling the contact areas, an electrical decoupling or individualization of the individual conductive paths is achieved with a high degree of certainty.
従って本発明による方法により、付加コストを非常に少なくした高いプロセス確実性が可能になり、特にめっきプロセスおよび材料選択の改善並びに迅速なプロセスコントロールといった大きな利点をもたらす。 Thus, the method according to the invention allows for high process reliability with very low added costs, and offers significant advantages, in particular, improved plating processes and material selection and rapid process control.
接触領域の切り離しの代わりに、導線集結部および場合によっては付加的な接続接点のみをたとえばレーザー切除によって接触領域から除去してもよい。このようにして接触領域をその後も活用することができ、たとえばMID回路担持体の操作の位置決めに活用することができる。 As an alternative to disconnecting the contact area, only the wire connection and possibly additional connection contacts may be removed from the contact area, for example by laser ablation. In this way, the contact area can be subsequently utilized, for example, for positioning the operation of the MID circuit carrier.
導線集結部は、たとえば規定切り離し個所が接触領域を直接折り取るための、または、切断するための規定破断個所として設けられている場合には、特に直線状であってよい。しかし、導線集結部の非直線状の、またはまっすぐでない構成も可能であり、この場合たとえば切断または押し抜きによる切り離し、或いは、前述のレーザー切除による切り離しも可能である。 The conductor junction can be particularly straight, for example, if the defined disconnection points are provided as defined breakpoints for directly breaking or cutting the contact area. However, non-linear or non-straight configurations of the conductor concentrator are also possible, in which case, for example, cutting or punching out or laser cutting as described above.
図1によれば、3次元の射出成形体3はプラスチック材料または成形材料から形成されている。射出成形体3の少なくとも1つの表面領域4上には、複数の個々の導電路6を備えた導電路構造部5が形成されている。複数の図に示した本実施形態によれば、導電路6で構造化されている表面領域4は実質的に平らにまたは平面的に形成されているが、基本的には、湾曲面上または3次元成形面上に導電路6を形成してもよく、たとえば図1において下側に示した筒状領域に形成してもよい。
According to FIG. 1, the three-dimensional injection molded body 3 is formed from a plastic material or a molding material. On at least one surface region 4 of the injection molding 3, a
一体の射出成形体3は、部分領域として、基板7と端子接点2とを有し、基板と端子接点とは規定破断個所8を介して結合されている。規定破断個所8は、たとえば図1に切欠き9、凹部またはノッチによって示したように、たとえば薄肉部として形成されていてよい。構造化されている表面領域4は、基板から規定破断個所8を経て端子接点2まで延在し、従って基板7上には回路表面領域4aが形成され、端子接点2上には端子接点表面領域2aが形成され、回路表面領域と端子接点表面領域とは、規定破断個所8を経て延在する1つまたは複数の共通の連続金属化層によって形成される。
The integral injection-molded body 3 has, as a partial area, a
個々の導電路6は、ここでは直角に屈曲している接続板10を経て延在し、該接続板10から規定破断個所8を経て、端子接点表面領域2a上に形成されてすべての導電路6と電気接触している1つの共通の導線集結部12へ延在している。導線集結部12は、端子接点表面領域2a上に形成された接続接点14へ移行し、または、これと結合されている。中央の接続板10はたとえば端子接点2全体にわたって延在していてもよいが、この種の構成は高価であって費用がかさむ。
The individual
回路表面領域4aを備えた基板7は、規定破断個所8に至るまでMID回路担持体1を形成している。この場合、回路表面領域4aの複数の導電路6は当初導線集結部12を介して電気結合され、または、短絡されている。
The
図1の実施形態とは択一的に、MID回路担持体1を、複数の端子接点2を備えるように構成するのも可能であり、その結果各端子接点2の中央の接続板10は導線6の一部と接触している。
As an alternative to the embodiment of FIG. 1, it is also possible to configure the MID circuit carrier 1 with a plurality of
MID回路担持体1の製造を、図2ないし図6の1実施形態に関して説明する。基本的には、MID回路担持体1は種々のMID製造方法で形成させることができる。以下では、特にレーザーダイレクトストラクチャリング(LDS)について説明するが、一般的にはこれに限定されるものではない。 The manufacture of the MID circuit carrier 1 will be described with reference to one embodiment of FIGS. Basically, the MID circuit carrier 1 can be formed by various MID manufacturing methods. In the following, laser direct structuring (LDS) will be described in particular, but is generally not limited to this.
まず、図2によれば、添加材を混合させたプラスチック材料または成形材料から成る射出成形体3を射出成形法で形成させる。 First, according to FIG. 2, an injection molded body 3 made of a plastic material or a molding material mixed with an additive is formed by an injection molding method.
この場合、射出成形体3は1回のステップで形成させることができ、或いは、まず基板7を形成して端子接点2を射出することができる。
In this case, the injection molded body 3 can be formed in one step, or the
次に、図3ないし図5において、表面領域4を構造化する。これは、特に、ここに示唆したレーザービーム13を用いたレーザーダイレクトストラクチャリング(LDS)によって行うことができるが、他のMIDプロセスも可能である。従って、図3のレーザーダイレクトストラクチャリングによって、まず(図3に示唆した)金属核16を露出させて活性化させる。このようにしてまず、のちの導電路6の導電路領域106を露出させ、さらにのちに形成される導線集結部12の個所に集結領域112を露出させ、のちに形成される接続接点14の個所に接続接点領域114を露出させる。
Next, in FIGS. 3 to 5, the surface region 4 is structured. This can be done in particular by laser direct structuring (LDS) using the
次に、図4によれば、外部電流のない短い金属層21を、特に銅(Cu)層21を導電材料として被着させる。従って図4のステップでは、外部電圧を印加せずにポテンシャル差による化学めっきが行われる。従って図4のステップは適当な槽13内への、特に金属核16よりも高い電圧ポテンシャルを有する銅イオンを含んだ溶液内への浸漬によって行われる。
Next, according to FIG. 4, a
次に、図5によれば、アクティブに射出成形体3の電解被覆を行う。このため、射出成形体3を、一般的には適当な金属イオン(たとえば銅イオン、ニッケルイオン、金イオン(Cu,Ni,Au))を含んだ適当な電解槽内に設置し、適当なポテンシャルVを端子接点2の接続接点14に印加し、よって中央の接続板10に印加させ、一般的には電解槽内に浸漬される他の電極20に対し負のポテンシャルVで接続接点14に印加させる。電圧Uを印加することにより、接続接点14は中央の接続板10およびすべての導電路6ともども、槽または電解槽17内の他の電極20に対し共通の負のポテンシャルに設定される。これによって、構造化に従って導電路6を備えた導電路構造部5と、導線集結部12と、接続接点14とを図1に対応して形成させる金属層18が形成される。
Next, according to FIG. 5, the injection molding 3 is electrolytically coated actively. For this reason, the injection molded body 3 is generally placed in a suitable electrolytic cell containing appropriate metal ions (for example, copper ions, nickel ions, and gold ions (Cu, Ni, Au)), and an appropriate potential is applied. V is applied to the connecting
次に、図6によれば、端子接点2の切り離しを行う。これは特に端子接点2を折り取ることによる、すなわちたとえば曲げることによる機械的な切り離しとして行われる。というのは、規定破断個所8に所定の破断部が形成されるからである。個々の導電路6が規定破断個所8を経て延在しているので、端子接点2および中央の導線集結部12を除去した後、導電路6はもはや互いに接触せず、接続板10に個別に接触することができる。
Next, according to FIG. 6, the
機械的に折る代わりに、レーザー切り離し(レーザー処理)を介しての端子接点2の切り離し、または、機械的な切断を行ってもよい。さらに、他の破壊的な切り離しも可能である。
Instead of mechanical breaking, the
図6の変形実施形態では、端子接点2は結果的に保持されたままである。これに対応して、基本的には規定破断個所8も必要でなく、有利にはこの変形実施形態の場合設けられない。図5に続くステップで、少なくとも中央の導線集結部12を、たとえば接続接点14をも、たとえばレーザー切除により選択的に除去することで、複数の導電路6を互いに電気的に切り離す。その後引き続き、端子接点2はMID回路担持体1を位置決めするために用いることができる。
In the alternative embodiment of FIG. 6, the
図2ないし図6の実施形態の場合も、実装後の図6の切り離しのステップを行うことができ、その結果端子接点2は引き続きMID回路担持体1の位置決めに用いることができる。
In the case of the embodiment according to FIGS. 2 to 6 also, the detaching step according to FIG. 6 after the mounting can be carried out, so that the
導電路構成部5は多数の、たとえば10個以上の導電路6を有していてよく、この場合個々の導電路6は、たとえば60μmよりも小さな導電路幅Lと、100μmよりも小さなピッチ間隔d(個々の導電路6の間隔または導電路中心間の間隔)を有する。
The
1 MID回路担持体
2 端子接点(接触領域)
2a 端子接点表面領域
3 射出成形体
4a 回路表面領域
6 導電路
7 基板
8 規定破断個所(規定切り離し個所)
9 ノッチ
12 導線集結部
13 第1の槽
14 接続接点
16 金属核
17 第2の槽
18 第2の金属層
20 電極
21 第1の金属層
106 導電路領域
d ピッチ間隔(導電路の間隔量)
L 導電路の幅
U 電圧
V 電気ポテンシャル
1
2a Terminal contact surface area 3 Injection molded
REFERENCE SIGNS LIST 9
L Conductor path width U Voltage V Electric potential
Claims (6)
基板(7)と接触領域(2)とを有する一体の射出成形体(3)を射出成形技術で形成するステップと、
金属核(16)の作用のもとに、前記基板(7)上で回路表面領域(4a)を構造化し、且つ前記接触領域(2)上で端子接点表面領域(2a)を構造化するステップであって、前記回路表面領域(4a)上で、前記接触領域(2)の前記端子接点表面領域(2a)へ延在する導電路領域(106)を構造化させる前記ステップと、
構造化した前記回路表面領域(4a)上と前記端子接点表面領域(2a)上とに第1の金属層(21)を外部電流なしに次のように被着させ、すなわち少なくとも2つの導電路(6)が、前記回路表面領域(4a)から、前記端子接点表面領域(2a)上に形成される少なくとも1つの導線集結部(12)へ延在し、その際前記導電路(6)が前記少なくとも1つの導線集結部(12)を介して互いに接触するように、被着させるステップと、 前記導線集結部(12)に電気ポテンシャル(V)を印加して、前記第1の金属層(21)上に、または、前記第1の金属層(21)とともに、第2の金属層(18)を電気化学的に形成するステップと、
少なくとも前記導線集結部(12)を除去して、前記導電路(6)を電気的に切り離すステップと、
を含んでいて、
前記基板(7)に形成された接続板(10)と前記接触領域(2)に形成され前記接触板(10)と鋭角をなす斜板との間に規定切り離し個所(8)を形成し、その際複数の前記導電路(6)は前記回路表面領域(4a)から前記接続板(10)、前記規定切り離し個所(8)および前記斜板の順に経て前記導線集結部(12)へ延在していること、
前記接触領域(2)を前記規定切り離し個所(8)に沿って前記基板(7)から切り離すことにより、前記導線集結部(12)が除去されるとともに、個々の前記導電路(6)の電気的切り離しが行われること、
を特徴とする方法。 In a method for producing an MID circuit carrier (1),
Forming an integral injection molded body (3) having a substrate (7) and a contact area (2) by an injection molding technique;
Structuring a circuit surface area (4a) on the substrate (7) and a terminal contact surface area (2a) on the contact area (2) under the action of metal nuclei (16). Structuring a conductive path area (106) on said circuit surface area (4a) extending to said terminal contact surface area (2a) of said contact area (2);
On the structured circuit surface area (4a) and on the terminal contact surface area (2a), a first metal layer (21) is deposited without external current as follows, ie at least two conductive paths. (6) extends from the circuit surface area (4a) to at least one conductor junction (12) formed on the terminal contact surface area (2a), wherein the conductive path (6) is Applying the first metal layer (12) by applying an electric potential (V) to the conductive wire concentrating portion (12) so as to contact each other via the at least one conductive wire concentrating portion (12); 21) electrochemically forming a second metal layer (18) on or with the first metal layer (21);
Removing at least the conductor concentrator (12) to electrically disconnect the conductive path (6);
Containing
Forming a prescribed disconnection point (8) between the substrate (7) which is formed in the connection plate (10) and said formed in the contact region (2) the contact plate (10) and the swash plate at an acute angle, At this time, the plurality of conductive paths (6) extend from the circuit surface area (4a) to the conductor gathering portion (12) through the connection plate (10), the specified disconnection point (8), and the swash plate in this order. Doing things,
By separating the contact area (2) from the substrate (7) along the specified disconnection point (8), the conductor concentration part (12) is removed and the electric current of each of the conductive paths (6) is removed. That separation is performed,
A method characterized by the following.
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