JP6614313B2 - Light emitting device - Google Patents

Description

  The present invention relates to a light emitting device including a semiconductor light emitting element and a resin layer having internal wiring.

Light-emitting devices using semiconductor light-emitting elements (light-emitting elements) such as light-emitting diodes are widely used because they can be easily miniaturized and can provide high light emission efficiency.
A light emitting device using a light emitting element can be broadly divided into a face-up type in which the surface on which the pad electrode is provided on the light emitting element is a surface opposite to the mounting substrate, and a lower surface of the light emitting element that is a surface facing the mounting substrate. There are two types of face-down type with electrodes.

  In the face-up type, the light emitting element is mounted on a lead or the like, and the light emitting element and the lead are connected by a bonding wire or the like. For this reason, when mounted on a mounting substrate and viewed in plan from the direction perpendicular to the surface of the substrate, a part of the bonding wire needs to be positioned outside the light emitting element, and there is a limit to downsizing.

On the other hand, in the face-down type (often flip chip type), the pad electrode provided on the surface of the light emitting element and the wiring provided on the mounting substrate are planar from the direction perpendicular to the surface of the mounting substrate. When viewed, it can be electrically connected by connecting means such as bumps or metal pillars located inside the light emitting element.
As a result, the size of the light emitting device (particularly, the size in plan view from the direction perpendicular to the mounting substrate) can be reduced to a level close to the chip of the light emitting element.

  In recent years, there has been a face-down type light emitting device in which a growth substrate (translucent substrate) such as sapphire is removed or the thickness thereof is reduced in order to further reduce the size or increase the light emission efficiency. It is used.

The growth substrate is a substrate used for growing an n-type semiconductor layer and a p-type semiconductor layer constituting the light-emitting element on the growth substrate, and supports the light-emitting element having a small thickness and low strength, thereby increasing the strength of the light-emitting device. It also has the effect of improving.
For this reason, in the light emitting device in which the growth substrate is removed after the light emitting element is formed or the light emitting device in which the thickness of the growth substrate is reduced, for example, as shown in Patent Document 1, the electrode side is used to support the light emitting element. A resin layer is provided (on the side facing the mounting substrate), and a metal pillar is formed through the resin layer, and the electrode of the light emitting element and the wiring (wiring layer) provided on the mounting substrate are electrically connected by the metal pillar. Connected to.
And by having the resin layer containing this metal pillar, a light-emitting device can ensure sufficient intensity | strength.

  On the other hand, although it is not a light emitting element, for example, in Patent Document 2 and Patent Document 3, there is a method of connecting a wiring of a mounting substrate and a terminal provided on the surface of a resin for connection to the outside with a metal wire. It is disclosed.

JP 2010-141176 A JP-A-5-299530 JP 2008-251794 A

Here, in order for the light emitting device to have sufficient strength, the resin layer needs to have a sufficient thickness, for example, several tens of μm level or more, or 1 mm or more. For this reason, the metal pillar needs to have a thickness of several tens of μm or more or 1 mm or more.
On the other hand, since the metal pillars described in Patent Document 1 are usually formed by electrolytic plating, it takes a long time to form such a thick metal pillar (metal film). There is a problem that productivity is lowered.
Furthermore, when a plating layer is formed on a thick film, the plating layer is likely to warp due to stress between the resin layer and internal stress. As a result, the plating layer is peeled off from the light emitting element, and light is emitted in a stable shape. There is a risk that the device cannot be manufactured.

  Therefore, it is conceivable to apply a method disclosed in Patent Document 2 or Patent Document 3 and use a metal wire instead of the metal pillar. If the thickness of the resin layer is in the above-described range, the internal wiring can be formed by changing the length of the metal wire to be used, with almost no change in productivity.

On the other hand, it is known that the light emitting element generates a large amount of heat and the light emission output decreases as the temperature rises. For this reason, it is necessary to quickly dissipate the heat generated in the light emitting element so that the temperature does not rise excessively. Here, as the thickness of the resin layer as the support increases, the metal wire also increases. However, since metal wires are generally thinner than metal pillars formed by electrolytic plating, the thermal resistance of the metal wires increases as the length increases, reducing heat dissipation using the metal wires as heat conduction paths. Will be. As a result, when the temperature of the light emitting element is excessively increased, the light emission output of the light emitting device is decreased.
Thus, an object of the present invention is to provide a light-emitting device with a good balance between productivity and heat dissipation.

In order to solve the above-described problem, a method for manufacturing a light-emitting device according to an aspect of the present invention includes:
A semiconductor stacked body including a first conductive semiconductor layer and a second conductive semiconductor layer; a first electrode connected to the first conductive semiconductor layer; and a second electrode connected to the second conductive semiconductor layer. Preparing a light emitting element including an electrode;
Connecting the first electrode and the two electrodes by a metal wire;
Forming a first resin layer so as to cover the metal wire and the light emitting element;
The metal wire and a part of the first resin layer are removed, one end is connected to the first electrode and the other end is exposed from the first resin layer, and one end is connected to the second electrode And the other end is separated into a second metal wire exposed from the first resin layer,
Forming a first metal layer connected to the other end of the first metal wire and a second metal layer connected to the other end of the second metal wire on the surface of the first resin layer; , Including.

  According to the light emitting device of the present invention, in the internal wiring of the support, by combining a metal plating layer and a metal wire or a metal wire bump, the deformation of the metal plating layer and an increase in time required for production are suppressed, and the metal wire Alternatively, an increase in thermal resistance due to metal wire bumps can be suppressed.

It is a typical perspective view which shows the structure of the light-emitting device which concerns on 1st Embodiment of this invention. 1 is a schematic plan view illustrating a configuration of a light emitting device according to a first embodiment of the present invention. It is typical sectional drawing in the AA of FIG. 1B. It is typical sectional drawing in the BB line of FIG. 1B. It is a schematic plan view which shows an example of a structure of the light emitting element in 1st Embodiment of this invention. It is typical sectional drawing in the AA of FIG. 2A. It is a schematic plan view which shows the other example of a structure of the light emitting element in 1st Embodiment of this invention. It is typical sectional drawing in the AA of FIG. 3A. It is typical sectional drawing in the BB line of FIG. 3A. It is typical sectional drawing in the CC line of FIG. 3A. It is a flowchart which shows the flow of the manufacturing method of the light-emitting device which concerns on 1st Embodiment of this invention. It is typical sectional drawing which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment of this invention. It is typical sectional drawing which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment of this invention. It is typical sectional drawing which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment of this invention. It is typical sectional drawing which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment of this invention. It is typical sectional drawing which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment of this invention. It is typical sectional drawing which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment of this invention. It is typical sectional drawing which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment of this invention. It is typical sectional drawing which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment of this invention. It is typical sectional drawing which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment of this invention. It is typical sectional drawing which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment of this invention. It is typical sectional drawing which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment of this invention. It is typical sectional drawing which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment of this invention. It is typical sectional drawing which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment of this invention. It is typical sectional drawing which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment of this invention. It is typical sectional drawing which shows the structure of the light-emitting device which concerns on 2nd Embodiment and 3rd Embodiment of this invention. It is typical sectional drawing which shows the structure of the light-emitting device which concerns on 2nd Embodiment and 3rd Embodiment of this invention. It is a flowchart which shows the flow of the manufacturing method of the light-emitting device which concerns on 2nd Embodiment of this invention. It is a flowchart which shows the flow of the manufacturing method of the light-emitting device which concerns on 3rd Embodiment of this invention. In this invention, it is typical sectional drawing which shows a mode that a bump laminated body is formed. It is typical sectional drawing which shows a mode that a metal wire is joined. It is a schematic plan view which shows the structure of the light-emitting device which concerns on 4th Embodiment of this invention. It is typical sectional drawing in the AA line of FIG. 14A. It is typical sectional drawing in the BB line of FIG. 14A. It is typical sectional drawing in the CC line of FIG. 14A. It is a flowchart which shows the flow of the manufacturing method of the light-emitting device which concerns on 4th Embodiment of this invention. It is a typical top view which shows a mode that the semiconductor light-emitting element was formed in the manufacturing process of the light-emitting device which concerns on 4th Embodiment of this invention. It is a schematic plan view which shows a mode that the 1st resin layer was formed in the manufacturing process of the light-emitting device which concerns on 4th Embodiment of this invention. It is a typical top view which shows a mode that the horizontal wiring layer was formed in the manufacturing process of the light-emitting device which concerns on 4th Embodiment of this invention. It is a schematic plan view which shows a mode that the 2nd resin layer was formed in the manufacturing process of the light-emitting device which concerns on 4th Embodiment of this invention. It is a schematic plan view which shows a mode that the 3rd resin layer was formed in the manufacturing process of the light-emitting device which concerns on 4th Embodiment of this invention.

Embodiments of a light emitting device and a method for manufacturing the same according to the present invention will be described below.
Note that the drawings referred to in the following description schematically show the present invention, and therefore the scale, spacing, positional relationship, etc. of each member are exaggerated, or some of the members are not shown. There is a case. In addition, the scale and interval of each member may not match in the plan view and the cross-sectional view thereof. Moreover, in the following description, the same name and the code | symbol are showing the same or the same member in principle, and shall abbreviate | omit detailed description suitably.

  Further, in the light emitting device according to each embodiment of the present invention, “upper”, “lower”, “left”, “right”, and the like are interchanged depending on the situation. In the present specification, “upper”, “lower” and the like indicate relative positions between components in the drawings referred to for explanation, and indicate absolute positions unless otherwise specified. Not intended.

<First Embodiment>
[Configuration of light emitting device]
First, the configuration of the light emitting device according to the first embodiment of the present invention will be described with reference to FIGS. 1A to 1D.
The light emitting device 100 according to the first embodiment, as shown in FIGS. 1A to 1D, includes a semiconductor light emitting element 1 having an LED (light emitting diode) structure from which a growth substrate has been removed (hereinafter referred to as “light emitting element” as appropriate). ), And a support 3 provided on one surface side of the light emitting element 1 and a phosphor layer (wavelength conversion layer) 2 provided on the other surface side of the light emitting element 1. On one surface side of the light emitting element 1, an n-side electrode 13 and a p-side electrode 15 are provided, and metal wires 32n and 32p and metal plating layers 33n and 33p which are internal wirings provided in the support 3 are provided. Are electrically connected to the n-side external connection electrode 34n and the p-side external connection electrode 34p, respectively. Although details will be described later, the light emitting device 100 is manufactured by being manufactured in a wafer state and then divided.

In the light emitting device 100 according to the present embodiment, the phosphor layer 2 converts part or all of the light emitted from the light emitting element 1 into light having a different wavelength, and wavelength-converted light or wavelength-converted light and light-emitting element. 1 outputs the emitted light. For example, by configuring the light emitting device 1 to emit blue light and the phosphor layer 2 to absorb a part of the blue light and convert the wavelength to yellow light, the light emitting device 100 can be configured to emit blue light and yellow light. Can be used as a white light source that outputs white light that is a mixed color.
In the present embodiment and other embodiments described later, the light emitting device 100 includes the phosphor layer 2, but the phosphor layer 2 is not essential and may be omitted.

In the present specification, as shown in the drawings with appropriate coordinate axes, the normal direction of the surface on which the n-side electrode 13 and the p-side electrode 15 of the light emitting element 1 are provided is referred to as “+ Z axis direction” for convenience. And observing the −Z-axis direction from the + Z-axis direction is called planar view. Moreover, let the longitudinal direction be the X-axis direction, and let the transversal direction be the Y-axis direction of the light-emitting element 1 having a rectangular shape in plan view.
Each of the drawings shown as cross-sectional views shows a cross section by a plane perpendicular to the XY plane (a plane parallel to the XZ plane or the YZ plane).

Next, the configuration of each part of the light emitting device 100 will be described in detail sequentially.
The light-emitting element 1 is a face-down type LED chip having a substantially rectangular plate shape in plan view and including an n-side electrode 13 and a p-side electrode 15 on one surface side.

(Example of light emitting element)
Here, an example of the light-emitting element 1 will be described in detail with reference to FIGS. 2A and 2B.
The light-emitting element 1 shown in FIGS. 2A and 2B includes a semiconductor stacked body 12 in which an n-type semiconductor layer 12n and a p-type semiconductor layer 12p are stacked. The semiconductor stacked body 12 emits light by passing a current between the n-side electrode 13 and the p-side electrode 15, and the light-emitting layer 12a is provided between the n-type semiconductor layer 12n and the p-type semiconductor layer 12p. It is preferable to provide.
In addition, p that is electrically connected to the p-type semiconductor layer 12p on either the side where the p-type semiconductor layer 12p of the semiconductor stacked body 12 is provided or the side where the n-type semiconductor layer 12n is provided. An n-side electrode 13 that is electrically connected to the side electrode 15 and the n-type semiconductor layer 12n is provided. In the example shown in FIGS. 2A and 2B, the p-side electrode 15 and the n-side electrode 13 are provided on the side of the semiconductor stacked body 12 on the side where the p-type semiconductor layer 12p is provided (upper side in FIG. 2B). ing.

In the semiconductor stacked body 12, a region where the p-type semiconductor layer 12p and the light emitting layer 12a do not exist partially, that is, a region depressed from the surface of the p-type semiconductor layer 12p (this region is referred to as “stepped portion 12b”) is formed. Has been. The bottom surface of the step portion 12b is an exposed surface of the n-type semiconductor layer 12n, and the n-side electrode 13 is formed on the step portion 12b. A full-surface electrode 14 is provided on substantially the entire upper surface of the p-type semiconductor layer 12p. The full-surface electrode 14 includes a reflective electrode 14a having good reflectivity, and a cover electrode 14b that covers the entire upper surface and side surfaces of the reflective electrode 14a. A p-side electrode 15 is formed on a part of the upper surface of the cover electrode 14b.
Further, except for the surfaces of the n-side electrode 13 and the p-side electrode 15 which are pad electrodes of the light emitting element 1, the surfaces of the semiconductor stacked body 12 and the entire surface electrode 14 are covered with an insulating protective layer 16.

  The semiconductor stacked body 12 can be made of a material suitable for a semiconductor light emitting element, such as GaN, GaAs, AlGaN, InGaN, AlInGaP, GaP, SiC, and ZnO. In the present embodiment, since a part of the light emitted from the light emitting element 1 is converted into light having a different wavelength by the phosphor layer 2, the semiconductor laminate 12 that emits blue or purple light having a short emission wavelength is suitable. is there.

  As the n-type semiconductor layer 12n, the light emitting layer 12a, and the p-type semiconductor layer 12p, a GaN-based compound semiconductor such as InXAlYGa1-X-YN (0 ≦ X, 0 ≦ Y, X + Y <1) is preferably used. In addition, each of these semiconductor layers may have a single layer structure, but may have a laminated structure of layers having different compositions and film thicknesses, a superlattice structure, or the like. In particular, the light emitting layer 12a preferably has a single quantum well or multiple quantum well structure in which thin films that produce quantum effects are stacked.

  When a GaN-based compound semiconductor is used as the semiconductor stacked body 12, for example, an MOCVD method (metal organic chemical vapor deposition method), an HVPE method is used on a growth substrate 11 (see FIG. 6A) suitable for crystal growth of the semiconductor layer. It can be formed by a known technique such as (hydride vapor phase growth method) or MBE method (molecular beam epitaxial growth method). Further, the thickness of the semiconductor layer is not particularly limited, and various thicknesses can be applied.

  Further, as a growth substrate for epitaxially growing the semiconductor stacked body 12, for example, when the semiconductor stacked body 12 is formed using a nitride semiconductor such as GaN (gallium nitride), the C plane, the R plane, and the A plane. Insulating substrates such as sapphire and spinel (MgAl2O4) with any one of the following, as well as lithium niobate lattice-bonded to silicon carbide (SiC), ZnS, ZnO, Si, GaAs, diamond, and nitride semiconductors, An oxide substrate such as neodymium gallate is used.

In the present embodiment, since the growth substrate is peeled off and removed from the semiconductor stacked body 12 in the manufacturing process of the light emitting device 100, the light emitting element 1 in the completed light emitting device 100 does not have the growth substrate.
Moreover, it is preferable that the lower surface of the semiconductor stacked body 12 from which the growth substrate has been removed, that is, the lower surface of the n-type semiconductor layer 12n, has an uneven shape 12c by roughening. By providing the uneven shape 12c, the light extraction efficiency from this surface can be improved. Such a concavo-convex shape 12c can be formed by wet etching the lower surface of the n-type semiconductor layer 12n.

The full-surface electrode 14 functions as a current diffusion layer and a reflective layer, and is configured by laminating a reflective electrode 14a and a cover electrode 14b.
The reflective electrode 14a is provided so as to cover substantially the entire upper surface of the p-type semiconductor layer 12p. A cover electrode 14b is provided so as to cover the entire upper surface and side surfaces of the reflective electrode 14a. The reflective electrode 14a is a conductor layer for uniformly diffusing the current supplied through the cover electrode 14b and the p-side electrode 15 provided on a part of the upper surface of the cover electrode 14b to the entire surface of the p-type semiconductor layer 12p. It is. The reflective electrode 14a has good reflectivity, and also functions as a reflective film that reflects light emitted from the light emitting element 1 in the direction of the light extraction surface. Here, having the reflectivity means that light having a wavelength emitted by the light emitting element 1 is favorably reflected. Furthermore, the reflective electrode 14a preferably has good reflectivity with respect to light having a wavelength after being converted by the phosphor layer 2.

  The reflective electrode 14a can be made of a metal material having good conductivity and reflectivity. In particular, as a metal material having good reflectivity in the visible light region, Ag, Al, or an alloy containing these metals as a main component can be preferably used. The reflective electrode 14a may be a single layer or a laminate of these metal materials.

The cover electrode 14b is a barrier layer for preventing migration of the metal material constituting the reflective electrode 14a. In particular, it is preferable to provide the reflective electrode 14a when Ag which is easily migrated is used.
As the cover electrode 14b, a metal material having good conductivity and barrier properties can be used, and for example, Al, Ti, W, Au, or the like can be used. The cover electrode 14b may be a single layer or a laminate of these metal materials.

  The n-side electrode 13 is provided on the bottom surface of the step portion 12b of the semiconductor stacked body 12 where the n-type semiconductor layer 12n is exposed. The p-side electrode 15 is provided on a part of the upper surface of the cover electrode 14b. The n-side electrode 13 is electrically connected to the n-type semiconductor layer 12n, and the p-side electrode 15 is electrically connected to the p-type semiconductor layer 12p via the cover electrode 14b and the reflective electrode 14a. It is a pad electrode for supplying. The n-side electrode 13 and the p-side electrode 15 are connected to a metal wire 32n, a metal wire 32p, and the like, which are internal wirings of the support 3 (see FIGS. 1A to 1D), respectively.

In the example shown in FIG. 2, the p-side electrode 15 is configured by laminating a pad electrode layer 15a, which is an original pad electrode, and a shock absorbing layer 15b. Although the shock absorbing layer 15b is not an essential component, it is for reducing the damage to the semiconductor stacked body 12 by reducing the shock when the metal wire 32p is wire bonded. In the example shown in FIG. 2, when ball bonding is performed as wire bonding like the p-side electrode 15, it is preferable to provide the shock absorbing layer 15 b because the impact applied to the joint is relatively large.
Similarly to the p-side electrode 15, the n-side electrode 13 may be provided with a shock absorbing layer. Further, without providing the p-side electrode 15, the metal wire 32 p may be directly connected to the full surface electrode 14 by using a part of the full surface electrode 14 as a pad electrode.

As the n-side electrode 13 and the pad electrode layer 15a, a metal material can be used. For example, a single metal such as Ag, Al, Ni, Rh, Au, Cu, Ti, Pt, Pd, Mo, Cr, or W can be used. An alloy containing these metals as a main component can be preferably used. In addition, when using an alloy, you may contain nonmetallic elements, such as Si, as a composition element like an AlSiCu alloy, for example. Further, the n-side electrode 13 and the pad electrode layer 15a may be a single layer or a laminate of these metal materials.
The shock absorbing layer 15b is, for example, a layer for absorbing a shock during wire bonding, and the same material as that of the pad electrode layer 15a can be used. However, the shock absorbing layer 15b is connected to the metal wire 32p connected to the upper surface. It is preferable to use a material with good bondability. The shock absorbing layer 15b is preferably formed to a thickness of 3 μm to 50 μm, more preferably 20 μm to 30 μm, in order to absorb the shock. For example, when the metal wire 32p is Cu, it is preferable to use Cu for the shock absorbing layer 15b. “Some supplements are planned for the difference between the shock absorbing layer 15b and the pad electrode layer 15a (specified by thickness).

The protective layer 16 is an insulating film and is a coating that covers the entire upper surface and side surfaces of the light emitting element 1 except for the connection portions of the n-side electrode 13 and the p-side electrode 15 to the outside. The protective layer 16 functions as a protective film and an antistatic film for the light emitting element 1.
Further, when a reflective layer is provided outside the protective layer 16 provided on the side surface portion of the semiconductor stacked body 12, the protective layer 16 has good translucency with respect to light having a wavelength emitted by the light emitting element 1. It is preferable. Furthermore, it is preferable that the protective layer 16 has good translucency with respect to light having a wavelength after the phosphor layer 2 performs wavelength conversion.
As the protective layer 16, a metal oxide or a metal nitride can be used. For example, at least one oxide or nitride selected from the group consisting of Si, Ti, Zr, Nb, Ta, and Al is preferably used. Can be used.

  Further, the protective layer 16 may be laminated by using two or more kinds of light-transmitting dielectrics having different refractive indexes to form a DBR (Distributed Bragg Reflector) film. The DBR film reflects light leaking from the upper surface and side surfaces of the light emitting element 1 and returns it to the light emitting element 1, whereby the light extraction efficiency from the lower surface, which is the light extraction surface of the light emitting element 1, can be improved. As the DBR film, for example, a multilayer film in which SiO2 and Nb2O5 are alternately laminated can be cited. By making a multilayer film of at least 3 pairs, preferably 7 pairs or more, good reflectance can be obtained. it can.

(Other examples of light emitting elements)
Next, another example of the light emitting element will be described in detail with reference to FIGS.
In addition, about the structure which is the same as that of the example shown in FIG. 2, or respond | corresponds, the same code | symbol is attached | subjected and description is abbreviate | omitted suitably.

In another example of the light emitting device 1A shown in FIG. 3 and FIG. 4, a p-side electrode 15 that is a p-side pad electrode is formed on a part of the upper surface of the entire surface electrode 14, and an n-side pad electrode is used. A certain n-side electrode 13 extends through the insulating protective layer 16 over substantially the entire top surface and side surfaces of the semiconductor stacked body 12 except in the region where the p-side electrode 15 is provided and in the vicinity thereof. Is provided. As described above, by providing the n-side electrode 13 or the p-side electrode 15 over a wide range on the upper surface and side surface of the light emitting element 1A, heat can be efficiently conducted to the resin layer 31 of the support 3 described later. It can improve heat dissipation.
In the example shown in FIGS. 3 and 4, the n-side electrode 13 is provided so as to extend over a wide range of the upper surface and the side surface of the semiconductor stacked body 12, but the p-side electrode 15 may be provided over a wide range. Good. Further, both the n-side electrode 13 and the p-side electrode 15 may be provided complementarily over a wide range. For example, in FIG. 3A, the p-side electrode 15 is provided in a wide range of the left half of the light emitting element 1A. The n-side electrode 13 may be provided in a wide area on the right half.

Further, the n-side electrode 13 and / or the p-side electrode 15 may be provided so as to extend to the side surface of the semiconductor stacked body 12 where the reflective electrode 14a is not provided, and function as a reflective film. Thereby, the light emitted from the side surface of the semiconductor stacked body 12 is reflected into the semiconductor stacked body 12, and the light extraction efficiency from the lower surface that is the light extraction surface of the light emitting element 1 can be improved.
When the n-side electrode 13 and / or the p-side electrode 15 functions as a reflective film, it is preferable to use a material having good reflectivity on at least the lower layer side (protective layer 16 side) of these electrodes. Examples of the material having good reflectivity with respect to visible light include Ag, Al, and alloys containing these metals as main components.

  In the light emitting element 1 </ b> A, a step portion 12 b where the n-type semiconductor layer 12 n is exposed is provided on the entire circumference of the outer peripheral portion of the semiconductor stacked body 12. A full-surface electrode 14 in which a reflective electrode 14a and a cover electrode 14b are laminated is provided on substantially the entire upper surface of the p-type semiconductor layer 12p of the semiconductor laminate 12. In addition, except for the entire lower surface of the semiconductor stacked body 12, the bottom surface of the stepped portion 12b, and the upper surface of the entire surface electrode 14, the surfaces of the semiconductor stacked body 12 and the entire surface electrode 14 are insulated. Covered by layer 16. Further, in the light emitting element 1A, similarly to the light emitting element 1, an uneven shape 12c is formed on the entire lower surface of the n-type semiconductor layer 12n.

  Further, as shown in FIGS. 3B and 4, the protective layer 16 has an opening on the bottom surface of the stepped portion 12 b. That is, this opening is a region where the n-type semiconductor layer 12n is not covered with the protective layer 16, and serves as a junction 13a between the n-type semiconductor layer 12n and the n-side electrode 13. In this example, as shown in FIG. 3A, the joint portion 13 a is provided over the entire outer periphery of the semiconductor stacked body 12. Thus, by providing the junction part 13a over a wide range, the current supplied through the n-side electrode 13 can be evenly diffused to the n-type semiconductor layer 12n, so that the light emission efficiency can be improved.

  Note that the stepped portion 12b may be provided not in the entire periphery of the outer edge portion of the semiconductor stacked body 12 but in a part thereof. By reducing the region where the step portion 12b is provided, the region having the p-type semiconductor layer 12p and the light emitting layer 12a is widened, and the amount of light emission can be increased. Further, the step portion 12b may be provided inside the semiconductor stacked body 12 in a plan view instead of or in addition to the outer edge portion. As described above, the stepped portion 12b is not provided unevenly in a part of the semiconductor stacked body 12 and is intermittently provided in a wide range, so that the region of the stepped portion 12b is not excessively increased as described above. The current diffusion to the type semiconductor layer can be made uniform. For example, the stepped portion 12b is not provided continuously over the entire periphery of the outer edge portion of the semiconductor stacked body 12 as in the example shown in FIGS. 3 and 4, but is provided intermittently over the entire periphery. It may be.

  In the light-emitting device 100 (see FIGS. 1A to 1D) in the present embodiment, the light-emitting element 1 is used as a light-emitting element for convenience, but the light-emitting element 1 shown in FIG. 2 or FIG. 3 and FIG. Any of the light emitting elements 1A shown in FIG. 4 can be used. Similarly, in other embodiments described later, either the light emitting element 1 or the light emitting element 1A can be used.

Returning to FIG. 1D from FIG. 1A, the description of the configuration of the light emitting device 100 will be continued.
The phosphor layer (wavelength conversion layer) 2 absorbs part or all of the light emitted from the light emitting element 1 and converts it into light having a wavelength different from the wavelength emitted by the light emitting element 1. The phosphor layer 2 can be formed as a resin layer containing phosphor particles as a wavelength conversion material. Further, as shown in FIG. 1C, the phosphor layer 2 is provided on the lower surface side of the n-type semiconductor layer 12n, which is the light extraction surface of the light-emitting element 1 provided with the uneven shape 12c (see FIG. 2B).

  The film thickness of the phosphor layer 2 can be determined according to the phosphor content, the desired color tone after color mixing of the light emitted from the light emitting element 1 and the light after wavelength conversion, etc. ˜500 μm, more preferably 5˜200 μm, and even more preferably 10˜100 μm.

  Further, the phosphor content in the phosphor layer 2 is preferably adjusted to be 0.1 to 50 mg / cm 3 in terms of mass per unit volume. By making the phosphor content in this range, color conversion can be sufficiently performed.

As the resin material, it is preferable to use a resin material having good translucency with respect to light emitted from the light-emitting element 1 and light after wavelength conversion of the phosphor contained in the phosphor layer 2.
As such a resin material, for example, a silicone resin, a modified silicone resin, an epoxy resin, a modified epoxy resin, a urea resin, a phenol resin, an acrylate resin, a urethane resin, a fluorine resin, or a resin containing at least one of these resins, Alternatively, a hybrid resin or the like can be preferably used.

  The phosphor (wavelength conversion material) is not particularly limited as long as it is a phosphor that is excited by light having a wavelength emitted from the light-emitting element 1 and emits fluorescence having a wavelength different from that of the excitation light. Can be suitably used. Since the granular phosphor has a light scattering property and a light reflecting property, it functions as a light scattering member in addition to the wavelength conversion function, and can obtain a light diffusion effect. It is preferable that the phosphor is mixed in the phosphor layer 2 which is a resin layer at a substantially uniform ratio. Two or more kinds of phosphors may be uniformly mixed in the phosphor layer 2 or may be distributed so as to have a multilayer structure.

  As the phosphor, those known in the art can be used. For example, Ce (cerium) activated YAG (yttrium aluminum garnet) phosphor, Ce activated LAG (lutetium aluminum garnet) phosphor, Eu (europium) and / or Cr (chromium) Activated nitrogen-containing calcium aluminosilicate (CaO—Al 2 O 3 —SiO 2) -based phosphor, Eu-activated silicate ((Sr, Ba) 2 SiO 4) -based phosphor, β-sialon phosphor, KSF (K 2 SiF 6: Mn) -based Examples thereof include phosphors. A quantum dot phosphor can also be used.

  Further, in order to impart light diffusibility to the phosphor layer 2, light-transmitting inorganic compound particles, for example, oxides of rare earth elements such as Si, Al, Zn, Ca, Mg, Y, or elements such as Zr and Ti Inorganic fillers such as carbonates, sulfates or nitrides, or complex salts such as bentonite and potassium titanate may be added. The average particle diameter of such an inorganic filler can be in the same range as the average particle diameter of the phosphor described above.

The phosphor layer 2 is prepared by adjusting a slurry containing the above-described resin, phosphor particles, and other inorganic filler particles in a solvent, and applying the prepared slurry using a coating method such as a spray method, a cast method, or a potting method. It can form by apply | coating to the lower surface of the body 12, and making it harden | cure after that.
Alternatively, a resin plate containing phosphor particles can be prepared separately, and the resin plate can be bonded to the lower surface of the semiconductor laminate 12.

  In the light emitting device 100, the phosphor layer 2 may not be provided, and the light emitted from the light emitting element 1 may be directly output using the lower surface of the semiconductor stacked body 12 as the light extraction surface. Further, instead of the phosphor layer 2, a light-transmitting resin layer may be provided without containing the phosphor, or a light-diffusing resin layer containing a light-diffusing filler may be provided. It may be.

The support 3 has a rectangular parallelepiped shape that includes the outer shape of the light emitting element 1 in plan view, and is provided so as to be joined to the surface side of the light emitting element 1 on which the n-side electrode 13 and the p-side electrode 15 are provided. The light emitting device 1 from which the growth substrate has been removed is mechanically held. The support 3 has substantially the same external shape as the phosphor layer 2 in plan view.
The support 3 includes a resin layer 31, external connection electrodes (n-side external connection electrode 34 n and p-side external connection electrode 34 p) for mounting on the mounting substrate, n-side electrode 13, and p-side electrode 15. , Internal wirings (metal wires 32n and 32p and metal plating layers 33n and 33p) for electrically connecting to the corresponding external connection electrodes are provided.

  The resin layer 31 is a base body as a reinforcing member of the light emitting element 1. Further, as shown in FIGS. 1C and 1D, the resin layer 31 is substantially the same as the outer shape of the support 3, and includes the outer shape of the light-emitting element 1 in a plan view and is substantially the same as the phosphor layer 2. It has an outer shape. The resin layer 31 is a sealing resin layer that seals the upper surface and side surfaces of the light emitting element 1. Therefore, the entire surface of the light emitting element 1 is sealed by the resin layer 31 and the phosphor layer 2 which is a resin layer provided on the lower surface side.

  As shown in FIGS. 1C and 1D, the resin layer 31 includes a first resin layer (wire embedded layer) 311 in which metal wires 32n and 32p penetrating in the thickness direction (Z-axis direction) are embedded, and a thickness direction. And a second resin layer (plating buried layer) 312 in which metal plating layers 33n and 33p penetrating therethrough are buried. Moreover, the 1st resin layer 311 and the 2nd resin layer 312 form the resin layer 31 which closely_contact | adhered and integrated.

  The resin materials used for the first resin layer 311 and the second resin layer 312 may be different materials, but are preferably formed using the same resin material in order to obtain better adhesion. As the resin material for the first resin layer 311 and the second resin layer 312, the same resin material as that used for the phosphor layer 2 can be used. Moreover, when forming the 1st resin layer 311 and the 2nd resin layer 312 by compression molding, as a raw material, for example, EMC (epoxy mold compound) which is a powdery epoxy resin, or a powdery silicone resin SMC (silicone mold compound) or the like can be preferably used.

Further, the first resin layer 311 and the second resin layer 312 may contain a heat conductive member in order to increase the heat conductivity. By increasing the thermal conductivity of the first resin layer 311 and the second resin layer 312, the heat generated by the light emitting element 1 can be quickly conducted and radiated to the outside.
As the heat conducting member, for example, granular carbon black, AlN (aluminum nitride), or the like can be used. In addition, when a heat conductive member is a material which has electroconductivity, the 1st resin layer 311 and the 2nd resin layer 312 shall contain a heat conductive member with the particle density of the range which does not have electroconductivity.

  Further, as the first resin layer 311 and the second resin layer 312, a white resin in which a light-reflective filler is contained in a translucent resin material may be used. By using a white resin for at least the first resin layer 311 bonded to the upper surface of the light emitting element 1 and causing the first resin layer 311 to function as a light reflecting film, light leaking from the upper surface and the side surface side of the light emitting element 1 can be obtained. Since the light can be returned into the light emitting element 1, the light extraction efficiency from the lower surface side that is the light extraction surface of the light emitting element 1 can be improved. Further, when the first resin layer 311 has a function as a light reflecting film, the entire surface electrode 14 of the light emitting element 1 is made of translucent material such as ITO (indium tin oxide) or IZO (indium zinc oxide). It may be formed using a conductive material.

The lower limit of the thickness of the resin layer 31 can be determined so as to have a sufficient strength as a reinforcing member of the light emitting element 1 from which the growth substrate has been peeled off, and the internal thickness of the metal wires 32n and 32p and the metal plating layers 33n and 33p. The upper limit can be determined in consideration of the thermal resistance of the wiring and the productivity of the metal plating layers 33n and 33p.
For example, when the outer shape of the light emitting element 1 in plan view is about 1000 μm × 500 μm, the thickness of the resin layer 31 can be about 50 μm or more. In consideration of the thermal resistance of the internal wiring composed of the metal wires 32n and 32p and the metal plating layers 33n and 33p, the thickness of the resin layer 31 is preferably about 1000 μm or less, and preferably about 250 μm or less. More preferred.

  The metal wire 32n is an internal wiring that is provided through the first resin layer 311 in the thickness direction and electrically connects the n-side electrode 13 and the metal plating layer 33n. The metal plating layer 33n is an internal wiring that is provided through the second resin layer 312 in the thickness direction and electrically connects the metal wire 32n and the n-side external connection electrode 34n. That is, the n-side electrode 13 of the light emitting element 1 is connected to the n-side external connection electrode 34n by an internal wiring in which the metal wire 32n and the metal plating layer 33n are connected in series.

  Similarly, the metal wire 32p is an internal wiring that is provided through the first resin layer 311 in the thickness direction and electrically connects the p-side electrode 15 and the metal plating layer 33p. The metal plating layer 33p is an internal wiring that penetrates in the thickness direction in the second resin layer 312 and electrically connects the metal wire 32p and the p-side external connection electrode 34p. That is, the p-side electrode 15 of the light emitting element 1 is connected to the p-side external connection electrode 34p by an internal wiring in which the metal wire 32p and the metal plating layer 33p are connected in series.

As the metal wires 32n and 32p, it is preferable to use a material having good electrical conductivity and thermal conductivity. For example, Au, Cu, Al, Ag, or an alloy containing these metals as a main component is preferably used. be able to. Moreover, what coated the surface of the metal wire may be used. Further, in order to efficiently conduct the heat generated by the light-emitting element 1, the wire diameter is preferably about 20 μm or more, more preferably about 30 μm or more, and the thicker is more preferable.
Note that the upper limit of the wire diameter is not particularly limited as long as it can be wired to the n-side electrode 13 and the p-side electrode 15 of the light-emitting element 1, but from the wire bonder to the semiconductor laminate 12 at the time of wire bonding. For example, the thickness is preferably about 3 mm or less, and more preferably about 1 mm or less.
Further, in order to use a thicker wire at a low cost, a wire made of Cu, Al or an alloy containing these as a main component can be preferably used.
The shape of the wire is not particularly limited, and a ribbon-like wire having a cross-sectional shape such as an ellipse or a rectangle may be used in addition to a wire having a circular cross-sectional shape.

  The wiring paths of the metal wires 32n and 32p are not particularly limited, but are preferably provided so as to penetrate through the shortest path or a path close thereto in the thickness direction of the first resin layer 311. Further, in consideration of the thermal resistance of the metal wires 32n and 32p and the amount of heat generated by the light emitting element 1, the length and diameter of the metal wires 32n and 32p can be determined so that the temperature of the light emitting element 1 does not increase excessively. .

In addition, when the metal wires 32n and 32p are used as the first layer of the internal wiring as in the present embodiment, the wiring path can be freely set, so that the n-side electrode 13 and the p-side electrode of the light emitting element 1 are used. Wherever 15 is disposed, the n-side electrode 13 and the p-side electrode 15 can be easily connected.
Further, since the distance between the metal plating layers 33n and 33p serving as the second layer and the semiconductor stacked body 12 is increased, the influence of the internal stress of the metal plated layers 33n and 33p on the semiconductor stacked body 12 can be reduced. For this reason, the risk of damage such as cracks occurring in the semiconductor laminate 12 can be reduced.

  As shown in FIG. 1C, the metal wire 32p according to the present embodiment is ball bonded to the p-side electrode 15 in which the end surface of the wire is provided with an impact absorbing layer 15b15b as an upper layer for absorbing an impact during wire bonding. Connected by. Therefore, a bump 32 a is formed at the tip of the metal wire 32 p that is a joint portion with the p-side electrode 15. Further, the side surface of the wire end of the metal wire 32n is connected to the n-side electrode 13 by wedge bonding. That is, the metal wire 32n has a wedge-shaped tip at one end, and is connected to the n-side electrode 13 at the wedge-shaped tip. Note that the example illustrated in FIG. 1C is an example of a wire connection method, and the present invention is not limited to this. For example, any electrode may be connected by ball bonding or may be connected by wedge bonding. Further, a wedge-shaped tip formed at one end of the metal wire 32p may be connected to the p-side electrode 15. In particular, by connecting using wedge bonding, the metal wire 32 can be bent and wired, so that the volume of metal in the resin layer 31 can be increased. For this reason, the heat generated from the light emitting element 1 can be more efficiently conducted.

  The metal plating layers 33n and 33p can be formed by an electrolytic plating method, and it is preferable to use a metal material having good electrical conductivity and thermal conductivity. Examples of such a metal material include Cu, Au, Ni, and Pd. Further, among these, Cu which is inexpensive and has relatively high electrical conductivity and thermal conductivity can be suitably used.

  The metal plating layers 33n and 33p are separated from each other so that the two metal plating layers 33n and 33p are not short-circuited so that the metal plating layers 33n and 33p have better thermal conductivity than the metal wires 32n and 32p. The two resin layers 312 are preferably provided in as wide a range as possible. In this example, the metal plating layers 33n and 33p, which are internal wirings, have a columnar shape having a substantially square shape in plan view, but are not limited thereto. The shape may be a truncated cone or a truncated cone.

  The metal plating layers 33n and 33p can be formed by a single electrolytic plating, and the thickness of the metal plating layers 33n and 33p is, for example, about 50 to 150 μm in the case of Cu. Further, when the thickness of the plating film is increased, the plating film is likely to warp due to stress between the resin layer and internal stress. For this reason, the film thickness of the metal plating layers 33n and 33p is preferably a film thickness that can be formed by electrolytic plating several times, more preferably one time. Therefore, the thickness of the metal plating layers 33n and 33p is preferably about 50 to 200 μm.

  The upper surfaces of the metal plating layers 33n and 33p are formed so as to be flush with the upper surface of the second resin layer 312. An n-side external connection electrode 34n is provided so as to extend to the entire upper surface of the metal plating layer 33n and a part of the upper surface of the second resin layer 312 adjacent to the upper surface of the metal plating layer 33n. . Similarly, the p-side external connection electrode 34p is provided so as to extend to the entire upper surface of the metal plating layer 33p and a part of the upper surface of the second resin layer 312 adjacent to the upper surface of the metal plating layer 33n. Yes.

  The n-side external connection electrode 34n and the p-side external connection electrode 34p are pad electrodes for joining the light emitting device 100 to an external mounting substrate. The n-side external connection electrode 34 n and the p-side external connection electrode 34 p are provided on the surface of the resin layer 31 opposite to the surface to be bonded to the light emitting element 1, that is, on the upper surface of the resin layer 31. In the light emitting device 100, the upper surface side of the resin layer 31 is a mounting surface, and the n-side external connection electrode 34 n and the p-side external connection electrode 34 p are bonded to the wiring pattern of the mounting substrate using a conductive adhesive material such as solder. Is done. In the present embodiment, since the surface on which the phosphor layer 2 is provided is the light extraction surface, the n-side external connection electrode 34n and the p-side external connection electrode are used so that the light emitting device 100 is suitable for top-view mounting. 34p is provided.

As the n-side external connection electrode 34n and the p-side external connection electrode 34p, for example, at least the uppermost layer is used to improve the bondability with a mounting substrate using an Au alloy-based bonding material such as Au—Sn eutectic solder. Is preferably made of Au. For example, when the metal plating layers 33n and 33p are formed of a metal other than Au, such as Cu or Al, first, a thin film of Ti and Ni is sequentially formed by a sputtering method in order to improve adhesion with Au. Preferably, an Au layer is stacked on the Ni layer.
The n-side external connection electrode 34n and the p-side external connection electrode 34p can have a total film thickness of about 0.1 to 5 μm, more preferably about 0.5 to 4 μm.

When the metal plating layers 33n and 33p are made of Au, the metal plating layers 33n and 33p also serve as pad electrodes without providing the n-side external connection electrode 34n and the p-side external connection electrode 34p. The upper surface may be used as a connection surface with the outside.
Further, the n-side external connection electrode 34n and the p-side external connection electrode 34p are provided only on all or a part of the upper surfaces of the metal plating layers 33n and 33p so as not to extend to the upper surface of the second resin layer 312. On the contrary, the second resin layer 312 and further the side surface portion of the first resin layer 311 may be provided. The n-side external connection electrode 34n and the p-side extend so as to extend to the side surface of the resin layer 31 (the side surface parallel to the XZ plane in FIGS. 1A to 1D, that is, the side surface including the side in the longitudinal direction in plan view). By providing the external connection electrode 34p, the light emitting device 100 can be mounted on a mounting substrate as a side view type light emitting device.

[Operation of light emitting device]
Next, the operation of the light emitting device 100 will be described with reference to FIGS. 1A to 1D and FIG. For convenience of explanation, it is assumed that the light emitting element 1 emits blue light and the phosphor layer 2 emits yellow light.

  When an external power source is connected between the n-side external connection electrode 34n and the p-side external connection electrode 34p via a mounting substrate (not shown), the light emitting device 100 has the metal plating layers 33n and 33p and the metal wires 32n and 32p. A current is supplied between the n-side electrode 13 and the p-side electrode 15 of the light-emitting element 1 via. When a current is supplied between the n-side electrode 13 and the p-side electrode 15, the light emitting layer 12 a of the light emitting element 1 emits blue light.

The blue light emitted from the light emitting layer 12 a of the light emitting element 1 propagates through the semiconductor laminate 12 and is emitted from the lower surface of the light emitting element 1, and a part thereof is absorbed by the phosphor contained in the phosphor layer 2. , Converted into yellow light and extracted outside. Further, part of the blue light is not absorbed by the phosphor but passes through the phosphor layer 2 and is extracted outside.
The light propagating downward in the light emitting element 1 is reflected upward by the reflective electrode 14 a and is emitted from the upper surface of the light emitting element 1.
The yellow light and the blue light extracted outside the light emitting device 100 are mixed to generate white light.

[Method for Manufacturing Light Emitting Device]
Next, with reference to FIG. 5, the manufacturing method of the light-emitting device 100 shown to FIG. 1A-FIG. 1D is demonstrated.
As shown in FIG. 5, the manufacturing method of the light emitting device 100 includes a light emitting element preparation step S101, a wire wiring step S102, a first resin layer forming step S103, a first resin layer cutting step S104, and a plating layer forming step. S105, second resin layer forming step S106, second resin layer cutting step S107, external connection electrode forming step S108, growth substrate removing step S109, phosphor layer forming step (wavelength conversion layer forming step) S110 And individualization step S111, and each step is performed in this order.
Hereinafter, each step will be described in detail with reference to FIGS. 6 to 9 (refer to FIGS. 1A to 1D, FIGS. 2 and 5 as appropriate). In addition, in each figure of FIGS. 6-9, description is abbreviate | omitted about the detailed structure (For example, the laminated structure of the protective layer 16, the semiconductor laminated body 12, etc.) of the light emitting element 1. FIG. In addition, the shape, size, and positional relationship of other members may be simplified or exaggerated as appropriate.

  The light emitting element preparation step S101 is a process for preparing the light emitting element 1 having the configuration shown in FIG. In the light emitting element preparation step S <b> 101 in the present embodiment, a plurality of light emitting elements 1 are formed in a wafer state arranged on one growth substrate 11. In each of FIGS. 6 to 9, as shown in FIG. 6A, the coordinate axes are the Z axis in the up and down direction, the X axis in the left and right direction, and the Y axis in the direction perpendicular to the paper surface. Further, the upward direction is the + Z-axis direction. Accordingly, each of FIGS. 6 to 9 shows a cross-sectional view corresponding to a cross section taken along line AA of the plan view shown in FIG. 1B.

Specifically, first, an n-type semiconductor layer 12n, a light-emitting layer 12a, and a p-type semiconductor layer 12p are sequentially stacked on the upper surface of a growth substrate 11 made of sapphire or the like, using the semiconductor material described above. Form.
When the semiconductor stacked body 12 is formed, the p-type semiconductor layer 12p, the light emitting layer 12a, and the n-type semiconductor layer 12n are partially removed by etching in a partial region of the upper surface of the semiconductor stacked body 12 to form an n-type semiconductor. A step 12b is formed with the layer 12n exposed at the bottom.

Further, simultaneously with the formation of the stepped portion 12b, the boundary region between the light emitting elements 1 may be etched to expose the n-type semiconductor layer 12n. Accordingly, the protective layer 16 can cover the side surface of the semiconductor stacked body 12 including at least the light emitting layer 12a in a subsequent step in the light emitting element preparation step S101.
Further, in the boundary region, the entire semiconductor stacked body 12 may be removed so that the growth substrate 11 is exposed. Accordingly, since it is not necessary to dice the semiconductor stacked body 12 in the individualization step S111, individualization can be easily performed by dicing only the layer made of resin. In the example shown in FIG. 6A, the semiconductor stacked body 12 in the boundary region of the light emitting element 1 is completely removed.

Next, the n-side electrode 13 that is a pad electrode is formed on the bottom surface of the stepped portion 12b. Further, in the region that becomes the light emitting region having the p-type semiconductor layer 12p and the light-emitting layer 12a, the reflective electrode 14a that covers substantially the entire upper surface of the p-type semiconductor layer 12p and the upper surface and side surfaces of the reflective electrode 14a are completely covered. A full-surface electrode 14 composed of the cover electrode 14b is formed. A p-side electrode 15 that is a pad electrode is formed on a part of the upper surface of the cover electrode 14b.
Further, the protective layer 16 is formed on the entire surface of the wafer except the surfaces of the n-side electrode 13 and the p-side electrode 15 by using, for example, an insulating material such as SiO 2 by sputtering.
Thus, as shown in FIG. 6A, the light emitting element 1 in a wafer state is formed.

  Next, in the wire wiring step S102, as shown in FIG. 6B, for each light emitting element 1 on the growth substrate 11, a metal wire 32 is used using a wire bonder so as to connect the n-side electrode 13 and the p-side electrode 15. Wiring. As shown in FIG. 6B, the wired metal wire 32 is connected to the p-side electrode 15 by ball bonding, a bump is formed at the tip of the metal wire 32, and is connected to the n-side electrode 13 by wedge bonding. One end of the metal wire 32 is connected to the n-side electrode 13 by a wedge-shaped tip. At this time, wiring is performed so that a portion extending in a vertical direction or a direction near the vertical from the bonding surface of the metal wire 32 of the p-side electrode 15 is at least higher than a predetermined height. Here, the predetermined height is the height of the upper surface of the first resin layer 311 shown in FIG. 1C and the height of the cutting line 41 shown by a broken line in FIG. 6C.

  Next, in the first resin layer forming step S103, as shown in FIG. 6C, the first resin layer 311 is formed by, for example, compression molding using a mold so as to completely seal the light emitting element 1 and the metal wire 32. Form. At this time, the first resin layer 311 is formed so that the upper surface is at least higher than the height of the cutting line 41.

  Next, in 1st resin layer cutting process S104, the 1st resin layer 311 is cut with the metal wire 32 which exists until it becomes the thickness of the cutting line 41 from an upper surface side using a cutting device. As a result, the metal wire 32 is separated into two metal wires 32n and 32p, and, as shown in FIG. 6D, the cross-section of the metal wire 32 so as to be flush with the upper surface of the first resin layer 311. Are exposed as the upper surfaces of the metal wires 32n and 32p.

Next, in the plating layer forming step S105, metal plating layers 33n and 33p are formed. This process includes five sub-processes.
First, as a first sub-process (seed layer forming process), Ni and Au thin films are formed on the entire upper surface of the wafer, that is, the entire upper surface of the first resin layer 311 and the entire upper surfaces of the metal wires 32n and 32p by sputtering. The seed layer 33a is formed by sequentially laminating.
Next, as a second sub-process (plating layer forming process), a plating layer 33b is formed on the seed layer 33a by electrolytic plating using the seed layer 33a as a current path for electrolytic plating. FIG. 7A shows a state in which the plating layer 33b is formed on the seed layer 33a. The plated layer 33b is formed so that the height of the upper surface is at least a predetermined height. Here, the predetermined height is the height of the upper surface of the second resin layer 312 shown in FIG. 1C and the height of the cutting line 42 shown by a broken line in FIG. 8A.

Next, as a third sub-process (resist pattern forming process), as shown in FIG. 7B, a resist pattern 61 is formed on the upper surface of the plating layer 33b to cover the regions to be the metal plating layers 33n and 33p by photolithography. Form.
Next, as a fourth sub-process (etching process), the plating layer 33b and the seed layer 33a are removed by, for example, wet etching using the resist pattern 61 as a mask. As a result, as shown in FIG. 7C, the metal plating layers 33n and 33p are patterned.
Furthermore, as a fifth sub-process (resist pattern removal process), the metal plating layers 33n and 33p are completed as shown in FIG. 7D by removing the resist pattern 61 by using ashing or chemicals. Since the seed layer 33a is a sufficiently thin layer as compared with the plating layer 33b, in this specification, the seed layer 33a and the plating layer 33b are described as the metal plating layers 33n and 33p for convenience.

  When the plating layer 33b and the seed layer 33a are etched by wet etching in the fourth sub-process, the etching proceeds isotropically not only in the thickness direction but also in the lateral direction. For this reason, the metal plating layers 33n and 33p after patterning by etching are predetermined in plan view in consideration of the thickness of the plating layer 33b and the seed layer 33a and the etching rate ratio in the thickness direction and the lateral direction. It is preferable that the resist pattern 61 is formed widely so that the distance and the size are the same.

  Next, in the second resin layer forming step S106, as shown in FIG. 8A, the second resin layer 312 is formed by, for example, compression molding using a mold so as to seal the metal plating layers 33n and 33p. . At this time, the second resin layer 312 is formed such that the upper surface is at least higher than the height of the cutting line 42.

  Next, in 2nd resin layer cutting process S107, the 2nd resin layer 312 is cut with the metal plating layers 33n and 33p which exist from the upper surface side until it becomes the thickness of the cutting line 42 using a cutting device. Thus, as shown in FIG. 8B, the upper surface of the metal plating layer 33n connected to the metal wire 32n and the upper surface of the metal plating layer 33p connected to the metal wire 32p so as to be flush with the upper surface of the second resin layer 312. Is exposed.

Next, in the external connection electrode formation step S108, as shown in FIG. 8C, the n-side external connection electrodes 34n and p-side are formed on the upper surfaces of the metal plating layers 33n and 33p and the upper surface of the second resin layer 312 in the vicinity thereof. The external connection electrode 34p is formed.
The metal film to be the n-side external connection electrode 34n and the p-side external connection electrode 34p can be formed by sputtering. For example, when the metal plating layers 33n and 33p are made of Cu, in order to obtain good adhesion with the Au layer, the Ti layer and the Ni layer are formed in this order, and the Au layer is formed as the uppermost layer. It is preferable to form a metal film by stacking.
The patterning of the metal film can use a pattern formation method by etching or a pattern formation method by lift-off.

  The pattern formation method by etching can be performed by the following procedure. First, a metal film is formed on the entire upper surface of the wafer, that is, on the entire upper surfaces of the metal plating layers 33n and 33p and the upper surface of the second resin layer 312 by sputtering or the like. Next, a resist pattern is formed by photolithography so as to cover the regions to be the n-side external connection electrode 34n and the p-side external connection electrode 34p. Then, an unnecessary metal film is removed by etching using the resist pattern as a mask, and then the resist pattern is removed.

  The pattern forming method by lift-off can be performed by the following procedure. First, a resist pattern having openings in regions where the n-side external connection electrode 34n and the p-side external connection electrode 34p are to be formed is formed by photolithography. Next, a metal film is formed on the entire upper surface of the wafer by sputtering or the like. Then, the unnecessary metal film formed on the resist pattern is removed by removing the resist pattern.

  Note that the n-side external connection electrode 34n and the p-side external connection electrode 34p do not extend to the upper surface of the second resin layer 312 and are formed only on the upper surfaces of the metal plating layers 33n and 33p. The n-side external connection electrode 34n and the p-side external connection electrode 34p can also be formed by electrolytic plating.

  Next, in the growth substrate removal step S109, as shown in FIG. 8D, the growth substrate 11 is peeled off and removed by, for example, LLO (laser lift-off method) or chemical lift-off method. At this time, since the semiconductor laminate 12 is reinforced by the support 3 having the resin layer 31 as a base, it is not damaged such as cracks or cracks.

Further, as a post-process after the growth substrate 11 is peeled off, the exposed lower surface of the semiconductor stacked body 12 is polished and roughened by, for example, a wet etching method to form the uneven shape 12c (see FIGS. 2B and 3B). You may make it do.
The peeled growth substrate 11 can be reused as the growth substrate 11 for crystal growth of the semiconductor laminate 12 by polishing the surface.

Next, in the phosphor layer forming step (wavelength conversion layer forming step) S110, the phosphor layer 2 is formed on the lower surface side of the semiconductor stacked body 12. As described above, the phosphor layer 2 can be formed, for example, by spraying a slurry containing a resin and phosphor particles in a solvent.
In addition, in the light emitting element preparation step S101, when the semiconductor stacked body 12 in the boundary region of the light emitting element 1 is completely removed, the semiconductor stacked body 12 includes the phosphor layer 2 and the first layer made of resin. The entire surface is resin-sealed by the resin layer 311.

Finally, in the singulation step S111, the light emitting device 100 is singulated by dicing along the cutting line 43 set in the boundary region of each light emitting device 100.
In addition, in the light emitting element preparation step S101, when the semiconductor laminate 12 in the boundary region of the light emitting element 1 is completely removed, the cut portion is only a layer made of resin, so that dicing can be easily performed. it can.
Through the above steps, the light emitting device 100 illustrated in FIGS. 1A to 1D is completed.

  Further, as in the present embodiment, when the support 3 has a laminated structure of the first resin layer (wire embedded layer) 311 and the second resin layer (plated embedded layer) 312, each resin layer (first resin layer 311 and With the thickness of the second resin layer 312), the wiring lengths of the metal wires 32n and 32p and the metal plating layers 33n and 33p existing as internal wirings can be managed. For this reason, the dispersion | variation in the heat dissipation between the light-emitting devices 100 can be decreased. As a result, the variation in the temperature rise of the light emitting element 1 is suppressed, and the variation in the light emission output due to the temperature rise can be reduced. The same applies to the case where the stacking order and the number of stacks of the resin layers are changed as in other embodiments to be described later.

Second Embodiment
[Configuration of light emitting device]
Next, with reference to FIG. 10A, the light-emitting device which concerns on 2nd Embodiment and 3rd Embodiment is demonstrated.
In the light emitting device 100A according to the second embodiment shown in FIG. 10A, the support 3A has, in order from the light emitting element 1 side, a first resin layer (plating buried layer) having metal plating layers 33n and 33p as internal wirings inside. A resin layer 31A configured by laminating 311A and a second resin layer (wire buried layer) 312A having metal wires 32n and 32p as internal wirings therein is provided.
That is, the light emitting device 100A is configured by changing the order of connecting the metal wires 32n and 32p, which are internal wirings, and the metal plating layers 33n and 33p to the light emitting device 100 illustrated in FIGS. is there. Further, in this embodiment, the light emitting element 1A shown in FIGS. 3 and 4 is used as the light emitting element, and the n-side electrode 13 and the p-side electrode 15 are provided over a wide range on the upper surface side of the light emitting element 1A. .

When the metal plating layers 33n and 33p are used as the first-layer internal wiring as in the present embodiment, the metal plating layers 33n and 33p are brought into contact with a wide range of the n-side electrode 13 and the p-side electrode 15. Can be provided. For this reason, the thermal diffusibility through the n-side electrode 13 and the p-side electrode 15 is improved, and the temperature rise of the light emitting device 100 can be effectively suppressed.
In particular, the n-side electrode 13 and the p-side electrode 15 are provided over a wide area on the upper surface side of the light-emitting element 1A as in the light-emitting element 1A shown in FIGS. When the metal plating layers 33n and 33p are provided as described above, the n-side electrode 13 and the p-side electrode 15 can be substantially thickened by the metal plating layers 33n and 33p. As a result, the thermal diffusibility through the n-side electrode 13 and the p-side electrode 15 is further improved, and the current diffusibility in the n-side electrode 13 and the p-side electrode 15 that are pad electrodes is also improved.

[Operation of light emitting device]
The light emitting device 100A according to the second embodiment differs from the light emitting device 100 according to the first embodiment only in the configuration of the internal wiring. Therefore, after an external power source is connected to the n-side external connection electrode 34n and the p-side external connection electrode 34p and power is supplied between the n-side electrode 13 and the p-side electrode 15 of the light emitting element 1 through the internal wiring. Since the operation is the same as that of the light emitting device 100, a detailed description of the operation is omitted.

[Method for Manufacturing Light Emitting Device]
Next, a method for manufacturing the light emitting device 100A according to the second embodiment will be described with reference to FIG. 11 (see FIGS. 5 and 10A as appropriate).
As shown in FIG. 11, the manufacturing method of the light emitting device 100A includes a light emitting element preparation step S201, a plating layer forming step S202, a first resin layer forming step S203, a first resin layer cutting step S204, and a wire wiring step. S205, second resin layer forming step S206, second resin layer cutting step S207, external connection electrode forming step S208, growth substrate removing step S209, phosphor layer forming step (wavelength conversion layer forming step) S210 And individualization step S211, each step is performed in this order.

First, in the light emitting element preparation step S201, the light emitting element 1A in a wafer state is prepared in the same manner as the light emitting element preparation step S101 in the first embodiment.
In the formation of the light-emitting element 1, the light-emitting element 1A changes the region where the stepped portion 12b is formed, and after forming the protective layer 16, the n-side electrode 13 and the p-side electrode 15 are formed on the upper surface of the protective layer 16. Since it can form by changing the area | region provided so that it may extend | stretching, detailed description is abbreviate | omitted.

Next, in the plating layer forming step S202, the metal plating layers 33n and 33p are formed by the following procedure.
First, a first resist pattern having openings on the upper surface of the n-side electrode 13 and the upper surface of the p-side electrode 15 is formed on the upper surface of the wafer on which the light emitting element 1 is formed by photolithography. Next, a seed layer is formed on the entire top surface of the wafer by sputtering.
Next, a second resist pattern having openings in regions where the metal plating layers 33n and 33p are to be formed is formed by photolithography. The second resist pattern is formed thicker than the metal plating layers 33n and 33p to be formed. Next, a plating layer is formed by electrolytic plating using the seed layer as a current path.
Then, the plating layer is patterned by removing the second resist pattern, that is, by a lift-off method. At the same time, the first resist pattern is also removed together with an unnecessary seed layer.
The metal plating layers 33n and 33p can be formed by the above procedure.

Next, metal plating is performed by performing the first resin layer forming step S203 and the first resin layer cutting step S204 in the same manner as the second resin layer forming step S106 and the second resin layer cutting step S107 in the first embodiment. The first resin layer 311A is formed so that the upper surfaces of the layers 33n and 33p are exposed.

Next, in the wire wiring step S205, similarly to the wire wiring step S102 in the first embodiment, the metal wire 32 (FIG. 5) is used between the upper surface of the metal plating layer 33n and the upper surface of the metal plating layer 33p using a wire bonder. 6B). The upper surface of the metal plating layer 33p is connected by ball bonding, a bump is formed at the tip of the metal wire 32, the metal plating layer 33n is connected by wedge bonding, and one end of the metal wire 32 is a wedge-shaped tip. Connected to the metal plating layer 33n.
Next, by performing the second resin layer forming step S206 and the second resin layer cutting step S207 in the same manner as the first resin layer forming step 103 and the first resin layer cutting step S104 in the first embodiment, the metal wire The second resin layer 312A is formed so that the upper surfaces of 32n and 32p are exposed.

Since the external connection electrode forming step S208 to the individualization step S211 which are subsequent steps can be performed in the same manner as in the first embodiment and the external connection electrode formation step S108 to the individualization step S111, the details are described. The detailed explanation is omitted.
Through the above steps, the light emitting device 100A shown in FIG. 10A is completed.

<Third Embodiment>
[Configuration of light emitting device]
Next, with reference to FIG. 10B, the light-emitting device which concerns on 3rd Embodiment is demonstrated.
In the light emitting device 100B according to the third embodiment shown in FIG. 10B, the support 3B has, in order from the light emitting element 1 side, a first resin layer (wire buried layer) having first metal wires 32n and 32p as internal wirings inside. 311; a second resin layer (plating buried layer) 312 having metal plating layers 33n and 33p as internal wiring; and a third resin layer (wire embedding) having second metal wires 35n and 35p as internal wiring. Layer) 313 and a resin layer 31 </ b> B configured to be laminated.
That is, the light emitting device 100B has internal wiring formed by connecting the second metal wires 35n and 35p in addition to the metal wires 32n and 32p and the metal plating layers 33n and 33p, which are internal wirings in the light emitting device 100. The resin layer 31B is composed of three layers.

As a modification of the third embodiment, resin layers each having a metal plating layer, a metal wire, and a metal plating layer may be laminated in order from the light emitting element 1 side. Note that the number of stacked layers is not limited to two or three, and may be four or more.
Thus, a resin layer having a metal wire inside and a resin layer having a metal plating layer inside can be alternately stacked to form a thick resin layer. At this time, by suppressing the thickness of the metal plating layer per layer, the occurrence of warping or peeling of the metal plating layer due to stress is prevented, and a large number of layers are laminated to form a thick resin layer. be able to. Moreover, since the ratio of the thickness by the metal plating layer excellent in heat conductivity does not fall in the whole resin layer, the thick support body excellent in heat dissipation can be comprised.

[Operation of light emitting device]
The light emitting device 100B according to the third embodiment differs from the light emitting device 100 according to the first embodiment only in the configuration of the internal wiring. Therefore, after an external power source is connected to the n-side external connection electrode 34n and the p-side external connection electrode 34p and power is supplied between the n-side electrode 13 and the p-side electrode 15 of the light emitting element 1 through the internal wiring. Since the operation is the same as that of the light emitting device 100, a detailed description of the operation is omitted.

[Method for Manufacturing Light Emitting Device]
Next, with reference to FIG. 12 (refer to FIGS. 5 and 10B as appropriate), a manufacturing method of the light emitting device 100B according to the third embodiment will be described.
As shown in FIG. 12, the method for manufacturing the light emitting device 100B includes a light emitting element preparation step S301, a first wire wiring step S302, a first resin layer forming step S303, a first resin layer cutting step S304, and a plating layer. Forming step S305, second resin layer forming step S306, second resin layer cutting step S307, second wire wiring step S308, third resin layer forming step S309, third resin layer cutting step S310, external A connection electrode forming step S311, a growth substrate removing step S312, a phosphor layer forming step (wavelength conversion layer forming step) S313, and an individualizing step S314 are included, and each step is performed in this order.

  First, the light emitting element preparation step S301 to the second resin layer cutting step S307 are performed in the same manner as the light emitting element preparation step S101 to the second resin layer cutting step S107 in the first embodiment, respectively. As a result, the first resin layer 311 including the first metal wires 32n and 32p and the second resin layer 312 including the metal plating layers 33n and 33p are stacked on the light emitting element 1, and the metal plating layers 33n and 33n, The state shown in FIG. 8B is obtained with the upper surface of 33p exposed.

Next, in the second wire wiring step S308, in the same manner as the wire wiring step S102 in the first embodiment, a metal wire is used between the upper surface of the metal plating layer 33n and the upper surface of the metal plating layer 33p using a wire bonder. Wiring.
Next, in the same manner as the first resin layer forming step 103 and the first resin layer cutting step S104 in the first embodiment, the second resin layer forming step S309 and the third resin layer cutting step S310 are performed, whereby the second The third resin layer 313 is formed so that the upper surfaces of the metal wires 35n and 35p are exposed.

Since the external connection electrode forming step S311 to the individualization step S314, which are subsequent steps, can be performed in the same manner as in the first embodiment and the external connection electrode formation step S108 to the individualization step S111, respectively. The detailed explanation is omitted.
Through the above steps, the light emitting device 100B illustrated in FIG. 10B is completed.

<Modification>
Next, a modification of the wire wiring process (wire wiring process S102, wire wiring process S205, first wire wiring process S302, and second wire wiring process S308) will be described with reference to FIG.

  In each of the above-described embodiments, when forming the metal wires 32n, 32p, 35n, and 35p (hereinafter abbreviated as the metal wire 32), the metal wire 32 is connected to the n-side electrode 13 and the p-side electrode 15 using the wire bonder 50. It has been explained that the metal wire 32 is wired between the metal plating layer 33n and the metal plating layer 33p. As shown in FIG. 13B, the end of the metal wire 32 is pressed to the upper surface of the n-side electrode 13 using the wire bonder 50 and the end of the metal wire 32 is moved to the n-side by ball bonding that applies ultrasonic vibration. Fused to the electrode 13 or the like. At this time, ball-shaped bumps 32a larger than the wire diameter of the metal wire 32 are formed in the fused portion.

In this modification, instead of the metal wire 32 as the internal wiring, as shown in FIG. 13A, a bump laminate 32A in which bumps 32a are laminated is used. As described above, the bump laminate 32 </ b> A is formed thicker than the original metal wire 32. For this reason, by using the bump laminate 32A, the thermal resistance of the internal wiring is lower than when the metal wire 32 is used, and as a result, the heat dissipation of the light emitting device 100 and the like can be improved.
In this modification, the bump laminated body 32A is used as the internal wiring. However, the present invention is not limited to this, and the internal wiring is configured by one bump 32a instead of the bump laminated body 32A. May be. In the present specification, an internal wiring element composed of a bump laminate 32A including a plurality of bumps 32a and an internal wiring element composed of one bump 32a are collectively referred to as a metal wire bump. The case where the number of stacked bumps 32a is one does not include the form in which the bump is formed at the tip of the metal wire in the first embodiment or the like, but only the bump that is substantially thicker than the metal wire. The case where it consists of.

The bump laminate 32A can be formed by repeating the formation of the bump 32a and the cutting of the metal wire 32 at the upper end of the bump 32a by the wire bonder 50. The bump laminated body 32A has a diameter larger than that of the metal wire 32 and can be formed to have sufficient rigidity so as not to fall down when forming the first resin layer 311 and the like. There is no need to wire in the shape of an arch such as a shape or an inverted U shape. Therefore, in this modification, in the wire wiring process, the upper surface of each n-side electrode 13 or the like has a predetermined height or more (the first resin layer 311 or the like in which the bump laminate 32A when the light emitting device 100 or the like is completed is contained). The bump laminate 32A is formed so that the thickness is equal to or greater than the thickness of the bump laminate 32A.
In addition, the process of forming the 1st resin layer 311 grade | etc., And the process of cutting the 1st resin layer 311 grade | etc., Which are subsequent processes can be performed similarly to the case where the metal wire 32 is used as an internal wiring.

<Fourth embodiment>
[Configuration of light emitting device]
Next, a light emitting device according to a fourth embodiment will be described with reference to FIGS. 14 and 15 and FIGS.
In the light emitting device 100C according to the fourth embodiment shown in FIGS. 14 and 15, the support 3C has a first resin layer in which the first metal plating layers 33n and 33p are embedded as internal wirings in order from the light emitting element 1C side. (Plating buried layer) 311C, a second resin layer (wire buried layer) 312C in which bump laminates 32An and 32Ap and lateral wiring layers 36n and 36p are buried as internal wiring, and a second metal plating layer 37n as internal wiring, A resin layer 31C configured by laminating a third resin layer (plated buried layer) 313C in which 37p is buried is provided.
Further, the upper surfaces of the second metal plating layers 37n and 37p are exposed on the upper surface of the third resin layer 313C, which is the uppermost resin layer, so as to be flush with the upper surface of the third resin layer 313C. In the present embodiment, the exposed upper surfaces of the second metal plating layers 37n and 37p also serve as external connection electrodes.

As shown in FIG. 14A, in the present embodiment, the light emitting element 1C has four vertically-oriented rectangular p-side electrodes 15 arranged in a plan view, and a plane between the four p-side electrodes 15, respectively. As viewed, two circular n-side electrodes 13 are arranged in the vertical direction, for a total of six.
In the light emitting element 1C shown in FIG. 2, the step portion 12b is formed in a plurality of locations, the n-side electrode 13 is provided in each step portion 12b, and the p-side electrode 15 is provided in a plurality of locations. It is intended to improve the diffusibility of the current supplied from the outside. Since the light emitting element 1C is the same as the light emitting element 1 except that the number of electrodes is increased, a detailed description of the light emitting element 1C is omitted.

  The first resin layer 311C is provided on the upper surface side of the light emitting element 1C, and as the internal wiring, six first metal plating layers 33n (see FIG. 17B) electrically connected to the n-side electrode 13 and the p-side The electrode 15 holds the four first metal plating layers 33p (see FIG. 17B) that are electrically connected, and seals the upper surface and side surfaces of the light emitting element 1C. The first resin layer 311C is in contact with the phosphor layer 2 outside the outer edge of the light emitting element 1C, and the entire surface of the light emitting element 1C is resin-sealed by the first resin layer 311C and the phosphor layer 2. Has been.

As shown in FIG. 17B, one first metal plating layer 33n is provided on each of the upper surfaces of the six n-side electrodes 13, and the upper surface is connected to one horizontal wiring layer 36n as shown in FIG. 18A. The The first metal plating layer 33n is a columnar metal layer that is circular in plan view.
One first metal plating layer 33p is provided on each of the upper surfaces of the four p-side electrodes 15 as shown in FIG. 17B, and the upper surface is connected to one horizontal wiring layer 36p as shown in FIG. 18A. The The first metal plating layer 33p is a quadrangular columnar metal layer that is a vertically long rectangle in plan view.

The second resin layer 312C is provided in contact with the upper surface of the first resin layer 311C, and has an internal wiring in which the lateral wiring layers 36n and 36p and the bump stacked bodies 32An and 32Ap are stacked.
As shown in FIG. 18A, the horizontal wiring layer 36n and the horizontal wiring layer 36p are formed in a comb-teeth shape having three teeth and a comb-teeth shape having four teeth, respectively, in a plan view. The teeth extend in the axial direction) and are arranged so that the teeth of each other fit each other. Note that the horizontal wiring layer 36n and the horizontal wiring layer 36p are spaced apart from each other so as not to be short-circuited.
The lateral wiring layers 36n and 36p are formed by sputtering or the like using the same metal material as the lower first metal plating layers 33n and 33p or a metal material having good bonding properties with the first metal plating layers 33n and 33p. can do.

As shown in FIG. 18A, the lateral wiring layer 36n is connected to the six first metal plating layers 33n on the lower surface side and is connected to the nine bump laminates 32An on the upper surface side as shown in FIG. 18B.
As shown in FIG. 18A, the horizontal wiring layer 36p is connected to the four first metal plating layers 33p on the lower surface side and is connected to the 12 bump laminates 32Ap on the upper surface side as shown in FIG. 18B.

  Comparing FIG. 18A and FIG. 18B, in plan view, the first metal plating layer 33n that is the n-side internal wiring on the lower layer side overlaps with any of the bump stacked bodies 32An that is the n-side internal wiring on the upper layer side. There is something that will not be. Therefore, the first metal plating layer 33n and the bump laminate 32An are configured to be electrically connected via a lateral wiring layer 36n provided extending in the lateral direction (in the XY plane). .

  18A and 18B are compared, in plan view, the first metal plating layer 33p, which is the p-side internal wiring on the lower layer side, is the same as the bump laminate 32Ap, which is the p-side internal wiring on the upper layer side. It is arranged to overlap. Further, the first metal plating layer 33p and the bump stacked body 32Ap are configured to be electrically connected via a lateral wiring layer 36p provided extending in the lateral direction (in the XY plane). . Therefore, the first metal plating layer 33p and the bump stacked body 32Ap can be arranged so as not to overlap in plan view.

In plan view, the nine bump laminates 32An are on the horizontal wiring layer 36n as shown in FIG. 18B, and as shown in FIG. 19, the second metal is an n-side external wiring electrode on the upper layer side. It arrange | positions in the area | region which overlaps with the plating layer 37n.
Also, in plan view, the 12 bump laminates 32Ap are on the horizontal wiring layer 36p as shown in FIG. 18B, and are p-side external wiring electrodes on the upper layer side as shown in FIG. It arrange | positions in the area | region which overlaps with the 2 metal plating layer 37p.

The third resin layer 313C is provided in contact with the upper surface of the second resin layer 312C, and has second metal plating layers 37n and 37p as internal wiring.
The upper surfaces of the second metal plating layer 37n and the second metal plating layer 37p are exposed from the third resin layer 313C, and respectively serve as an n-side external connection electrode and a p-side external connection electrode. Further, nine bump laminates 32An are connected to the lower surface side of the second metal plating layer 37n, and twelve bump laminates 32Ap are connected to the lower surface side of the second metal plating layer 37p.

  The second metal plating layers 37n and 37p are preferably made of Au or an alloy containing Au as a main component. In addition, the second metal plating layers 37n and 37p may not serve as the external connection electrodes, and the external connection electrodes may be separately provided on the upper surfaces of the second metal plating layers 37n and 37p.

  As described above, the plurality (six) of the n-side electrodes 13 also serve as external connection electrodes by the first metal plating layer 33n, the lateral wiring layer 36n, and the bump laminate 32An that are n-side internal wirings. The second metal plating layers 37n are connected. The plurality (four) of p-side electrodes 15 are formed of one second electrode that also serves as an external connection electrode by the first metal plating layer 33p, the lateral wiring layer 36p, and the bump laminate 32Ap that are p-side internal wirings. Connected to the metal plating layer 37p.

  As described above, in plan view, the second metal plating layer 37n that is the n-side external connection electrode is provided in the upper half (+ Y-axis direction side) region, and the second metal plating that is the p-side external connection electrode. The layer 37p is provided in the lower half (−Y-axis direction side) region. For this reason, internal wiring cannot be laminated in the direction directly above the n-side electrode 13 and the p-side electrode 15 to be connected to the second metal plating layer 37n and the second metal plating layer 37p, respectively.

In the present embodiment, the internal wiring has a three-layer structure, and the plurality of electrodes on the n side and the p side of the light emitting element 1C are partitioned into two simple rectangular regions through the horizontal wiring layers 36n and 36p. Further, it can be connected to the second metal plating layers 37n and 37p which are a set of external connection electrodes. In other words, the internal wiring has a multi-layer structure, so that even if the pad electrode of the light emitting element is in a complicated arrangement, it can be connected to a simply configured external connection electrode.
The configuration of the internal wiring is not limited to the example shown in FIGS. 3 and 4. For example, a metal wire 32 (see FIG. 13B and the like) is used instead of the bump stacked bodies 32An and 32Ap. May be.

[Operation of light emitting device]
The light emitting device 100C according to the fourth embodiment differs from the light emitting device 100 according to the first embodiment only in the configuration of the internal wiring. Therefore, an external power source is connected to the second metal plating layer 37n that is the n-side external connection electrode and the second metal plating layer 37p that is the p-side external connection electrode, and the n-side electrode of the light emitting element 1C is connected via the internal wiring. Since the operation after power is supplied between the 13 and p-side electrodes 15 is the same as that of the light emitting device 100, a detailed description of the operation is omitted.

[Method for Manufacturing Light Emitting Device]
Next, with reference to FIG. 16, the manufacturing method of the light-emitting device 100C which concerns on 4th Embodiment shown in FIG.14 and FIG.15 is demonstrated.
As shown in FIG. 16, the manufacturing method of the light emitting device 100C includes a light emitting element preparation step S401, a first plating layer forming step S402, a first resin layer forming step S403, a first resin layer cutting step S404, Wiring layer forming step S405, wire bump forming step S406, second resin layer forming step S407, second resin layer cutting step S408, second plating layer forming step S409, third resin layer forming step S410, 3 resin layer cutting process S411, growth substrate removal process S412, fluorescent substance layer formation process (wavelength conversion layer formation process) S413, and individualization process S414 are included, and each process is performed in this order.

  Hereinafter, each process of the manufacturing method of the light-emitting device 100C will be described with reference to FIGS. 17 to 19 (refer to FIGS. 2 and 14 to 16 as appropriate). Note that FIGS. 17 to 19 illustrate a state in which one light emitting device 100C is manufactured, but in a wafer state in which a plurality of light emitting elements 1C are arranged until they are separated into individual pieces in the individualization step S414. The light emitting device 100C is manufactured.

First, in the light emitting element preparation step S401, as in the light emitting element preparation step S101 in the first embodiment, as shown in FIG. 17A, a wafer formed so that the light emitting elements 1C are arranged on the growth substrate 11 is formed. prepare.
Note that six n-side electrodes 13 and four p-side electrodes 15 are formed on the upper surface of each light emitting element 1C.

Next, the first plating layer forming step S402, the first resin layer forming step S403, and the first resin layer cutting step S404 are respectively performed as the plating layer forming step S202, the first resin layer forming step S203, and the first resin layer forming step in the second embodiment. By performing in the same manner as the resin layer cutting step S204, as shown in FIG. 17B, the first resin layer 311C is formed, in which the first metal plating layers 33n and 33p are inherently exposed.
Note that one first metal plating layer 33 n is formed on each n-side electrode 13, and one first metal plating layer 33 p is formed on each p-side electrode 15.

Next, in the horizontal wiring layer forming step S405, the horizontal wiring layers 36n and 36p are formed on the upper surface of the first resin layer 311C by sputtering or the like as shown in FIG. 18A. The patterning of the horizontal wiring layers 36n and 36p can be performed by a pattern formation method by etching or a pattern formation method by lift-off.
Next, in the wire bump formation step S406, as shown in FIG. 18B, bump laminates 32An and 32Ap are formed at predetermined positions on the horizontal wiring layers 36n and 36p using a wire bonder. At this time, the upper surfaces of the bump laminates 32An and 32Ap are formed to be the same as or higher than the upper surface of the completed second resin layer 312C.

Next, by performing the second resin layer forming step S407 and the second resin layer cutting step S408 in the same manner as the second resin layer forming step S106 and the second resin layer cutting step S107 in the first embodiment, FIG. As shown, a second resin layer 312C is formed that includes the horizontal wiring layers 36n and 36p and the bump stacked bodies 32An and 32Ap, and the upper surfaces of the bump stacked bodies 32An and 32Ap are exposed.

  Next, the second plating layer forming step S409, the third resin layer forming step S410 and the third resin layer cutting step S411 are respectively performed as the plating layer forming step S105, the second resin layer forming step S106 and the second resin layer forming step in the first embodiment. By performing in the same manner as the resin layer cutting step S107, the second metal plating layers 37n and 37p are provided on the second resin layer 312C as shown in FIG. 19, and the upper surfaces of the second metal plating layers 37n and 37p are formed. An exposed third resin layer 313C is formed.

Next, the growth substrate removal step S412, the phosphor layer formation step S413, and the individualization step S414 are respectively performed in the same manner as the growth substrate removal step S109 , the phosphor layer formation step S110, and the individualization step S111 in the first embodiment. As a result, the light emitting device 100C shown in FIGS. 14 and 15 is completed.

  The light emitting device according to the present invention has been specifically described above with reference to embodiments for carrying out the invention. However, the gist of the present invention is not limited to these descriptions, and is based on the description of the claims. It must be interpreted widely. Needless to say, various changes and modifications based on these descriptions are also included in the spirit of the present invention.

1,1A, 1C Light emitting element (semiconductor light emitting element)
DESCRIPTION OF SYMBOLS 11 Growth substrate 12 Semiconductor laminated body 12n N type semiconductor layer 12a Light emitting layer 12p P type semiconductor layer 12b Stepped part 12c Uneven shape 13 N side electrode 13a Joint part 14 Whole surface electrode 14a Reflective electrode 14b Cover electrode 15 P side electrode 15a Pad electrode layer 15b Shock absorbing layer 16 Protective layer 2 Phosphor layer (wavelength conversion layer)
3, 3A, 3B, 3C Support 31, 31A, 31B, 31C Resin layer 311 First resin layer (wire buried layer)
311A 1st resin layer (plating buried layer)
312 Second resin layer (plating buried layer)
312A Second resin layer (wire buried layer)
313 Third resin layer (wire buried layer)
311C 1st resin layer (plating buried layer)
312C Second resin layer (wire buried layer)
313C Third resin layer (plating buried layer)
32 metal wires 32n, 32p first metal wires (internal wiring, metal wires)
35n, 35p Second metal wire (internal wiring, metal wire)
32A Bump laminate (internal wiring, metal wire bump)
32a Bump 33n, 33p First metal plating layer (internal wiring, metal plating layer)
37n Second metal plating layer (internal wiring, metal plating layer, n-side external connection electrode)
37p Second metal plating layer (internal wiring, metal plating layer, p-side external connection electrode)
33a Seed layer 33b Plating layer 34n n side external connection electrode 34p p side external connection electrode 41, 42 cutting line 43 cutting line 50 wire bonder 61 resist pattern 100, 100A, 100B, 100C light emitting device

Claims (4)

A semiconductor stacked body including a first conductive semiconductor layer and a second conductive semiconductor layer; a first electrode connected to the first conductive semiconductor layer; and a second electrode connected to the second conductive semiconductor layer. Preparing a light emitting element including an electrode;
Connecting the first electrode and the two electrodes by a metal wire;
Forming a first resin layer so as to cover the metal wire and the light emitting element;
The metal wire and a part of the first resin layer are removed, one end is connected to the first electrode and the other end is exposed from the first resin layer, and one end is connected to the second electrode And the other end is separated into a second metal wire exposed from the first resin layer,
Forming a first metal layer connected to the other end of the first metal wire and a second metal layer connected to the other end of the second metal wire on the surface of the first resin layer; A method for manufacturing a light-emitting device. In the step of removing a part of the metal wire and the first resin layer,
The surface exposed from the first resin layer at the other end of the first metal wire and the surface exposed from the first resin layer at the other end of the second metal wire are flush with the upper surface of the first resin layer. The manufacturing method of the light-emitting device according to claim 1, which is positioned above. Forming the first metal layer and the second metal layer,
Forming a metal layer connected to the first metal wire and the second metal wire;
Removing a part of the metal layer and separating the metal layer into the first metal layer and the second metal layer;
The manufacturing method of the light-emitting device of Claim 1 or 2 containing. Forming a second resin layer so as to cover the first metal layer and the second metal layer;
A part of each of the first metal layer, the second metal layer, and the second resin layer is removed, and the upper surface of the first metal layer, the upper surface of the second metal layer, and the upper surface of the second resin layer And exposing the upper surface of the first metal layer and the upper surface of the second metal layer from the second resin layer so that they are positioned on the same plane. A method for manufacturing the light emitting device according to claim 1.

Images