JP6611786B2 - Photoelectric conversion element and photoelectric conversion device - Google Patents

Description

  The present invention relates to a photoelectric conversion element and a photoelectric conversion device.

  In recent years, a solar cell that directly converts solar energy into electric energy has been rapidly expected as a next-generation energy source particularly from the viewpoint of global environmental problems. Of these, the most manufactured and sold solar cells have a structure in which electrodes are formed on the light receiving surface on the side where sunlight enters and the back surface on the opposite side of the light receiving surface, respectively. is there.

  However, when an electrode is formed on the light receiving surface, sunlight is reflected and absorbed by the electrode, so that the amount of incident sunlight is reduced by the area of the electrode. Therefore, development of a back junction solar cell in which an electrode is formed only on the back surface is underway (see, for example, Patent Document 1).

  FIG. 19 is a schematic cross-sectional view of a back junction solar cell described in Patent Document 1. The back junction solar cell shown in FIG. 19 has a substantially intrinsic amorphous semiconductor 119, n-type amorphous silicon 120, and nitride on the light-receiving surface of a substrate 111 made of an n-type single crystal silicon wafer. A protective film 124 such as silicon is sequentially stacked.

  In the n region 122 corresponding to the n-type electrode 116 on the back surface of the substrate 111, a substantially intrinsic amorphous semiconductor layer 112, an n-type amorphous semiconductor layer 114, a silicon nitride layer 121, and N-type electrodes 116 are sequentially stacked. Further, the n-type amorphous semiconductor layer 114 and the n-type electrode 116 are connected through a hole penetrating the silicon nitride layer 121.

  In p region 123 corresponding to p-type electrode 117 on the back surface of substrate 111, substantially intrinsic amorphous semiconductor layer 113, p-type amorphous semiconductor layer 115, and p-type electrode 117 are formed on substrate 111. They are sequentially stacked.

  The n-type electrode 116 and the p-type electrode 117 are formed by providing copper layers 116b and 117b by plating on the base electrodes 116a and 117a formed by sputtering or the like, respectively.

  As shown in FIG. 20, in the back junction solar cell described in Patent Document 1, the n-type electrode 116 and the p-type electrode 117 are spaced apart from each other by a predetermined distance so as to cover substantially the entire back surface of the substrate 111. It is formed in a comb shape with a gap. Specifically, the n-type electrode 116 and the p-type electrode 117 are respectively current collectors that electrically connect the strip-shaped current extraction portions 116c and 117c corresponding to comb teeth and the plurality of current extraction portions 116c and 117c, respectively. Parts 116d and 117d.

International Publication No. 2013/027591

  A photoelectric conversion element of a type that forms a pn junction by forming an amorphous semiconductor film on the back surface of a semiconductor substrate, such as a back junction solar cell described in Patent Document 1, has a p-type impurity and a p-type impurity on the back surface of the substrate. Compared with a photoelectric conversion element that forms a pn junction by diffusing an n-type impurity to form an impurity diffusion layer, the electrical resistance is equivalent to the formation of an amorphous semiconductor film on the back surface of the semiconductor substrate. Get higher. Therefore, in a photoelectric conversion element of a type in which a pn junction is formed by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, an electrode is provided on substantially the entire back surface of the semiconductor substrate in order to extract current efficiently. It is preferable to form. Therefore, as shown in FIG. 20, in the back junction solar cell described in Patent Document 1, the n-type electrode 116 and the p-type electrode 117 are formed so as to cover substantially the entire back surface of the substrate 111.

  However, since patterning by photolithography and high-precision patterning by printing such as screen printing are difficult for the electrodes located at the periphery of the substrate 111, in the back junction solar cell described in Patent Document 1, electrode patterning is performed. In many cases, a short circuit occurs between the current extraction unit 116c and the current collector 117d or between the current extraction unit 117c and the current collector 116d.

  The embodiment disclosed herein includes a semiconductor substrate of a first conductivity type or a second conductivity type, a first conductivity type amorphous semiconductor film on a first surface side of the semiconductor substrate, and a first surface of the semiconductor substrate. A second conductive type amorphous semiconductor film on the side, a first electrode on the first conductive type amorphous semiconductor film, and a second electrode on the second conductive type amorphous semiconductor film, Is a photoelectric conversion element surrounding the second electrode with a gap from the second electrode. The embodiment disclosed herein includes a semiconductor substrate of a first conductivity type or a second conductivity type, a first conductivity type amorphous semiconductor film on a first surface side of the semiconductor substrate, and a first surface of the semiconductor substrate. A second conductive type amorphous semiconductor film on the side, a first electrode on the first conductive type amorphous semiconductor film, and a second electrode on the second conductive type amorphous semiconductor film, Is a photoelectric conversion element that surrounds the second electrode with a gap from the second electrode, and a part of the first electrode is included in a 1 mm region from the outer periphery to the inner side of the semiconductor substrate.

  Embodiment disclosed here is provided with the photoelectric conversion element and the wiring sheet electrically connected with the photoelectric conversion element, and a photoelectric conversion element is a 1st conductivity type or 2nd conductivity type semiconductor substrate, A first conductive type amorphous semiconductor film on the first surface side of the semiconductor substrate, a second conductive type amorphous semiconductor film on the first surface side of the semiconductor substrate, and the first conductive type amorphous semiconductor film And a second electrode on the second conductivity type amorphous semiconductor film, the first electrode surrounds the second electrode with a space from the second electrode, and the wiring sheet is insulative. A base material, a first wiring on the insulating base material, and a second wiring on the insulating base material, wherein the first electrode is electrically connected to the first wiring, and the second electrode is the second wiring. The photoelectric conversion device is electrically connected to the wiring. Embodiment disclosed here is provided with the photoelectric conversion element and the wiring sheet electrically connected with the photoelectric conversion element, and a photoelectric conversion element is a 1st conductivity type or 2nd conductivity type semiconductor substrate, A first conductive type amorphous semiconductor film on the first surface side of the semiconductor substrate, a second conductive type amorphous semiconductor film on the first surface side of the semiconductor substrate, and the first conductive type amorphous semiconductor film And a second electrode on the second conductive type amorphous semiconductor film. The first electrode surrounds the second electrode at a distance from the second electrode, and the first electrode The wiring sheet includes an insulating base material, a first wiring on the insulating base material, and a second wiring on the insulating base material. The first electrode is electrically connected to the first wiring, and the second electrode is electrically connected to the second wiring. It is the location.

  According to the embodiment disclosed herein, in a photoelectric conversion element of a type that forms a pn junction by forming an amorphous semiconductor film on the back surface of a semiconductor substrate, patterning failure of electrodes located at the periphery of the semiconductor substrate It is possible to suppress the occurrence of a short circuit due to.

4 is a schematic enlarged plan view of the back surface of the heterojunction back contact cell of Embodiment 1. FIG. It is a typical expanded sectional view in alignment with II-II of FIG. It is a typical expanded sectional view along III-III of FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 3 is a schematic plan view of a heterojunction back contact cell with a wiring sheet according to Embodiment 1. FIG. 3 is a schematic plan view of a wiring sheet used in the heterojunction back contact cell with a wiring sheet of Embodiment 1. FIG. 3 is a schematic cross-sectional view along the longitudinal direction of the first wiring of the heterojunction back contact cell with wiring sheet of Embodiment 1. FIG. 4 is a schematic cross-sectional view along the longitudinal direction of a second wiring of the heterojunction back contact cell with a wiring sheet of Embodiment 1. FIG. 6 is a schematic enlarged plan view of the back surface of the heterojunction back contact cell of Embodiment 2. FIG. 6 is a schematic enlarged plan view of the back surface of a heterojunction back contact cell of Embodiment 3. FIG. FIG. 10 is a schematic cross-sectional view illustrating an example of a method for partially removing the first stacked body by laser light irradiation in the fourth embodiment. 10 is a schematic cross-sectional view illustrating an example of a method for partially removing a second stacked body by laser light irradiation in Embodiment 4. FIG. 2 is a schematic cross-sectional view of a back junction solar cell described in Patent Document 1. FIG. 6 is a schematic plan view of an electrode of a back junction solar cell described in Patent Document 1. FIG. 6 is a schematic enlarged plan view of the back surface of a heterojunction back contact cell according to Embodiment 5. FIG. It is a typical expanded sectional view along XII-XII of FIG. It is a typical expanded sectional view along XIII-XIII of FIG.

  Hereinafter, the heterojunction back contact cell of Embodiments 1 to 4 as an example of the photoelectric conversion element of the embodiment disclosed herein, and the hetero with wiring sheet as an example of the photoelectric conversion device of the embodiment disclosed herein The junction type back contact cell will be described. In the drawings used to describe the embodiments, the same reference numerals represent the same or corresponding parts.

[Embodiment 1]
<Structure of heterojunction back contact cell>
FIG. 1 is a schematic enlarged plan view of the back surface of the heterojunction back contact cell 10 according to the first embodiment. As shown in FIG. 1, the heterojunction back contact cell 10 of Embodiment 1 has a p-electrode 7 and an n-electrode 8 on the back side of an n-type semiconductor substrate 1. The p electrode 7 is located on the p-type amorphous semiconductor film 3, and the n electrode 8 is located on the n-type amorphous semiconductor film 5.

  In FIG. 1, two rectangular island-shaped n-electrodes 8 are shown, and these n-electrodes 8 are positioned so as to extend in the same direction with a space therebetween. The p-electrode 7 surrounds each n-electrode 8 with a space from each n-electrode 8, and a part of the p-electrode 7 is a region 71 1 mm inward from the outer periphery of the back surface of the n-type semiconductor substrate 1. Contained within.

  A p-type amorphous semiconductor film 3 and an n-type amorphous semiconductor film 5 are located in a region between the p electrode 7 and the n electrode 8. The n-type amorphous semiconductor film 5 located below each n-electrode 8 has a rectangular island shape larger than the n-electrode 8 in plan view. The p-type amorphous semiconductor film 3 surrounds the n-type amorphous semiconductor film 5, and a part of the p-type amorphous semiconductor film 3 is 1 mm inward from the outer periphery of the back surface of the n-type semiconductor substrate 1. 71. In FIG. 1, two n electrodes 8 and two n-type amorphous semiconductor films 5 are shown, but the number of n electrodes 8 and n-type amorphous semiconductor films 5 is not limited to two. .

  FIG. 2 shows a schematic enlarged cross-sectional view along II-II in FIG. As shown in FIG. 2, a rectangular island-shaped i-type amorphous semiconductor film 4 and a periphery of the i-type amorphous semiconductor film 4 are formed on the first surface 1 a serving as the back surface of the n-type semiconductor substrate 1. An i-type amorphous semiconductor film 2 surrounding the substrate is positioned. A p-type amorphous semiconductor film 3 is located on the i-type amorphous semiconductor film 2, and an n-type amorphous semiconductor film 5 is located on the i-type amorphous semiconductor film 4. A p-electrode 7 is located on the p-type amorphous semiconductor film 3, and an n-electrode 8 is located on the n-type amorphous semiconductor film 5. As shown in FIG. 2, there is a gap between the p electrode 7 and the n electrode 8.

  As shown in FIG. 2, the edge 5 a of the n-type amorphous semiconductor film 5 is located on the edge 3 a of the p-type amorphous semiconductor film 3. The edge 4 a of the i-type amorphous semiconductor film 4 is located between the portion 3 a and the edge 5 a of the n-type amorphous semiconductor film 5.

  FIG. 3 shows a schematic enlarged cross-sectional view along III-III in FIG. In the cross section shown in FIG. 3, the i-type amorphous semiconductor film 2, the p-type amorphous semiconductor film 3, and the p-electrode 7 are stacked in this order on the first surface 1 a of the n-type semiconductor substrate 1.

  As shown in FIGS. 2 and 3, the second surface 1 b serving as the light receiving surface of the n-type semiconductor substrate 1 is provided with an uneven structure such as a texture structure. A dielectric film (not shown) may be formed on the second surface 1b of the n-type semiconductor substrate 1.

<Method for manufacturing heterojunction back contact cell>
Hereinafter, an example of a method for manufacturing the heterojunction back contact cell 10 of Embodiment 1 will be described with reference to schematic cross-sectional views of FIGS. 4 to 10. First, as shown in FIG. 4, the i-type amorphous material is in contact with the entire surface of the first surface 1 a of the n-type semiconductor substrate 1 provided with an uneven structure such as a texture structure on the second surface 1 b in advance. The semiconductor film 2 is formed, and then the p-type amorphous semiconductor film 3 is formed so as to be in contact with the entire surface of the i-type amorphous semiconductor film 2. As a result, a first stacked body 51 that is a stacked body of the i-type amorphous semiconductor film 2 and the p-type amorphous semiconductor film 3 is formed. The formation method of the i-type amorphous semiconductor film 2 and the p-type amorphous semiconductor film 3 is not particularly limited. For example, a plasma CVD (Chemical Vapor Deposition) method can be used.

  As the n-type semiconductor substrate 1, an n-type single crystal silicon substrate can be suitably used. However, the n-type semiconductor substrate 1 is not limited to an n-type single crystal silicon substrate. For example, a conventionally known n-type semiconductor substrate can be used as appropriate.

  As the i-type amorphous semiconductor film 2, an i-type amorphous silicon film can be suitably used, but is not limited to an i-type amorphous silicon film. Can also be used.

In the present embodiment, “i-type” is not only a completely intrinsic state but also a sufficiently low concentration (the n-type impurity concentration is less than 1 × 10 ¹⁵ / cm ³ and the p-type impurity concentration is 1). × 10 ¹⁵ / cm ³ ) means to include those in which n-type or p-type impurities are mixed.

  In the present embodiment, “amorphous silicon” includes not only amorphous silicon in which dangling bonds of silicon atoms are not terminated with hydrogen, but also hydrogenated amorphous silicon and the like. Also included are those in which dangling bonds of silicon atoms are terminated with hydrogen or the like.

  As the p-type amorphous semiconductor film 3, a p-type amorphous silicon film can be suitably used. However, the p-type amorphous semiconductor film is not limited to a p-type amorphous silicon film. For example, a conventionally known p-type amorphous semiconductor film is used. Can also be used.

As the p-type impurity contained in the p-type amorphous semiconductor film 3, for example, boron can be used. In the present embodiment, “p-type” means a state in which the p-type impurity concentration is 1 × 10 ¹⁵ / cm ³ or more.

  Next, as shown in FIG. 5, an etching paste 31 is applied on the p-type amorphous semiconductor film 3. Here, the etching paste 31 is not particularly limited as long as it can etch the first stacked body 51.

  Next, a part of the first stacked body 51 is etched in the thickness direction by heating the etching paste 31. Thereby, for example, as shown in FIG. 6, a part of the first surface 1a of the n-type semiconductor substrate 1 is exposed.

  Next, as shown in FIG. 7, an i-type amorphous semiconductor film 4 is formed so as to be in contact with the exposed surface of the first surface 1a of the n-type semiconductor substrate 1 and the first stacked body 51, and then The n-type amorphous semiconductor film 5 is formed so as to be in contact with the entire surface of the i-type amorphous semiconductor film 4. Thereby, a second stacked body 52 that is a stacked body of the i-type amorphous semiconductor film 4 and the n-type amorphous semiconductor film 5 is formed. The method for forming the i-type amorphous semiconductor film 4 and the n-type amorphous semiconductor film 5 is not particularly limited, and for example, a plasma CVD method can be used.

  As the i-type amorphous semiconductor film 4, an i-type amorphous silicon film can be preferably used. However, the i-type amorphous semiconductor film is not limited to the i-type amorphous silicon film. Can also be used.

  As the n-type amorphous semiconductor film 5, an n-type amorphous silicon film can be preferably used, but is not limited to an n-type amorphous silicon film. For example, a conventionally known n-type amorphous semiconductor film is used. Can also be used.

For example, phosphorus can be used as an n-type impurity contained in the n-type amorphous silicon film constituting the n-type amorphous semiconductor film 5. In the present embodiment, “n-type” means a state in which the n-type impurity concentration is 1 × 10 ¹⁵ / cm ³ or more.

  Next, as shown in FIG. 8, an etching mask 32 is provided on the n-type amorphous semiconductor film 5. Here, the etching mask 32 is not particularly limited as long as it can function as a mask when the second stacked body 52 is etched.

  Next, by performing etching using the etching mask 32 as a mask, a part of the second stacked body 52 is etched in the thickness direction, and then the etching mask 32 is removed. Thereby, for example, as shown in FIG. 9, a part of the surface of the p-type amorphous semiconductor film 3 is exposed.

  After that, as shown in FIG. 10, the p-electrode 7 is formed on the p-type amorphous semiconductor film 3 and the n-electrode 8 is formed on the n-type amorphous semiconductor film 5. The heterojunction back contact cell 10 can be manufactured.

<Heterojunction back contact cell with wiring sheet>
FIG. 11 is a schematic plan view of the heterojunction back contact cell with a wiring sheet according to the first embodiment. For example, as shown in FIG. 11, the heterojunction back contact cell with the wiring sheet of Embodiment 1 has a plurality of heterojunction back contact cells 10 of Embodiment 1 installed on the wiring sheet 20 and electrically connected in series. It is configured by being connected.

  FIG. 12 shows a schematic plan view of a wiring sheet 20 used in the heterojunction back contact cell with a wiring sheet of the first embodiment. The wiring sheet 20 includes an insulating base material 21, first wirings 22 and second wirings 23 on the insulating base material 21. The first wirings 22 and the second wirings 23 are also formed in a band shape, and are spaced apart from each other on the insulating base material 21 so that the longitudinal directions of these wirings are the same direction. Has been placed. In addition, one end of the plurality of first wirings 22 and one end of the plurality of second wirings 23 are electrically connected to a strip-shaped current collection wiring 24, respectively. The current collecting wiring 24 is disposed on the insulating base material 21 so as to have a longitudinal direction in a direction orthogonal to the longitudinal directions of the first wiring 22 and the second wiring 23. The current collecting wiring 24 collects current from the plurality of first wirings 22 or the plurality of second wirings 23 and electrically connects the heterojunction back contact cells 10 of the first embodiment in series.

  As the insulating substrate 21, an insulating substrate can be used. For example, a film of polyester, polyethylene naphthalate, polyimide, or the like can be used.

  As the 1st wiring 22, the 2nd wiring 23, and the current collection wiring 24, a conductive material can be used, for example, copper etc. can be used. The first wiring 22, the second wiring 23, and the current collecting wiring 24 are each formed, for example, by forming a conductive film such as a metal film on the entire surface of the insulating base 21 and then etching a part thereof. It can be formed by removing and patterning.

  FIG. 13 is a schematic cross-sectional view along the longitudinal direction of the first wiring 22 of the heterojunction back contact cell with a wiring sheet of the first embodiment. As shown in FIG. 13, the first wiring 22 of the wiring sheet 20 and the n-electrode 8 of the heterojunction back contact cell 10 of Embodiment 1 are electrically connected through the conductive layer 41 along the respective longitudinal directions. Has been. On the other hand, since the insulating layer 42 is located between the p electrode 7 and the first wiring 22, the p electrode 7 and the first wiring 22 are electrically insulated by the insulating layer 42.

  FIG. 14 is a schematic cross-sectional view along the longitudinal direction of the second wiring 23 of the heterojunction back contact cell with a wiring sheet of the first embodiment. As shown in FIG. 14, the second wiring 23 of the wiring sheet 20 and the p-electrode 8 of the heterojunction back contact cell 10 of Embodiment 1 are electrically connected through the conductive layer 41 along the respective longitudinal directions. Has been.

<Mechanism of problem solving>
In the present embodiment, since the p electrode 7 is disposed so as to surround the n electrode 8 with a space from the n electrode 8, the electrical separation between the p electrode 7 and the n electrode 8 is n. This can be done not on the periphery of the back surface of the n-type semiconductor substrate 1 but on the inside of the back surface of the n-type semiconductor substrate 1. This eliminates the need to pattern the electrodes located on the periphery of the back surface of the n-type semiconductor substrate 1 with high accuracy, thereby suppressing the occurrence of a short circuit due to the patterning failure of the electrodes located on the periphery of the back surface of the n-type semiconductor substrate 1. be able to.

  In the present embodiment, the p-electrode 7 can be formed so that a part of the p-electrode 7 is included in the 1 mm region 71 from the outer periphery of the back surface of the n-type semiconductor substrate 1 to the inside. The formation area of the electrode on the back surface of the semiconductor substrate 1 can be increased. Therefore, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, the carrier collection efficiency can be increased and the current can be efficiently taken out. Resistance can also be lowered. Thereby, the characteristics of the heterojunction back contact cell of Embodiment 1 and the heterojunction back contact cell with wiring sheet of Embodiment 1 can be improved.

[Embodiment 2]
FIG. 15 is a schematic enlarged plan view of the back surface of the heterojunction back contact cell 10 according to the second embodiment. As shown in FIG. 15, the heterojunction back contact cell 10 according to the second embodiment is characterized in that a p-type semiconductor substrate 11 such as a p-type single crystal silicon substrate is used instead of the n-type semiconductor substrate 1. Yes.

  Since the description other than the above in the second embodiment is the same as that in the first embodiment, the description thereof will not be repeated.

[Embodiment 3]
FIG. 16 is a schematic enlarged plan view of the back surface of the heterojunction back contact cell 10 according to the third embodiment. As shown in FIG. 16, in the heterojunction back contact cell 10 of Embodiment 3, the n electrode 8 surrounds the periphery 7 of the rectangular island-shaped p electrode, and a part of the n electrode 8 is an n-type semiconductor. It is characterized by being included in a 1 mm area from the outer periphery of the back surface of the substrate 1 to the inside.

  Since the description other than the above in the third embodiment is the same as that in the first and second embodiments, the description thereof will not be repeated.

[Embodiment 4]
The heterojunction back contact cell 10 of Embodiment 4 is replaced with partial removal of the first stacked body 51 using the etching paste 31 and partial removal of the second stacked body 52 using the etching mask 32. Thus, partial removal of the first stacked body 51 and partial removal of the second stacked body 52 are performed by laser light irradiation, respectively.

  FIG. 17 is a schematic cross-sectional view illustrating an example of a method for partially removing the first stacked body 51 by laser light irradiation. As shown in FIG. 17, the p-type amorphous semiconductor film 3 of the first stacked body 51 is partially irradiated with a laser beam 61 to heat and evaporate the first stacked body 51. One layered body 51 can be partially removed.

  FIG. 18 is a schematic cross-sectional view illustrating an example of a method for partially removing the second stacked body 52 by laser light irradiation. As shown in FIG. 18, the n-type amorphous semiconductor film 5 of the second stacked body 52 is partially irradiated with laser light 62 to heat and vaporize the second stacked body 52, thereby It is possible to perform partial removal of the second stacked body 52.

  Since descriptions other than the above in the fourth embodiment are the same as those in the first to third embodiments, the description thereof will not be repeated.

[Embodiment 5]
FIG. 21 is a schematic enlarged plan view of the back surface of the heterojunction back contact cell according to the fifth embodiment. FIG. 22 shows a schematic enlarged cross-sectional view along XII-XII in FIG. 21, and FIG. 23 shows a schematic enlarged cross-sectional view along XIII-XIII in FIG. The heterojunction back contact cell of the fifth embodiment is not limited to that the p-electrode 7 is partially limited to being included in a region 71 of 1 mm inward from the outer periphery of the back surface of the n-type semiconductor substrate 1. This is different from the heterojunction back contact cell. That is, in the heterojunction back contact cell of Embodiment 5, for example, as shown in FIG. 21, all of the p-electrode 7 is included in a region 71 of 1 mm inward from the outer periphery of the back surface of the n-type semiconductor substrate 1. It does not have to be.

  Also in the heterojunction back contact cell of the fifth embodiment, the p electrode 7 is disposed so as to surround the n electrode 8 with a space from the n electrode 8, and therefore, between the p electrode 7 and the n electrode 8. Can be performed not on the periphery of the back surface of the n-type semiconductor substrate 1 but on the inside of the back surface of the n-type semiconductor substrate 1. This eliminates the need to pattern the electrodes located at the periphery of the back surface of the n-type semiconductor substrate 1 with high accuracy, thereby suppressing the occurrence of a short circuit due to poor patterning of the electrodes positioned at the periphery of the back surface of the n-type semiconductor substrate 1. be able to.

  Since the description other than the above in Embodiment 5 is the same as that in Embodiments 1 to 4, the description thereof will not be repeated.

[Appendix]
(1) An embodiment disclosed herein includes a semiconductor substrate of a first conductivity type or a second conductivity type, a first conductivity type amorphous semiconductor film on a first surface side of the semiconductor substrate, and a first substrate of the semiconductor substrate. A second conductive type amorphous semiconductor film on the first surface side, a first electrode on the first conductive type amorphous semiconductor film, and a second electrode on the second conductive type amorphous semiconductor film, The first electrode is a photoelectric conversion element that surrounds the second electrode at a distance from the second electrode. In this case, in a photoelectric conversion element of a type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, the occurrence of a short circuit due to poor patterning of electrodes located at the periphery of the semiconductor substrate is suppressed. can do. The embodiment disclosed herein includes a semiconductor substrate of a first conductivity type or a second conductivity type, a first conductivity type amorphous semiconductor film on a first surface side of the semiconductor substrate, and a first surface of the semiconductor substrate. A second conductive type amorphous semiconductor film on the side, a first electrode on the first conductive type amorphous semiconductor film, and a second electrode on the second conductive type amorphous semiconductor film, Is a photoelectric conversion element that surrounds the second electrode with a gap from the second electrode, and a part of the first electrode is included in a region of 1 mm inside from the outer periphery of the semiconductor substrate. In this case, in a photoelectric conversion element of a type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, the occurrence of a short circuit due to poor patterning of electrodes located at the periphery of the semiconductor substrate is suppressed. can do.

  (2) In the photoelectric conversion element of the embodiment disclosed herein, the first i-type amorphous semiconductor film may be located between the semiconductor substrate and the first conductive amorphous semiconductor film. . Also in this case, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to defective patterning of electrodes located on the periphery of the semiconductor substrate is suppressed. can do.

  (3) In the photoelectric conversion element of the embodiment disclosed herein, the first i-type amorphous semiconductor film may be in contact with each of the semiconductor substrate and the first conductive amorphous semiconductor film. Also in this case, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to defective patterning of electrodes located on the periphery of the semiconductor substrate is suppressed. can do.

  (4) In the photoelectric conversion element of the embodiment disclosed herein, the second i-type amorphous semiconductor film may be located between the semiconductor substrate and the second conductive amorphous semiconductor film. . Also in this case, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to defective patterning of electrodes located on the periphery of the semiconductor substrate is suppressed. can do.

  (5) In the photoelectric conversion element of the embodiment disclosed herein, the second i-type amorphous semiconductor film may be in contact with each of the semiconductor substrate and the second conductivity-type amorphous semiconductor film. Also in this case, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to defective patterning of electrodes located on the periphery of the semiconductor substrate is suppressed. can do.

  (6) In the photoelectric conversion element of the embodiment disclosed here, the second electrode may have an island shape. Also in this case, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to defective patterning of electrodes located on the periphery of the semiconductor substrate is suppressed. can do.

  (7) In the photoelectric conversion element of the embodiment disclosed herein, the second electrode may be rectangular. Also in this case, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to defective patterning of electrodes located on the periphery of the semiconductor substrate is suppressed. can do.

  (8) An embodiment disclosed herein includes a step of forming a first conductivity type amorphous semiconductor film on a first surface side of a semiconductor substrate of a first conductivity type or a second conductivity type; Forming a second conductive type amorphous semiconductor film on the first surface side, forming a first electrode on the first conductive type amorphous semiconductor film, and on the second conductive type amorphous semiconductor film Forming the second electrode, and the first electrode is a method of manufacturing a photoelectric conversion element that surrounds the second electrode at a distance from the second electrode. In this case, in a photoelectric conversion element of a type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to poor patterning of electrodes located at the periphery of the semiconductor substrate is suppressed. can do. The embodiment disclosed herein includes a step of forming a first conductivity type amorphous semiconductor film on a first surface side of a semiconductor substrate of a first conductivity type or a second conductivity type, and a first surface of the semiconductor substrate. Forming a second conductive type amorphous semiconductor film on the side, forming a first electrode on the first conductive type amorphous semiconductor film, and a second on the second conductive type amorphous semiconductor film. Forming a first electrode, the first electrode surrounds the second electrode at a distance from the second electrode, and a part of the first electrode is included in a region of 1 mm inward from the outer periphery of the semiconductor substrate This is a method for manufacturing a photoelectric conversion element. In this case, in a photoelectric conversion element of a type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to poor patterning of electrodes located at the periphery of the semiconductor substrate is suppressed. can do.

  (9) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the step of forming the first conductivity type amorphous semiconductor film includes the step of forming a first i-type amorphous material on the first surface side of the semiconductor substrate. A step of forming a crystalline semiconductor film and a step of forming a first conductive amorphous semiconductor film on the first i-type amorphous semiconductor film may be included. Also in this case, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to defective patterning of electrodes located on the periphery of the semiconductor substrate is suppressed. can do.

  (10) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the first i-type amorphous semiconductor film and the first conductivity type are formed after the step of forming the first conductivity-type amorphous semiconductor film. A step of removing a part of the first stacked body that is a stacked body with the amorphous semiconductor film may be further included. Also in this case, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to defective patterning of electrodes located on the periphery of the semiconductor substrate is suppressed. can do.

  (11) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the step of removing a part of the first stacked body is a step of applying an etching paste to a part of the first stacked body or A step of irradiating a part of the laminated body with laser light may be included. Also in this case, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to defective patterning of electrodes located on the periphery of the semiconductor substrate is suppressed. can do.

  (12) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the step of forming the second conductivity type amorphous semiconductor film is performed after the step of removing a part of the first stacked body. Forming a second i-type amorphous semiconductor film on the first surface side of the substrate; forming a second conductive amorphous semiconductor film on the second i-type amorphous semiconductor film; May be included. Also in this case, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to defective patterning of electrodes located on the periphery of the semiconductor substrate is suppressed. can do.

  (13) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the second i-type amorphous semiconductor film and the second conductivity type are formed after the step of forming the first conductivity-type amorphous semiconductor film. A step of removing a part of the second stacked body that is a stacked body with the amorphous semiconductor film may be further included. Also in this case, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to defective patterning of electrodes located on the periphery of the semiconductor substrate is suppressed. can do.

  (14) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the step of removing a part of the second stacked body includes a step of installing an etching mask on a part of the second stacked body or The process of irradiating a part of 2 laminated body with a laser beam may be included. Also in this case, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to defective patterning of electrodes located on the periphery of the semiconductor substrate is suppressed. can do.

  (15) An embodiment disclosed herein includes a photoelectric conversion element and a wiring sheet electrically connected to the photoelectric conversion element, and the photoelectric conversion element is a semiconductor of a first conductivity type or a second conductivity type. A first conductive type amorphous semiconductor film on the first surface side of the semiconductor substrate; a second conductive type amorphous semiconductor film on the first surface side of the semiconductor substrate; and a first conductive type amorphous semiconductor film A first electrode on the semiconductor film; and a second electrode on the second conductive type amorphous semiconductor film, the first electrode surrounding the second electrode at a distance from the second electrode; , An insulating base material, a first wiring on the insulating base material, and a second wiring on the insulating base material, wherein the first electrode is electrically connected to the first wiring, and the second electrode Is a photoelectric conversion device electrically connected to the second wiring. In this case, in a photoelectric conversion element of a type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to poor patterning of electrodes located at the periphery of the semiconductor substrate is suppressed. can do. Embodiment disclosed here is provided with the photoelectric conversion element and the wiring sheet electrically connected with the photoelectric conversion element, and a photoelectric conversion element is a 1st conductivity type or 2nd conductivity type semiconductor substrate, A first conductive type amorphous semiconductor film on the first surface side of the semiconductor substrate, a second conductive type amorphous semiconductor film on the first surface side of the semiconductor substrate, and the first conductive type amorphous semiconductor film And a second electrode on the second conductive type amorphous semiconductor film. The first electrode surrounds the second electrode at a distance from the second electrode, and the first electrode The wiring sheet includes an insulating base material, a first wiring on the insulating base material, and a second wiring on the insulating base material. The first electrode is electrically connected to the first wiring, and the second electrode is electrically connected to the second wiring. It is the location. In this case, in a photoelectric conversion element of a type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to poor patterning of electrodes located at the periphery of the semiconductor substrate is suppressed. can do.

  (16) In the photoelectric conversion device of the embodiment disclosed herein, the second electrode may have an island shape. Also in this case, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to defective patterning of electrodes located on the periphery of the semiconductor substrate is suppressed. can do.

  (17) In the photoelectric conversion device of the embodiment disclosed herein, the second electrode may be rectangular. Also in this case, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to defective patterning of electrodes located on the periphery of the semiconductor substrate is suppressed. can do.

  (18) In the photoelectric conversion device according to the embodiment disclosed herein, the second wiring may have a strip shape, and may further include an insulating layer between the first electrode and the second wiring. Also in this case, in the photoelectric conversion element of the type that forms a pn junction by forming an amorphous semiconductor film on the back surface of the semiconductor substrate, occurrence of a short circuit due to defective patterning of electrodes located on the periphery of the semiconductor substrate is suppressed. can do.

  Although the embodiment has been described as described above, it is also planned from the beginning to appropriately combine the configurations of the above-described embodiments.

  It should be thought that embodiment disclosed this time is an illustration and restrictive at no points. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  Embodiment disclosed here can be utilized for a photoelectric conversion element, a manufacturing method of a photoelectric conversion element, and a photoelectric conversion device, and can be suitably used for a solar cell, a manufacturing method of a solar cell, and a solar cell module suitably. The heterojunction back contact cell, the method of manufacturing the heterojunction back contact cell, and the heterojunction back contact cell with a wiring sheet may be particularly preferably used.

  1 n-type semiconductor substrate, 1a first surface, 1b second surface, 2 i-type amorphous semiconductor film, 3 p-type amorphous semiconductor film, 3a edge, 4 i-type amorphous semiconductor film, 4a Edge, 5 n-type amorphous semiconductor film, 5a Edge, 7 p electrode, 8 n electrode, 10 heterojunction back contact cell, 20 wiring sheet, 21 insulating substrate, 22 first wiring, 23 second Wiring, 31 etching paste, 32 etching mask, 41 conductive layer, 42 insulating layer, 51 first laminated body, 52 second laminated body, 61, 62 laser light, 71 region, 111 substrate, 112, 113 substantially Intrinsic amorphous semiconductor layer, 114 n-type amorphous semiconductor layer, 115 p-type amorphous semiconductor layer, 116 n-type electrode, 116 a base electrode, 116 b copper layer, 116 c current extraction part, 116 d current collection part, 117 p-type Electrode, 117a Base electrode, 117b Copper layer, 117c Current extraction part, 117d Current collecting part, 119 Substantially intrinsic amorphous semiconductor, 120 n-type amorphous silicon, 121 silicon nitride layer, 122 n region, 123 p Region 124 protective film.

Claims (7)

A semiconductor substrate of a first conductivity type or a second conductivity type;
A first conductivity type amorphous semiconductor film on a first surface side of the semiconductor substrate;
A second conductivity type amorphous semiconductor film on the first surface side of the semiconductor substrate;
A first electrode on the first conductive type amorphous semiconductor film;
A second electrode on the second conductivity type amorphous semiconductor film, and a photoelectric conversion element comprising:
In a plan view of the back surface of the photoelectric conversion element, the first electrode surrounds the second electrode at a distance from the second electrode ;
The photoelectric conversion element , wherein the first conductive amorphous semiconductor film and the second conductive amorphous semiconductor film are located in the gap between the first electrode and the second electrode .   The photoelectric conversion element according to claim 1, wherein the second electrode has an island shape.   3. The photoelectric conversion element according to claim 1, wherein a part of the first electrode is included in a region of 1 mm inward from the outer periphery of the semiconductor substrate. A photoelectric conversion element;
A wiring sheet electrically connected to the photoelectric conversion element,
The photoelectric conversion element includes a semiconductor substrate of a first conductivity type or a second conductivity type, a first conductivity type amorphous semiconductor film on a first surface side of the semiconductor substrate, and the first surface of the semiconductor substrate. A second conductive type amorphous semiconductor film on the side, a first electrode on the first conductive type amorphous semiconductor film, and a second electrode on the second conductive type amorphous semiconductor film, The first electrode surrounds the second electrode with a space from the second electrode, and the first conductive amorphous semiconductor film is disposed in the space between the first electrode and the second electrode. And the second conductive type amorphous semiconductor film are located,
The wiring sheet includes an insulating base, a first wiring on the insulating base, and a second wiring on the insulating base,
The first electrode is electrically connected to the first wiring;
The photoelectric conversion device, wherein the second electrode is electrically connected to the second wiring.   The photoelectric conversion device according to claim 4, wherein the second electrode has an island shape.   6. The photoelectric conversion device according to claim 4, wherein the second wiring has a strip shape, and further includes an insulating layer between the first electrode and the second wiring.   7. The photoelectric conversion device according to claim 4, wherein a part of the first electrode is included in a region of 1 mm inward from the outer periphery of the semiconductor substrate.

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