JP6601311B2 - Power converter - Google Patents

Description

  The present invention relates to a power conversion device including a semiconductor element and a control circuit unit that controls a switching operation of the semiconductor element.

  As a power conversion device such as an inverter or a DC-DC converter, a device including a plurality of semiconductor elements such as IGBTs and a control circuit unit connected to the semiconductor elements is known (see Patent Document 1 below). The semiconductor elements include an upper arm semiconductor element disposed on the upper arm side and a lower arm semiconductor element disposed on the lower arm side. The control circuit unit controls the switching operation of these semiconductor elements. Thereby, it is configured to perform power conversion.

  When turning on the semiconductor element, the control circuit unit applies a predetermined voltage (control voltage) between the reference electrode (emitter) and the control electrode (gate) of the semiconductor element. Further, when turning off, application of the control voltage is stopped. As a result, the semiconductor element is switched.

  In recent years, a power converter capable of obtaining a higher output current has been desired. For this reason, it has been studied to connect a plurality of upper arm semiconductor elements and a plurality of lower arm semiconductor elements in parallel, and to simultaneously perform a switching operation of the plurality of semiconductor elements connected in parallel. Thereby, even if there is little electric current which can be sent through each semiconductor element, making it possible to send a high electric current as the whole power converter is examined.

JP 2011-120358 A

  However, with the above configuration, the potential of the reference electrode (reference potential) of a plurality of upper arm semiconductor elements that perform switching operations simultaneously tends to vary. That is, as will be described later, when a plurality of upper arm semiconductor elements are driven simultaneously, due to variations in recovery characteristics of freewheel diodes connected in reverse parallel to the lower arm semiconductor elements, some of the upper arm semiconductor elements The on-current may flow through the bus bar connecting the reference electrodes of the upper arm semiconductor element to the free wheel diode on the lower arm semiconductor element side (see FIG. 1).

  In this case, an induced electromotive force V (= Ldi / dt) is generated due to inductance parasitic on the bus bar. Therefore, the reference electrode potentials of the plurality of upper arm semiconductor elements are different from each other. Therefore, the control voltage applied between the reference electrode and the control electrode is different for each upper arm semiconductor element. For this reason, a high control voltage is applied to some upper arm semiconductor elements, and this upper arm semiconductor element is likely to be deteriorated, or the control voltage is not sufficiently applied to other upper arm semiconductor elements. There is a possibility that it is likely to decrease.

  The present invention has been made in view of such a background, and an object of the present invention is to provide a power conversion device capable of suppressing variations in reference potential among a plurality of upper arm semiconductor elements that perform switching operations simultaneously.

One embodiment of the present invention includes a plurality of semiconductor elements (2),
A freewheeling diode (4) connected in reverse parallel to the individual semiconductor elements;
A control circuit unit (3) for controlling the switching operation of the semiconductor element,
The semiconductor elements include an upper arm semiconductor element (2 _H ) disposed on the upper arm side and a lower arm semiconductor element (2 _L ) disposed on the lower arm side, and are parallel to each other by the control circuit unit. A plurality of the lower arm semiconductor elements connected to each other at the same time, and a plurality of the lower arm semiconductor elements connected in parallel to each other at the same time.
The control circuit unit is configured to make the switching speed (di _H / dt) of the upper arm semiconductor element slower than the switching speed (di _L / dt) of the lower arm semiconductor element ( 1).

The control circuit unit of the power converter is configured to make the switching speed of the upper arm semiconductor element slower than the switching speed of the lower arm semiconductor element.
Therefore, even when the on-current of some upper arm semiconductor elements flows through the bus bar connecting the reference electrodes of the upper arm semiconductor elements, the switching speed (di _H / dt) is slow, so that the inductance L parasitic on the bus bar is reduced. The induced electromotive force V (= Ldi _H / dt) generated as a cause can be reduced. Therefore, it is possible to suppress a large variation in the reference electrode potential of the plurality of upper arm semiconductor elements. Therefore, the variation in control voltage applied to the upper arm semiconductor element can be reduced. Therefore, a high control voltage is applied to some upper arm semiconductor elements, and this upper arm semiconductor element deteriorates, or a sufficient control voltage is not applied to other upper arm semiconductor elements, making it difficult to turn on. Can prevent problems.

  In the power conversion device, the switching speed of the lower arm semiconductor element is made faster than the switching speed of the upper arm semiconductor element. Therefore, the switching loss of the lower arm semiconductor element can be reduced. Therefore, the switching loss of the whole power converter device can be reduced.

As described above, according to this aspect, it is possible to provide a power conversion device that can suppress variations in reference potentials of a plurality of upper arm semiconductor elements that perform switching operations simultaneously.
In addition, the code | symbol in the parenthesis described in the means to solve a claim and a subject shows the correspondence with the specific means as described in embodiment mentioned later, and limits the technical scope of this invention. It is not a thing.

FIG. 4 is a partial circuit diagram of the power conversion device when the upper arm semiconductor element is switched from off to on in the first embodiment. FIG. 4 is a partial circuit diagram of the power conversion device when the lower arm semiconductor element is switched from off to on in the first embodiment. FIG. 3 is a circuit diagram of a part of the power conversion device in a state where a return current flows through a free wheel diode connected in reverse parallel to the lower arm semiconductor element in the first embodiment. 1 is an overall circuit diagram of a power conversion device according to Embodiment 1. FIG. It is sectional drawing of the power converter device in Embodiment 1, Comprising: It is VV sectional drawing of FIG. VI-VI sectional drawing of FIG. VII-VII sectional drawing of FIG. 3 is a graph showing temporal changes in voltage and current when the switching speed of the semiconductor element is low in the first embodiment. 3 is a graph showing temporal changes in voltage and current when the switching speed of the semiconductor element is high in the first embodiment. FIG. 4 is an overall circuit diagram of a power conversion device according to a second embodiment. Sectional drawing of the power converter device in Embodiment 3. FIG.

  The power conversion device can be a vehicle-mounted power conversion device to be mounted on a vehicle such as an electric vehicle or a hybrid vehicle.

(Embodiment 1)
An embodiment according to the power conversion device will be described with reference to FIGS. As shown in FIGS. 1 and 4, the power conversion device of this embodiment includes a plurality of semiconductor elements 2, a free wheel diode 4, and a control circuit unit 3. The freewheel diode 4 is connected in reverse parallel to each semiconductor element 2. The control circuit unit 3 controls the switching operation of the semiconductor element 2.

The semiconductor element 2 includes an upper arm semiconductor element 2 _H disposed on the upper arm side and a lower arm semiconductor element 2 _L disposed on the lower arm side. The control circuit unit 3 simultaneously switches a plurality of upper arm semiconductor elements 2 _H connected in parallel to each other and simultaneously switches a plurality of lower arm semiconductor elements 2 _L connected in parallel to each other.

The control circuit unit 3 is configured to make the switching speed di _H / dt of the upper arm semiconductor element 2 _H slower than the switching speed di _L / dt of the lower arm semiconductor element 2 _L.

  The power conversion device 1 of this embodiment is a vehicle-mounted power conversion device to be mounted on a vehicle such as an electric vehicle or a hybrid vehicle. As shown in FIG. 4, in this embodiment, an IGBT is used as the semiconductor element 2. Then, the semiconductor element 2 is switched by the control circuit unit 3. Thereby, the DC power supplied from the DC power supply 8 is converted into AC power, and the AC load 81 (three-phase AC motor) is driven. Thus, the vehicle is running.

In this embodiment, as shown in FIG. 4, it is connected two upper arms semiconductor element 2 _H each other, and two lower arm semiconductor element 2 _L each other in parallel with each other. The control circuit unit 3 simultaneously switches the two semiconductor elements 2 connected in parallel. Thereby, even if there is little electric current which flows through each semiconductor element 2, it is comprised so that a high electric current can be output as the power converter device 1 whole.

Moreover, the power converter device 1 of this embodiment includes a plurality of semiconductor modules 20 (see FIGS. 5 and 6). Each semiconductor module 20 includes one upper arm semiconductor element 2 _H and one lower arm semiconductor element 2 _L.

As shown in FIG. 4, the reference electrodes 21 (emitters) of the two upper arm semiconductor elements 2 _{H that} are driven simultaneously are connected to each other by the AC bus bar 6. The output current of the power conversion device 1 is configured to flow to the AC load 81 via the AC bus bar 6.

Further, as shown in FIG. 1, the semiconductor element 2, a driving circuit 30 for applying a voltage V _G to the control electrode 22 (gate) is connected. The drive circuit 30 is formed in the control circuit unit 3. Two upper arm semiconductor elements 2 _{H that} are driven simultaneously are connected to a common drive circuit 30 _H. In addition, the two lower arm semiconductor elements 2 _{L that} are driven simultaneously are connected to a common drive circuit 30 _L.

The drive circuit 30 includes an internal power supply 301, a wiring 302, and a plurality of resistors R ₁ , R ₂ , and R _G. The wiring 302 connects the reference electrodes 21 (emitters) of the two semiconductor elements 2 to each other. The intermediate point 31 of the wiring 302 and the internal power supply 301 are electrically connected. The voltage of the internal power supply 301 is divided by two resistors R ₁ and R ₂ to generate a voltage V _G. This voltage V _G is applied to the control electrode 22 (gate) of the semiconductor element 2. As described above, the drive circuit 30 is configured to apply the voltage V _G to the control electrode 22 based on the intermediate point 31 of the wiring 302.

Further, the drive circuit 30 includes two gate resistors _RG . A voltage V _G is applied to the control electrode 22 via the gate resistance R _G. Gate resistor R _GH of the drive circuit 30 _H of the upper arm semiconductor element 2 for _H, rather than the gate resistance R _GL of the drive circuit 30 _L of the lower arm semiconductor element 2 for _L, a high resistance value. As a result, the switching speed di _H / dt of the upper arm semiconductor element 2 _H is made slower than the switching speed di _L / dt of the lower arm semiconductor element 2 _L.

As shown in FIG. 1, free wheel diodes 4 are connected in reverse parallel to the individual semiconductor elements 2. The free wheel diode 4 has a period during which the return current _if flows under the influence of the inductance of the AC load 81 (see FIG. 4). For example, as shown in FIG. 3, when the upper arm semiconductor element 2 _H is turned off, there is a period in which the return current _if flows in the two free wheel diodes 4 _La and 4 _Lb of the lower arm semiconductor element 2 _L. Thereafter, when the lower arm semiconductor element 2 _L is turned off and the upper arm semiconductor element 2 _H is turned on, the current i flows through the upper arm semiconductor element 2 _H, and the free wheel diode 4 _{L of} the lower arm semiconductor element 2 _L recovers. .

At this time, as shown in FIG. 1, due to variations in the recovery characteristics of the two free wheel diodes 4 _La and 4 _Lb , one free wheel diode 4 _La recovers quickly and the other free wheel diode 4 _Lb does not recover. , The reflux current _if may continue to flow. In this case, the on-current i _H of the two upper arm semiconductor elements 2 _Ha and 2 _Hb flows only through one free wheel diode 4 _La . Therefore, the on-current i _H of the other upper arm semiconductor element 2 _Hb flows through the AC bus bar 6 to one free wheel diode 4 _La . At this time, an induced electromotive force V (= Ldi _H / dt) is generated in the AC bus bar 6 due to the inductance L parasitic on the AC bus bar 6. Therefore, the potential V _Ha of the reference electrode 21 _Ha of one upper arm semiconductor element 2 _Ha is lower by the induced electromotive force V than the potential V _Hb of the reference electrode 21 _Hb of the other upper arm semiconductor element 2 _Hb .

Accordingly, the reference potential V _Ha of one upper arm semiconductor element 2 _Ha is lower than the intermediate point 31 by ΔV (= V / 2). Further, the reference potential V _Hb of the other upper arm semiconductor element 2 _Hb is higher than the intermediate point 31 by ΔV (= V / 2). As described above, the drive circuit 30 _H applies the voltage V _G to the control electrode 22 with the intermediate point 31 as a reference. Therefore, in one upper arm semiconductor element 2 _Ha , the control voltage applied between the reference electrode 21 _Ha and the control electrode 22 _Ha becomes V _G + ΔV, and the other upper arm semiconductor element 2 _Hb controls the reference electrode 21 _Hb. The control voltage applied to the electrode 22 _Hb is V _G −ΔV.

Here, if the switching speed di _H / dt of the upper arm semiconductor element 2 _H is high, a high induced electromotive force V (= Ldi _H / dt) is generated. Therefore, the control voltage V _G + ΔV (= V _G + V / 2) applied to one upper arm semiconductor element 2 _Ha becomes too high, and this upper arm semiconductor element 2 _Ha is likely to deteriorate. Further, the control voltage V _G −ΔV (= V _G −V / 2) applied to the other upper arm semiconductor element 2 _Hb becomes too low, and the upper arm semiconductor element 2 _Hb is difficult to turn on. However, in this embodiment, the switching speed di _H / dt of the upper arm semiconductor element 2 _H is made slower than the switching speed di _L / dt of the lower arm semiconductor element 2 _L. Therefore, the induced electromotive force V (= Ldi _H / dt) can be reduced. Accordingly, the control voltage V _G + ΔV (= V _G + V / 2) applied to one upper arm semiconductor element 2 _Ha becomes too high, or the control voltage V _G −ΔV (= V applied to the other lower arm semiconductor element 2 _{Hb). G-} V / 2) can be prevented from becoming too low.

As shown in FIG. 2, when the lower arm semiconductor element 2 _L is turned on, the free wheel diode 4 _H connected in reverse parallel to the upper arm semiconductor element 2 _H recovers. At this time, due to the variation in recovery characteristics, one free wheel diode 4 _Ha may not recover and only the other free wheel diode 4 _Hb may recover. In this case, part of the recovery current i _r flows into one of the lower arm semiconductor element 2 _La through the AC bus bar 6. In this embodiment, since the switching speed di _L / dt of the lower arm semiconductor element 2 _L is increased, a high induced electromotive force V (= Ldi _L / dt) is generated in the bus bar 6 at this time. However, the upper arm semiconductor element 2 _H at this time because it off, there is no significant effect on the upper arm semiconductor element 2 _H. Further, the induced electromotive force V is applied between the two lower arms of the semiconductor element 2 _L collector of 23 _La, 23 _Lb, be variations in the potential of the collector 23 _La, 23 _Lb, the lower arm semiconductor element 2 _L There is no big impact.

Next, the three-dimensional structure of the power conversion device 1 will be described. As shown in FIG. 5, in this embodiment, the stacked body 10 is configured by stacking a plurality of semiconductor elements 2 and a plurality of cooling pipes 50. The cooler 5 is formed by the plurality of cooling pipes 50. A smoothing capacitor 82 is disposed at a position adjacent to the stacked body 10 in the stacking direction (X direction) of the stacked body 10.

  As shown in FIG. 5, two cooling pipes 50 adjacent in the X direction are connected by a connecting pipe 52. In addition, among the plurality of cooling pipes 50, an end cooling pipe 50a located at one end in the X direction is connected to an introduction pipe 12 for introducing the refrigerant 11 and a lead-out pipe 13 for leading out the refrigerant 11. is doing. When the refrigerant 11 is introduced from the introduction pipe 12, the refrigerant 11 flows through all the cooling pipes 50 through the connection pipe 52 and is led out from the outlet pipe 13. Thereby, the semiconductor module 20 is cooled.

  Further, the pressure member 14 is interposed between the laminate 10 and the capacitor 82. The pressurizing member 14 presses the laminated body 10 toward the wall portion 151 of the case 15. Thereby, the laminated body 10 is fixed in the case 15 while ensuring a contact pressure between the semiconductor module 20 and the cooling pipe 50.

As shown in FIG. 6, the semiconductor module 20 includes a main body 25 containing the semiconductor element 2, a power terminal 26 protruding from the main body 25, and a control terminal 27. The semiconductor element 2 is electrically connected to the control circuit unit 3 through the control terminal 27. The power terminal 26 includes a positive terminal 26 _P , a negative terminal 26 _N, and an AC terminal 26 _A. The positive terminal 26 _P is connected to the positive bus bar 7 _P , and the negative terminal 26 _N is connected to the negative bus bar 7 _N. The AC terminal 26 _A is connected to the AC bus bar 6. Via a positive electrode bus bar 7 _P and the negative bus bar 7 _N, the semiconductor module 20 to a direct current power source 8 (see FIG. 4) are electrically connected. Further, the semiconductor module 20 is electrically connected to the AC load 81 via the AC bus bar 6.

As shown in FIG. 7, a flow path 51 through which the refrigerant 11 flows is formed in the cooling pipe 50. The upper arm semiconductor element 2 _H is arranged upstream of the refrigerant 11, and the lower arm semiconductor element 2 _L is arranged downstream of the refrigerant 11.

In this embodiment, as described above, the switching speed di _H / dt of the upper arm semiconductor element 2 _H is made slower than the switching speed di _L / dt of the lower arm semiconductor element 2 _L. For this reason, the upper arm semiconductor element 2 _H has a higher switching loss P and tends to have a higher temperature. That is, as shown in FIGS. 8 and 9, the switching loss P of the semiconductor element 2 is a product of the voltage v and the current i. Accordingly, the switching loss P is higher in the upper arm semiconductor element 2 _H having a lower switching speed di / dt than in the lower arm semiconductor element 2 _L. Therefore, as shown in FIG. 7, by the upper arm semiconductor element 2 _H located upstream of the refrigerant 11, it is possible to increase the cooling efficiency of the upper arm semiconductor element 2 _H, the temperature of the upper arm semiconductor element 2 _H rises Too much can be suppressed.

Next, the effect of this form is demonstrated. The control circuit unit 3 of the present embodiment is configured to make the switching speed di _H / dt of the upper arm semiconductor element 2 _H slower than the switching speed di _L / dt of the lower arm semiconductor element 2 _L.
Therefore, as shown in FIG. 1, even when the on-current i _{H of} a part of the upper arm semiconductor element 2 _Hb flows to the AC bus bar 6, the switching speed di _H / dt is slow, so that the inductance L parasitic to the AC bus bar 6 is reduced. The induced electromotive force V (= Ldi _H / dt) generated due to the above can be reduced. Therefore, it is possible to suppress a large variation in the potentials of the reference electrodes 21 _Ha and 21 _Hb of the plurality of upper arm semiconductor elements 2 _Ha and 2 _Hb . Therefore, it is possible to reduce variations in the control voltage applied to the upper arm semiconductor element 2 _H. Therefore, a high control voltage is applied to a part of the upper arm semiconductor element 2 _Ha , the upper arm semiconductor element 2 _Ha is deteriorated, or the control voltage is not sufficiently applied to the other part of the upper arm semiconductor element 2 _Hb. , The problem that it becomes difficult to turn on can be suppressed.

In the present embodiment, the switching speed di _L / dt of the lower arm semiconductor element 2 _L is made faster than the switching speed di _H / dt of the upper arm semiconductor element 2 _H. Therefore, the switching loss of the lower arm semiconductor element 2 _L can be reduced, and the switching loss of the entire power conversion device 1 can be reduced.

Further, as shown in FIG. 7, the power conversion device 1 of the present embodiment includes a cooler 5 that cools the semiconductor elements 2 _H and 2 _L. Then, the upper arm semiconductor element 2 _H, than the lower arm semiconductor element 2 _L, cooling efficiency of the cooler 5 is arranged in a higher position.
Therefore, the switching speed di / dt is slow, and the upper arm semiconductor element 2 _H that tends to have high switching loss can be efficiently cooled, and the temperature of the upper arm semiconductor element 2 _H can be prevented from rising excessively.

Further, in this embodiment, as shown in FIG. 7, the laminated body 10 is configured by laminating a plurality of semiconductor modules 20 and cooling pipes 50. The upper arm semiconductor element 2 _H is arranged upstream of the refrigerant 11 with respect to the lower arm semiconductor element 2 _L.
Therefore, the cooling efficiency on a high calorific value arm semiconductor element 2 _H, can be reliably increased, the temperature of the upper arm semiconductor element 2 _H is too high can be effectively suppressed.

  As described above, according to this embodiment, it is possible to provide a power conversion device that can suppress variations in reference potentials of a plurality of upper arm semiconductor elements that perform switching operations simultaneously.

  In this embodiment, two semiconductor elements 2 are connected in parallel. However, the present invention is not limited to this, and three or more semiconductor elements 2 may be connected in parallel. Further, in this embodiment, the IGBT is used as the semiconductor element 2, but other elements such as a MOSFET may be used. Further, in the present embodiment, the semiconductor module 20 including the two semiconductor elements 2 is used, but other semiconductor modules 20 may be used. For example, a semiconductor module 20 incorporating one semiconductor element 2 or a semiconductor module 20 incorporating six semiconductor elements 2 may be used.

(Embodiment 2)
This embodiment is an example in which the circuit configuration of the power conversion device 1 is changed. As shown in FIG. 10, the power conversion device 1 of this embodiment includes a plurality of semiconductor elements 2 _H and 2 _L , a control circuit unit 3, a reactor 89, a filter capacitor 83, and a smoothing capacitor 88. A bidirectional DC-DC converter 101 is configured using these electronic components.

In this embodiment, similarly to the first embodiment, a plurality of upper arm semiconductor elements 2 _H are connected in parallel, and these are simultaneously switched by the control circuit unit 3. Further, a plurality of lower arm semiconductor elements 2 _L are connected in parallel, and the control circuit unit 3 performs switching operations simultaneously.

When boosting the DC voltage of the DC power supply 8, the control circuit unit 3 alternately switches between the first state and the second state. In the first state, the upper arm semiconductor element 2 _H is turned off and the lower arm semiconductor element 2 _L is turned on. Thereby, a current is passed from the DC power supply 8 to the lower arm semiconductor element 2 _L. In the second state, the upper arm semiconductor element 2 _H is turned on and the lower arm semiconductor element 2 _L is turned off. In this way, the influence of the inductance of the reactor 89, the current to the upper arm semiconductor element freewheel diodes connected in antiparallel 2 _H 4 _H flows. The DC voltage of the DC power source 8 is boosted by alternately switching between the first state and the second state. As in the first embodiment, the control circuit unit 3 makes the switching speed di _H / dt of the upper arm semiconductor element 2 _H slower than the switching speed di _L / dt of the lower arm semiconductor element 2 _L.

When the DC voltage applied between the terminals 108 and 109 is stepped down and applied to the DC power supply 8, the control circuit unit 3 switches between the third state and the fourth state alternately. In the third state, the lower arm semiconductor element 2 _L is turned off and the upper arm semiconductor element 2 _H is turned on. Thus, the current supplied from the terminal 109, flow through the upper arm semiconductor element 2 _H into the reactor 89. In the fourth state, the lower arm semiconductor element 2 _L is turned on and the upper arm semiconductor element 2 _H is turned off. In the fourth state, the reflux current of the reactor 89 flows through the free wheel diode 4 _L connected in reverse parallel to the lower arm semiconductor element 2 _L. By alternately switching between the third state and the fourth state, the DC voltage is stepped down and the DC power supply 8 is charged. At this time, the control circuit section 3 makes the switching speed di _H / dt of the upper arm semiconductor element 2 _H slower than the switching speed di _L / dt of the lower arm semiconductor element 2 _L.
In addition, the same configuration and operational effects as in the first embodiment are provided.

(Embodiment 3)
In this embodiment, the shape of the cooler 5 is changed. In this embodiment, as shown in FIG. 11, the flow path 51 of the refrigerant 11 is formed in the cooler 5. The semiconductor module 20 is disposed in the flow path 51. As a result, the semiconductor module 20 is brought into direct contact with the refrigerant 11 to cool the semiconductor module 20 with high efficiency. Only one channel 51 is formed in the cooler 5.

Further, similarly to Embodiment 1 in the present embodiment, connecting the plurality of upper arm semiconductor element 2 _H parallel to one another, so they simultaneously switching operation. Also, connecting a plurality of the lower arm semiconductor element 2 _L in parallel with each other, so they are simultaneously switching operation. The switching speed di _H / dt of the upper arm semiconductor element 2 _H is made slower than the switching speed of the lower arm semiconductor element 2 _L.

Further, in this embodiment, the upper arm semiconductor element 2 _H is arranged upstream of the refrigerant 11 with respect to the lower arm semiconductor element 2 _L built in the same semiconductor module 20 as the upper arm semiconductor element 2 _H.
Therefore, the cooling efficiency of the upper arm semiconductor element 2 _{H with} a high calorific value can be made higher than the cooling efficiency of the lower arm semiconductor element 2 _L built in the same semiconductor module 20. Therefore, it is possible to suppress the temperature of the upper arm semiconductor element 2 _H is too high.
In addition, the configuration and operational effects similar to those of the first embodiment are provided.

DESCRIPTION OF SYMBOLS 1 Power converter 2 Semiconductor element 2 _H upper arm semiconductor element 2 _L lower arm semiconductor element 3 Control circuit part 4 Freewheel diode

Claims (4)

A plurality of semiconductor elements (2);
A freewheeling diode (4) connected in reverse parallel to the individual semiconductor elements;
A control circuit unit (3) for controlling the switching operation of the semiconductor element,
The semiconductor elements include an upper arm semiconductor element (2 _H ) disposed on the upper arm side and a lower arm semiconductor element (2 _L ) disposed on the lower arm side, and are parallel to each other by the control circuit unit. A plurality of the lower arm semiconductor elements connected to each other at the same time, and a plurality of the lower arm semiconductor elements connected in parallel to each other at the same time.
The control circuit unit is configured to make the switching speed (di _H / dt) of the upper arm semiconductor element slower than the switching speed (di _L / dt) of the lower arm semiconductor element ( 1).   2. The cooler according to claim 1, further comprising a cooler for cooling the semiconductor element, wherein the upper arm semiconductor element is disposed at a position where the cooling efficiency of the cooler is higher than that of the lower arm semiconductor element. Power conversion device.   A plurality of semiconductor modules (20) containing the semiconductor elements and a plurality of cooling pipes (50) for cooling the semiconductor modules are stacked, and the refrigerant (11) flows through each of the cooling pipes. The power converter according to claim 2, wherein the cooler is configured by a plurality of cooling pipes, and the upper arm semiconductor element is arranged upstream of the refrigerant with respect to the lower arm semiconductor element. A semiconductor module (20) including the semiconductor element; a flow path (51) through which a coolant for cooling the semiconductor module flows is formed in the cooler; and the semiconductor module is disposed in the flow path. 3. The power according to claim 2 , wherein the upper arm semiconductor element is arranged upstream of the refrigerant with respect to the lower arm semiconductor element provided in the same semiconductor module as the upper arm semiconductor element. Conversion device.

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