JP6561496B2 - Semiconductor device - Google Patents

Description

  The present invention relates to an IGBT (Insulated Gate Bipolar Transistor).

In general, IGBTs (Insulated Gate Bipolar Transistors) and diodes (Diodes) formed as individual semiconductors are combined and used in power converters such as converters and inverters. In such a power conversion device, the IGBT is used as a switching element, and the diode is used to bypass the current when the IGBT is turned off.
In recent years, an RC-IGBT (Reverse Conducting IGBT) in which an IGBT and a FWD (Free Wheeling Diode) are formed on the same semiconductor substrate has been proposed (for example, Patent Document 1).

For example, as shown in FIG. 4, the RC-IGBT has a MOS (including a p base region 102, an emitter region 103, a gate insulating film 104, and a gate electrode 105 on the front surface of a semiconductor substrate that becomes the n drift region 101. An insulating gate made of a metal-oxide film-semiconductor) structure is provided. The p base region provided in the diode region 110 is the anode region 112. Emitter electrode 106 is in contact with p base region 102 and emitter region 103. The emitter electrode 106 is in contact with the anode region 112 and functions as an anode electrode.

  A p collector region 107 is provided in the IGBT region 100 and an n cathode region 117 is provided in the diode region 110 on the back surface of the semiconductor substrate to be the n drift region 101. Collector electrode 108 is electrically connected to p collector region 107. Further, the collector electrode 108 is electrically connected to the n cathode region 117 and also functions as a cathode electrode. By providing the IGBT and the diode in the same semiconductor substrate in this way, it is possible to reduce the size and cost as compared with the case where the individual elements are used in combination.

JP 2013-197306 A

In the diode region provided in the RC-IGBT, the IGBT region 100 does not conduct in a state where a regenerative current flows in the forward direction, but the diode region 110 is forward biased. At this time, holes are injected from the anode region 112 of the diode region 110 and a large number of carriers (holes) are accumulated in the n drift region 101.
When the RC-IGBT ends the regenerative operation and shifts to the reverse recovery operation (recovery operation), the diode region 110 becomes reverse biased. Then, a depletion layer spreads in the n drift region 101, and carriers accumulated in the n drift region 101 are extracted with holes to the anode region 112 and electrons to the n cathode region 117, thereby generating a reverse recovery current (recovery current). .
If a depletion layer is formed in the n drift region 101 in a short time, the absolute value (large noise) of the reverse recovery current flows between the collector electrode 108 and the emitter electrode 106, thereby connecting to the RC-IGBT. The circuit may malfunction.

An object of the present invention is to provide a semiconductor device capable of improving the switching characteristics in order to solve the above-described problems caused by the prior art.

In order to solve the above-described problems and achieve the object of the present invention, a semiconductor device according to the present invention includes:
A first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type opposite to the first conductivity type provided on the first semiconductor region, and a second semiconductor region provided on the second semiconductor region, An active region including a third semiconductor region of one conductivity type and a fourth semiconductor region of a second conductivity type provided on the opposite side of the second semiconductor region as viewed from the first semiconductor region; and a second semiconductor region And an upper electrode electrically connected to the third semiconductor region, a lower electrode electrically connected to the first semiconductor region and the fourth semiconductor region, a breakdown voltage improving region provided outside the active region, A fifth semiconductor region of a first conductivity type that is provided outside the breakdown voltage improving region and opposite to the lower electrode of the first semiconductor region and having a higher impurity concentration than the first semiconductor region. Features.

  The semiconductor device according to the present invention has an effect that the switching characteristics can be improved.

1 is a cross-sectional view showing a semiconductor device according to a first embodiment; 1 is a plan view showing a semiconductor device according to a first embodiment; FIG. 3 is a diagram illustrating an operation of the semiconductor device according to the first embodiment. It is sectional drawing which shows the conventional semiconductor device.

  Hereinafter, preferred embodiments of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings. Note that, in the following description of the embodiments and the accompanying drawings, the same reference numerals are given to the same components, and duplicate descriptions are omitted.

(Embodiment 1)
The semiconductor device according to the first embodiment is a semiconductor device in which a portion functioning as an insulated gate bipolar transistor (IGBT) and a portion functioning as a diode for bypassing and circulating current when the IGBT is turned off are integrally formed, It is configured as shown in FIG.

  In the semiconductor device shown in FIG. 1, a portion functioning as an IGBT includes a P-type base region 2 formed on one surface side of the N-type semiconductor region 1 and an N-type semiconductor region 1 on the P-type base region 2. An N-type emitter region 3 doped with an N-type impurity having a high impurity concentration; a gate insulating film 4 formed on a P-type base region 2 sandwiched between the N-type emitter region 3 and the N-type semiconductor region 1; The gate electrode 5 formed so as to face the P-type base region 2 through the insulating film 4 is insulated from the gate electrode 5 by the interlayer insulating film 6 and electrically connected to the N-type emitter region 3 and the P-type base region 2. Formed so as to be electrically connected to each other, a P-type collector region 8 formed on the other surface of the N-type semiconductor region 1, and a P-type collector region 8. Including collector electrode 9 It is constituted by a portion of the N-type semiconductor region 1 and the N-type base region 1a. In the semiconductor device shown in FIG. 1, a portion including a portion functioning as an IGBT is an active region 20. The N-type emitter region 3 on the P-type base region 2 includes a case where the N-type emitter region 3 is formed on a part of the upper surface of the P-type base region 2.

  In the semiconductor device of the first embodiment, the first surface is formed of an N-type semiconductor region having an impurity concentration higher than that of the N-type semiconductor region 1 adjacent to the P-type collector region 8 on the other surface of the N-type semiconductor region 1. By using the PN junction of the P-type base region 2 and the N-type base region 1a, the collector electrode 9 is formed so as to be electrically connected to the first cathode region 10. A first diode is configured between the emitter electrode 7 and the collector electrode 9 to bypass and recirculate the current when the IGBT is turned off. The emitter electrode 7 also functions as an anode electrode that functions as a first diode, and the collector electrode 9 also functions as a cathode electrode that functions as a first diode.

  In the semiconductor device of the first embodiment, a plurality of P-type semiconductor regions 11 are arranged on one surface side of the N-type semiconductor region 1 outside the P-type base region 2, and the N-type base region 1 a A plurality of P-type regions 11 constitute a breakdown voltage improving region 30 that forms a pn junction. As shown in FIG. 2, the breakdown voltage improvement region 30 is configured to surround the active region 20 when the semiconductor device according to the first embodiment is viewed in plan. That is, the plurality of P-type semiconductor regions 11 are configured to surround the active region 20. Although a known guard ring structure is taken as an example of the breakdown voltage improving region 30, a resurf structure in which one P-type semiconductor region 11 is provided, and a known field plate structure provided on one surface of the N-type semiconductor region 1. Of course, the breakdown voltage improving region 30 combining these or any of these may be adopted.

Further, in the semiconductor device of the first embodiment, an N-type semiconductor region having an impurity concentration higher than that of the N-type base region 1a on the one surface side of the N-type semiconductor region 1 outside the breakdown voltage improving region 30 is formed. A second cathode region 12 is provided. When the semiconductor device according to the first embodiment is viewed in plan, the second cathode region 12 may be formed in an annular shape so as to surround the breakdown voltage improving region 30, or as shown in FIG. May be formed in a triangular shape only on the corner side of the semiconductor device. Further, the second cathode region 12 may be formed only on the side of at least one corner of the semiconductor device. Further, when the semiconductor device of Embodiment 1 is viewed in plan, the second cathode region 12 may be formed in a region between the corners of the semiconductor device and outside the breakdown voltage improving region 30.
The auxiliary electrode 13 may be provided on the second cathode region 12, and the auxiliary electrode 13 and the collector electrode 9 may be electrically connected by a conductor such as a wire. In that case, the auxiliary electrode 13 may not be formed on the entire surface of the second cathode region 12 in plan view.

The semiconductor device according to the first embodiment utilizes the configuration of the second cathode region 12, the N-type base region 1a, and the P-type base region 2, and when the IGBT is turned off between the emitter electrode 7 and the auxiliary electrode 13. A second diode for bypassing the current is configured. The emitter electrode 7 also functions as a portion that functions as an anode electrode of the second diode, and the auxiliary electrode 13 functions as a cathode electrode of a portion that functions as a second diode.
Since the second cathode region 12 and the first cathode region 10 are electrically connected via the N-type base region 1a, the auxiliary electrode 13 is provided and the auxiliary electrode 13 is electrically connected to the collector electrode 9. Even if it is not connected to, it can function as the second diode. The auxiliary electrode 13 may be made of a material different from that of the collector electrode 9. The collector electrode 9 needs to be selected from an electrode material having a relatively high ohmic property with the P-type collector region and the first cathode region 10, but the auxiliary electrode 13 is an electrode having a relatively high ohmic property with the second cathode region 12. What is necessary is just to comprise with a material. The collector electrode 9 is made of, for example, Pd, alloyed Al, or an electrode in which Ti / Ni / Au is further laminated on any one of them, and the auxiliary electrode 13 is made of, for example, an Al electrode or an Al / Ni / Au electrode.

At least a part of the N-type base region 1a immediately below the second cathode region 12 is not completely depleted and is not depleted.
Here, the second cathode region 12 is desirably formed wider than the first cathode region 10, and the width of the second cathode region 12 is desirably 50 μm or more and 600 μm or less. By setting the width of the second cathode region 12 to 50 nm or more, at least of the region of the N-type base region 1a provided immediately below the second cathode region 12 when the semiconductor device shifts from the regenerative operation to the recovery mode. Some are not fully depleted and can be undepleted. As a result, a certain amount of time is required until the carriers remaining in the N-type base region 1a recombine and disappear, so that the noise generated when the semiconductor device shifts from the regenerative operation to the recovery mode is suppressed. The switching characteristics of the device can be improved. When the second cathode region 12 and / or the first cathode region 10 is formed only at the corner of the semiconductor device, the length in the diagonal direction of the semiconductor device is defined as the width w as shown in FIG.

Further, when the area of the active region 20 is the same and the first cathode region 10 is widened, the P-type collector region 8 is conversely reduced, and the portion functioning as the IGBT occupying the active region 20 is also reduced. In particular, when the first cathode region 10 is provided so as to be sandwiched between the P-type collector regions 8 as shown in FIG. By providing the second cathode region 12 outside the breakdown voltage improving region 30 on one surface side of the N-type semiconductor region 1, the portion that functions as a diode can be expanded without making the first cathode region 10 wider. Can do.

  Further, by making the portion functioning as the second diode substantially the current flow in the lateral direction, it can be separated from the current flow of the IGBT in the vertical direction. As a result, even if the desired relatively thick N-type base region 1a is employed to ensure the breakdown voltage of the IGBT, there is no concern that the resistance value of the portion functioning as the second diode will be substantially deteriorated.

<Description of Operation of Semiconductor Device of First Embodiment>
In the semiconductor device of the first embodiment shown in FIG. 1, when a positive bias higher than the threshold value is applied to the gate electrode 5 and a predetermined voltage higher than the emitter electrode 7 is applied to the collector electrode 9, the insulated gate bipolar transistor Is turned on, and current flows through the P-type collector region 8, the N-type base layer 1a, the P-type base layer 2 and the N-type emitter region 3 by conductivity modulation. At this time, since the portions functioning as the first diode and the second diode are reverse-biased, they are in an off (reverse bias) state.

In the semiconductor device of FIG. 1, when a bias voltage equal to or lower than the threshold voltage is applied to the gate electrode 5 and a predetermined voltage higher than the collector electrode 9 is applied to the emitter electrode 7, the portion functioning as an insulated gate bipolar transistor becomes conductive. However, the portion functioning as the first diode is forward-biased, and current flows from the emitter electrode 7 to the collector electrode 9 via the P-type base region 2, the N-type base region 1 a, and the cathode region 10. The portion functioning as the second diode is forward-biased, and the auxiliary electrode 13 (or collector electrode 9) from the emitter electrode 7 via the P-type base region 2, the N-type base region 1a, and the N-type semiconductor region 12. Current flows through
When the first and second diodes are turned on, excessive injection of holes from the P-type base layer 2 which is the anode layer occurs more than necessary, and excessive carriers (holes) are accumulated in the N-type base layer 1a. It becomes a state.

  After that, when a voltage lower than the threshold voltage is applied to the gate electrode 5 and a voltage higher than the emitter electrode 7 is applied to the collector electrode 9, the first and second diodes of the semiconductor device perform reverse recovery operation from the regenerative operation ( In the recovery operation, the first and second diode parts are reverse-biased, and the first and second diode parts are not conductive. At this time, in the semiconductor device, a depletion layer extending from the interface between the P-type base region 2 and the N-type base region 1a spreads as shown in FIG. 3, and the holes accumulated in the N-type base region 1a are holes in the P-type base region. Second, electrons are extracted to the first cathode region 10 and the second cathode region 12, and are extracted from the semiconductor device as a reverse recovery current (recovery current). At this time, at least a part of the N-type base region 1a immediately below the N-type semiconductor region 12 is not completely depleted, and an undepleted region in which carriers remain in the N-type base region 1a remains. Since a certain amount of time is required until the carriers disappear due to recombination, the rising waveform of the reverse recovery current in the first diode and the second diode becomes gentle, and the semiconductor device shifts from the regenerative operation to the recovery operation. Noise can be suppressed and switching characteristics can be improved.

In the recovery, a reverse recovery current having a large time constant flows immediately after the reverse recovery current flows and the current does not become zero. In order to suppress the reverse recovery current, it is desirable to provide the first cathode region 10 and the second cathode region 12.

  As described above, the semiconductor device according to the present invention is useful for a power semiconductor device used for a power conversion device such as an inverter or a power supply device such as various industrial machines.

DESCRIPTION OF SYMBOLS 1 ... N-type semiconductor region 2 ... P-type base region 3 ... N-type emitter region 4 ... Gate insulating film 5 ... Gate electrode 6 ... Interlayer insulating film 7 ... Emitter electrode 8... P-type collector region 9... Collector electrode 10 .. first cathode region 11 .. P-type semiconductor region 12 .. second cathode region 13 .. auxiliary electrode 20. Withstand voltage improvement area

Claims (5)

A first semiconductor region of a first conductivity type;
A second semiconductor region of a second conductivity type opposite to the first conductivity type provided on the first semiconductor region;
A third semiconductor region of a first conductivity type provided on the second semiconductor region;
A fourth semiconductor region of a second conductivity type provided on the opposite side of the second semiconductor region as viewed from the first semiconductor region;
A trench gate structure;
An active region comprising:
An upper electrode electrically connected to the second semiconductor region and the third semiconductor region;
A lower electrode electrically connected to the first semiconductor region and the fourth semiconductor region;
A withstand voltage improvement region provided outside the active region;
A fifth semiconductor region of a first conductivity type having an impurity concentration higher than that of the first semiconductor region, provided outside the breakdown voltage improving region and opposite to the lower electrode of the first semiconductor region;
With
A sixth semiconductor region of a first conductivity type having an impurity concentration higher than that of the first semiconductor region between the first semiconductor region and the lower electrode;
The sixth semiconductor regions are alternately arranged in the lateral direction with the fourth semiconductor regions,
The semiconductor device according to claim 6, wherein the sixth semiconductor region and the fourth semiconductor region are arranged extending from the active region to the outside of the breakdown voltage improving region. An insulated gate bipolar transistor is configured to include the first semiconductor region, the second semiconductor region, the third semiconductor region, and the fourth semiconductor region;
Forming a first diode of an insulated gate bipolar transistor so as to include the first semiconductor region, the second semiconductor region, and the sixth semiconductor region;
2. The semiconductor device according to claim 1, wherein the second diode of the insulated gate bipolar transistor is configured to include the first semiconductor region, the second semiconductor region, and the fifth semiconductor region.   The semiconductor device according to claim 1, wherein a width of the sixth semiconductor region is narrower than that of the fifth semiconductor region. 4. The semiconductor device according to claim 1, wherein the fifth semiconductor region has a width of 50 [mu] m or more. An auxiliary electrode disposed on the fifth semiconductor region and electrically connected to the lower electrode;
The semiconductor device according to claim 1, wherein the auxiliary electrode is made of a material different from that of the lower electrode.

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