JP6548449B2 - Operation test system of protective relay device - Google Patents

Operation test system of protective relay device Download PDF

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JP6548449B2
JP6548449B2 JP2015098855A JP2015098855A JP6548449B2 JP 6548449 B2 JP6548449 B2 JP 6548449B2 JP 2015098855 A JP2015098855 A JP 2015098855A JP 2015098855 A JP2015098855 A JP 2015098855A JP 6548449 B2 JP6548449 B2 JP 6548449B2
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勇治 大野
勇治 大野
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Mitsubishi Electric Corp
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この発明は、系統異常を検出し系統の電気設備を系統異常から保護する保護継電装置の動作試験システムに関するものである。   The present invention relates to an operation test system of a protective relay device which detects a system abnormality and protects an electrical installation of the system from the system abnormality.

近年、保護継電器はより高い信頼性が要求されている。そのため、従来のデジタル形の保護継電装置においては、信頼性を向上させるための保護継電装置の動作試験システムを採用している。前記保護継電装置の動作試験システムでは系統の監視が行われる。平常時あり得ない動作が一定時間継続したとき異常と判定する。前記保護継電装置の動作試験システムでは電圧RST相、電流RST相及び零相電流、零相電圧を変圧器、変流器を介して計測装置内で系統異常を判定している。前記保護継電装置の動作試験システムは自己の健全性を確認する機能を有する。コントロールセンタ等の設備が運用中であっても、健全性確認用の試験信号と系統からの入力信号をそれぞれ監視し、保護特性試験による保護継電装置の健全性確認と設備監視及び保護を可能とする。   In recent years, protection relays are required to have higher reliability. Therefore, in the conventional digital protective relay device, an operation test system of the protective relay device for improving the reliability is adopted. System monitoring is performed in the operation test system of the protective relay device. An abnormal operation is determined when an operation that can not usually be continued for a certain period of time. In the operation test system of the protective relay device, the system abnormality is determined in the measuring device through the transformer and the current transformer, the voltage RST phase, the current RST phase and the zero phase current, and the zero phase voltage. The operation test system of the protective relay device has a function of confirming its soundness. Even if the equipment such as the control center is in operation, the test signal for soundness confirmation and the input signal from the system are monitored respectively, and the soundness confirmation and equipment monitoring and protection of the protective relay device by the protection characteristic test are possible. I assume.

国際公開第WO2013/175846号パンフレット(段落[0033]、図11)International Publication WO2013 / 175846 Pamphlet (paragraph [0033], FIG. 11)

前記特許文献1で示された保護継電装置の動作試験システムは、図4に示すような回路構成となっており、マルチプレクサ8の切換により試験波形生成回路12からの試験信号入力と電力系統からの実入力波形を交互に監視している。例えば、三相変圧器4で変圧されたRS相の実入力電圧を監視していてCPUが異常電圧を検出した場合、トリップ信号を出力し、機械式リレー13を通じて遮断器を動作させる構成となっている。また、CPUは伝送回路14を通じて外部のPLC(Programmable Logic Controller)15に信号を送り、PLCはコントロールセンタ等に設けられたランプ又は表示画面を制御して、系統異常が生じたことを知らせる。しかし、マルチプレクサ8の切換が三相変圧器4側にあるタイミングで、保護継電装置の動作試験システムのRS相電圧を監視している配線路が故障した場合、系統からの入力信号監視時の電圧が正常であるにもかかわらず誤トリップをしてしまう可能性があった。また、電圧RS相に限らず、電圧ST相、電圧TR相、電流R相、電流S相、電流T相、零相電流、零相電圧に対しても同様に誤トリップをしてしまう可能性があった。 The operation test system of the protective relay device shown in Patent Document 1 has a circuit configuration as shown in FIG. 4, and switching of the multiplexer 8 switches the test signal input from the test waveform generation circuit 12 and the power system. The actual input waveform of is alternately monitored. For example, when monitoring the actual input voltage of the RS phase transformed by the three-phase transformer 4 and the CPU detects an abnormal voltage, it outputs a trip signal and operates the circuit breaker through the mechanical relay 13 ing. Further, the CPU sends a signal to an external PLC (Programmable Logic Controller) 15 through the transmission circuit 14, and the PLC controls a lamp or a display screen provided in a control center or the like to notify that a system error has occurred. However, when the wiring path monitoring the RS phase voltage of the protective relay operation test system fails at the timing when the multiplexer 8 is switched to the three-phase transformer 4 side, the input signal from the system is monitored Even though the voltage is normal, there is a possibility of erroneous tripping. In addition, not only the voltage RS phase but also the voltage ST phase, the voltage TR phase, the current R phase, the current S phase, the current T phase, the zero phase current, and the zero phase voltage may be erroneously tripped in the same manner. was there.

この発明は、上述のような課題を解決するためになされたもので、電力系統を常時監視しながら、保護継電装置が故障しているか否かの判断ができ、誤トリップすることが生じにくい保護継電装置の動作試験システムを得ることを目的とするものである。   The present invention has been made to solve the above-described problems, and while constantly monitoring the power system, it is possible to determine whether or not the protective relay device has a failure, and erroneous trips are less likely to occur. It is an object of the present invention to obtain an operation test system for a protective relay device.

この発明の保護継電装置の動作試験システムは、系統異常を検出し系統の電気設備を系統異常から保護する保護継電装置の動作試験システムにおいて、前記系統からの入力信号を受けてアナログ計測値を出力する第1、第2アナログ計測回路と、前記第1、第2アナログ計測回路から出力される前記アナログ計測値をそれぞれデジタル信号に変換するA/Dコンバータと、前記保護継電装置に対する試験信号を生成する試験信号生成回路と、前記保護継電装置の前記第1、第2アナログ計測回路の前段にそれぞれ設けられ、前記試験信号と前記系統からの入力信号とを切換える第1、第2切換スイッチと、前記A/Dコンバータからの前記デジタル信号を入力として取り込み、前記保護継電装置の保護演算と演算結果に基づいた保護又は制御の指示発令を行なうと共に、前記切換スイッチの切換えタイミングを制御し、かつ前記第1、第2アナログ計測回路及び前記A/Dコンバータを経由して入力される前記試験信号と前記試験信号生成回路から直接入力される前記試験信号とを比較して前記第1、第2アナログ計測回路及び前記A/Dコンバータの異常有無を監視するCPUと、を備え、前記第1アナログ計測回路と前記A/Dコンバータの第1配線路及び前記第2アナログ計測回路と前記A/Dコンバータの第2配線路の異常有無を監視するに際して、前記第1配線路に前記試験信号を入力するときは、前記第2配線路に前記系統からの入力信号を入力し、前記第2配線路に前記試験信号を入力するときは、前記第1配線路に前記系統からの入力信号を入力して、系統異常を常時監視すると共に、前記第1配線路及び第2配線路の異常有無を監視し、前記第1配線路と前記第2配線路のいずれにも前記試験信号が入力されていないときは、前記第1配線路と前記第2配線路のいずれにも前記系統からの入力信号を入力して、前記第1配線路及び第2配線路の出力の論理積で前記系統の異常を監視するものである。

An operation test system of a protection relay device according to the present invention is an operation test system of a protection relay device that detects a system abnormality and protects an electric installation of the system from the system abnormality, receiving an input signal from the system and measuring an analog measurement value. , An A / D converter for converting the analog measurement values output from the first and second analog measurement circuits into digital signals, and a test on the protective relay device A test signal generating circuit for generating a signal, and first and second switches provided between the test signal and an input signal from the system, which are respectively provided in front of the first and second analog measurement circuits of the protective relay device. A changeover switch and the digital signal from the A / D converter are taken as an input, and protection or control of the protection relay device based on the protection operation and the operation result An indication is issued, the switching timing of the changeover switch is controlled, and the test signal input via the first and second analog measurement circuits and the A / D converter and directly from the test signal generation circuit A CPU for comparing the test signal to be input and monitoring the presence or absence of abnormality of the first and second analog measurement circuits and the A / D converter; and the first analog measurement circuit and the A / D converter When the test signal is input to the first wiring path when monitoring the presence / absence of abnormality of the first wiring path of the second analog measuring circuit and the second wiring path of the A / D converter, the second wiring When the input signal from the system is input to the path and the test signal is input to the second wiring path, the input signal from the system is input to the first wiring path to constantly monitor the system abnormality. Rutotomoni, the first monitors abnormality presence or absence of the wiring path and the second wiring path, when said test signal to any of the first wire path and the second wiring path is not input, the first wiring An input signal from the system is input to both the path and the second wiring path, and the abnormality of the system is monitored by the logical product of the outputs of the first wiring path and the second wiring path .

また、前記第1配線路に対して、前記試験信号生成回路からの前記試験信号と前記系統からの入力信号を交互に入力し、前記第2配線路に対して、前記試験信号生成回路からの前記試験信号と前記系統からの入力信号を交互に入力して、前記第1配線路及び第2配線路の異常有無を監視するものである。   Further, the test signal from the test signal generation circuit and the input signal from the system are alternately input to the first wiring path, and the test signal generation circuit from the second wiring path. The test signal and the input signal from the system are alternately input to monitor the presence or absence of abnormality in the first wiring path and the second wiring path.

この発明によれば、系統を常時監視しながら、保護継電装置が故障しているか否かの判断ができ、誤トリップすることが生じにくい保護継電装置の動作試験システムを得ることができる。   According to the present invention, while constantly monitoring the system, it is possible to determine whether or not the protective relay device is broken, and it is possible to obtain an operation test system of the protective relay device that is unlikely to cause an erroneous trip.

この発明の実施の形態1における保護継電装置の動作試験システムの構成を示す図である。It is a figure which shows the structure of the operation test system of the protection relay apparatus in Embodiment 1 of this invention. 実施の形態1におけるCPUの処理を示したフローチャートである。5 is a flowchart showing processing of a CPU in the first embodiment. 実施の形態1における切換スイッチと系統からの入力信号のタイミング図である。FIG. 5 is a timing chart of input signals from the changeover switch and the system in the first embodiment. 従来の保護継電装置の動作試験システムの構成を示す図である。It is a figure which shows the structure of the operation test system of the conventional protective relay device.

実施の形態1
この発明の実施の形態1における保護継電装置の動作試験システムは、図1に示すように、R相1、S相2とT相3に繋がる三相変圧器4、増幅器9、A/Dコンバータ10、CPU11、試験波形生成回路(試験信号生成回路)12、機械式リレー13、伝送回路14を有する。また、RS相電圧A回路スイッチ16(切換スイッチ)、RS相電圧B回路スイッチ17(切換スイッチ)、ST相電圧A回路スイッチ18(切換スイッチ)、ST相電圧B回路スイッチ19(切換スイッチ)、TR相電圧A回路スイッチ20(切換スイッチ)、TR相電圧B回路スイッチ21(切換スイッチ)を有する。増幅器9は、切換スイッチを介して入力される信号を増幅し、フィルタ回路により雑音を除去し、アナログ計測値を出力するアナログ計測回路である。CPU11は、A/Dコンバータ10からのデジタル信号を入力として取り込み、保護継電装置の保護演算と演算結果に基づいた保護又は制御の指示発令を行なうと共に、切換スイッチの切換えタイミングを制御し、かつアナログ計測回路及びA/Dコンバータ10を経由して入力される試験信号と試験波形生成回路12から直接入力される試験信号とを比較してアナログ計測回路及びA/Dコンバータの異常有無を監視する。
Embodiment 1
The operation test system of the protective relay device according to the first embodiment of the present invention is, as shown in FIG. 1, a three-phase transformer 4 connected to R phase 1, S phase 2 and T phase 3, amplifier 9, A / D. The converter 10, the CPU 11, the test waveform generation circuit (test signal generation circuit) 12, the mechanical relay 13, and the transmission circuit 14 are included. In addition, RS phase voltage A circuit switch 16 (switching switch), RS phase voltage B circuit switch 17 (switching switch), ST phase voltage A circuit switch 18 (switching switch), ST phase voltage B circuit 19 (switching switch), A TR phase voltage A circuit switch 20 (switching switch) and a TR phase voltage B circuit switch 21 (switching switch) are provided. The amplifier 9 is an analog measurement circuit that amplifies a signal input via the changeover switch, removes noise by a filter circuit, and outputs an analog measurement value. The CPU 11 takes in a digital signal from the A / D converter 10 as an input, issues a protection calculation of the protection relay device and issues a protection or control instruction based on the calculation result, and controls the switching timing of the changeover switch, A test signal input via the analog measurement circuit and the A / D converter 10 is compared with a test signal directly input from the test waveform generation circuit 12 to monitor the presence or absence of an abnormality in the analog measurement circuit and the A / D converter .

図1において、22はRS相電圧A回路、23はRS相電圧B回路、24はST相電圧A回路、25はST相電圧B回路、26はTR相電圧A回路、27はTR相電圧B回路である。16から21のスイッチ、22から27の回路、増幅器(アナログ計測回路)9及びA/Dコンバータ10は保護継電装置の動作試験システムのための二重化された計測装置を構成する。例えば、RS相電圧A回路22は、スイッチ16、アナログ計測回路及びA/Dコンバータ10で第1配線路を構成し、RS相電圧B回路23は、スイッチ17、アナログ計測回路及びA/Dコンバータ10で第2配線路を構成し、その第1配線路と第2配線路で二重化配線路が構成される。同様に、ST相電圧A回路24は、スイッチ18、アナログ計測回路及びA/Dコンバータ10で第1配線路を構成し、ST相電圧B回路25は、スイッチ19、アナログ計測回路及びA/Dコンバータ10で第2配線路を構成し、その第1配線路と第2配線路で二重化配線路が構成される。また、TR相電圧A回路26は、スイッチ20、アナログ計測回路及びA/Dコンバータ10で第1配線路を構成し、TR相電圧B回路27は、スイッチ21、アナログ計測回路及びA/Dコンバータ10で第2配線路を構成し、その第1配線路と第2配線路で二重化配線路が構成される。   In FIG. 1, 22 is an RS phase voltage A circuit, 23 is an RS phase voltage B circuit, 24 is an ST phase voltage A circuit, 25 is an ST phase voltage B circuit, 26 is a TR phase voltage A circuit, 27 is a TR phase voltage B It is a circuit. Sixteen to twenty-one switches, twenty-two to twenty-seven circuits, an amplifier (analog measurement circuit) 9 and an A / D converter 10 constitute a dual measurement apparatus for a protective relay operation test system. For example, the RS phase voltage A circuit 22 forms a first wiring path by the switch 16, the analog measurement circuit, and the A / D converter 10. The RS phase voltage B circuit 23 includes the switch 17, the analog measurement circuit, and the A / D converter A second wiring path is constituted by 10, and a redundant wiring path is constituted by the first wiring path and the second wiring path. Similarly, the ST phase voltage A circuit 24 constitutes a first wiring path by the switch 18, the analog measurement circuit and the A / D converter 10. The ST phase voltage B circuit 25 comprises the switch 19, the analog measurement circuit and the A / D. The converter 10 configures a second wiring path, and the first wiring path and the second wiring path configure a redundant wiring path. The TR phase voltage A circuit 26 constitutes a first wiring path by the switch 20, the analog measurement circuit and the A / D converter 10. The TR phase voltage B circuit 27 comprises the switch 21, the analog measurement circuit and the A / D converter A second wiring path is constituted by 10, and a redundant wiring path is constituted by the first wiring path and the second wiring path.

いま、図1のようにRS相電圧A回路22で、スイッチ16が試験波形生成回路側にONしていると、RS相電圧A回路22は試験波形生成回路12にて生成された点検用波形を取り込み、回路の健全性確認を実施している。このとき、RS相電圧B回路23では、三相変圧器4の実入力側にONとなり、系統からの実入力信号を監視している。   Now, as shown in FIG. 1, when the switch 16 is turned on to the test waveform generation circuit side in the RS phase voltage A circuit 22, the RS phase voltage A circuit 22 generates the inspection waveform generated by the test waveform generation circuit 12. To ensure circuit integrity. At this time, in the RS phase voltage B circuit 23, the real input side of the three-phase transformer 4 is turned ON, and the real input signal from the grid is monitored.

ここで、RS相電圧A回路22の故障チェックタイミングにおけるCPUの処理を、図2及び図3によって説明する。まず、RS相電圧A回路22が故障チェックをしていない場合(S1,No)、RS相電圧B回路23も故障チェックをしていなければ、RS相電圧A回路22及びRS相電圧B回路23の実入力電圧のAND条件(論理積)をとることにより系統の監視を行う(S3〜S6)。つまり、S2でRS相電圧A回路スイッチ16及びRS相電圧B回路スイッチ17を実入力側にONし、S3でRS相電圧A回路22及びRS相電圧B回路23で実入力を取込み、S4〜S6でRS相電圧A回路22及びRS相電圧B回路23のTRIPのAND条件で、TRIP出力することになる。なお、RS相電圧A回路22が故障チェックをしていなく、RS相電圧B回路23も故障チェックをしていないときは、図3では、スイッチ16が実入力側ONかつスイッチ17が実入力側ONのときであり、RS相電圧A回路22監視状態が実入力計測でかつRS相電圧B回路23監視状態が実入力計測であるときである。   Here, the processing of the CPU at the failure check timing of the RS phase voltage A circuit 22 will be described with reference to FIG. 2 and FIG. First, when the RS phase voltage A circuit 22 does not perform a failure check (S1, No), if the RS phase voltage B circuit 23 also does not have a failure check, the RS phase voltage A circuit 22 and the RS phase voltage B circuit 23 The system is monitored by taking the AND condition (logical product) of the actual input voltages of (S3 to S6). That is, the RS phase voltage A circuit switch 16 and the RS phase voltage B circuit switch 17 are turned on in S2 in S2, the real phase is taken in in S3 by the RS phase voltage A circuit 22 and the RS phase voltage B circuit 23, TRIP is output under the AND condition of TRIP of the RS phase voltage A circuit 22 and the RS phase voltage B circuit 23 in S6. In addition, when the RS phase voltage A circuit 22 does not perform a fault check and the RS phase voltage B circuit 23 also does not perform a fault check, in FIG. 3, the switch 16 is an actual input side and the switch 17 is an actual input side. This is when the monitoring condition of the RS phase voltage A circuit 22 is an actual input measurement and the monitoring condition of the RS phase voltage B circuit 23 is an actual input measurement.

図2で、RS相電圧A回路22が故障チェックを実施しているとき(S1,Yes)、RS相電圧A回路スイッチ16を点検用波形(試験波形生成回路)側にONし(S7)、RS相電圧B回路スイッチ17を実入力(系統からの入力信号)側にONする(S8)。そして、RS相電圧A回路22から点検用波形を取込み(S9)、RS相電圧A回路22が故障か否か判断する(S10)。故障していれば、RS相電圧A回路22が故障であることをエラー出力し(S11)、RS相電圧A回路スイッチ16を点検用波形側に固定し(S12)、RS相電圧B回路スイッチ17を系統からの実入力側に固定する(S13)。故障したRS相電圧A回路22の取換えが完了するまで、RS相電圧B回路スイッチ17を系統からの実入力側に固定し続ける。これにより、一方の配線路が故障したときは、他方の配線路に系統からの入力信号を入力して、系統異常を継続して監視する。   In FIG. 2, when the RS phase voltage A circuit 22 carries out a fault check (S1, Yes), the RS phase voltage A circuit switch 16 is turned ON to the inspection waveform (test waveform generation circuit) side (S7), The RS phase voltage B circuit switch 17 is turned on to the actual input (input signal from the system) side (S8). Then, the inspection waveform is taken in from the RS phase voltage A circuit 22 (S9), and it is judged whether or not the RS phase voltage A circuit 22 is faulty (S10). If there is a failure, an error output indicating that the RS phase voltage A circuit 22 is faulty is output (S11), and the RS phase voltage A circuit switch 16 is fixed on the inspection waveform side (S12). 17 is fixed to the actual input side from the system (S13). The RS phase voltage B circuit switch 17 is kept fixed to the actual input side from the system until replacement of the failed RS phase voltage A circuit 22 is completed. As a result, when one of the wiring paths fails, an input signal from the system is input to the other wiring path to continuously monitor the system abnormality.

次に、S7〜S8に続いて、S9でRS相電圧A回路22に点検用波形を入力するときは、RS相電圧B回路23に実入力を入力する(S14)。RS相電圧B回路23で系統の異常の有無を判断する(S15)。系統に異常があれば、TRIP出力を発生する(S16)   Next, following S7 to S8, when the inspection waveform is input to the RS phase voltage A circuit 22 at S9, an actual input is input to the RS phase voltage B circuit 23 (S14). The RS phase voltage B circuit 23 determines the presence or absence of a system abnormality (S15). Generates TRIP output if there is an abnormality in the system (S16)

次にRS相電圧B回路スイッチ17が点検用波形側にONすると、RS相電圧A回路スイッチ16は実入力側にONとなり、RS相電圧A回路22は実入力を監視する。このように試験波形生成回路12にて生成される点検用波形を、図3のスイッチ16,17のように切換ることで、系統異常を常時監視すると共に、二重化された第1配線路及び第2配線路の異常有無を監視できる。このときのスイッチ切換タイミングは例えば1時間毎とする。   Next, when the RS phase voltage B circuit switch 17 is turned on to the inspection waveform side, the RS phase voltage A circuit switch 16 is turned on to the real input side, and the RS phase voltage A circuit 22 monitors the real input. By switching the inspection waveform generated by the test waveform generation circuit 12 in this manner as shown by the switches 16 and 17 in FIG. 3, the system abnormality is constantly monitored, and the duplicated first wiring path and 2) It is possible to monitor the presence or absence of abnormality in the wiring path. The switch switching timing at this time is, for example, every hour.

図3を参照して、RS相電圧A回路(第1配線路)監視状態とRS相電圧B回路(第2配線路)監視状態を説明すると、第1配線路及び第2配線路の異常有無を監視するに際して、第1配線路に点検用波形である試験信号(A回路試験)を入力するときは、第2配線路に系統からの入力信号(実入力計測)を入力し、第2配線路に試験信号(B回路試験)を入力するときは、第1配線路に系統からの入力信号(実入力計測)を入力して、系統異常を常時監視すると共に、第1配線路及び第2配線路の異常有無を監視している。そして、第1配線路に対して、試験信号生成回路からの試験信号と系統からの入力信号を交互に入力し、第2配線路に対して、試験信号生成回路からの試験信号と系統からの入力信号を交互に入力して、第1配線路及び第2配線路の異常有無を監視している。このように、RS相電圧の二重化された計測回路(第1配線路と第2配線路)によって、系統異常を常時監視すると共に、第1配線路及び第2配線路の異常有無を監視することができる。   The RS phase voltage A circuit (first wiring path) monitoring state and the RS phase voltage B circuit (second wiring path) monitoring state will be described with reference to FIG. 3. The presence or absence of abnormality in the first wiring path and the second wiring path When monitoring a test signal (test circuit A) that is an inspection waveform to the first wiring path, input an input signal from the system (actual input measurement) to the second wiring path, and When a test signal (B circuit test) is input to the path, an input signal (actual input measurement) from the system is input to the first wiring path to constantly monitor the system abnormality, and the first wiring path and the second It monitors the wiring path for abnormalities. Then, the test signal from the test signal generation circuit and the input signal from the system are alternately input to the first wiring path, and the test signal from the test signal generation circuit and the system from the second wiring path. Input signals are alternately input to monitor the presence or absence of abnormality in the first wiring path and the second wiring path. As described above, the system abnormality is constantly monitored and the presence / absence of abnormality of the first wiring path and the second wiring path are constantly monitored by the dual measurement circuit (the first wiring path and the second wiring path) of the RS phase voltage. Can.

また、例えばST相電圧A回路24が点検用波形を取り込んでいて、CPU11により異常であると判断された場合、それ以降のST相電圧A回路24の波形データは無視することとし、実入力の監視は実施しない構成とする。保護継電器交換までの間、ST相電圧B回路にて、実入力の監視を実施するため、設備が無保護状態となることはない。   Also, for example, when the ST phase voltage A circuit 24 takes in the inspection waveform and the CPU 11 determines that it is abnormal, the waveform data of the ST phase voltage A circuit 24 thereafter is ignored, and the actual input It is assumed that monitoring is not performed. Since the monitoring of the actual input is performed by the ST phase voltage B circuit until the protective relay replacement, the facility will not be unprotected.

同様に、三相変流器5、零相変流器6、及び零相変圧器7の二次側も二重化することにより、三相電圧、三相電流、零相電流、及び零相電圧の実入力を常時監視することで、設備が無保護状態とならない構成とする。
なお、この発明は、その発明の範囲内において、実施の形態を適宜、変形、省略することが可能である。
Similarly, by doubling the secondary side of three-phase current transformer 5, zero-phase current transformer 6, and zero-phase transformer 7, three-phase voltage, three-phase current, zero-phase current, and zero-phase voltage By constantly monitoring the actual input, the equipment will not be unprotected.
In the present invention, within the scope of the invention, the embodiment can be appropriately modified or omitted.

1 R相 2 S相 3 T相
4 三相変圧器 5 三相変流器 6 零相変流器
7 零相変圧器 8 マルチプレクサ 9 増幅器
10 A/Dコンバータ 11 CPU
12 試験波形生成回路 13 機械式リレー
14 伝送回路 15 PLC
16 RS相電圧A回路スイッチ 17 RS相電圧B回路スイッチ
18 ST相電圧A回路スイッチ 19 ST相電圧B回路スイッチ
20 TR相電圧A回路スイッチ 21 TR相電圧B回路スイッチ
22 RS相電圧A回路 23 RS相電圧B回路
24 ST相電圧A回路 25 ST相電圧B回路
26 TR相電圧A回路 27 TR相電圧B回路
1 R phase 2 S phase 3 T phase 4 three phase transformer 5 three phase current transformer 6 zero phase current transformer 7 zero phase transformer 8 multiplexer 9 amplifier 10 A / D converter 11 CPU
12 Test waveform generation circuit 13 Mechanical relay 14 Transmission circuit 15 PLC
16 RS Phase Voltage A Circuit Switch 17 RS Phase Voltage B Circuit Switch 18 ST Phase Voltage A Circuit Switch 19 ST Phase Voltage B Circuit Switch 20 TR Phase Voltage A Circuit Switch 21 TR Phase Voltage B Circuit Switch 22 RS Phase Voltage A Circuit 23 RS Phase voltage B circuit 24 ST phase voltage A circuit 25 ST phase voltage B circuit 26 TR phase voltage A circuit 27 TR phase voltage B circuit

Claims (3)

系統異常を検出し系統の電気設備を系統異常から保護する保護継電装置の動作試験システムにおいて、
前記系統からの入力信号を受けてアナログ計測値を出力する第1、第2アナログ計測回路と、
前記第1、第2アナログ計測回路から出力される前記アナログ計測値をそれぞれデジタル信号に変換するA/Dコンバータと、
前記保護継電装置に対する試験信号を生成する試験信号生成回路と、
前記保護継電装置の前記第1、第2アナログ計測回路の前段にそれぞれ設けられ、前記試験信号と前記系統からの入力信号とを切換える第1、第2切換スイッチと、
前記A/Dコンバータからの前記デジタル信号を入力として取り込み、前記保護継電装置の保護演算と演算結果に基づいた保護又は制御の指示発令を行なうと共に、前記切換スイッチの切換えタイミングを制御し、かつ前記第1、第2アナログ計測回路及び前記A/Dコンバータを経由して入力される前記試験信号と前記試験信号生成回路から直接入力される前記試験信号とを比較して前記第1、第2アナログ計測回路及び前記A/Dコンバータの異常有無を監視するCPUと、を備え、
前記第1アナログ計測回路と前記A/Dコンバータの第1配線路及び前記第2アナログ計測回路と前記A/Dコンバータの第2配線路の異常有無を監視するに際して、
前記第1配線路に前記試験信号を入力するときは、前記第2配線路に前記系統からの入力信号を入力し、前記第2配線路に前記試験信号を入力するときは、前記第1配線路に前記系統からの入力信号を入力して、系統異常を常時監視すると共に、前記第1配線路及び第2配線路の異常有無を監視し、
前記第1配線路と前記第2配線路のいずれにも前記試験信号が入力されていないときは、前記第1配線路と前記第2配線路のいずれにも前記系統からの入力信号を入力して、前記第1配線路及び第2配線路の出力の論理積で前記系統の異常を監視することを特徴とする保護継電装置の動作試験システム。
In the operation test system of a protective relay device that detects a system abnormality and protects the system's electrical equipment from the system abnormality,
First and second analog measurement circuits that receive an input signal from the system and output an analog measurement value;
An A / D converter for converting the analog measurement values output from the first and second analog measurement circuits into digital signals;
A test signal generation circuit that generates a test signal for the protective relay device;
First and second changeover switches respectively provided on the front stage of the first and second analog measurement circuits of the protective relay device, and switching between the test signal and the input signal from the system;
The digital signal from the A / D converter is taken as an input, and an instruction for protection or control based on the protection calculation of the protection relay device and the calculation result is issued, and the switching timing of the changeover switch is controlled, The first and second test signals input via the first and second analog measurement circuits and the A / D converter are compared with the test signals directly input from the test signal generation circuit. An analog measurement circuit and a CPU for monitoring the presence or absence of an abnormality of the A / D converter;
When monitoring the presence or absence of abnormality of the first analog measurement circuit, the first wiring path of the A / D converter, and the second wiring path of the second analog measurement circuit and the A / D converter,
When the test signal is input to the first wiring path, an input signal from the system is input to the second wiring path, and when the test signal is input to the second wiring path, the first wiring An input signal from the system is inputted to a path to constantly monitor a system abnormality and to monitor the presence or absence of an abnormality in the first wiring path and the second wiring path ,
When the test signal is not input to any of the first wiring path and the second wiring path, an input signal from the system is input to any of the first wiring path and the second wiring path. And a test system for a protection relay device, which monitors an abnormality of the system based on a logical product of outputs of the first wiring path and the second wiring path .
前記第1配線路に対して、前記試験信号生成回路からの前記試験信号と前記系統からの入力信号を交互に入力し、前記第2配線路に対して、前記試験信号生成回路からの前記試験信号と前記系統からの入力信号を交互に入力して、前記第1配線路及び第2配線路の異常有無を監視する請求項1記載の保護継電装置の動作試験システム。 The test signal from the test signal generation circuit and the input signal from the system are alternately input to the first wiring path, and the test signal from the test signal generation circuit is input to the second wiring path. The test system according to claim 1, wherein a signal and an input signal from the system are alternately input to monitor the presence or absence of an abnormality in the first wiring path and the second wiring path. 前記第1配線路と前記第2配線路のいずれか一方の配線路が故障したときは、他方の配線路に前記系統からの入力信号を入力して、系統異常を継続して監視する請求項1又は請求項2記載の保護継電装置の動作試験システム。   When any one of the first wiring path and the second wiring path breaks down, an input signal from the system is input to the other wiring path to continuously monitor a system abnormality. The operation test system of the protection relay device according to claim 1 or 2.
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