JP6543053B2 - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
- Publication number
- JP6543053B2 JP6543053B2 JP2015050523A JP2015050523A JP6543053B2 JP 6543053 B2 JP6543053 B2 JP 6543053B2 JP 2015050523 A JP2015050523 A JP 2015050523A JP 2015050523 A JP2015050523 A JP 2015050523A JP 6543053 B2 JP6543053 B2 JP 6543053B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- conductor
- insulator
- transistor
- oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
- H10D30/6733—Multi-gate TFTs
- H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/203—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using transformation of metal, e.g. oxidation or nitridation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3424—Deposited materials, e.g. layers characterised by the chemical composition being Group IIB-VIA materials
- H10P14/3426—Oxides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3434—Deposited materials, e.g. layers characterised by the chemical composition being oxide semiconductor materials
Landscapes
- Thin Film Transistor (AREA)
- Semiconductor Memories (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2015050523A JP6543053B2 (ja) | 2014-03-14 | 2015-03-13 | 半導体装置の作製方法 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014051720 | 2014-03-14 | ||
| JP2014051720 | 2014-03-14 | ||
| JP2015050523A JP6543053B2 (ja) | 2014-03-14 | 2015-03-13 | 半導体装置の作製方法 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2019111150A Division JP6761514B2 (ja) | 2014-03-14 | 2019-06-14 | 半導体装置の作製方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2015188084A JP2015188084A (ja) | 2015-10-29 |
| JP2015188084A5 JP2015188084A5 (https=) | 2018-04-19 |
| JP6543053B2 true JP6543053B2 (ja) | 2019-07-10 |
Family
ID=54069835
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015050523A Expired - Fee Related JP6543053B2 (ja) | 2014-03-14 | 2015-03-13 | 半導体装置の作製方法 |
| JP2019111150A Active JP6761514B2 (ja) | 2014-03-14 | 2019-06-14 | 半導体装置の作製方法 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2019111150A Active JP6761514B2 (ja) | 2014-03-14 | 2019-06-14 | 半導体装置の作製方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US20150263140A1 (https=) |
| JP (2) | JP6543053B2 (https=) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017149413A1 (en) * | 2016-03-04 | 2017-09-08 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| KR102448587B1 (ko) * | 2016-03-22 | 2022-09-28 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치, 및 상기 반도체 장치를 포함하는 표시 장치 |
| US10043659B2 (en) | 2016-05-20 | 2018-08-07 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device or display device including the same |
| WO2017199128A1 (en) | 2016-05-20 | 2017-11-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device or display device including the same |
| JP2019102530A (ja) * | 2017-11-29 | 2019-06-24 | 東芝メモリ株式会社 | 半導体装置およびその製造方法 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0384963A (ja) * | 1989-08-29 | 1991-04-10 | Casio Comput Co Ltd | 薄膜トランジスタ |
| JP2004128217A (ja) * | 2002-10-02 | 2004-04-22 | Semiconductor Energy Lab Co Ltd | 薄膜トランジスタ及びその作製方法 |
| JP5562603B2 (ja) * | 2008-09-30 | 2014-07-30 | 株式会社半導体エネルギー研究所 | 表示装置 |
| KR101690216B1 (ko) * | 2009-05-01 | 2016-12-27 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치의 제작 방법 |
| KR101782176B1 (ko) * | 2009-07-18 | 2017-09-26 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 반도체 장치의 제조 방법 |
| TWI559501B (zh) * | 2009-08-07 | 2016-11-21 | 半導體能源研究所股份有限公司 | 半導體裝置和其製造方法 |
| KR101835300B1 (ko) * | 2009-12-08 | 2018-03-08 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 그 제작 방법 |
| WO2011089841A1 (en) * | 2010-01-22 | 2011-07-28 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| US8685787B2 (en) * | 2010-08-25 | 2014-04-01 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
| TWI556317B (zh) * | 2010-10-07 | 2016-11-01 | 半導體能源研究所股份有限公司 | 薄膜元件、半導體裝置以及它們的製造方法 |
| KR101680768B1 (ko) * | 2010-12-10 | 2016-11-29 | 삼성전자주식회사 | 트랜지스터 및 이를 포함하는 전자장치 |
| TWI521612B (zh) * | 2011-03-11 | 2016-02-11 | 半導體能源研究所股份有限公司 | 半導體裝置的製造方法 |
| US8847220B2 (en) * | 2011-07-15 | 2014-09-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| KR102932705B1 (ko) * | 2012-04-13 | 2026-02-27 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| TWI478344B (zh) * | 2012-07-04 | 2015-03-21 | E Ink Holdings Inc | 電晶體與其製造方法 |
| SG11201505225TA (en) * | 2012-08-03 | 2015-08-28 | Semiconductor Energy Lab | Oxide semiconductor stacked film and semiconductor device |
-
2015
- 2015-03-11 US US14/645,123 patent/US20150263140A1/en not_active Abandoned
- 2015-03-13 JP JP2015050523A patent/JP6543053B2/ja not_active Expired - Fee Related
-
2019
- 2019-06-14 JP JP2019111150A patent/JP6761514B2/ja active Active
Also Published As
| Publication number | Publication date |
|---|---|
| JP2015188084A (ja) | 2015-10-29 |
| US20150263140A1 (en) | 2015-09-17 |
| JP2019161237A (ja) | 2019-09-19 |
| JP6761514B2 (ja) | 2020-09-23 |
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