JP6541717B2 - Gaming machine - Google Patents

Description

  The present invention relates to a gaming machine.

  Conventionally, a game called pachislot having a plurality of reels provided with a plurality of symbols on each surface, a start switch, a stop switch, a stepping motor provided corresponding to each reel, and a control unit The machine is known. The start switch detects that the start lever has been operated by the player after game media such as medals and coins have been inserted into the gaming machine (hereinafter also referred to as "start operation"), and all reels are rotated. Output a signal requesting start. The stop switch detects that the player has pressed a stop button provided corresponding to each reel (hereinafter also referred to as “stop operation”), and outputs a signal requesting stop of rotation of the corresponding reel. Do. The stepping motor transmits the driving force to the corresponding reel. Further, the control unit controls the operation of the stepping motor based on the signals output by the start switch and the stop switch, and performs the rotation operation and the stop operation of each reel.

  In such a gaming machine, when the start operation is detected, lottery processing using random numbers (hereinafter referred to as "internal lottery processing") is performed on the program, and the result of the lottery (hereinafter referred to as "internal winning combination") Stop the rotation of the reel based on the timing of the stop operation). Then, when the rotation of all the reels is stopped and the combination of symbols relating to the establishment of the winning is displayed, a bonus corresponding to the combination of the symbols is given to the player. In addition, as an example of the privilege given to the player, the operation of the re-game (hereinafter, also referred to as "replay") in which the internal lottery process is performed again without paying out the game medium (medal and the like) and consuming the game medium , Activation of a bonus game, etc., where the payout opportunities for gaming media are increased.

  Also, conventionally, in the gaming machine configured as described above, an assist time (hereinafter referred to as "AT"), which is a function of navigating establishment of a specific small winning combination with a lamp or the like, and a specific symbol combination are displayed. A gaming machine has been developed which has a function of operating a gaming state having a higher winning probability than that of a normal time, that is, a function of replay time (hereinafter referred to as "RT").

  Furthermore, conventionally, in the gaming machine having the above configuration, there has been proposed a gaming machine having a function of displaying the digestion status of the game of the specific condition when the game is advanced under the specific condition (for example, see Patent Document 1) ).

Unexamined-Japanese-Patent No. 2006-271676

  An object of the present invention is to provide a technology capable of advancing a game in a gaming machine having a notification (display) function of a game status without giving a sense of extension to the player during the notification operation. It is.

  In order to solve the above problems, the present invention provides a gaming machine having the following configuration.

Display means (for example, a liquid crystal display device 11 described later) capable of displaying numerical information on the remaining period of the game period controlled to the predetermined gaming state, and changing the numerical information for each unit game ;
Cycle progressing means for reducing the remaining period of the game period controlled to the predetermined game state by one unit game for each unit game,
Shortening control means (for example, cycle shortening lottery described later) capable of shortening the remaining period of the gaming period controlled to the predetermined gaming state in a unit game in which a predetermined shortening condition is established,
When changing the value of the numerical information displayed on the display means from a first value (for example, "100") to a second value (for example, "30"), the display changes at predetermined numerical intervals Display control means (for example, periodic information display processing described later)
Interval determining means capable of determining the predetermined numerical interval based on a change value (for example, “70”) which is a difference between the first value and the second value (for example, periodic information display processing described later) In S323), and,
When the change value is equal to or greater than a specific value (e.g., "30"), the interval determining means adds a quotient obtained by dividing the change value by a specified value (e.g., "30") plus one. Ri determinable der as the predetermined numerical intervals,
The display control means can update the display of the numerical information in a unit game in which the remaining period of the game period controlled to the predetermined game state is shortened by the shortening control means.
The interval determining means changes the numerical value information from the first value to the second value in the unit game, and the numerical value information from the first value to the first value in the unit game And the third value different from the second value according to the change amount of the numerical information such that the time required for the change of the display of the numerical information in each case is substantially the same time A game machine characterized in that the predetermined numerical interval can be determined .

  Further, in the gaming machine of the present invention, the interval determining means may set 1 as the predetermined numerical interval when the change value is less than the specific value.

  According to the gaming machine of the present invention having the above configuration, it is possible to advance the game without giving the player a sense of extension during the game when the notification (display) operation of the game situation is performed.

It is a figure for demonstrating the functional flow of the game machine in one Embodiment of this invention. It is a perspective view showing the appearance structure of the game machine in one embodiment of the present invention. It is a figure which shows the internal structure of the game machine in one Embodiment of this invention. It is a figure which shows the internal structure of the game machine in one Embodiment of this invention. FIG. 1 is a block diagram showing an entire configuration of a circuit included in a game machine according to an embodiment of the present invention. It is a block diagram which shows the internal structure of the main control circuit in one Embodiment of this invention. It is a block diagram showing an internal configuration of a sub control circuit in an embodiment of the present invention. It is a transition flow diagram of RT gaming state of the gaming machine in one embodiment of the present invention. It is a figure which shows an example of the symbol arrangement | positioning table in one Embodiment of this invention. It is a figure which shows an example of the symbol combination table (the 1) in one Embodiment of this invention. It is a figure which shows an example of the symbol combination table (the 2) in one Embodiment of this invention. It is a figure which shows an example of the symbol combination table (the 3) in one Embodiment of this invention. FIG. 17 is a view showing an example of a general (RT0) gaming state internal lottery table (three-piece hanging) according to an embodiment of the present invention. It is a figure which shows an example of the internal lottery table (it is 3 sheets) between 2 MB flags (RT1) gaming state in one Embodiment of this invention. It is a figure which shows an example of the internal lottery table (it is 3 sheets) between 3 MB flags (RT2) gaming state in one Embodiment of this invention. FIG. 17 is a view showing an example of a general (RT0) gaming state internal lottery table (two-card hanging) according to an embodiment of the present invention. It is a figure which shows an example of the internal lottery table (it is 2 sheets) between 2 MB flags (RT1) gaming state in one Embodiment of this invention. It is a figure which shows an example of the internal lottery table (it is 2 sheets) between 3 MB flags (RT2) gaming state in one Embodiment of this invention. It is a figure which shows an example of the internal lottery table for 2 MB gaming states in one Embodiment of this invention. It is a figure which shows an example of the internal lottery table for 3 MB gaming states in one Embodiment of this invention. It is a figure which shows an example of the symbol combination determination table (the 1) in one Embodiment of this invention. It is a figure which shows an example of the symbol combination determination table (the 2) in one Embodiment of this invention. It is a figure which shows an example of the symbol combination determination table (the 3) in one Embodiment of this invention. It is a figure which shows an example of the internal winning combination storing area in one Embodiment of this invention. It is a figure which shows an example of the display combination storing area in one Embodiment of this invention. It is a figure which shows an example of the carry over combination storage area in one Embodiment of this invention. It is a figure which shows an example of the game state flag storage area in one Embodiment of this invention. It is a figure which shows an example of the action | operation stop button storage area in one Embodiment of this invention. It is a figure which shows an example of the pressing order storage area in one Embodiment of this invention. It is a figure which shows an example of the symbol code storage area in one Embodiment of this invention. It is a correspondence table of the abbreviation of the internal winning combination used by control of sub CPU, and the abbreviation of the internal winning combination used by control of main CPU. It is a figure which shows an example of the race runner MAP lottery table in one Embodiment of this invention. It is a figure which shows an example of the race information MAP data table in one Embodiment of this invention. It is a figure which shows an example of a victory target person lottery table in one Embodiment of this invention. It is a figure which shows an example of the race victory rate MAP lottery table in one Embodiment of this invention. It is a figure which shows an example of the race winning percentage MAP data table in one Embodiment of this invention. It is a figure which shows an example of the race winning percentage MAP data table (in percentage display) in one Embodiment of this invention. It is a figure which shows an example of the race result lottery table in one Embodiment of this invention. It is a figure which shows an example of the after-AT race victory expectation data selection lottery table in one Embodiment of this invention. It is a figure which shows an example of the race win rate data rewriting lottery (in penalty) table in one Embodiment of this invention. It is a figure which shows an example of the pseudo | simulation BB lottery (in the middle) table in one Embodiment of this invention. It is a figure which shows an example of the pseudo | simulation BB lottery (in AT, during AT preparation, during a race) table in one Embodiment of this invention. It is a figure which shows an example of the pseudo | simulation BB precursor lottery table in one Embodiment of this invention. It is a figure which shows an example of the period shortening lottery table (the 1) in one Embodiment of this invention. It is a figure which shows an example of the period shortening lottery table (the 2) in one Embodiment of this invention. It is a figure which shows an example of the pseudo | simulation BB period shortening lottery table in one Embodiment of this invention. It is a figure which shows an example of the direct addition lottery table in one Embodiment of this invention. It is a figure which shows an example of the AT start game number lottery (at the time of woman A victory) table in one Embodiment of this invention. It is a figure which shows an example of AT start game number random determination (Kappa victory time) table (the 1) in one Embodiment of this invention. It is a figure which shows an example of AT start game number random determination (Kappa victory time) table (the 2) in one Embodiment of this invention. It is a figure which shows an example of the AT start game number random determination (Kappa victory time) table (the 3) in one Embodiment of this invention. It is a figure which shows an example of the AT start game number random determination (Kappa victory time) table (the 4) in one Embodiment of this invention. It is a figure which shows an example of the Kappa-zushi MAP data table in one Embodiment of this invention. It is a figure which shows an example of the Kappa game number acquisition lottery table in one Embodiment of this invention. It is a figure which shows an example of the Kappa sushi data conversion generation | occurrence | production lottery table in one Embodiment of this invention. It is a figure which shows an example of the Kappa-zushi data conversion lottery (1st dish) table in one Embodiment of this invention. It is a figure which shows an example of the Kappa-zushi data conversion lottery (2nd dish) table in one Embodiment of this invention. It is a figure which shows an example of the Kappa-zushi data conversion lottery (3rd plate) table in one Embodiment of this invention. It is a figure which shows an example of the Kappa-zushi data conversion lottery (4th dish) table in one Embodiment of this invention. It is a figure which shows an example of the Kappa-zushi data conversion lottery (5th dish) table in one Embodiment of this invention. It is a figure which shows an example of the non-MB MAX bet button on-off determination table in one Embodiment of this invention. It is a figure which shows an example of the MAX bet button on-off determination table in MB in one Embodiment of this invention. It is a main flowchart which shows the process example of the main control circuit of the game machine in one Embodiment of this invention. It is a flowchart which shows the example of the process at the time of the power activation in one Embodiment of this invention. It is a flow chart which shows an example of medal acceptance / start check processing in one embodiment of the present invention. It is a flow chart which shows an example of MAX BET input processing in one embodiment of the present invention. It is a flowchart which shows the example of the internal lottery process in one Embodiment of this invention. It is a flowchart which shows the example of the reel stop initialization process in one Embodiment of this invention. It is a flowchart which shows the example of the drawing-in priority storing process in one Embodiment of this invention. It is a flowchart which shows the example of the drawing-in priority table selection process in one Embodiment of this invention. It is a flowchart which shows the example of the symbol code storage process in one Embodiment of this invention. It is a flowchart which shows the example of the reel stop control processing in one Embodiment of this invention. It is a flowchart which shows the example of the priority attraction-in control process in one Embodiment of this invention. It is a flowchart which shows the example of the bonus end check process in one Embodiment of this invention. It is a flowchart which shows the example of the bonus operation check process in one Embodiment of this invention. It is a flowchart which shows the example of the interruption process by control of main CPU in one Embodiment of this invention. It is a flowchart which shows the example of the power activation process performed by the sub CPU in one Embodiment of this invention. It is a flowchart which shows the example of the power failure detection process performed by the sub CPU in one Embodiment of this invention. It is a flowchart which shows the example of the lamp | ramp control task performed by the sub CPU in one Embodiment of this invention. It is a flowchart which shows the example of the sound control task performed by the sub CPU in one Embodiment of this invention. It is a flowchart which shows the example of the mother task performed by the sub CPU in one Embodiment of this invention. It is a flowchart which shows the example of the main task performed by the sub CPU in one Embodiment of this invention. It is a flowchart which shows the example of the random number update process in one Embodiment of this invention. It is a flow chart which shows an example of random number acquisition processing in one embodiment of the present invention. It is a flowchart which shows the example of the main board | substrate communication task performed by the sub CPU in one Embodiment of this invention. It is a flowchart which shows the example of the animation task performed by the sub CPU in one Embodiment of this invention. It is a flowchart which shows the example of the animation task management process in one Embodiment of this invention. It is a flowchart which shows the example of the period information display process in one Embodiment of this invention. It is a flowchart which shows the example of the command analysis process in one Embodiment of this invention. It is a flowchart which shows the example of the command sequence check process in one Embodiment of this invention. It is a flowchart which shows the example of the effect content determination processing (the 1) in one Embodiment of this invention. It is a flowchart which shows the example of the effect content determination processing (the 2) in one Embodiment of this invention. It is a flow chart which shows an example of processing at the time of initialization command reception in one embodiment of the present invention. It is a flowchart which shows the example of the race information lottery process in one Embodiment of this invention. It is a flow chart which shows an example of processing at the time of medal insertion command reception in one embodiment of the present invention. It is a flow chart which shows an example of processing at the time of start command reception in one embodiment of the present invention. It is a flowchart which shows the example of the variable setting process (the 1) in one Embodiment of this invention. It is a flowchart which shows the example of the variable setting process (the 2) in one Embodiment of this invention. It is a flowchart which shows the example of the general inside_variable setting process in one Embodiment of this invention. It is a flowchart which shows the example of BB inside_variable setting process in one Embodiment of this invention. It is a flowchart which shows the example of AT under preparation_variable setting process in one Embodiment of this invention. It is a flowchart which shows the example of AT inside_variable setting processing in one Embodiment of this invention. It is a flow chart which shows an example of during race_variable setting processing in one embodiment of the present invention. It is a flowchart which shows the example of general termination_variable setting processing in one Embodiment of this invention. It is a flowchart which shows the example of at the time of general middle BB end_variable setting processing in one Embodiment of this invention. It is a flow chart which shows an example of at the time of race end_variable setting processing in one embodiment of the present invention. It is a flowchart which shows the example of at-BB end-of-AT_variable setting process in one Embodiment of this invention. It is a flowchart which shows the example of the ball | bowl state update process in one Embodiment of this invention. It is a flowchart which shows the example of the Bns state setting process in one Embodiment of this invention. It is a flow chart which shows an example of BB win time_Bns state setting processing in one embodiment of the present invention. It is a flowchart which shows the example of BB between flag_ Bns state setting processing in one Embodiment of this invention. It is a flow chart which shows an example of BB operation waiting_Bns state setting processing in one embodiment of the present invention. It is a flowchart which shows the example of BB in B_Bns state setting processing in one Embodiment of this invention. It is a flowchart which shows the example of J_N_Bns state setting processing in one Embodiment of this invention. It is a flowchart which shows the example of Cha-BB in B_Bns state setting processing in one Embodiment of this invention. It is a flowchart which shows the example of ChaJAC in_ _ Bns state setting processing in one Embodiment of this invention. It is a flowchart which shows the example of the process (1) at the time of the general middle game start in one embodiment of the present invention. It is a flowchart which shows the example of the process (2) at the time of general middle_game start in one Embodiment of this invention. It is a flowchart which shows the example of the pseudo | simulation BB lottery process in one Embodiment of this invention. It is a flow chart which shows an example of processing during general BB_game start in one embodiment of the present invention. It is a flow chart which shows an example of BB rush judging processing (at the time of game start) in one embodiment of the present invention. It is a flow chart which shows an example of BBJAC shift judging processing (at the time of game start) in one embodiment of the present invention. It is a flow chart which shows an example of BB counter management processing in one embodiment of the present invention. It is a flow chart which shows an example of processing during a race-game start in one embodiment of the present invention. It is a flow chart which shows an example of processing during AT preparation-game start in one embodiment of the present invention. It is a flow chart which shows an example of processing at the time of woman A victory_game start in one embodiment of the present invention. It is a flow chart which shows an example of processing at the time of Kappa victory_game start in one embodiment of the present invention. It is a flow chart which shows an example of AT at the time of game start processing in one embodiment of the present invention. It is a flow chart which shows an example of processing at the time of BB_game start in AT in one embodiment of the present invention. 7 is a flowchart showing an example of a game state setting process according to an embodiment of the present invention. It is a flow chart which shows an example of general middle game state setting processing in one embodiment of the present invention. It is a flow chart which shows an example of general middle BB_gaming state setting processing in one embodiment of the present invention. It is a flowchart which shows the example of _ game state setting processing in a race in one embodiment of the present invention. It is a flowchart which shows the example of AT under preparation_ gaming state setting processing in one embodiment of this invention. It is a flow chart which shows an example of during BB AT game state setting processing in one embodiment of the present invention. It is a flow chart which shows an example of processing at the time of reel stop command reception in one embodiment of the present invention. It is a flowchart which shows the example of the general middle penalty process in one Embodiment of this invention. It is a flowchart which shows the example of the penalty process during BB in one Embodiment of this invention. It is a flow chart which shows an example of processing at the time of winning a prize operation command reception in one embodiment of the present invention. It is a flow chart which shows an example of processing during a general middle BB_ prize in one embodiment of the present invention. It is a flow chart which shows an example of BB rush judging processing (at the time of winning) in one embodiment of the present invention. It is a flow chart which shows an example of BBJAC shift judging processing (at the time of winning) in one embodiment of the present invention. It is a flow chart which shows an example of processing during a race during a race in one embodiment of the present invention. It is a flowchart which shows the example of the process during BB_ prize at the time of AT in one embodiment of the present invention. It is a flow chart which shows an example of processing at the time of payment end command reception in one embodiment of the present invention. It is a flowchart which shows the example of the process at the time of no-operation command reception in one Embodiment of this invention. It is a flowchart which shows the example of processing at the time of AT preparation button pressing in one Embodiment of this invention. It is a flowchart which shows the example of the woman A_AT start game number determination processing in one Embodiment of this invention. It is a figure which shows an example of a lottery table at the time of a race_missing in the modification 1. FIG. FIG. 18 is a flowchart illustrating an example of a process during race_game start in a modification 1; FIG. It is a figure which shows an example of a lottery table at the time of a race_missing in modification 2. FIG.

  Hereinafter, a pachi-slot machine will be described as an example of a gaming machine showing an embodiment of the present invention, and the configuration and operation thereof will be described with reference to the drawings. In the present embodiment, a pachislot equipped with an AT function will be described.

<Function flow>
First, referring to FIG. 1, the functional flow of the pachislot machine will be described. In the pachislot machine of the present embodiment, a medal is used as a game medium for playing a game. In addition to the medals, for example, coins, gaming balls, point data or tokens for gaming may be applied as gaming media.

  When a player inserts a medal into a pachislot and the start lever is operated, one value (hereinafter referred to as a random value for internal lottery) is extracted from random numbers in a predetermined numerical range (for example, 0 to 65535). Ru.

  The internal lottery means performs lottery based on the extracted internal random number for random determination, and determines an internal winning combination. The internal lottery means is one of various processing means (processing functions) included in the main control circuit described later. By the determination of the internal winning combination, a combination of symbols permitting display along an effective line (winning determination line) described later is determined. The types of combinations of symbols include those related to "winning" in which the player is given a benefit such as payout of medals, activation of replay (replay), activation of bonus, etc., and so-called "loss" other than that. Those concerned are provided.

  In addition, when the start lever is operated, rotation of the plurality of reels is performed. Thereafter, when the player presses the stop button corresponding to the predetermined reel, the reel stop control means performs control to stop the rotation of the corresponding reel based on the internal winning combination and the timing when the stop button is pressed. Do. The reel stop control means is one of various processing means (processing functions) provided in a main control circuit described later.

  In the pachi slot, basically, control is performed to stop the rotation of the corresponding reel within a prescribed time (190 msec or 75 msec) from when the stop button is pressed. In the present embodiment, the number of symbols moving with the rotation of the reel within this prescribed time is referred to as the “number of sliding symbols”. Then, in the present embodiment, when the prescribed period is 190 msec, the maximum number of sliding symbols (maximum sliding symbol number) is determined to be four symbols, and when the prescribed period is 75 msec, the maximum sliding symbol The number is set to one pattern.

  When an internal winning combination that permits combination display of symbols related to winning is determined, the reel stop control means normally follows the effective line within the specified time of 190 msec (for four symbols of symbols). Stop the rotation of the reel so that it is displayed as much as possible. In addition, the reel stop control means is, for example, 1 at the time of operation of “MB” (middle bonus) for continuously operating a second type special service, a challenge bonus (hereinafter referred to as “CB”) and “CB”. The rotation of the reels is stopped so that the combination of the symbols is displayed as much as possible along the winning determination line within a prescribed time of 75 msec (for one symbol) for three or more reels. Furthermore, the reel stop control means stops the rotation of the reel so that the combination of symbols whose display is not permitted by the internal winning combination is not displayed along the effective line by using various prescribed times corresponding to the gaming state. Let

  Thus, when the rotations of the plurality of reels are all stopped, the prize determination means determines whether or not the combination of symbols displayed along the activated line relates to a prize. This winning determination means is also one of various processing means (processing functions) provided in the main control circuit described later. Then, when it is determined that the combination of the displayed symbols relates to winning by the winning determination means, a bonus such as payout of medals is given to the player. In the pachislot, a series of such flows as described above are performed as one game (unit game).

  Further, in the pachislot, in the above-described series of game operation flows, display of an image performed by a display device such as a liquid crystal display device, output of light performed by various lamps, output of sound performed by a speaker, or a combination thereof Various effects are performed using it.

  Specifically, when the start lever is operated, a random value for presentation (hereinafter referred to as a random number for presentation) is extracted separately from the above-mentioned random value for internal lottery used to determine the internal winning combination. Ru. When the effect random number value is extracted, the effect content determination means randomly determines the effect to be executed this time out of a plurality of types of effect content associated with the internal winning combination. The effect content determination means is one of various processing means (processing functions) included in the sub control circuit described later.

  Next, when the effect content is determined by the effect content determining means, the effect executing means responds to each trigger at the start of rotation of the reel, at the time of rotation stop of each reel, at the time of determination of presence or absence of winning, etc. Run. Thus, in pachislot, for example, the opportunity to know or predict the determined internal winning combination (in other words, the combination of the symbols to be aimed at) is played by executing the presentation content corresponding to the internal winning combination. Provided to the player, and the player's interest can be improved.

<Structure of Pachislot>
Next, with reference to FIGS. 2 to 4, the structure of the pachi slot according to the present embodiment will be described. In addition, the pachislot of this embodiment functionally mainly includes various operations related to the progress of the game and a main control unit that controls the various operations, a sub control unit that performs the rendering of the game, and the main control It is comprised by the game machine case part for mounting a part and a sub control part. The main control unit includes a main control circuit (main control board) described later and various peripheral devices (various operation buttons, reel units, etc.) connected thereto. The sub control unit includes a sub control circuit (sub control board) described later and various peripheral devices controlled by the sub control circuit (including various effect devices such as a liquid crystal display device, a speaker, and a lamp (LED)). The contents of each component will be described more specifically below.

[Appearance structure]
FIG. 2 is a perspective view showing the external structure of the pachi slot 1.

  The pachi slot 1 is provided with an exterior body 2 as shown in FIG. The exterior body 2 has a cabinet 2a that accommodates a reel, a circuit board, and the like, and a front door 2b attached to the cabinet 2a so as to be able to open and close. Handles 7 are provided on both side surfaces of the cabinet 2a (only the handle 7 on one side is shown in FIG. 2). The handle 7 is a recess that can be touched by the carrier when transporting the pachislot 1.

  Three reels 3L, 3C, 3R (variable display devices) are provided side by side inside the cabinet 2a. Hereinafter, the respective reels 3L, 3C, 3R are also referred to as a left reel 3L, a middle reel 3C, and a right reel 3R, respectively. Each of the reels 3L, 3C, 3R (display row) has a reel body formed in a cylindrical shape, and a translucent sheet material mounted on the circumferential surface of the reel body. On the surface of the sheet material, a plurality of (for example, 20) designs are drawn at predetermined intervals along the circumferential direction.

  The upper panel unit 10 and the liquid crystal display device 11 (display device, notification means) are provided above the center of the front door 2b. The upper panel unit 10 is provided in the upper end region of the front door 2 b, and the liquid crystal display device 11 is disposed below the upper panel unit 10. The upper panel unit 10 has a light source and performs effects by light emitted from the light source. Further, the liquid crystal display device 11 executes effects by displaying a video.

  A pedestal 12 is provided at the center of the front door 2b. The pedestal portion 12 is provided with a frame member 13 and various devices to be operated by the player.

  The frame member 13 has a symbol display area 4, an information display window 14, and a stop button attachment portion 15. As shown in FIG. 2, the symbol display area 4 and the information display window 14 are provided in the opening of the frame member 13, and the stop button attachment portion 15 is provided in the lower part of the opening of the frame member 13.

  The symbol display area 4 is an area overlapping the three reels 3L, 3C, 3R when viewed from the front (player's side), and is arranged on the front side (player's side) of the three reels 3L, 3C, 3R. The symbol display area 4 has a function as a display window, and is configured such that three reels 3L, 3C, 3R arranged behind it (cabinet 2a side) can be seen through. Therefore, in the following, the symbol display area 4 is referred to as a reel display window 4.

  The reel display window 4 is, when the rotation of the three reels 3L, 3C, 3R provided behind it is stopped, 3 of the plurality of symbols provided on the circumferential surface of each reel, continuously arranged 3 One symbol is configured to be displayed in the frame. That is, when the rotation of the three reels 3L, 3C, 3R is stopped, in the frame of the reel display window 4, one symbol (three in total) in each of the upper, middle and lower areas for each reel Is displayed. In the present embodiment, in the frame of the reel display window 4, a middle line area of the left reel 3L, a middle area of the middle reel 3C, and a pseudo line (center line) connecting the middle area of the right reel 3R It defines as an effective line (judgment line) which judges whether it is winning or not.

  The information display window 14 is provided continuously to the lower part of the reel display window 4 and arranged so that the surface direction of the information display surface is directed upward. The information display window 14 and the reel display window 4 are covered by a transparent window cover 16. The window cover 16 is disposed on the inner surface side of the frame member 13 and can not be removed from the front surface side of the front door 2b.

  Further, the frame member 13 has a sheet placement portion 17 facing the information display surface of the information display window 14 with the window cover 16 interposed therebetween. Then, between the sheet placement unit 17 and the window cover 16, a sheet member (information sheet) in which information regarding the game is described is disposed. Therefore, the information sheet is covered by the window cover 16 having a smooth surface without unevenness and gaps, and the window cover 16 serves as a mounting portion for the information sheet.

  As described above, in the pachi slot 1 of the present embodiment, the window cover 16 can not be removed from the front side of the front door 2b, and has a smooth surface without irregularities or gaps, so the attachment portion of the information sheet Access to the inside of Pachislot 1 through can prevent fraud. The exchange of the information sheet will be described later with reference to FIG.

  In the present embodiment, as described above, an example in which the information display window 14 is formed continuously with the reel display window 4 at the opening of the frame member 13 has been described, but the present invention is not limited to this. The information display window 14 may not be formed continuously with the reel display window 4. That is, the opening of the reel display window 4 and the opening of the information display window 14 may be arranged side by side in the vertical direction.

  The stop button attaching portion 15 is formed of a flat plate member having a substantially trapezoidal surface shape. The stop button attachment portion 15 is provided below the information display window 14 and is provided so that the substantially trapezoidal surface faces the front (player's side). In the substantially trapezoidal surface of the stop button mounting portion 15, three through holes are provided side by side, through which the three stop buttons 19L, 19C, 19R respectively penetrate.

  Three stop buttons 19L, 19C, 19R are provided corresponding to each of the three reels 3L, 3C, 3R, and each stop button is provided to stop the rotation of the corresponding reel. The stop buttons 19L, 19C, 19R are one of various devices to be operated by the player. Hereinafter, the stop buttons 19L, 19C, 19R will also be referred to as a left stop button 19L, a middle stop button 19C, and a right stop button 19R, respectively.

  In addition to the stop button, the pedestal portion 12 is provided with a medal insertion slot 20, a MAX bet button 21 (bet operation means), a 1 bet button 22 and a start lever 23 as various devices to be operated by the player. .

  The medal insertion slot 20 is provided to receive a medal dropped from the outside into the pachislot 1 by the player. The medal received from the medal insertion slot 20 is used for one game with the preset number (for example, 3) as the upper limit, and the portion exceeding the preset number is deposited in the inside of the pachislot 1 Can. That is, the pachislot 1 has a so-called credit function (game media storage means).

  The MAX bet button 21 and the 1 bet button 22 are provided to determine the number of medals to be used for one game from the medals deposited inside the pachislot 1. The start lever 23 is provided to start the rotation of all the reels (3L, 3C, 3R).

  Further, as viewed from the front, on the left side of the reel display window 4 of the front door 2b, a 7-segment display 24 formed of a 7-segment LED (Light Emitting Diode) is provided. The 7-segment display 24 includes information such as the number of medals to be paid out to the player as a bonus (hereinafter referred to as the number of payouts) and the number of medals deposited inside the pachislot 1 (hereinafter referred to as the number of credits). Display digitally. Further, on the right side of the reel display window 4 of the front door 2b, a selection button 25 (chance button) is provided. The selection button 25 is a button to be pressed by the player when a selection operation such as game characteristics is required. For example, it is pressed when the player selects one of two determination forms (modes) of the number of AT start games in the AT start game number determination game at the time of "woman A" victory described later. The selection button 25 is connected to a sub-control board 72 described later, and detection of depression of the selection button 25 and control of selection operation based on the detection are performed by the sub-control board 72.

  Side panel units 26L and 26R are provided on both sides of the pedestal 12 of the front door 2b. Each side panel unit has a light source, and performs an effect by the light emitted from the light source. Further, a settlement button 27 is provided below the left side panel unit 26L. The settlement button 27 is provided to pull out (discharge) the medals deposited inside the pachislot 1.

  A waist panel unit 31 is provided below the pedestal 12 of the front door 2b. The waist panel unit 31 has a decorative panel on which an arbitrary image is drawn and a light source for emitting light for illuminating the decorative panel from the back side.

  Below the lumbar panel unit 31, a medal payout port 32, speaker holes 33L and 33R, and a medal tray unit 34 are provided. The medal payout opening 32 guides a medal discharged by driving of a hopper device 51 (a medal payout device) described later to the outside. The medal tray unit 34 stores the medals discharged from the medal payout opening 32. The speaker holes 33L and 33R are provided to output sounds such as sound effects and music corresponding to the contents of the effect.

[Internal structure]
Next, the internal structure of the pachi slot 1 will be described with reference to FIGS. 3 and 4. 3 and 4 show the internal structure of the pachi slot 1. FIG. 3 is a view showing a state in which the front door 2b is opened and the middle door 41 provided on the back side of the front door 2b is closed with respect to the front door 2b. Moreover, FIG. 4 is a figure which shows the state in which the front door 2b was open | released and the middle door 41 was open | released with respect to the front door 2b.

  The cabinet 2a is a box-like member, and has a top plate, a bottom plate, left and right side plates, and a back plate. For example, a cabinet-side speaker 42 for outputting sound effects is provided on the upper side inside the cabinet 2a.

  A cabinet side relay board 44 is disposed on one side (left side in FIGS. 3 and 4) of the cabinet side speaker 42. The cabinet side relay board 44 includes a main control board 71 (see FIG. 5 described later) attached to the middle door 41 (see FIGS. 3 and 4), a hopper device 51, and a medal auxiliary storage switch 75 described later (described later). 5) and a medal payout count switch (not shown).

  At a central portion inside the cabinet 2a, an amplifier substrate 45 for controlling the output of sound from the cabinet side speaker 42 is disposed. Although not shown in FIGS. 3 and 4, the inside of the cabinet 2a is viewed from the front (player side), and the other side of the amplifier substrate 45 (right side in FIGS. 3 and 4) A concentrated terminal plate 47 (see FIG. 5 described later) is provided. The external concentration terminal plate 47 is provided to output signals such as a medal insertion signal, a medal payout signal, and a security signal to the outside of the pachi-slot 1.

  A hopper device 51 (a medal payout device), a medal auxiliary storage 52 and a power supply device 53 are disposed below the inside of the cabinet 2a.

  The hopper device 51 is attached to a substantially central portion of the bottom plate of the cabinet 2a. The hopper device 51 can accommodate a large amount of medals and has a structure capable of discharging them one by one. The hopper device 51 pays out the medals when the stored medals exceed, for example, 50 or when the settlement button 27 is pressed and the medals are settled. The medals paid out by the hopper device 51 are discharged from the medal payout opening 32 (see FIG. 2).

  The medal auxiliary storage 52 stores the medals overflowing from the hopper device 51. The medal auxiliary storage 52 is disposed on the right side of the hopper device 51 when the inside of the cabinet 2a is viewed from the front.

  The power supply device 53 includes a power switch 53a and a power substrate 53b (see FIG. 5 described later). The power supply device 53 is disposed on the left side of the hopper device 51 when the inside of the cabinet 2a is viewed from the front. The power supply device 53 converts the power of the AC voltage 100 V into the power of the DC voltage required in each part, and supplies the converted power to each part.

  As shown in FIGS. 3 and 4, the middle door 41 is disposed substantially at the center of the back of the front door 2b, and the reel display window 4 (see FIG. 4) is attached to the front door 2b so as to be opened and closed from the back. It is done.

  As shown in FIG. 3 and FIG. 4, a main control board case 55 containing a main control board 71 described later (see FIG. 5 described later) and three reels 3L, 3C, 3R are attached to the middle door 41. It is done. Although not shown, a stepping motor (variation display device) is connected to each of the three reels 3L, 3C, 3R via a gear having a predetermined reduction ratio.

  In the present embodiment, when the middle door 41 is opened with respect to the front door 2b, as shown in FIG. 4, the back surface of the window cover 16 and the sheet placement portion 17 are exposed on the back surface of the front door 2b. As described above, between the back surface of the window cover 16 and the sheet placement unit 17, an information sheet on which information about the game is described is disposed. This information sheet is inserted in the gap formed between the back surface of the window cover 16 and the sheet mounting portion 17 in a state where the middle door 41 is opened and the back surface of the window cover 16 and the sheet mounting portion 17 are exposed. Ru. Further, also in the case of exchanging the information sheet, after the middle door 41 is opened, the exchange operation of the information sheet is performed.

  Although not shown in FIGS. 3 and 4, the main control board case 55 is provided with a setting key type switch 56 (see FIG. 5 described later) described later. The setting key type switch 56 is used when changing the setting of the pachi slot 1 or confirming the setting of the pachi slot 1. In the present embodiment, a main control board unit is constituted by the main control board case 55 and the main control board 71 housed in the main control board case 55.

  The main control board 71 housed in the main control board case 55 has a main control circuit 91 (see FIG. 6 described later) described later. The main control circuit 91 is a circuit for controlling the main flow of the game in the pachislot 1 such as determination of the internal winning combination, rotation and stop of the reels 3L, 3C, 3R, and determination of the presence or absence of a prize. The specific configuration of the main control circuit 91 will be described in detail later with reference to the drawings.

  At an upper portion of the middle door 41 of the front door 2b, a sub control board case 57 in which a sub control board 72 (see FIG. 5 described later) described later is accommodated is disposed. The sub control board 72 housed in the sub control board case 57 has a sub control circuit 101 (see FIG. 7 described later). Note that the sub control circuit 101 (sub control means) receives command data transmitted from the main control circuit 91, and based on the received command data, determines an effect of a game by displaying an image etc. It is a circuit that controls the operation of the determined effect. The specific configuration of the sub control circuit 101 will be described in detail later with reference to the drawings.

  Although not shown in FIG. 3 and FIG. 4, when the front door 2 b is viewed from the back side, a sub relay board 61 (see FIG. 5 described later) is disposed on the right side of the sub control board case 57. The sub relay board 61 is a board that relays connection wiring between the sub control board 72 and the main control board 71. Further, the sub relay board 61 is a relay board for electrically connecting the sub control board 72 and a board provided around the sub control board 72. In addition, as a board | substrate arrange | positioned by the periphery of the sub control board 72, LED board 62A, 62B mentioned later etc. are mentioned.

  Although not shown in FIGS. 3 and 4, the LED substrates 62A and 62B are provided above the sub control substrate case 57 when viewed from the back surface side of the front door 2b. The LED boards 62A and 62B are variously included in a group of LEDs (Light Emitting Diodes) 85 described later (see FIG. 5 described later) according to the effects performed by the control of the sub control circuit 101 (refer to FIG. 7 described later). Turn the LED on and off to display the blinking pattern. Further, the pachi slot 1 of the present embodiment includes a plurality of LED substrates in addition to the LED substrates 62A and 62B. For example, although not shown, the pachi slot 1 of the present embodiment includes an LED (light emitting means) for turning on and off the MAX bet button 21 and an LED substrate for controlling the operation of the LED. An LED for turning on and off the MAX bet button 21 may be included in the LED group 85. In this case, the operation of the LED is controlled by the LED substrates 62A and 62B.

  Although not shown in FIGS. 3 and 4, a 24h door opening / closing monitoring unit 63 described later is disposed below the sub relay board 61 (see FIG. 5 described later). The 24 h door opening and closing monitoring unit 63 stores history information of the opening and closing of the middle door 41. Further, when the middle door 41 is opened, the 24 h door opening / closing monitoring unit 63 outputs a signal for performing an error display by the liquid crystal display device 11 to the sub control board 72 (sub control circuit 101).

  Lower speakers 65L and 65R are disposed below the middle door 41 as shown in FIGS. 3 and 4. The lower speakers 65L and 65R are disposed on the back of the front door 2b at positions facing the speaker holes 33L and 33R (see FIG. 2).

  Further, above the lower speaker 65L of the front door 2b, a selector 66 and a door open / close monitoring switch 67 described later (see FIG. 5 described later) are disposed. The selector 66 is a device that selects whether or not the material, shape, and the like of the medals are appropriate, and guides the appropriate medals inserted into the medal insertion slot 20 to the hopper device 51. Although not shown, a medal sensor (input operation detection means) for detecting that a proper medal has passed is provided on a path through which the medal passes in the selector 66.

  Although not shown in FIGS. 3 and 4, the door open / close monitoring switch 67 is disposed on the left side of the selector 66 when the front door 2 b is viewed from the back side. The door open / close monitoring switch 67 outputs a security signal for notifying the open / close of the front door 2 b to the outside of the pachi slot 1.

  In the lower area of the reel display window 4 and in the area opened and closed by the middle door 41, as shown in FIG. 4, a door relay terminal board 68 is provided. The door relay terminal board 68 is a board relaying connection wiring between the main control board 71 in the main control board case 55, various buttons and switches, the sub control board 72, the selector 66 and the game operation display board 81. (See FIG. 5 described later). Examples of the various buttons and switches include a MAX bet button 21, a 1 bet button 22, a settlement button 27, a door open / close monitoring switch 67, a bet switch 77 described later, and a start switch 79.

<Control system equipped with Pachislot>
Next, a control system included in the pachi slot 1 will be described with reference to FIG. FIG. 5 is a circuit block diagram showing a configuration of a control system of the pachi slot 1.

  The pachi slot 1 has a main control board 71 provided on the middle door 41 and a sub control board 72 provided on the front door 2b. The pachi slot 1 further includes a reel relay terminal board 74, a setting key switch 56, a cabinet side relay board 44, and a power supply 53 connected to the main control board 71. Furthermore, the pachi slot 1 has an external concentrated terminal board 47 connected to the main control board 71 via the cabinet side relay board 44, a hopper device 51, and a medal auxiliary storage switch 75. The configurations of the outer concentrated terminal plate 47 and the hopper device 51 have been described above, and thus the description thereof is omitted here.

  The reel relay terminal board 74 is disposed inside the reel body of each of the reels 3L, 3C, 3R. The reel relay terminal board 74 is electrically connected to stepping motors (not shown) of the respective reels 3L, 3C, 3R, and relays signals outputted from the main control board 71 to the stepping motors.

  The medal auxiliary storage switch 75 is provided in the medal auxiliary storage 52, and detects whether the medal auxiliary storage 52 is full of medals.

  The power supply device 53 includes a power supply substrate 53 b connected to the main control substrate 71 and a power switch 53 a connected to the power supply substrate 53 b. The power switch 53 a is pressed to supply the necessary power to the pachi slot 1.

  The pachi slot 1 is connected to the main control board 71 via the door relay terminal board 68 and the door relay terminal board 68. The selector 66, the door open / close monitoring switch 67, the BET switch 77 (bet detection means) The settlement switch 78, the start switch 79, the stop switch board 80, the game operation display board 81, and the sub relay board 61 are provided. Since the selector 66, the door open / close monitoring switch 67, and the sub relay board 61 have been described above, the description thereof is omitted here.

  The BET switch 77 detects that the MAX bet button 21 or the 1 bet button 22 has been pressed by the player. The settlement switch 78 detects that the settlement button 27 has been pressed by the player. The start switch 79 (start operation detection means) detects that the player has operated the start lever 23 (start operation).

  The stop switch substrate 80 (stop operation detection means) includes a circuit for stopping the rotating reel and a circuit for displaying the stopable reel by an LED or the like. The stop switch substrate 80 is provided with a stop switch. The stop switch detects that each stop button 19L, 19C, 19R has been pressed by the player (stop operation).

  The game operation display board 81 is connected to the 7-segment display 24, and inserted when receiving the insertion of medals, when the three reels 3L, 3C, 3R can be rotated, and when replaying is performed. It is a substrate for displaying the number of medals on the 7-segment display 24. In addition, an LED 82 is connected to the game operation display substrate 81, and the LED 82 lights a mark for displaying a game start, a mark for performing a re-game, etc. based on a signal input from the game operation display substrate 81, for example. .

  The sub control board 72 is connected to the main control board 71 via the door relay terminal board 68 and the sub relay board 61. The pachi slot 1 also has a sound I / O substrate 84, LED substrates 62A, 62B, and a 24h door open / close monitoring unit 63 connected to the secondary control substrate 72 via the secondary relay substrate 61. The LED substrates 62A, 62B and the 24h door opening / closing monitoring unit 63 have been described above, and thus the description thereof is omitted here.

  The sound I / O substrate 84 outputs sound to a speaker group including the lower speakers 65L and 65R and various speakers (not shown).

  The pachi slot 1 also includes a ROM cartridge substrate 86 (second storage unit) and a liquid crystal relay substrate 87 connected to the sub control substrate 72. The ROM cartridge substrate 86 and the liquid crystal relay substrate 87 are accommodated in the sub control substrate case 57 together with the sub control substrate 72.

  The ROM cartridge substrate 86 is a substrate for managing data for effect image (video), sound, light (LED group 85) and communication. The liquid crystal relay substrate 87 is a substrate that relays connection wiring between the sub control substrate 72 and the liquid crystal display device 11.

<Main control circuit>
Next, the configuration of the main control circuit 91 mounted on the main control board 71 will be described with reference to FIG. FIG. 6 is a block diagram showing a configuration example of the main control circuit 91 of the pachislot 1.

  The main control circuit 91 mainly includes a microcomputer 92 mounted on the main control board 71. The microcomputer 92 includes a main CPU 93, a main ROM 94 and a main RAM 95.

  The main ROM 94 stores a control program executed by the main CPU 93, a data table, data for transmitting various control instructions (commands) to the sub control circuit 101, and the like. The main RAM 95 is provided with a storage area for storing various data such as an internal winning combination determined by the execution of the control program.

  A clock pulse generation circuit 96, a frequency divider 97, a random number generator 98, and a sampling circuit 99 are connected to the main CPU 93. Clock pulse generation circuit 96 and frequency divider 97 generate clock pulses. The main CPU 93 executes the control program based on the generated clock pulse. The random number generator 98 generates a predetermined range of random numbers (e.g., 0 to 65535). The sampling circuit 99 extracts one value from the generated random numbers.

  The main CPU 93 counts the number of times the pulse is output to the stepping motor of each reel after detecting the reel index. Thereby, the main CPU 93 manages the rotation angle of each reel (mainly, how many reels the symbol has rotated). The reel index is information indicating that the reel has made one rotation. The reel index includes, for example, an optical sensor having a light emitting portion and a light receiving portion, and a detection piece provided at a predetermined position of each reel and interposed between the light emitting portion and the light receiving portion by rotation of each reel. Detection is performed by a reel position detection unit (not shown).

  Here, management of the rotation angle of each reel will be specifically described. The number of pulses output to the stepping motor is counted by a pulse counter provided in the main RAM 95. Then, each time the pulse counter counts the output of a predetermined number of pulses necessary for the rotation of one symbol, the symbol counter provided in the main RAM 95 is incremented by one. A symbol counter is provided for each reel. The value of the symbol counter is cleared when a reel index is detected by a reel position detection unit (not shown).

  That is, in this embodiment, by managing the symbol counter, it is managed how many symbol rotations have been performed since the reel index was detected. Therefore, the position of each symbol on each reel is detected with reference to the position where the reel index is detected.

<Sub control circuit>
Next, with reference to FIG. 7, the configuration of the sub control circuit 101 mounted on the sub control substrate 72 will be described. FIG. 7 is a block diagram showing a configuration example of the sub control circuit 101 of the pachislot 1.

  The sub control circuit 101 is electrically connected to the main control circuit 91, and performs processing such as determination and execution of effects based on commands transmitted from the main control circuit 91. The sub control circuit 101 basically includes a sub CPU 102, a sub RAM (DRAM: Dynamic RAM) 103 (first storage unit), a rendering processor 104, a drawing RAM 105, a driver 106, an SRAM (Static RAM) 107, and an RTC (Real (Time Clock) 108 is configured.

  The sub CPU 102 controls the output of video, sound and light according to the control program stored in the ROM cartridge substrate 86 in response to the command transmitted from the main control circuit 91. The ROM cartridge substrate 86 basically includes a program storage area and a data storage area.

  The program storage area stores a control program to be executed by the sub CPU 102. For example, in the control program, a main board communication task for controlling communication with the main control circuit 91, and a random number value for effect extraction, and an effect registration task for determining and registering effect contents (effect data) Contains various programs to run the Further, the control program includes a drawing control task (animation task) for controlling display of an image by the liquid crystal display device 11 based on the determined effect contents, a lamp control task for controlling light output by a light source such as the LED group 85, The various programs for performing the sound control task etc. which control the output of the sound by the speakers 65L and 65R are also included.

  The data storage area includes a storage area for storing various data tables, a storage area for storing effect data constituting each effect content, and a storage area for storing animation data relating to creation of a video. The data storage area also includes a storage area for storing sound data relating to BGM and sound effects, and a storage area for storing lamp data relating to a light on / off pattern.

  The sub RAM 103 is provided with a storage area for registering the determined effect content and presentation data, and a storage area for storing various data such as an internal winning combination transmitted from the main control circuit 91.

  The sub CPU 102, the rendering processor 104, the drawing RAM (including the frame buffer) 105, and the driver 106 create an image according to the animation data specified by the effect content, and cause the liquid crystal display device 11 to display the created image.

  Further, the sub CPU 102 causes the speaker group such as the speakers 65L and 65R to output a sound such as BGM according to the sound data designated by the contents of the effect. Further, the sub CPU 102 controls the lighting and extinguishing of the LED group 85 in accordance with the lamp data specified by the effect contents.

  The SRAM 107 is a storage device that is used as a backup RAM and backs up predetermined data in the sub RAM 103. The RTC 108 is a clock circuit for date and time.

<Transition flow of RT gaming state>
Next, various RT gaming states controlled by the main control circuit 91 (main CPU 93) of the pachislot 1 of the present embodiment and the transition flow thereof will be described with reference to FIG.

  In this embodiment, as the RT gaming state, three types of states of RT0 gaming state to RT2 gaming state are provided, in which the types of internal winning combinations related to replay and the winning probability thereof are different from each other. The RT0 gaming state is a gaming state in which the winning probability of the internal winning combination related to the replay is a low probability, and in both the RT1 gaming state and the RT2 gaming state, the winning probability of the internal winning combination related to the replay is a high probability Gaming state.

  The RT0 gaming state is an RT gaming state set at the initial state, and the number of inserted medals (number of times to be applied) for each unit game is two (first number) or three (second number) games It is a state. Note that, in the RT0 gaming state, information is instructed to instruct the player to increase the number of medals to be doubled (a suggestion of double-counting is made).

  Then, in the RT0 gaming state, as shown in FIG. 8, when a middle bonus (special internal winning combination) with a name “2 MB” described later, which is internally won only during a two-card game, is won, as shown in FIG. Is shifted from the RT0 gaming state to the RT1 gaming state. In addition, in the RT0 gaming state, when a middle bonus of the name “3 MB” described later, which is internally won only at the time of three-card gaming, is won, the RT gaming state is from RT0 gaming state to RT2 as shown in FIG. Transition to the game state.

  In the RT1 gaming state, the inserted number of medals for each unit game (the number of multiplications) will be two or three, but the information to the effect that the player is instructed to increase the number of medals of three is notified Because there is a suggestion of a three-piece game, mainly a three-piece game is played. In this case, the bonus of “2 MB” won when the RT gaming state is shifted to the RT1 gaming state is a bonus to be won only when the number of medals is two, so in the RT1 gaming state, “2 MB” The game is played with the bonus carried over. Therefore, in the following, the RT1 gaming state is also referred to as "a state between 2 MB flags". In addition, in the game with the 2 MB flag state, the "2 MB" will not win even if the "losing" is won internally. The main control circuit 91 controls the game operation in the 2 MB flag state. That is, in the present embodiment, the main control circuit 91 doubles as means (predetermined game control means) for controlling the game operation in the 2 MB flag state (predetermined game state).

  However, in the RT1 gaming state, a two-card game is performed, and when the “2 MB” bonus is won, the corresponding bonus game is activated. In the "2 MB" bonus game, a game of two cards is played, and the bonus game of "2 MB" is ended when the number of medals to be paid out exceeds two. Then, when the “2 MB” bonus game is digested, as shown in FIG. 8, the RT gaming state shifts from the RT1 gaming state to the RT0 gaming state.

  In the RT2 gaming state, although the inserted number of medals for each unit game (the number of multiplications) is two or three, since the suggestion of three pieces is performed, mainly the three pieces are played.

  In the RT2 gaming state, a three-card game is played, and when the "3 MB" bonus is won, the corresponding bonus game is activated. In the "3 MB" bonus game, a game of two cards is played, and the "3 MB" bonus game is ended when the number of medals paid out exceeds 30. Then, when the “3 MB” bonus game is digested, as shown in FIG. 8, the RT gaming state shifts from the RT2 gaming state to the RT0 gaming state. In the present embodiment, in the RT2 gaming state, it is also possible to play the game in a state in which the “3 MB” bonus won when the RT gaming state shifts to the RT2 gaming state is carried over, so in the following, The RT2 gaming state is also referred to as "a state between 3 MB flags".

  In the present embodiment, the total number of medals stored in the credit and the current medal insertion number is 3 (predetermined number in the 2 MB flag state (RT1 gaming state) or 3 MB flag state (RT2 gaming state) (predetermined number If the player does not press the MAX bet button 21, the player can not perform the bet operation (insertion operation) of the medal. That is, the player sets the MAX bet button 21 when the total number of medals stored in the credit and the current medal insertion number is 2 or less in the 2 MB flag state or the 3 MB flag state. Even if pressed, the operation is treated as invalid.

  In the 2 MB flag state, if the total number of medals credited and inserted is two, if the player activates the MAX bet operation, a two-card game is performed, and the card is carried forward. There is a possibility that "2MB" will be won. In this case, since the RT gaming state shifts from the RT1 gaming state to the RT0 gaming state, the gaming state shifts to a gaming state disadvantageous to the player. However, as in the present embodiment, in the 2 MB flag state, when the total number of medals credited and inserted is two or less, the player's MAX bet operation is invalidated by invalidating the MAX bet operation. It is possible to prevent the gaming state from shifting to the disadvantageous gaming state contrary to the intention.

  In the present embodiment, in the general gaming state (RT0 gaming state) as well as the states between the 2 MB flag state and the 3 MB flag state, the total number of medals credited and inserted is less than three. The player's MAX bet operation may be invalidated.

<Structure of data table stored in main ROM>
Next, configurations of various data tables stored in the main ROM 94 will be described with reference to FIGS.

[Symbol arrangement table]
First, the symbol arrangement table will be described with reference to FIG. The symbol arrangement table is data for specifying the position of each symbol in the rotational direction of each of the left reel 3L, middle reel 3C and right reel 3R and the type of symbol arranged at each position (hereinafter referred to as symbol code (FIG. 9) Define the correspondence with the symbol code table of

  In the symbol arrangement table, when the reel index is detected, the position of the symbol positioned in the middle region of each reel in the frame of the reel display window 4 is defined as “0”. Then, in each reel, the order corresponding to the value of the symbol counter in the order of proceeding in the direction of rotation of the reel (direction from symbol position "19" to symbol position "0" in FIG. 9) on the basis of symbol position "0" 0 "to" 19 "are assigned to each symbol as a symbol position.

  That is, by referring to the symbol counter values (“0” to “19”) and the symbol arrangement table, the symbols are displayed in the upper, middle and lower regions of each reel in the frame of the reel display window 4 It is possible to identify the type of symbol. For example, when the value of the symbol counter corresponding to the left reel 3L is "7", the symbol position "8" is displayed in the upper, middle and lower regions of the left reel 3L in the frame of the left display window 4L. The symbol "yellow BAR", the symbol "watermelon 1" at the symbol position "7" and the symbol "orange" at the symbol position "6" are displayed.

[Symbol combination table]
Next, the symbol combination table (part 1 to part 3) will be described with reference to FIGS. The symbol combination table is a combination of symbols (combination and combination name) predetermined according to the type of benefit (bonus, small winning combination, replay), the content (storage area, data) of the display combination code corresponding thereto, and the payout Define the correspondence with the number of sheets.

  In this embodiment, winning is achieved when the combination of symbols displayed by the left reel 3L, the middle reel 3C and the right reel 3R along the effective line (center line) matches the symbol combination defined in the symbol combination table. It is determined that Then, when it is determined that the player has won, the player is provided with benefits such as payout of medals, activation of replay (replay), and activation of a bonus. If the combination of symbols displayed along the effective line does not match any of the symbol combinations specified in the symbol combination table, it becomes a so-called "loss". That is, in the present embodiment, the symbol combination of "loss" is defined by not defining the symbol combination corresponding to "loss" in the symbol combination table. In addition, this invention is not limited to this, the item of "loss" may be provided in a symbol combination table, and the symbol combination of "loss" may be prescribed directly.

  The various data described in the display combination code column in the symbol combination table are data for identifying a combination of symbols displayed along the effective line. The "data" in the display combination code column is represented by 1-byte data, and a unique combination of symbols (content of display combination) is assigned to each bit in the data.

  Further, the data of "storage area" in the display combination code column is data for specifying a symbol code storage area (see FIG. 30 described later) in which data of the corresponding symbol combination is stored. In the present embodiment, fifteen symbol code storage areas are provided. And in this embodiment, the bit pattern (data pattern of 1 byte) is the same, and the display combination with different contents is managed as another display combination according to the difference of "storage area".

  The numerical values described in the payout amount column in the symbol combination table indicate the number of medals to be paid out to the player. In the symbol combination to which one or more numerical values are given as data of "the number of payouts", the medals of the same number as the numerical values are paid out. For example, in the present embodiment, when the display combination related to the combination name "CT bell" is determined with respect to the number of inserted medals of three cards (the symbol combination related to "CT bell" is stopped and displayed on the effective line) 10) medals are paid out.

  Further, in the present embodiment, for example, when the display combination related to the combination name “CT rep” is determined (when the symbol combination related to “CT rep” is stopped and displayed on the effective line), replay is activated. Do. Furthermore, in the present embodiment, for example, when the display combination according to the combination name "3 MB" or "2 MB" (when the symbol combination according to "3 MB" or "2 MB" is stopped and displayed on the effective line) is determined , MB (middle bonus) is activated.

  As shown in FIG. 10, in the present embodiment, “0” is defined in the “3 sheets” column of “3 MB”, but no number is defined in the “2 sheets” column. . In addition, although "0" is defined in the "2 sheets" column of "2 MB", a number is not defined in the "3 sheets" column. That is, in the present embodiment, the symbol combination (display combination) of “3 MB” is effective (winning) only when the three pieces are placed, and invalid (loss) when the two pieces are placed. Further, the symbol combination (display combination) of "2 MB" is valid (winning) only when the two-piece game is performed, and invalid (loss) when the three-piece game is performed.

[Internal lottery table]
Next, with reference to FIGS. 13 to 20, the internal lottery table will be described. In this embodiment, an internal lottery table is separately provided in each of the RT0 gaming state (general gaming state), the RT1 gaming state (between 2 MB flags), the RT2 gaming state (between 3 MB flags) and the MB gaming state. Furthermore, in each of the RT0 gaming state (general gaming state), the RT1 gaming state (between 2 MB flags), and the RT2 gaming state (between 3 MB flags), the internal for each number of medals (two or three) Set up a lottery table.

  Each internal lottery table includes a winning number (internal winning combination), a lottery value when each winning number is determined (winning probability), and a data pointer obtained when each winning number is determined The correspondence between the replay data pointer and the bonus data pointer is defined. In the internal lottery table referred to in the case where the number of medals is three as shown in FIGS. 13 to 15, for convenience of explanation, the abbreviation of the internal winning combination is also described. In the internal lottery table referred to in the case where the number of medals is two, and the internal lottery table referred to during the MB gaming state shown in FIGS. 16 to 20, in order to simplify the explanation, Description of the name and data pointer is omitted.

  Further, the lottery value is defined for each setting (settings 1 to 6) for adjusting an expected value of internal winnings such as a preset bonus or a small winning combination. This setting is changed, for example, using a reset switch (not shown) and a setting key switch (not shown).

  In the internal lottery process of the present embodiment, first, internal lottery random number values (external random number values) extracted from a predetermined numerical value range (for example, 0 to 65535) are defined corresponding to the respective winning numbers. Subtract sequentially with the lottery value. Next, it is determined (internal lottery) whether the result of subtraction has become negative (whether so-called "worried" has occurred). Then, if the result of subtraction becomes negative (a "digit" occurs) at a predetermined winning number, it means that the winning number (internal winning combination) is won.

  Therefore, in the internal lottery process of this embodiment, the probability that the assigned data pointer is determined is higher as the winning number is larger and the numerical value defined as the lottery value is larger. In addition, the winning probability of each winning number can be represented by “lottery value defined for each winning number / number of all random values that may be extracted (random number denominator: 65536)”.

(1) General (RT0) Internal lottery table (3 pieces) for gaming state
FIG. 13 is a diagram showing the configuration of an internal lottery table (3 pieces) for the general (RT0) gaming state. This general (RT0) gaming state internal lottery table (3 pieces) is referred to in the general gaming state (RT0 gaming state) in the case where the number of medals for unit game is three. The internal lottery table for the general (RT0) gaming state (3 pieces) defines the relationship between winning numbers “1” to “58” (various internal winning combinations) and the corresponding lottery value (winning probability) and data pointer. Do.

  For example, in the normal gaming state (RT0 gaming state), when setting 1 of the internal lottery table for the general (RT0) gaming state (3 pieces) is referred, winning number "2" (internal winning combination "2 MB") is won. The probability of doing is "0". On the other hand, in the normal gaming state (RT0 gaming state), when setting 1 of the internal lottery table for the general (RT0) gaming state (3 pieces) is referred, the winning number "3" (internal winning combination "3 MB") is won. The probability of doing is “17200/65536 (1 / 3.8)”. Then, in this case, “0” is acquired as the small winning combination / replay data pointer, and “2” is acquired as the bonus data pointer. That is, in the present embodiment, when a three-card game is played in the normal gaming state (RT0 gaming state), only "3 MB" is won as a bonus.

  In addition, for example, in the normal gaming state (RT0 gaming state), when referring to setting 1 of the internal lottery table for the general (RT0) gaming state (3 pieces), the winning number "4" (internal winning combination "normal lip 1 The probability of winning “) is“ 374/65536 (1 / 175.2) ”. Then, in this case, “1” is acquired as the small winning combination / replay data pointer, and “0” is acquired as the bonus data pointer.

(2) Between 2 MB flags (RT1) Internal lottery table (3 pieces) for gaming state
FIG. 14 is a diagram showing the configuration of the internal lottery table (3 pieces) for the gaming state between 2 MB flags (RT1). The internal lottery table for the gaming state (3 pieces) for the 2 MB flags (RT1) is referred to when the number of medals for the unit game is 3 in the 2 MB flags state (RT1 gaming state). The internal lottery table for the gaming state (3 pieces) between 2 MB flags (RT1) is the relationship between winning numbers “1” to “58” (various internal winning combinations) and corresponding lottery value (winning probability) and data pointer To define.

  For example, in the state between 2 MB flags (RT1 gaming state), the winning number "2" (internal winning combination "2 MB" when referring to setting 1 of the internal lottery table for the gaming state between 3 MB flags (RT1)). Or the winning number “3” (internal winning combination “3 MB”) will be both “0”. That is, in the present embodiment, when a game of 3 cards is played in the 2 MB flag state (RT1 gaming state), the bonus of "2 MB" and "3 MB" is not won.

  Further, for example, in the state between 2 MB flags (RT1 gaming state), the winning number "4" (internal winning combination "RT") is referred to when setting 1 of the internal lottery table for gaming state (3 pieces) is referred. The probability that the normal lip 1 ′ ′) is won is “2048/65536 (1/32)”. Then, in this case, “1” is acquired as the small winning combination / replay data pointer, and “0” is acquired as the bonus data pointer.

  It should be noted that the winning probability numbers “4” to “16” of the internal lottery table for the general (RT0) gaming state shown in FIG. 13 (multiplied by 3) and the 2 MB flags shown in FIG. 14 (RT1) for gaming state internal As is clear from comparison with those of the lottery table (3 sheets), the winning probability of the replay role in the 2 MB flag state (RT1 gaming state) is higher than that of the normal gaming state (RT0 gaming state).

(3) Between 3 MB flags (RT2) Internal lottery table (3 pieces) for gaming state
FIG. 15 is a diagram showing the configuration of the internal lottery table (3 pieces) for the gaming state between 3 MB flags (RT2). The internal lottery table for the gaming state (3 pieces) for the 3 MB flags (RT2) is referred to when the number of medals for the unit game is 3 in the 3 MB flag state (RT2 gaming state). The internal lottery table (multiplied by 3) for 3 MB flags (RT2) for gaming state is the relationship between winning numbers “1” to “58” (various internal winning combinations) and corresponding lottery value (winning probability) and data pointer To define.

  For example, in the state between 3 MB flags (RT2 gaming state), the winning number "2" (internal winning combination "2 MB" is referred to when setting 1 of the internal lottery table for 3 gaming states (RT2) gaming state) is referred to. Or the winning number “3” (internal winning combination “3 MB”) will be both “0”. That is, in the present embodiment, when a game of 3 cards is played in the 3 MB inter-flag state (RT2 gaming state), both “2 MB” and “3 MB” bonuses are not won.

  Further, for example, in the 3 MB flag state (RT2 gaming state), when referring to setting 1 of the 3 MB flag internal (RT2) gaming state internal lottery table (3 sheet hanging), winning number "4" (internal winning combination " The probability that the normal lip 1 ′ ′) wins is “500/65536 (1/131)”. Then, in this case, “1” is acquired as the small winning combination / replay data pointer, and “0” is acquired as the bonus data pointer.

  In the general (RT0) gaming state internal lottery table (3 sheets) shown in FIG. 13, winning probability numbers “4” to “16” and a 3 MB flag shown in FIG. 15 (RT2) gaming state internal As is clear from comparison with those of the lottery table (3 sheets), the winning probability of the replay role in the 3 MB flag state (RT2 gaming state) is higher than that of the normal gaming state (RT0 gaming state). In addition, the winning probability numbers “4” to “16” of the internal lottery table for the gaming state (3 pieces) between 2 MB flags (RT1) shown in FIG. 14 and the gaming state between 3 MB flags (RT2) shown in FIG. As is clear from comparison with those of the internal lottery table (for 3 sheets), the winning probability of the replay part in the 3 MB flag state (RT2 gaming state) is lower than that of the 2 MB flag state (RT1 gaming state) Become.

(4) Internal lottery table for general (RT0) gaming state
FIG. 16 is a diagram showing the configuration of an internal lottery table (double-on) for the general (RT0) gaming state. This general (RT0) gaming state internal lottery table (two-sheet hanging) is referred to in the general gaming state (RT0 gaming state) in the case where the number of medals for unit game is two. The internal (RT0) gaming state internal lottery table (two-sheet) defines the relationship between winning numbers “1” to “5” (various internal winning combinations) and corresponding lottery values (winning probability). In addition, the internal winning combination of the name "two sheets bell" in FIG. 16 corresponds to all the minors.

  For example, in the normal gaming state (RT0 gaming state), when referring to setting 1 of the internal lottery table (for two sheets) for the general (RT0) gaming state, the winning number "2" (internal winning combination "2 MB") is won. The probability of doing is "26000/65536 (1 / 2.52)". On the other hand, in the normal gaming state (RT0 gaming state), when setting 1 of the internal lottery table (two-sheet hanging) for the general (RT0) gaming state is referred to, the winning number "3" (internal winning combination "3 MB") is won. The probability of doing is "0". That is, in the present embodiment, when a game of two-piece is performed in the normal gaming state (RT0 gaming state), only "2 MB" is won as a bonus.

  In addition, for example, in the normal gaming state (RT0 gaming state), when referring to setting 1 of the internal lottery table for the general (RT0) gaming state (double sheet), the winning number "4" (internal winning combination "normal lip 1 The probability of winning “) is“ 8978/65536 (1 / 7.3) ”.

(5) Between 2 MB flags (RT1) Internal lottery table for game state (2 pieces)
FIG. 17 is a diagram showing the configuration of an internal lottery table (doubled on 2) for the gaming state between 2 MB flags (RT1). The internal lottery table (for 2 sheets) for the 2 MB flag (RT1) gaming state is referred to when the number of medals for unit game is 2 in the 2 MB flag state (RT1 gaming state). The internal lottery table for the gaming state between 2 MB flags (RT1) (double sheet) defines the relationship between winning numbers "1" to "5" (various internal winning combinations) and the corresponding lottery value (winning probability). . For example, the name "2 MB + 2 sheets bell" in FIG. 17 corresponds to the case where the internal winning combination of the name "2 sheets bell" (all minors) is won during "2 MB" carryover.

  For example, in the state between 2 MB flags (RT1 gaming state), the winning number "2" (internal winning combination "2 MB" when referring to setting 1 of the internal lottery table for 2 gaming states (RT1) gaming state). Or the winning number “3” (internal winning combination “3 MB”) will be both “0”. That is, in the present embodiment, when a game of 2 cards is played in the 2 MB flag state (RT1 gaming state), both “2 MB” and “3 MB” bonuses are not won.

  In addition, for example, in the state between 2 MB flags (RT1 gaming state), the winning number "4" (internal winning combination "when the setting 1 of the internal lottery table (two-card hanging) between 2 MB flags (RT1) is referred to The probability of winning 2 MB + normal lip 1 ′ ′) is “32978/65536 (1 / 1.99)”.

  Note that the winning probability of the winning number "4" in the internal lottery table for the general (RT0) gaming state shown in FIG. 16 (doubled) and the 2 MB flag shown in FIG. 17 (RT1) the internal lottery table for gaming state (2) As is clear from comparison with that of a sheet), even in a two-sheet game, the probability of winning a replay role in the 2 MB flag state (RT1 gaming state) is higher than that of the normal gaming state (RT0 gaming state) Become.

(6) Between 3 MB flags (RT2) Internal lottery table for gaming state (2 pieces)
FIG. 18 is a diagram showing the configuration of an internal lottery table (doubled on 2 pieces) for the gaming state between 3 MB flags (RT2). The internal lottery table for the gaming state (RT2) between the 3 MB flags (doubled) is referred to in the state between the 3 MB flags (RT2 gaming state) when the number of medals for the unit game is two. The internal lottery table for the gaming state between the 3 MB flags (RT2) (double sheet) defines the relationship between winning numbers “1” to “5” (various internal winning combinations) and the corresponding lottery value (winning probability) . For example, the name "3 MB + 2 sheets bell" in FIG. 18 corresponds to the case where the internal winning combination of the name "2 sheets bell" (all minors) is won during "3 MB" carryover.

  For example, in the state between 3 MB flags (RT2 gaming state), the winning number "2" (internal winning combination "2 MB" is referred to when setting 1 of the internal lottery table for the gaming state (RT2)) is set. Or the winning number “3” (internal winning combination “3 MB”) will be both “0”. That is, in the present embodiment, when a game of 2 cards is played in the 3 MB inter-flag state (RT2 gaming state), both “2 MB” and “3 MB” bonuses are not won.

  Further, for example, in the 3 MB flag state (RT 2 gaming state), when referring to setting 1 of the 3 MB flag internal (RT 2) gaming state internal lottery table (double sheet), winning number "4" (internal winning combination " The probability of winning 3MB + normal lip 1 ′ ′) is “8980/65536 (1 / 7.3)”.

  It should be noted that the winning probability of the winning number "4" in the internal lottery table for the general (RT0) gaming state shown in FIG. 16 (doubled) and the 3 MB flag shown in FIG. 18 (RT2) the internal lottery table for gaming state (2) As is clear from the comparison with that of the sheet), even in the two-sheet game, the winning probability of the replay role in the 3 MB flag state (RT2 gaming state) is higher than that of the normal gaming state (RT0 gaming state) Become. In addition, the winning probability of winning number "4" of the internal lottery table for the gaming state (RT1) between 2 MB flags (RT1) shown in FIG. 17 and the internal lottery table for the gaming state between 3 MB flags (RT2) shown in FIG. As is clear from the comparison with that of (2 sheets), even in the 2 sheets game, the winning probability of the replay part in the 3 MB flag state (RT 2 gaming state) is the 2 MB flag state (RT 1 gaming state) It is lower than that.

(7) Internal lottery table for 2 MB gaming state FIG. 19 is a diagram showing the configuration of the internal lottery table for 2 MB gaming state. The internal lottery table for 2 MB gaming state is referred to when the middle bonus "2 MB" is activated (when the gaming state is 2 MB gaming state). The internal lottery table for the 2 MB gaming state defines the relationship between the winning numbers "1" and "2" and the corresponding lottery value (winning probability).

  In this embodiment, as shown in FIG. 19, when the gaming state is the 2 MB gaming state, an internal winning combination of the name "CB role" is always won. The internal winning combination of the name "CB role" corresponds to all minor roles.

(8) Internal lottery table for 3 MB gaming state FIG. 20 is a diagram showing the configuration of the internal lottery table for 3 MB gaming state. The internal lottery table for 3 MB gaming state is referred to when the middle bonus "3 MB" is activated (when the gaming state is 3 MB gaming state). The internal lottery table for the 3 MB gaming state defines the relationship between the winning numbers "1" and "2" and the corresponding lottery value (winning probability).

  In this embodiment, as shown in FIG. 20, when the gaming state is the 3 MB gaming state, an internal winning combination of the name “CB role” is always won.

[Symbol combination determination table]
Next, the symbol combination determination table will be described with reference to FIGS. The symbol combination determination table defines the correspondence between the internal winning combination and symbol combinations that can be displayed on the effective line (center line). Therefore, in the present embodiment, when the internal winning combination is determined, the type of symbol combination that can be displayed on the activated line based on the symbol combination determination table, that is, the type of display combination capable of winning is uniquely determined. Be done. The black circles in each symbol combination determination table indicate symbol combinations (combinations) that can be displayed on the effective line (center line) in the internal winning combination won.

  For example, when the internal winning combination is "normally RIP 1", the names "CT Lip", "CU Lip", "Bell Lip 1" to "Bell Lip 8", "BTBAR 1" to "BTBAR 6", "CTSVN 1", The symbol combination of "CTSVN2", "CDSVN2" and "CDSVN3" can be stopped and displayed. Also, for example, when the internal winning combination is "213 Bell 1", symbol combinations of the names "CT bell" and "control combination 1" to "control combination 10" can be displayed in a stopped state. Furthermore, for example, when the internal winning combination is a combination of the name "CB combination", symbol combinations of all the small combinations can be stopped and displayed.

  In addition, although the case where "internal winning combination" becomes "loss" is not specified in the symbol combination determination table, this is all the symbols specified by the symbol combination table shown in FIGS. 10-12. Indicates that the display of the combination is not permitted.

<Configuration of Storage Area Provided in Main RAM>
Next, configurations of various storage areas provided in the main RAM 95 will be described with reference to FIGS. 24 to 30. FIG. Although not described here (not shown), storage areas such as various control data used in various reel effects (various game locks), various flags, various counters, etc. are also provided in the main RAM 95.

[Internal winning combination storage area]
First, the configuration of the internal winning combination storing area will be described with reference to FIG. In the present embodiment, the internal winning combination storing area is configured by internal winning combination storing areas 0 to 7 each represented by 1-byte data.

  When "1" is stored in the predetermined bit in each of the internal winning combination storing areas 0 to 7, it indicates that the internal winning combination corresponding to the predetermined bit is internally won. In the internal winning combination storing area shown in FIG. 24, a storage area corresponding to the internal winning combination of the names "two-bell" and "CB combination" is not defined, but when these internal winning combinations are won. "1" is stored in the storage area (bit) of all internal winning combinations associated with the small winning combination.

[Display combination storage area]
Next, the configuration of the display combination storing area will be described with reference to FIG. In the present embodiment, the display combination storage area is configured by display combination storage areas 0 to 7 each represented by 1-byte data.

  In each of the display combination storing areas 0 to 7, when "1" is stored in the predetermined bit, it indicates that various symbol combinations of the internal winning combination corresponding to the predetermined bit are displayed on the effective line. .

[Hold over part storage area]
Next, with reference to FIG. 26, the configuration of the carryover combination storage area will be described. In the present embodiment, the carryover combination storage area is configured of a 1-byte data storage area.

  As a result of the internal lottery, when "2 MB" or "3 MB" is determined as the internal winning combination, the internal winning combination is stored as a carryover combination in the carryover combination storage area. The carryover combination stored in the carryover combination storage area is held without being cleared until the corresponding symbol combination is displayed on the effective line. Further, while the carryover combination is stored in the carryover combination storage area, the carryover combination is stored in the internal combination combination storage area in addition to the internal winning combination determined by the internal lottery.

[Playing state flag storage area]
Next, the configuration of the gaming state flag storage area will be described with reference to FIG. The gaming state flag storage area is configured of a 1-byte data storage area. In the present embodiment, as shown in FIG. 27, a unique bonus type or RT type is assigned to each bit of the gaming state flag storage area.

  When “1” is stored in a predetermined bit in the gaming state flag storage area, it indicates that the bonus game or RT corresponding to the predetermined bit is being performed. For example, when "1" is stored in bit 0 of the gaming state flag storage area, the middle bonus "2 MB" is being operated, indicating that the gaming state is the 2 MB gaming state.

[Operation stop button storage area]
Next, the configuration of the operation stop button storage area will be described with reference to FIG. The operation stop button storage area is formed of a 1-byte data storage area, and stores an operation stop button flag consisting of 1 byte. In the operation stop button flag, the operation state of the stop button is assigned to each bit.

  For example, when the left stop button 19L is the stop button pressed this time, that is, the operation stop button, “1” is stored in bit 0 of the operation stop button storage area. Further, for example, in the case where the left stop button 19L is not yet pressed, that is, a valid stop button, “1” is stored in the bit 4. The main CPU 93 identifies the stop button pressed this time and the stop button not yet pressed based on the data stored in the operation stop button storage area.

[Pressing order storage area]
Next, the configuration of the pressing order storage area will be described with reference to FIG. The pressing order storage area is formed of a 1-byte data storage area, and stores a pressing order flag consisting of 1 byte.

  In the pressing order flag, the type of pressing order of the stop button is assigned to each bit. For example, when the pressing order of the stop button is “left middle right”, “1” is stored in bit 0 of the pressing order storage area.

[Symbol code storage area]
Next, the configuration of the symbol code storage area will be described with reference to FIG. In the present embodiment, the symbol code storage area is configured by symbol code storage areas 0 to 14 each represented by 1-byte data.

  In the symbol code storage area, "1" is stored in the bit corresponding to the display combination (symbol combination) that can be stopped on the effective line. In addition, after all the reels stop, the symbol code corresponding to the display combination is stored in the symbol code storage areas 0-14.

<Various sub game states>
Next, various sub gaming states related to effects controlled by the sub control circuit 101 (sub CPU 102) in the 2 MB flag state (RT1 gaming state) in the pachislot 1 of the present embodiment will be described.

  In this embodiment, as the sub gaming state in the 2 MB flag state, states mainly referred to as "non-AT state", "AT ready state", "AT state" and "simulated BB (big bonus) state" are provided. Be The game in the "simulated BB state" is performed as an interrupt process when a simulated BB lottery performed in the "non-AT state", "AT ready state" and "AT state" is won.

  Further, in the present embodiment, although a detailed description is omitted, a state called “W chance state” capable of transitioning from “AT state”, “AT state” or There is also provided a state called "superimposed challenge state" which can be shifted from the pseudo BB state. Hereinafter, the contents of each sub game state will be specifically described.

  In the Pachislot 1 of the present embodiment, as described below, in various sub gaming states during the 2 MB flag state, a predetermined benefit (period shortening of the non-AT state or addition of the number of AT games is made at the time of winning "losing"). ) Is provided. Then, the privilege giving function is controlled by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a means (benefit provision determining means) that determines whether or not to grant a predetermined benefit at the time of winning the "losing".

[Non-AT state]
The non-AT state is composed of the "normal state" and the "transition effect state" to the AT state. And in the non-AT state, basically, the games in the normal state and the transition effect state are periodically repeated in a predetermined unit game number (190 games in the present embodiment).

  Specifically, in the non-AT one cycle game, first, a normal state game (hereinafter referred to as a “normal game”) in which the number of games in one set is 180 (the first unit game number) is a line It will be. Next, after the normal game is digested, a game of transition effect state (hereinafter referred to as “transition effect game”) is performed over a period of 10 games.

  Then, at the start of the transition effect game, AT lottery is performed, and if the lottery result is AT winning, an effect corresponding to AT winning is performed during the transition effect game period, and then the sub gaming state is AT ready state Migrate to On the other hand, if the result of the AT lottery is AT non winning, in the transition effect game period, the effect corresponding to AT non winning is performed, and then, the next set of normal games (game of non-AT state of next cycle) It is started.

  As described above, when the result of the AT lottery in the transition effect game is not winning, the normal game and the transition effect game are periodically repeated for a predetermined number of games (190 games). And, in this periodic game-storing process, basically, after the normal game-storing (after 180 game-storing), there is always a chance of transition to the AT state. That is, in the non-AT state, a transition opportunity to the AT state is periodically given. Hereinafter, the contents of the normal game and the transition effect game will be described in more detail.

(1) Normal game In the normal game, lottery of winning / not winning games (hereinafter referred to as “simulated BB games”) of simulated BB state games (hereinafter referred to as “simulated BB games”) based on each game (every unit game) and internal winning combination. A pseudo BB lottery is performed.

  Then, in the normal game, when the simulated BB lottery is won, the simulated BB game is started as an interruption process. Note that during the simulated BB game period, the number of normal game games is not counted (subtracted). Then, when the simulated BB game is digested, the sub game state returns to the normal state. At this time, the normal game is resumed from the state before the start of the simulated BB game.

  In addition, in the normal game, a "loss" or a specific internal winning combination (in the present embodiment, "normal ripple", "weak che", "strong che" or "ra") is internally won once. When the game is continuously won, a subtraction lottery of the number of remaining normal games in the current set, that is, a shortening lottery of the non-AT state game period of the current cycle (hereinafter referred to as "period shortening lottery") is performed. Therefore, if winning the cycle shortening lottery in the normal game, in the non-AT state gaming period of the current cycle, the period until the transition effect game is started becomes short. That is, there is a possibility that the period until the start of the AT state game becomes shorter.

  In the present embodiment, in the case of winning a cycle shortening lottery in a normal game in a period in which the number of remaining normal games in the current set is a predetermined number of games (predetermined number of unit games: 10 games in this embodiment). , The reduced game number (subtracted number) won from the number of remaining games in the current set of normal games is subtracted. At this time, if the subtraction result is less than the predetermined number of games (10 games) (the subtraction result may be a negative value in some cases), the absolute value of the number of games resulting from the subtraction is the surplus reduced game in the current set It is stocked as a number (surplus unit game number). On the other hand, in the case of winning the cycle shortening lottery in the normal game in a period in which the number of remaining normal games in the current set is less than the predetermined number of games (10 games), the number of shortened games for the surplus is Stocked as

  For example, if the predetermined number of games is 10, the number of remaining normal games in the current set is 30 and the number of shortened games won is 50, the subtraction result is -20 Therefore, the number of games stocked as the number of surplus reduced games is 20 games. At this time, the standard of the number of reduced games stocked as the surplus is the predetermined number of games (10 games), and the difference between the predetermined number of games (10) and the value of the subtraction result (-20) The number of played games (30 games) may be set as the surplus shortened game count. Also, for example, when the predetermined number of games is 10, the number of remaining normal games in the current set is 5 and the number of shortened games won is 50, the number of surplus reduced games is The number of games stocked is 50 games.

  And, the surplus reduced number of stored games is applied at the start of the non-AT state game of the next cycle, that is, at the start of the next set of normal games, at which point the normal state (non-AT state) game period Is shortened. In this case, in the non-AT state game period of the next cycle, the period until the transition effect game is started becomes short. That is, when the number of surplus reduced games is generated as a result of the cycle shortening lottery, there is a possibility that the period until the start of AT state gaming may be shortened even in the next cycle. Further, for example, depending on the number of reduced games (the number of reduced games stocked) obtained by the cycle shortening lottery, there is a possibility that the transition effect game is started from the beginning in the non-AT game period of the next cycle.

(2) Transition effect state In the transition effect game, the number of effects (notices) showing a result (winning / not winning) of the AT lottery performed at the start of the gaming period is the number of specific games (third unit game number: book In the embodiment, 10 games are performed. In the Pachislot 1 of the present embodiment, in the transition effect game, an effect (race effect) in which a plurality of ally characters and an enemy character race, is performed as an effect indicating the result of the AT lottery. Note that this race effect is mainly performed by displaying a race video on the liquid crystal display device 11. Here, the contents of the race effect (transition effect to the AT state) performed in the transition effect game will be described more specifically.

  Specifically, first, at the start of the race effect (transition effect game), a lottery (race result lottery) as to whether or not a predetermined ally character set in advance as a race victory object (candidate) wins in the race Do. Then, in this race result lottery, when winning a race victory of a predetermined ally character, AT wins, and when a race victory of a predetermined ally character wins, AT does not win.

  In addition, at the start of a race effect (transition effect game), a plurality of ally characters including a predetermined ally character set as the race victory target (candidate) and an enemy character as a member of the race, the liquid crystal display device Displayed at 11. Then, in the game period of the subsequent race effect, when the AT is won, a video effect in which a predetermined ally character wins the race is performed by the liquid crystal display device 11, and when the AT is not won, the video effect in which the enemy character wins the race is It is performed by the liquid crystal display device 11.

  Therefore, if a predetermined teammate character wins as a result of the race effect performed in the transition effect game, the sub gaming state shifts from the transition effect state to the AT preparation state, and if the enemy character wins, the next set ( The normal game (non-AT state game) of the next cycle is started. In the present embodiment, the number of basic stay games in the AT state to be played later changes in accordance with the type of the ally character that has won the race, but this point will be described in detail later.

  Further, in the present embodiment, six types of “friend A”, “male B”, “woman A”, “Kappa”, “tengu” and “male A and male B” are provided as ally characters. In addition, the type of the ally character who becomes the race victory target (candidate) person in the transition effect game race effect, and the information about the contents of the race effect regarding the race winning rate of the ally character are the races in the non-AT state game of the current cycle. The non-AT state of the current cycle in the case where the information regarding the content of the effect is not set (the state where the race runner MAP described later is not set (initial state) or the race information MAP data described later is “0”) The game is determined by lottery at the start of the game (at the start of the game period of the normal game). At this time, in the present embodiment, not only the information on the content of the race effect of the current set (the first race) but also the information on the content of the race effect up to 4 sets ahead (the fifth game) is determined.

  Further, in the transition effect game, the pseudo BB lottery is performed based on each game and the internal winning combination. Then, in the transition effect game, when the simulated BB lottery is won, the simulated BB game is started as an interrupt process, and when the simulated BB game is digested, the sub-gaming state shifts to the AT preparation state.

  Furthermore, in the present embodiment, when a specific condition is satisfied in the transition play state game period (during the race effect period) (when the pseudo BB state is “between BB flags” or “wait for BB operation”: described later 124), the number of AT games is additionally lottery, and when the number of lottery is won, a predetermined number of additional AT games is acquired.

  The operation control of the normal game and the transition effect game described above is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as means (a normal game control means and a transition effect game control means) for controlling the operations of the normal game and the transition effect game.

[AT ready state]
In the pachislot 1 of the present embodiment, when the sub gaming state shifts from the transition effect state to the AT state, the sub gaming state shifts to the AT state via the AT preparation state. In the AT preparation state, a game (hereinafter, referred to as "AT start game number determination game") for determining the basic stay game number of the AT state (hereinafter, referred to as "AT start game number") is performed. Also in the AT start game number determination game (informing game number determination game), the pseudo BB lottery is performed based on each game and the internal winning combination.

  In the present embodiment, the number of AT start games (the number of basic unit games) is the type of the ally character who won the race effect of the transition effect game (“male A”, “male B”, “woman A”, “Kappa”, It changes according to "tengu" or "male A, male B"). Specifically, it is as follows.

(1) At the time of "man A" victory When "man A" wins by the race effect, an AT start game is started based on the internal winning combination triggered by the lever operation performed in the start game of the AT start game number determination game. A number of lotteries are performed, and a predetermined number of AT start games (50 games to 300 games) is determined.

  Further, in the present embodiment, there may be a case where the number of AT start games is not determined in the start game of the AT start game number determination game at the time of winning "man A". In this case, the AT start game number determination game is continued. At the time of lever operation of the next game, lottery of the number of AT start games is performed again. At this time, the number of continuations of the AT start game number determination game (one or two times in this embodiment) changes according to the internal winning combination determined in the start game of the AT start game number determination game. Then, in the AT start game number determination game when "man A" is won, a lottery table (not shown) of the AT start game number is appropriately set so that the number of AT start games acquired increases as the number of continuations increases. ing.

(2) At the time of "male B" victory When "male B" wins by the race effect, the lottery of AT start game number will be triggered by the lever operation performed in the start game of AT start game number determination game. The predetermined number of AT start games (50 games to 300 games) is determined. Determination of the number of AT start games at the time of the "male B" victory game, the number of AT start games is determined in one game. The determination of the number of AT start games at the time of “male B” victory The lottery value of the number of AT start games used in the lottery is the same regardless of the internal winning combination.

(3) At the time of "woman A" victory When "woman A" wins the race effect, the number of AT start games is determined by the continuous hitting operation of the MAX bet button 21. In the AT start game number determination game at the time of "woman A" victory in the present embodiment, a determination form (determination mode) of two types of AT start game numbers is prepared.

  Specifically, a first mode in which the number of AT start games is increased by 50 in one MAX bet operation, and a second mode in which the number of AT start games is increased by 5 in one MAX bet operation Is prepared. In both modes, continuous addition of the AT start game number is performed for each MAX bet operation. In the first mode, the continuation probability is 50%, and in the second mode, the continuation probability is 95%. Become. The determination mode (determination mode) of the AT start game number is selected by the player at the start of the AT start game number determination game (AT ready state game).

  In the AT start game number determination game when "woman A" is won, the AT start game is performed at the end of the next game (after all reels are stopped) after the liquid crystal display device 11 reports that the "woman A" wins. Information indicating that the selection operation of the determination mode (determination mode) of the number is performed is displayed on the liquid crystal display device 11. Next, one of the first mode and the second mode is selected as the determination mode of the number of AT start games by the operation of the player's selection button 25. Next, when the lever operation of the game following the game in which the selection operation of the determination mode of the number of AT start games is performed is performed, the determination mode of the number of AT start games selected by the player (first mode or second Mode) is decided (decided). Then, in the game in which the determination operation of the determination mode of the number of AT start games is performed, after the reels are all stopped, the AT start game number addition processing is performed by the continuous hitting operation of the MAX bet button 21. That is, the AT start game number determination game at the time of "woman A" victory is played over two games after the liquid crystal display device 11 reports that the woman "A" wins.

  Then, in the AT start game number determination game at the time of "woman A" victory, until the result of the continuous lottery of the addition process of the AT start game number performed for each MAX bet operation is not won, predetermined for each MAX bet operation The number of AT games (50 games or 5 games) is added to the number of AT start games. Note that the AT start game number is added only at the time of the MAX bet operation when the continuous lottery of the AT start game number addition processing is won. Therefore, for example, in the AT start game number determination game at the time of "woman A" victory, the first mode is selected, and in the sixth MAX bet operation, the result of continuous lottery of addition processing of AT start game number If there is no win, the number of AT start games is 250.

  If the result of continuous lottery of the addition processing of AT start game number is not won in the first MAX bet operation when the first mode is selected, the AT start game number is 50 games. Is set. That is, when the first mode is selected, the number of AT start games of 50 games is guaranteed. Further, when the second mode is selected, the number of added games per MAX bet operation is small, so MAX bet operations of a predetermined number of times (for example, 10 games) are guaranteed.

  As described above, in the present embodiment, the number of AT start games is determined by the continuous hitting operation (continuous hit / lottery) of the MAX bet button 21 in the AT start game number determining game when "woman A" is won. However, due to the player's erroneous operation or the like, for example, the pressing operation of the MAX bet button 21 is not executed at all, or the player presses the MAX bet button 21 during the consecutive hit / lottery (before continuous lottery is not won). There may be a situation where the operation is stopped. In this case, an undetermined state of the number of AT start games occurs.

  Therefore, in the present embodiment, when the above situation occurs, an internal processing is performed at the start lever operation of the next game (AT game start game) of the AT start game number determination game, and the AT start game number additional loop lottery Automatically to determine the number of AT start games at the time of "woman A" victory.

  By providing a recovery function of such an AT-started game number-added lottery process, the AT game can be performed before the completion of the AT-started game numbered consecutive hit lottery using the MAX bet button 21 due to, for example, a player's erroneous operation or the like. Even if it is started, the benefit of AT game which should be obtained at the time of "woman A" victory is guaranteed. As a result, it is possible to prevent the player from feeling uncomfortable and to give the desire to continue the game.

(4) At the time of "tengu" victory When "tengu" is won by the race effect, the lever operation performed in the start game of the AT start game number determination game is taken as an opportunity, as at the time of the "male B" victory. A lottery of the number of AT start games is performed, and a predetermined number of AT start games is determined. Also in this case, the number of AT start games is determined in one game.

  However, in the AT start game number determination game when the "tengu" is won, the AT start game number of 100 games or more is determined unlike "man B" victory time (the number of AT start games of 50 games or more is determined).

(5) At the time of "Kappa" victory When "Kappa" wins the race production, the video production (hereinafter referred to as "Kappa sushi production") where "Kappa" eats sushi in the AT start game number determination game is The liquid crystal display device 11 displays a plurality of games. Then, in this Kappa sushi effect, the number of AT start games is added each time "Kappa" eats sushi, and the number of added games (the number of added unit games) is the sushi news item (game information) that "Kappa" eats. Change accordingly.

  In this embodiment, the types of sushi nets eaten by "Kappa" are "Squid", "Tamago", "Kappa Roll", "Salmon", "Shrimp", "Tuna", "Uni" and "Ise Shrimp" Eight types of are available. The higher the sushi material is, the larger the number of added games is set.

  Here, the content of the AT start game number determination game (Kappa sushi effect) at the time of “Kappa” victory will be described more specifically. First, when the AT start game number determination game is started, the appearance pattern of sushi neta from the first game to the 10th game (the first dish to the tenth dish) is determined by lottery and the first dish determined Images of sushi material (hereinafter referred to as "sushi material symbols") up to the 10th plate are sequentially displayed on the liquid crystal display device 11.

  After that, the effect of eating or not eating sushi of sushi material in which “Kappa” is sequentially presented is displayed on the liquid crystal display device 11 for each game, and when the “Kappa” has an execution of eating sushi material is executed, The number of added games is obtained. For example, as shown in the Kappa game number acquisition lottery table in FIG. 54 described later, when “Kappa” eats sushi material “Squid”, 10 or 300 games are added according to the lottery result, the number of added games of AT start game number It is acquired as In addition, for example, when “Kappa” eats a sushi material “Ise shrimp”, 100, 150, 200 or 300 games are acquired as the number of added games according to the lottery result. Then, the total number of added games corresponding to all sushi items eaten by the “Kappa” by the time the AT start game number determination game is ended is set as the AT start game number.

  Whether or not to eat the sushi material in which "Kappa" is put out in the Kappa-zushi effect is determined based on the type of the internal winning combination. Specifically, when the internal winning combination is "group 1 role" (for example, "213 bell 1" to "213 bell 8", etc.) described later, "kendo" eats sushi neta, and other than this In the case of the internal winning combination, "Kappa" does not eat sushi material. That is, during the AT start game number determination game at the time of the “Kappa” victory, the AT start game number is added for each game in which the internal winning combination is the “group 1 role” described later.

  Further, in the present embodiment, the sushi material symbol displayed on the liquid crystal display device 11 is reduced each time the “Kappa” eats sushi material in the Kappa-zushi effect. However, if the sushi neta symbol to be played out 5 games ahead (six dishes) is not displayed on the liquid crystal display device 11, that is, if the sushi nets after the sixth game (six dishes) are not determined. At this point, sushi material after the sixth game (six dishes) is determined by lottery.

  In addition, the termination trigger of AT start game number decision game at the time of “Kappa” victory is managed by “Kappa end counter”, and the value (end parameter) of Kappa end counter becomes less than “0” (predetermined condition) In this case, the AT start game number determination game at the time of the "Kappa" victory is ended. In the present embodiment, the initial value of the Kappa end counter is set to “5”.

  The value of the Kappa end counter is reduced by “1” when “Kappa” eats a specific sushi material (a sushi material with wasabi), specifically “Squid”, “Salmon” or “Tuna”. Be done. That is, in the current game, the data of one of "Squid", "Salmon" and "Tuna" sushi material is set as the sushi material of "Kappa", and the internal winning combination is "Group" described later. In the case of “one role,” the number of added games corresponding to the sushi material is acquired, but the value of the Kappa end counter is decremented by “1”.

  Further, in the present embodiment, when “Kappa” eats a predetermined sushi material, specifically, “Kappamaki”, the value of the Kappa end counter is incremented by “1”. However, in this case, the number of added games is not acquired. That is, in the current game, when the data of the sushi material of "Kappamaki" is set as the sushi material of "Kappa" and the internal winning combination is "group 1 combination" described later, the addition is performed. Although the number of games can not be obtained, the value of the Kappa end counter is incremented by “1”, and the period for determining the number of AT start games is extended.

  In the present embodiment, when the value of the Kappa end counter becomes less than “0” in the AT start game number determination game at the time of “Kappa” victory, the player continuously hits the MAX bet button 21 by Kappa "The number of AT start games at the time of victory" Rebirth lottery of the game is performed. Specifically, a revival lottery is performed by continuously pressing the MAX bet button 21 twenty times. At this time, since the revival lottery is performed each time the MAX bet button 21 is pressed, 20 revival lotterys are performed. Then, when winning a revival lottery due to continuous pressing of the MAX bet button 21, the game for determining the number of AT start games upon winning "Kappa" is started again, and the number of AT start games can be further increased.

  Further, in the present embodiment, in the AT start game number determination game at the time of “Kappa” victory, the internal winning combination is a specific combination other than “group 1 role” described later (“loss”, “reach eye lip”, “weakness” If the game is “Che”, “Che”, “Watermelon”, “Chance A”, “Chance B” or “Determiner”, five games (the second and sixth dishes) from the next game A lottery (data conversion generation lottery) as to whether or not to perform data conversion of sushi material is performed (see FIG. 55 described later). Then, when winning the data conversion generation lottery of this sushi material, in this embodiment, the number of added games associated with the sushi material after conversion (the second added game number information) is the sushi material before conversion (the The data of the sushi neta is converted so as to have a value greater than or equal to the number of added games associated with the first added game number information (see FIGS. 56 to 60 described later).

  In addition, when data conversion of a plurality (5 games worth) of sushi nets after the next game is performed, a plurality of sushi neta symbols (the first number of added game number information) of the next games displayed on the liquid crystal display device 11 Images) can be rewritten together at the same time. The rewriting display operation of this sushi material symbol is call sign data (rewriting instruction for sushi material symbol) associated (linked) with a predetermined image frame (time frame) in the effect sequence data (moving image data) of the Kappa sushi effect. Done based on the requirements). Specifically, if call conversion data including a request to rewrite sushi neta symbols is detected while winning a sushi neta data conversion occurrence lottery, and a reproduction command sequence for Kappa sushi effect is being reproduced, Rewriting display data (image of the second additional game number information) of a plurality of sushi news items symbols is acquired at timing, and a plurality of sushi news symbols from the next game onwards are displayed.

  When such a sushi neta symbol rewrite display method is used, the timing of the sushi neta symbol rewrite display operation is directly registered in the effect sequence data. Therefore, in this case, special processing for synchronizing / adjusting the rewrite display operation on the program is not necessary, so that the rewrite display operation can be executed by simpler processing and design change is easy. In addition, it is possible to construct a program that is less likely to cause problems.

(6) At the time of "man A · man B" victory In the AT start game number decision game when "man A · man B" wins in the race production, first, the addition game number of AT start game number is the first game 10 games are won. Then, after that, the number of addition games that can be acquired for each game (every continuation) increases by “10” until the 10th game. That is, in the first game, the second game, the third game,..., The ninth game, and the tenth game, the obtainable number of added games is 10, 20, 30,. Furthermore, the number of added games that can be acquired after the 11th game is 100 games per game.

  Therefore, for example, when the game is continued until the tenth game in the AT start game number determination game at the time of "man A · man B" victory, 550 games are acquired as the number of AT start games. Furthermore, when the game is continued after the 11th game, the number of AT start games increases by 100 for each game (the number of AT start games is 650, 750,...).

  In addition, the continuation probability of each game of AT start game number determination game at the time of "male A, male B" victory is 80%, and "Man A, male B" victory when this continuous lottery is not won. At AT start game number determination game The game ends.

  Further, in the AT number start game determination game at the time of “male A and male B” victory of the present embodiment, the continuation determination up to the second game is guaranteed. However, when the continuous lottery is not won in the second game, the number of AT start games is 30, but in this case, the number of AT start games is set to 50. That is, in the determination of the number of AT start games at the time of “male A, male B” victory, at least the acquisition of the number of AT start games of 50 games is guaranteed.

  As described above, in the present embodiment, the number of AT start games that can be acquired when "tengu", "Kappa" or "Male A · Male B" wins in the race production of the transition production game is "Male A". , "Man B" or "Woman A" is set to be more than that when winning. Therefore, if the starting member displayed on the liquid crystal display device 11 at the start of the race effect of the transition effect game includes "tengu", "Kappa" or "male A, male B", more AT starts The player can be expected to win the number of games.

  The operation control of the various AT start game number determination games described above is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a means (notification number determination game control means) for controlling the operation of the AT start game number determination game.

[AT status]
When the AT start game number is determined in the AT preparation state game (AT start game number determination game) and the AT preparation state game ends, the specific game number (second unit game number: AT start game number + additional AT game The AT state game (hereinafter referred to as "AT game") in which the pushing order of the small winning combination is notified to the number) is started.

  In the AT game (notification game), the simulated BB lottery is performed based on each game and the internal winning combination, and when the simulated BB lottery is won, the simulated BB game is started as an interruption process, and the simulated BB game is digested. Then, the sub game state returns to the AT state. At this time, the number of AT game games (number of AT games) is not counted (subtracted) during the pseudo BB game interruption period.

  In addition, in the AT game, additional lottery of the number of AT games is performed based on each game, the type of the internal winning combination, and the winning history of the internal winning combination. Specifically, in the present embodiment, in the AT game, when "losing", "reach eye lip" or "rare role" wins once internally, or "losing" or "normal lip" wins continuously. In the case where the number of AT games is increased, a lottery is performed. Then, when winning the additional lottery of the number of AT games, the number of additional AT games (0 to 300 games) corresponding to the winning result is added to the number of AT games currently remaining (the number of remaining AT games).

  In addition, in the AT game, predetermined symbol combinations (in the present embodiment, "black BAR"-"black BAR"-"black BAR" or "black cherry"-"black BAR"-"black BAR") are on the effective line When the stop display is displayed, the sub gaming state shifts to the "W chance state". And, after the game of “W chance state” is digested, the AT game is resumed. Note that the number of AT games is not counted (subtracted) during the “W chance state” gaming period.

  In the "W chance state", a game is performed in which an increase in medal payout can be expected. In the "W chance state" game, the termination condition is not the number of digested games, but is played when a specific small combination ("CT bell" capable of paying out 10 medals in this embodiment) is internally won. It is defined by the number of push order navigations of the stop button (hereinafter referred to as "the number of bell navigations"). That is, in the game of "W chance state", the termination condition is managed by the number of bell navigation times, and when the number of bell navigation times reaches a predetermined number of times, the game of "W chance state" is ended. In the present embodiment, the number of bell navigations in the “W chance state” game is set to five.

  Furthermore, in the AT game, when a specific symbol combination is stopped and displayed on a predetermined line (in the present embodiment, on the center line (effective line) or on the cross-up, "yellow BAR"-"yellow BAR"- When "Yellow BAR" is complete, the sub gaming state shifts to the "superimposed challenge state". Then, after the game in the "superimposed challenge state" is digested, the AT game is resumed.

  In addition, in the game in the "superimposed challenge state", the simulated BB game is won with high probability and stocked over a predetermined number of games. In addition, the number of AT games is not counted (subtracted) during the play period of the “superimposed challenge state”.

  In addition, when the AT game is over, the sub game state always shifts to the transition effect state, and the transition effect game (race effect) described above is performed. In this case, at the start of the AT state game before transition, information about the type of the ally character who becomes the race victory object (candidate) in the transition effect game race effect and the content of the race effect regarding the race win rate of the ally character Determined by lottery.

  The operation control of the AT game described above is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a means (notification game control means) for controlling the AT game operation.

[Pseudo BB state]
In a simulated BB game (special game), it is matched with a replay player who wins a specific replay role (any one of “normal lip 1” to “normal lip 8”) and the pressing order of the stop button wins. When it is the predetermined pushing order (when the pushing order is correct), a game is performed which can be expected to increase the medal payout called "JACGAME" (specific game).

  In the game of “JACGAME”, the termination condition is not the number of digested games, but a stop button which is performed when a specific small combination (“CT bell” capable of paying out 10 medals in this embodiment) is internally won. It is specified by the number of push order navigation (number of bell navigation). That is, in the game of "JACGAME", the termination condition is managed by the number of bell navigation times, and when the number of bell navigation times reaches a specific number of times, the game of "JACGAME" is ended. In the present embodiment, the specified number of times of bell navigation in “JACGAME” is set to five.

  In addition, the game period in the pseudo BB state is divided into a period called “JACGAME guarantee period” and a period called “JACIN challenge period” performed thereafter.

  In the "JACGAME guarantee section", a game period (a period is indefinite) in which a game always continues until a predetermined number of times (two times in the present embodiment) of "JACGAME" is digested. Then, in the “JACGAME guaranteed section”, when a specific replay role (any one of “normal lip 1” to “ordinary lip 8”) is won, the stop button associated with the winning replay role. The push order is informed (navigated), and the execution of "JACGAME" is guaranteed.

  In addition, the game mode of the "JACGAME guarantee section" is the same regardless of the transition path to the pseudo BB state of the sub gaming state. That is, even when the sub gaming state is shifted from the non-AT state to the pseudo BB state, and even when the sub gaming state is shifted from the AT state to the pseudo BB state, the game mode of the "JACGAME guarantee section" is the same. On the other hand, the game mode of the "JACIN challenge section" differs depending on the transition path to the simulated BB state of the sub gaming state.

  In the game of the "JACIN challenge section" when the sub gaming state is shifted from the non-AT state to the pseudo BB state, a specific replay role (specific game number: 10 games in this embodiment) is played in the game of "JACIN challenge section" In the game in which “Normal Lip 1” to “Normal Lip 8” is won, a 2-option challenge presentation with a push order of the stop button is performed. Then, when the correct answer to the 2-option challenge effect is obtained, “JACGAME” is executed as an interrupt process (interrupt game).

  On the other hand, in the game of the "JACIN challenge section" when the sub gaming state is shifted from the AT state to the pseudo BB state, a specific replay role ("normal ripple") during a specific number of games (10 games in this embodiment) In the game in which any of 1) to “normally RIP 8” is won, the pressing order of the stop button associated with the winning replay role is always notified (navigated). That is, when the sub gaming state shifts from the AT state to the pseudo BB state, "JACGAME" is always executed as an interrupt process if a specific replay role is won in the "JACIN challenge section". Therefore, in this case, more medals can be obtained as compared with the case where the sub gaming state shifts from the non-AT state to the pseudo BB state.

  Also, in the simulated BB game when the sub gaming state is shifted from the non-AT state to the pseudo BB state, the period of the non-AT state gaming period based on the type of internal winning combination and the internal winning combination winning history A shortened lottery will be made. Specifically, in the case of a simulated BB game when the sub gaming state is shifted from the non-AT state to the pseudo BB state, when "losing", "reach eye lip" or "ra" is won once, or If "losing" or "normal ripple" is continuously won, a cycle shortening lottery is performed. Then, if the cycle shortening lottery is won, a predetermined number of shortened games (0 to 170 games) corresponding to the winning result is subtracted from the number of remaining normal games in the current set. That is, even in the pseudo BB state, there is a possibility that a benefit of shortening the non-AT state gaming period of the current cycle may be obtained.

  Furthermore, in the simulated BB game, when the cycle shortening lottery is won and the result of subtracting the number of reduced games from the current number of remaining games in the normal game is less than “0”, the number of absolute value games is the result of the subtraction, It is stocked as the number of surplus shortening games in the current set. Then, the stored surplus shortening game number is applied at the start of the next set of normal games, at which point the non-AT state (normal state) game period is shortened.

  On the other hand, in the pseudo BB game when the sub gaming state is shifted from the AT state to the pseudo BB state, the additional lottery of the AT game number is performed based on the type of internal winning combination and the winning history of the internal winning combination. . Specifically, in the simulated BB game when the sub gaming state is shifted from the AT state to the pseudo BB state, if "losing", "reach eye lip" or "rea role" wins once internally, or In the case where a "losing" or "ordinary lip" is won continuously, the number of AT games is additionally lottery. Then, if winning the additional lottery, the predetermined additional AT game number (0 to 300 games) corresponding to the winning result is added to the current remaining AT game number. That is, even in the pseudo BB state, there is a possibility that the benefit of addition of the number of AT games can be obtained.

  The operation control of the above-described simulated BB game and “JACGAME” is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as means (a special game control means and a specific game control means) for controlling the operations of the simulated BB game and the "JACGAME".

<Structure of data table stored in ROM cartridge substrate>
Next, the configuration of various data tables stored in the ROM cartridge substrate 86 will be described. The correspondence between the abbreviation of internal winning combination used in various processes controlled by the sub CPU 102 and various tables described below and the name and abbreviation of the above internal winning combination managed by the main CPU 93 is shown in FIG. As shown in the correspondence table of

[Race runner MAP lottery table]
First, the race runner MAP lottery table will be described with reference to FIG. FIG. 32 shows a structure of a race runner MAP lottery table. The race runner MAP lottery table is, for example, a race runner MAP in a race information lottery process (see FIG. 94 described later) to be performed at the start of one non-AT state game start (normal game start). It is referred to in the lottery process (S391) and the like.

  The race runner MAP lottery table defines the correspondence between the MAP numbers ("1" to "39") of the race runner MAP and their lottery values. In addition, the race winner MAP (race information MAP), as will be described later, the race victory target race effect (from the first race to the fifth race) from the current cycle of the non-AT game to the fifth cycle (from the first race to the fifth race) Data ("1" to "10") for determining a candidate is defined.

  In the race runner MAP lottery processing using the race runner MAP lottery table, first, the effect random number extracted from the range of predetermined numerical values (0 to 32767 in this embodiment, random number denominator = 32768) is used. The race runner MAP is sequentially subtracted by the lottery value corresponding to each race runner MAP number specified in the lottery table. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). And, when the subtraction result becomes negative ("a digit" occurred), the MAP number of the race runner MAP at that time is won. For example, in the race runner MAP lottery processing, the probability of winning the MAP number “1” is 1974/32768.

[Race information MAP data table]
Next, with reference to FIG. 33, the race information MAP data table will be described. FIG. 33 shows a structure of a race information MAP data table. The race information MAP data table is referred to, for example, in the data acquisition process (S393) of the "target table" in the later-described race information lottery process (see FIG. 94 described later).

  In the race information MAP data table, from the current cycle to the 5th cycle, for each MAP number of the race runner MAP (race information MAP) determined by the race runner MAP lottery processing using the race runner MAP lottery table Data (“1” to “10”: hereinafter, referred to as race information MAP data) for determining race winners (from the first race to the fifth race) is defined. The race information MAP data is data corresponding to the type of “target table” defined in a winning target person lottery table (see FIG. 34 described later). Specifically, race information MAP data “1” to “10” respectively correspond to “target table A” to “target table J” defined in a winning target person lottery table described later.

  In the data acquisition process of the “target table” using the race information MAP data table, for example, when the MAP number of the race runner MAP (race information MAP) is “7”, the first to fifth races are performed. As race information MAP data, “2” (target table B), “1” (target table A), “2” (target table B), “1” (target table A), “8” (target table H) ) Is acquired.

[Victor target lottery table]
Next, the winning candidate lottery table will be described with reference to FIG. FIG. 34 is a diagram showing the configuration of a winning candidate lottery table. The winning candidate lottery table is referred to, for example, in the winning candidate lottery process (S395) or the like in the later-described race information lottery process (see FIG. 94 described later).

  The winning target person lottery table is a race winning target person (“male A”, “male B”, “female A”, “Kappa”, “tengu”) of the race effect performed in the transition effect game for each type of the target table And "male A, male B") and their lottery values. In the present embodiment, since the race effect of the transition effect game is performed even after the AT game is over, as shown in FIG. 34, the victory target person lottery table is an object table determined by the race information MAP data table. In addition to A to J, a dedicated table "after AT" is also defined.

  In the victory target person lottery process using the victory target person lottery table, at first, the effect random number value extracted from the range of predetermined numerical values (0 to 32767 in this embodiment, random number denominator = 32768) is won The subject is sequentially subtracted by the lottery value corresponding to the race winners specified in the race table. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). And, if the subtraction result becomes negative (a "marginal" has occurred), the race victory target person at that time is won.

  For example, when the target table A is referred to in the winning target lottery process (when the race information MAP data is “1”), the probability that “Kappa” becomes the race winning target is 328/32768. Become. However, for example, when the target table G is referred to in the winning target lottery process (when the race information MAP data is “7”), the probability that “Kappa” becomes the race winning target is 0/0. It becomes 32768 and "Kappa" will not win in the race.

[Race win rate MAP lottery table]
Next, with reference to FIG. 35, the race winning percentage MAP lottery table will be described. FIG. 35 is a diagram showing a configuration of a race winning percentage MAP lottery table. The race win rate MAP lottery table is referred to, for example, in a race win rate MAP lottery process (S397) or the like during a race information lottery process (see FIG. 94 described later).

  The race winning percentage MAP lottery table defines, for each set value (1 to 6), the correspondence between the race winning percentage MAP and the lottery value. In this embodiment, as the race win rate MAP, “race win rate 5%”, “race win rate 10%”, “race win rate 20%”, “race win rate 30%”, “race win rate 50%”, “race win rate 66% "," race win rate 80% "," race win rate 100% "," race win rate 2 race 50% "-" race win rate 5 race 50% "," race win rate 2 race 66% "-" race There will be 20 types of winning rate: 5th game 66% and “race 2nd game winning rate 80%” to “5th game winning rate 80%”.

  In the race win rate MAP lottery process using the race win rate MAP lottery table, first, the effect random number values extracted from the range of predetermined numerical values (0 to 32767 in this embodiment, random number denominator = 32768) are raced. The winning percentage MAP is sequentially subtracted by the lottery value corresponding to each race winning percentage MAP specified in the lottery table. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). And, when the subtraction result becomes negative ("a digit" occurs), the race win rate MAP at that time is won. For example, when the set value is “1”, the probability of winning the race winning percentage MAP of “the fifth race winning percentage 50%” is 4410/32768.

[Race winning percentage MAP data table]
Next, with reference to FIGS. 36 and 37, the race winning percentage MAP data table will be described. FIG. 36 is a diagram showing a configuration of a race win rate MAP data table. Further, FIG. 37 shows the race win rate data (“1” to “8”) defined in the race win rate MAP data table shown in FIG. 36, rewritten to specific win rate values (in percent). The race win rate MAP data table is referred to, for example, in a race win rate data acquisition process (S 399) during a race information lottery process (see FIG. 94 described later).

  In the race win rate MAP data table, predetermined race win rate data (“1” to “8”) are stored for each race win rate MAP determined by the race win rate MAP lottery process. Race win rate data “1”, “2”, “3”, “4”, “5”, “6”, “7” and “8” have a win rate of 5%, a win rate of 10% and a win rate of 20, respectively. %, Win rate 30%, win rate 50%, win rate 66%, win rate 80% and win rate 100%.

  Specifically, the race win rate MAP is "race win rate 5%", "race win rate 10%", "race win rate 20%", "race win rate 30%", "race win rate 50%", "race win rate 66% In the case of either "race win rate 80%" or "race win rate 100%", only the race win rate data of the race effect of the current cycle (the first race) is defined in the race win rate MAP data table. In addition, if the race win rate MAP is any of “race win rate 2 game 50%”, “race win rate 2 game 66%” and “race win rate 2 game 80%”, the first and second race wins 2 Race win rate data of a race (first cycle ahead) is defined in a race win rate MAP data table. In addition, if the race win rate MAP is any of “race 3 win 50%”, “race 3 win 66%” and “race win 80%”, the first race to 3rd The race win rate data up to the race (the race two cycles ahead) is defined in the race win rate MAP data table. In addition, if the race win rate MAP is any of “race 4 win 50%”, “race 4 win 66%” and “race 4 win 80%”, the first race to 4th The race win rate data up to the race (the race three cycles ahead) is defined in the race win rate MAP data table. Furthermore, if the race win rate MAP is any of “race 5 wins 50%”, “race 5 wins 66%” and “race 5 wins 80%” Race winning percentage data up to the race (four cycles ahead) is defined in the race winning percentage MAP data table.

  Then, in the process of acquiring the race win rate data using the race win rate MAP data table, for example, when the race win rate MAP is “50% of the fifth race win rate”, the race win rate data of the first race to the fifth race. "2" (10% win rate), "2" (10% win rate), "2" (10% win rate), "2" (10% win rate), and "5" (50% win rate) respectively Ru.

[Race result lottery table]
Next, a race result lottery table will be described with reference to FIG. FIG. 38 is a diagram showing a configuration of a race result lottery table. Note that the race result lottery table is referred to, for example, in a race result lottery process (S 745) or the like during a later-described during-race process start time process (see FIG. 124 described later).

  The race result lottery table defines the correspondence between the race result (winning win / not win) and the lottery value for each race winning rate.

  In the race result lottery process using the race result lottery table, the effect random number extracted from the range of predetermined numerical values (0 to 32767 in this embodiment, random number denominator = 32768 in this embodiment) is firstly raced. The lottery values corresponding to each race result (winning win / not win) defined in the table are sequentially subtracted. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). And if the result of subtraction becomes negative ("it's got a big deal"), the race result at that time will be won.

[After-AT race victory expectation data selection lottery table]
Next, with reference to FIG. 39, a post-AT race victory expectation data selection lottery table will be described. FIG. 39 is a diagram showing a configuration of a post-AT race victory expectation data selection lottery table. The post-AT race victory expectation data selection lottery table is referred to, for example, in the after-AT race victory expectation data selection lottery process (S 830) in the below-mentioned during-AT process start time processing (see FIG. 128 described later). Ru.

  The after-AT race victory expectation data selection lottery table defines the correspondence between the race victory rate and the lottery value. The post-AT race victory expectation data selection / lottery table is referred to in common regardless of the set values (1 to 6).

  In the after-AT race victory expectation data selection lottery table, in the after-AT race victory expectation data selection lottery process, first, a predetermined numerical range (0 to 32767 in this embodiment, random number denominator = 32768) The extracted effect random number values are sequentially subtracted by lottery values corresponding to the respective winning rates specified in the after-AT race victory expectation data selection lottery table. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). And, when the subtraction result becomes negative ("the extra" has occurred), the winning rate at that time is won. In the present embodiment, as shown in FIG. 39, the race win rate selected after AT is “5% win rate”, “10% win rate”, “30% win rate”, “50% win rate” and “100% win rate”. It will be either "%".

[Race win percentage data rewrite lottery (during penalty) table]
Next, with reference to FIG. 40, the race win rate data rewrite lottery (during penalty) table will be described. FIG. 40 is a diagram showing the configuration of a race win rate data rewrite lottery (during a penalty) table. The race win rate data rewrite lottery (during a penalty) table is referred to, for example, in a race win rate data rewrite / lottery process (S945) during general medium penalty process (see FIG. 137 described later).

  The race win rate data rewrite lottery (during a penalty) table defines the correspondence between the race win rate after rewrite (including without rewrite) and the lottery value for each value (“0” to “5”) of the penalty counter. Do. The value of the penalty counter is the number of unauthorized operations (for example, ignoring push order navigation) performed during a predetermined game period. Further, in the present embodiment, in the race win rate data rewrite / lottery process, the race win rate data rewrite lottery (during penalty) table of FIG. 40 is used in common regardless of the currently set race win rate.

  In the race winning percentage data rewriting lottery processing using the race winning percentage data rewriting lottery (during a penalty) table, first, the effects extracted from the range of predetermined numerical values (0 to 32767 in this embodiment, random number denominator = 32768) A random number value is sequentially subtracted by a lottery value corresponding to each rewritten race winning percentage defined in the race winning percentage data rewriting lottery (during penalty) table. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). And, if the subtraction result becomes negative ("it is a big deal"), it means that the race win rate at that time is won.

  In this embodiment, regardless of the currently set race win rate, the race win rate data rewrite lottery (during a penalty) table of FIG. 40 is used. Therefore, as the race win rate after rewrite, “no rewrite” and “win rate 0”. One of "%" is the winning composition. That is, in the present embodiment, the race win rate during the penalty is the currently set race win rate or 0% (no AT win).

  The configuration of the race win rate data rewrite lottery (during a penalty) table is not limited to the example shown in FIG. For example, as winning types of the race win rate after rewriting, a predetermined race win rate within the range of more than 0% and less than 5% may be included in addition to “no rewrite” and “win rate 0%”. Alternatively, instead of “0% win rate”, the predetermined race win rate may be won.

  Also, for example, a race win rate data rewrite lottery (during a penalty) table may be provided for each currently set race win rate. In this case, a lottery value may be appropriately set in the fields of the race win rates other than “0% win rate” so that the race win rate after rewriting is equal to or less than the currently set race win rate.

  Furthermore, in the race win rate data rewriting lottery (during penalty) table shown in FIG. 40, the probability of decreasing the race win rate (lottery value of “win rate of 0%”) along with the increase of the value of the penalty counter Although a continuously increasing configuration example has been described, the present invention is not limited thereto. For example, even if the probability of lowering the race win rate when the value of the penalty counter is “1” (lottery value of “0% of win rate”) is the same as that when the value of the penalty counter is “2” Good. That is, the probability of decreasing the race win rate (lottery value of “0% win rate”) is gradual with the increase in the value of the penalty counter (number of times of execution of the illegal operation) of the table of race win rate data rewriting lottery (during penalty) table. May be configured to increase.

[Pseudo BB lottery (general) table]
Next, with reference to FIG. 41, the pseudo BB random determination (general) table will be described. FIG. 41 is a diagram showing a configuration of a pseudo BB random determination (in middle) table. The pseudo BB lottery (in middle) table is referred to, for example, when the sub gaming state is the normal state in pseudo BB lottery processing (see FIG. 119 described later) described later.

  The pseudo BB lottery (general) table defines, for each type of internal winning combination, the correspondence between winning / non winning (lottery result) of the pseudo BB game and the lottery value thereof.

  In the pseudo BB lottery process using the pseudo BB lottery (generally) table, first, the effect random number value extracted from the range of predetermined numerical values (0 to 32767 in this embodiment, random number denominator = 32768) is used. Then, subtraction is sequentially performed using the lottery value of each lottery result defined in the pseudo BB lottery (general) table. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). Then, if the subtraction result becomes negative ("a digit" has occurred), the lottery result (winning / not winning of the simulated BB game) at that time is won.

  For example, in the pseudo BB lottery processing using the pseudo BB lottery (general) table, when the internal winning combination is "normal ripple", non-winning of the pseudo BB game is always determined, and the internal winning combination is "confirmed. In the case of the role, the winning of the simulated BB game is always determined.

[Simulated BB lottery (AT during / AT preparation / during race) table]
Next, with reference to FIG. 42, the pseudo BB lottery (in AT, in AT preparation, in race) table will be described. FIG. 42 is a diagram showing the configuration of a pseudo BB lottery (in AT, during AT preparation, during racing) table. It should be noted that the pseudo BB lottery (in AT, during AT preparation, in race) table is, for example, a case where the sub gaming state is other than the normal state (sub gaming state in pseudo BB lottery processing described later (see FIG. 119 described later) Is referred to in the case of AT state, AT preparation state or transition effect state).

  The pseudo BB lottery (in AT, AT preparing and racing) table also has the same configuration as the pseudo BB lottery (general) table, and the pseudo BB lottery process is performed in the same manner. Therefore, in this case, the structure of the pseudo BB lottery (in AT / AT preparing / racing) table and explanation of the method of pseudo BB lottery processing using the pseudo BB lottery (in AT / AT preparing / racing) table Omit.

[Simulated BB precursor lottery table]
Next, the pseudo BB precursor lottery table will be described with reference to FIG. FIG. 43 is a diagram showing the structure of a pseudo BB precursor lottery table. The pseudo BB precursor lottery table is referred to, for example, in pseudo BB precursor lottery processing (S677) in pseudo BB lottery processing (see FIG. 119 described later).

  The pseudo BB precursor lottery table defines, for each type of internal winning combination, the correspondence between the number of precursor games (including no precursor) at the time of winning the pseudo BB game and the lottery value thereof.

  In the pseudo BB precursor lottery process using the pseudo BB precursor lottery table, first, the effect random number value extracted from the range of predetermined numerical values (0 to 32767 in this embodiment, random number denominator = 32768) is simulated The lottery value of each precursor game number specified in the BB precursor lottery table is sequentially subtracted. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). Then, if the subtraction result becomes negative (a "marginal" occurs), the number of precursor games at that time is won.

  For example, in the pseudo BB precursor lottery process using the pseudo BB precursor lottery table, when the internal winning combination is "weak", the number of precursor games of one game is won with a probability of 128 / 32,768, 512 / 32,768 Win a precursor game number of 2 games of probability, win a precursor game number of 3 games with a probability of 32128/32768.

[Cycle shortening lottery table]
Next, the cycle shortening lottery table will be described with reference to FIGS. 44 and 45. FIG. FIG. 44 is a diagram showing a configuration of a cycle shortening lottery table (part 1), and FIG. 45 is a diagram showing a configuration of a cycle shortening lottery table (second). Note that the cycle shortening lottery table (Part 1 and Part 2) is referred to, for example, in the cycle shortening related process (S661) in the general medium game start process (see FIGS. 117 and 118 described below).

  The cycle shortening lottery table defines the correspondence between the number of shortening games (the number of subtraction games of normal games) and the lottery value of the non-AT game period (one cycle) for each winning history data of the internal winning combination. . In the cycle shortening lottery table, the number of shortening games is “0”, “5”, “10”, “20”, “30”, “40”, “50”, “60”, “70”, “ 100 "," 150 "and" 170 "are provided.

  In addition, the winning history data "lost 2 reams" of the internal winning combination in the cycle shortening lottery table (Part 1) indicates the case where the internal winning combination "losing" is won for two consecutive games. The winning history data “Rip 3-R” indicates a case in which the internal winning combination “Normal Rip” has won three games in a row. Further, the winning history data “Bell triple” indicates a case where the internal winning combination “three bells” (three bells on the left and three bells in the middle right) is winning three games in a row.

  In addition, internal history winning data "weak 1st shot" and "strong 1st shot" of the internal winning combination in the cycle shortening lottery table (Part 2), the internal winning combination of the current game is "weak change" and "strong “Che” is shown. The winning history data "weak weak 2 ream" indicates the case where the internal winning combination "weak weak" is winning 2 games in a row, the winning history data "strong strong 2 ream" is the internal winning combination "strong chee" Shows the case where 2 games have won in a row. The historical data "Weak Strong 2 Series" indicates the case where the internal winning combination "Weak Che" and "Strong Che" have been successively won in this order, and the winning history data "Strong 2 Strong" is an internal condition. It shows the case where the players "strong chase" and "weak chase" win in this order in succession. In addition, the winning history data "3 pieces of rare role", the internal winning combination "rare role" ("weak Che", "strong che", "watermelon", "chance eye A", "chance eye B" and "decision role ": Indicates that the internal winning combination of the stipulation) has won three games in a row.

  In the cycle shortening related processing using the cycle shortening lottery table, first, the effect random number extracted from the range of predetermined numerical values (0 to 32767 in this embodiment, random number denominator = 32768) The lottery value of each reduced game number specified in the table is sequentially subtracted. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). Then, if the subtraction result becomes negative (a "marginal" occurs), the number of reduced games at that time is won.

  For example, in the cycle shortening related process using the cycle shortening lottery table, when the winning history data is “three consecutive loses”, the probability of shortening the number of 10 games is won with a probability of 30720/32768, and 1600/32768 Win a reduced number of games with a probability of 30 games and win a reduced game number of 50 games with a probability of 448/32768. That is, in the present embodiment, in the normal game, even if the internal winning combination "losing" is continuously won, there is a possibility that the benefit of obtaining the number of reduced games (shortening of the non-AT state gaming period) may be obtained.

[Simulated BB cycle shortening lottery table]
Next, the pseudo BB cycle shortening lottery table will be described with reference to FIG. FIG. 46 is a diagram showing the configuration of a pseudo BB cycle shortening lottery table. The pseudo BB cycle shortening lottery table is referred to, for example, in the pseudo BB cycle shortening lottery process (S689) in the general middle BB_game start process (see FIG. 120 described later).

  The pseudo BB cycle shortening lottery table is the correspondence relationship between the number of shortening games (the number of subtraction games of the normal game) of the non-AT state game period (one cycle) and the lottery value for each internal winning combination or winning history data thereof. To define. In the pseudo BB cycle shortening lottery table, “0”, “5”, “10”, “20”, “30”, “50”, “100” and “170” are provided as the number of shortening games. However, in the pseudo BB cycle shortening lottery process, when “170” is won as the number of shortening games, a bonus with a race winning rate of 100% can also be obtained.

  In the pseudo BB cycle shortening lottery process using the pseudo BB cycle shortening lottery table, first, the effect random number extracted from the range of predetermined numerical values (0 to 32767 in this embodiment, random denominator = 32768) is used. Then, subtraction is sequentially performed using the lottery value of the number of shortened games specified in the pseudo BB cycle shortening lottery table. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). Then, if the subtraction result becomes negative (a "marginal" occurs), the number of reduced games at that time is won.

  For example, in the pseudo BB cycle shortening lottery process using the pseudo BB cycle shortening lottery table, when the winning history data is “three consecutive loses”, the number of reduced games of 30 is won with a probability of 32112/32768, Win a reduced number of 100 games with a probability of 656/32768. That is, in this embodiment, when the simulated BB game is started during the normal game, in the simulated BB gaming state, even if the internal winning combination "losing" is continuously won, acquisition of the number of shortened games (in non-AT state The benefit of shortening the game period may be obtained. In addition, for example, in the pseudo BB cycle shortening lottery process using the pseudo BB cycle shortening lottery table, when the internal winning combination is "reach eye lip", not only the number of 170 short games must be won. The race win rate set in the current set is updated to 100% race win rate (AT winning).

[Superimposed lottery table]
Next, with reference to FIG. 47A to FIG. 47C, the directly-onset lottery table will be described.

  FIG. 47A shows a configuration of a direct addition lottery table to be referred to when the penalty flag is in the off state. FIG. 47B is a diagram showing the configuration of the direct-addition lottery table to be referred to when the penalty flag is in the on state and the sub gaming state is in the transition rendering state (“during race” described later). Further, FIG. 47C shows that the penalty flag is in the on state, and the sub BB is in the AT state (hereinafter referred to as “in AT”) or in the AT state, the simulated BB gaming is started (hereinafter referred to as “in BB”) Is a diagram showing the configuration of a direct-onward lottery table to be referred to in the case of. That is, if the current game is a game during a penalty, the directly-on top lottery table of FIG. 47B or FIG. 47C is used, and if the current game is not a game during a penalty, the directly-on top lottery symbol table of FIG. Is used.

  These directly added lottery tables are, for example, during in-race processing described below (see FIG. 124 described later), during AT processing in the in-game processing start (described later in FIG. 128), and during AT AT BB_ gaming This is referred to when determining the number of AT games to be added in the direct addition lottery processing during start processing (see FIG. 129 described later).

  Each direct addition lottery table defines, for each internal winning combination or winning history data, a correspondence between the number of added AT games and its lottery value. In the present embodiment, the number of additional AT games is “0” (no additional), “10”, “20”, “30”, “50”, “100”, “150”, “200” and “0”. 300 "is provided.

  In the direct addition lottery processing using the direct addition lottery table, firstly, the effect random number extracted from the range of predetermined numerical values (0 to 32767 in this embodiment, random number denominator = 32768) is directly added and lottery The lottery value of each additional AT game number specified in the table is sequentially subtracted. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). Then, if the subtraction result becomes negative (a "marginal" occurs), the number of additional AT games at that time is won.

  For example, in the directly added lottery processing using the directly added lottery (penalty flag OFF) table shown in FIG. 47A, when the winning history data is “three consecutive loses”, 20 games added AT with a probability of 32736/32768. Wins the number of games and wins the number of added AT games of 100 games with a probability of 32 / 32,768. That is, in this embodiment, when the pseudo BB game is started during AT game, even if the internal winning combination "losing" is continuously won in the pseudo BB gaming state, a benefit of increasing the number of AT games can be obtained. there is a possibility.

  Also, for example, in the direct addition lottery processing (direct addition lottery processing during a penalty) using the direct addition lottery (penalty flag ON: during race) table shown in FIG. 47B, the internal winning combination is “reach eye lip” and “finalized”. If it is other than the role, it is not possible to obtain an additional benefit of the number of AT games. Furthermore, for example, in the direct addition lottery processing (direct addition lottery processing during penalty) using the direct addition lottery (penalty flag ON: AT, BB during AT) table shown in FIG. 47C, regardless of the type of internal winning combination. , Can not get the benefits of additional AT game number.

[AT start game number lottery (woman A victory) table]
Next, with reference to FIGS. 48A and 48B, the AT start game number lottery (at the time of female A victory) table will be described.

  FIG. 48A is referred to when the first mode (50% continuance probability and 50 additional games per MAX bet operation) is selected as the determination form of the number of AT start games upon winning "Woman A". It is a figure which shows the structure of the AT start game number lottery table (at the time of woman A victory) table. Further, FIG. 48B shows that the second mode (95% continuance probability, 5 additional games per MAX bet operation) is selected as the determination mode of the number of AT start games upon winning "Woman A". It is a figure which shows the structure of the AT start game number random determination (woman A victory time) table referred.

  These AT start game number lottery (at the time of woman A victory) table, for example, refer to the woman A_AT start game number lottery process (S1062) in the woman A_AT start game number determination process (see FIG. 148 described later). Be done. Also, the process of selecting one of the AT start game number lottery (at the time of female A victory) table shown in FIGS. 48A and 48B is, for example, the AT in the process of pressing an AT preparation button described later (see FIG. 147 described later). It is carried out in the start game number lottery table switching process (S1054).

  In each AT start game number lottery table (at the time of female A victory) table, classification of winning result of AT start game number addition lottery which is done for each pressing operation of MAX bet button 21 (to win (continuation) / not win (end)) And define the correspondence between each lottery result and the lottery value.

  In the A-AT start game number lottery process using the AT start game number lottery table (at the time of woman A victory) table, first, it is extracted from a predetermined numerical range (0 to 32767 in the present embodiment, random number denominator = 32768). The effect random number values are sequentially subtracted by the lottery value of the type of each lottery result specified in the AT-start game number lottery (at the time of female A victory) table. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). Then, if the subtraction result becomes negative ("a digit" occurs), the lottery result (continuation / not won) at that time is won.

  In addition, when winning the AT start game number addition lottery at the time of "woman A" victory, the AT game number (5 games or 50 games) corresponding to the selected mode is determined at that time. While being added to the number of games, the execution (continuation) of the AT-started game number addition lottery is determined again. On the other hand, when the result of the AT start game number addition lottery at the time of "woman A" victory is not winning, there is no addition of the AT game number, and the AT start game number addition lottery ("woman A" victory time The AT start game number determination game is also ended. However, the number of AT games is guaranteed to be 50 games as the minimum guarantee value regardless of the lottery result of the AT start game number addition lottery. Therefore, for example, in a state where the second mode is selected, when the lottery result of the AT start game number addition lottery becomes not successful (end) at the time of pressing the fifth MAX bet 21, the winning number is Since it is four times, if the number of AT start games is determined based on the corresponding number of wins, it will be 20 games (5 games × 4 times).

[AT start game number lottery (Kappa victory) table]
Next, with reference to FIG. 49 to FIG. 52, the AT start game number lottery (when Kappa wins) table will be described. 49 to FIG. 52 are diagrams showing configurations of an AT-start game number lottery table (at Kappa victory) table (No. 1) to an AT-start game number lottery (at Kappa victory) table (No. 4). Note that these AT start game number lottery (at the time of Kappa victory) table is referred to, for example, in the Kappa sushi MAP lottery process (S 793) in the later-described Kappa victory_game start process (see FIG. 127 described later) and the like. Ru.

  The AT start game number lottery table (Kappa victory time) table defines the correspondence between the sushi MAP number and the lottery value for each sushi MAP number currently set. The sushi MAP is a Kappa sushi map corresponding to the first to tenth sushi nets displayed on the liquid crystal display device 11 in the above-described Kappa sushi effect ("Kappa" winning game number determination game when winning "Kappa") It is MAP which specified data (refer below-mentioned Drawing 53).

  In the AT start game number lottery (Kappa victory) table, “1” to “45” are defined as sushi MAP numbers. In addition, since the sushi MAP is not set in the initial state, in this case, the lottery value in the "first" column in the AT start game number lottery (when Kappa wins) table is referred to (see FIG. 52).

  In the Kappa-zushi MAP lottery process using the AT start game number lottery table (Kappa victory) table, first, effects extracted from a predetermined numerical range (0 to 32767 in this embodiment, random number denominator = 32768) The random number value is sequentially subtracted by the lottery value of each sushi MAP number specified in the AT start game number lottery (at the time of Kappa victory) table. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). And, when the subtraction result becomes negative ("a digit" occurred), the sushi MAP number at that time is won.

[Kappa Sushi MAP Data Table]
Next, with reference to FIG. 53, the Kappa Sushi MAP data table will be described. FIG. 53 is a diagram showing the configuration of a Kappa Sushi MAP data table. The Kappa Sushi MAP data table is referred to, for example, in the Kappa sushi MAP data acquisition process (S794) in the Kappa victory_game start process described later (see FIG. 127 described later) and the like.

  Kappa Sushi MAP data table includes Kappa Sushi MAP data (“1” to “K”) corresponding to first to tenth sushi neta defined for each sushi MAP number determined by Kappa Sushi MAP lottery processing. 8 ") is stored. That is, the Kappa Sushi MAP data table is displayed on the screen of the liquid crystal display device 11 in the AT start game number determination game (Kappa sushi effect) which is performed when "Kappa" wins the race effect of the transition effect game. The types of sushi material from the first game to the tenth game are defined.

  In the Kappa Sushi MAP data table, the sushi material corresponding to Kappa Sushi MAP data “1” is “Squid”, and the sushi material corresponding to Kappa Sushi MAP data “2” is “Tamago”, Kappa Sushi MAP The sushi material corresponding to the data "3" is "Kappamaki", and the sushi material corresponding to the Kappa sushi MAP data "4" is "salmon". In addition, the sushi neta corresponding to Kappa Sushi MAP data “5” is “Ikura”, the sushi neta corresponding to Kappa Sushi MAP data “6” is “Tuna”, and corresponds to Kappa Sushi MAP data “7” The sushi material is "sea urchin", and the sushi material corresponding to the Kappa sushi map data "8" is "Ise shrimp".

  Then, in the Kappa-zushi MAP data acquisition process using the Kappa-zushi MAP data table, for example, when the sushi MAP number is “1”, “Kappa-zushi MAP data from the first dish to the 10th dish are respectively“ 1 (squid), 1 (squid), 2 (tamago), 1 (squid), 4 (salmon), 1 (squid), 2 (tamago), 1 'Squid', '1' (Squid) and '5' (Ikra) are acquired.

[Kappa game number acquisition lottery table]
Next, with reference to FIG. 54, the Kappa game number acquisition lottery table will be described. FIG. 54 is a diagram showing the configuration of a Kappa game number acquisition / lottery table. The Kappa game number acquisition / lottery table is referred to, for example, in the Kappa game number acquisition / lottery process (S806) in the below-mentioned Kappa victory_game start time process (see FIG. 127 described later).

  The Kappa game number acquisition lottery table defines, for each Kappa Sushi MAP data (“1” to “8”), a correspondence between the number of AT start games at the time of “Kappa” victory and its lottery value. In the present embodiment, “10”, “20”, “30”, “100”, “150”, “200” and “300” are provided as the number of AT start games at the time of “Kappa” victory. In addition, a lottery value of “LIFE UP” is also defined in the Kappa game number acquisition lottery table for each Kappa sushi MAP data (“1” to “8”). When winning "LIFE UP", the value of the Kappa end counter that manages the termination trigger of the Kappa sushi effect (AT start game number determination game) is incremented by "1".

  In the Kappa game number acquisition lottery table using the Kappa game number acquisition lottery table, first, the effect random number value extracted from the range of predetermined numerical values (0 to 32767 in this embodiment, random number denominator = 32768) The number of AT start games specified in the Kappa game number acquisition lottery table or the lottery value of "LIFE UP" is sequentially subtracted. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). Then, when the subtraction result becomes negative ("a digit" occurs), the number of AT start games at that time or "LIFE UP" is won.

  For example, when the set Kappa Sushi MAP data is “1” (squid) and a video effect in which “Kappa” eats sushi material “Squid” is displayed on the liquid crystal display device 11, the Kappa game number acquisition lottery is made. In the Kappa game number acquisition lottery process using the table, the AT start game number of 10 games is won with a probability of 32672/32768, and the AT start game number of 300 games of a 96/32768 probability is won. Also, for example, if the set Kappa Sushi MAP data is "3" (Kappa Roll) and the video effect that "Kappa" eats sushi material "Kappa Roll" is displayed on the liquid crystal display device 11, Kappa In the game number acquisition lottery process using the game number acquisition lottery table, the AT start game number is not won but “LIFE UP” is always won.

  Furthermore, for example, when the Kappa sushi map data set is “8” (Ise shrimp) and the video effect that “Kappa” eats sushi material “Ise shrimp” is displayed on the liquid crystal display device 11, the Kappa In the game number acquisition lottery process using the game number acquisition lottery table, the AT start game number of 100 games is won with a probability of 27854/32768, and the AT start game number of 150, 200 or 300 games with a probability of 1638/32768 Will win. That is, in this embodiment, in the Kappa sushi effect performed when the "Kappa" wins the race effect of the transition effect game, if the "Kendo" has an effect of eating the sushi food of the high-class food, Win a big AT start game number.

[Kappa sushi data conversion generated lottery table]
Next, with reference to FIG. 55, the Kappa sushi data conversion generated lottery table will be described. FIG. 55 is a diagram showing the configuration of a Kappa sushi data conversion generated lottery table. The Kappa sushi data conversion generation lottery table is referred to, for example, in the Kappa sushi data conversion generation lottery process (S802) in the later-described Kappa victory_game start processing (see FIG. 127 described later).

  The Kappa sushi data conversion generation lottery table defines, for each type of internal winning combination, the correspondence between the winning / not winning of Kappa sushi data conversion generation (lottery result) and the lottery value thereof.

  In the Kappa sushi data conversion generation lottery process using the Kappa sushi data conversion generation lottery table, first, production randomness extracted from a predetermined numerical range (0 to 32767 in this embodiment, random number denominator = 32768) A numerical value is sequentially subtracted by the lottery value of each lottery result specified in the Kappa sushi data conversion generated lottery table. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). And, when the subtraction result becomes negative ("a digit" occurs), the lottery result at that time is won.

  For example, in the case of Kappa sushi data conversion generation lottery processing using the Kappa sushi data conversion generation lottery table, if the internal winning combination is "missing", Kappa sushi data conversion generation is not won with a probability of 31130/32768, Kappa Sushi data conversion occurs with a probability of 1638/32768.

[Kappa sushi data conversion lottery table]
Next, the Kappa sushi data conversion lottery table will be described with reference to FIGS. 56 to 60. FIG. 56 to 60 each show a configuration of a Kappa sushi data conversion lottery (one plate tip) table to a Kappa sushi data conversion lottery (5 plate tip) table.

  The Kappa sushi data conversion lottery (one plate ahead) table of FIG. 56 is a sushi neta (Kappa) displayed in the game one game ahead (the second plate) from the current game of the AT start game determination game at the time of “Kappa” victory. It is a conversion lottery table of sushi MAP data). The Kappa sushi data conversion lottery (two plate destination) table in FIG. 57 is a conversion of sushi neta displayed in a game two games ahead (third plate) from the current game of AT start game determination game at the time of “Kappa” victory. It is a lottery table. The Kappa sushi data conversion lottery (3 plate destination) table of FIG. 58 is a conversion of sushi neta displayed in the game 3 games ahead (4 plate) from the current game of AT start game determination game at the time of “Kappa” victory. It is a lottery table. The Kappa sushi data conversion lottery (four plate destination) table of FIG. 59 is the conversion of sushi neta displayed in the game four games ahead (fifth plate) from the current game of the AT start game determination game at the time of "Kappa" victory. It is a lottery table. Then, the Kappa-Sushi data conversion lottery (5 dishes destination) table of FIG. 60 is a sushi neta displayed in the game 5 games ahead (six dishes) from the current game of the AT start game number determination game at the time of “Kappa” victory. Conversion lottery table. Note that each Kappa sushi data conversion lottery table is referred to, for example, in the Kappa sushi data conversion lottery process (S804) in the later-described Kappa victory_game start process (see FIG. 127 described later).

  Each Kappa Sushi data conversion lottery table is a correspondence relationship between Kappa Sushi MAP data (“1” to “8”) after conversion and its lottery value for each Kappa Sushi MAP data (Sushi neta) currently set. To define.

  In the Kappa sushi data conversion lottery process using each Kappa sushi data conversion lottery table, first, a random number value for effect extracted from a predetermined numerical range (0 to 32767 in this embodiment, random number denominator = 32768) Are sequentially subtracted by the lottery value of Kappa Sushi MAP data (sushi material) after each conversion specified in each Kappa Sushi data conversion lottery table. Next, it is determined whether the result of subtraction has become negative (whether so-called “worried” has occurred). And, when the subtraction result becomes negative ("a digit" is generated), Kappa sushi map data (sushi material) after conversion at that time is won.

  For example, in the case of Kappa sushi data conversion lottery processing using Kappa sushi data conversion lottery (one plate tip) table, when Kappa sushi MAP data (Sushi neta) currently set is “5” (tuna), Kappa Sushi MAP data (Sushi neta) is converted from "5" (Tuna) to "7" (Uni) with a probability of 29492/32768, and Kappa Sushi MAP data (Sushi neta) with a probability of 3276/32768 is "5" (Tuna) is converted to "8" (Ise shrimp).

  As shown in FIGS. 56 to 60, in this embodiment, in the Kappa-zushi data conversion lottery process, the value of the Kappa-zushi MAP data after conversion is never smaller than the value of the Kappa-zushi MAP data before the conversion. That is, the number of acquired AT games after conversion does not become smaller than the number of acquired AT games before conversion by Kappa sushi data conversion / lottery processing. However, for example, when Kappa Sushi MAP data (Sushi neta) currently set is “8” (Ise shrimp), Kappa Sushi MAP data (Sushi neta) is not converted in Kappa Sushi data conversion lottery processing. .

[MAX bet button on / off judgment table]
Next, the MAX bet button on / off determination table will be described with reference to FIGS. 61 and 62.

  FIG. 61 is a view showing a configuration of a MAX bet button point turning off / off determination table to be referred to during a non-MB game (when the upper limit of the number of medals allowed to be inserted (the valid specified number) is 3). FIG. 62 is a diagram showing the configuration of the MAX bet button on / off determination table referred to during the MB game (when the upper limit of the number of medals that can be inserted is two). Note that these MAX bet button on / off determination tables are referred to, for example, in the on / off determination process of the LED on the MAX bet button 21 during the medal insertion command reception process described later (see FIG. 95 described later).

  Each MAX bet button point light extinction determination table is a combination of the number of inserted medals (0 to 3) and the number of credited medals (0 to 2 and 3 or more) of medals currently inserted from the medal insertion slot 20. And defines the correspondence with the determination result of the ON / OFF of the LED of the MAX bet button 21.

  For example, if the number of medals inserted is 2 and the number of credits of medals is 2 during a non-MB game, the determination result of the LED on / off of the MAX bet button 21 is "ON" (see FIG. 61), the lighting of the LED of the MAX bet button 21 is requested. Further, for example, when the inserted number of medals is one and the number of credits of medals is one during the non-MB game, the determination result of the lighting / extinguishing of the LED of the MAX bet button 21 is “extinguished”. A turn-off request is made to the LED of the MAX bet button 21 (see FIG. 61). In addition, as shown in FIG. 61, when the inserted number of medals is 3 during non-MB gaming, the determination result of lighting / extinguishing of the LED of the MAX bet button 21 is “regardless of the number of credits of medals. It turns off.

<Description of operation of main control circuit>
Next, with reference to FIGS. 63 to 76, the contents of various processing executed by the main CPU 93 of the main control circuit 91 using a program will be described.

[Main operation processing of pachislot by control of main CPU]
First, the procedure of the main operation processing (processing after power on) of the pachislot 1 performed by the control of the main CPU 93 will be described with reference to the flowchart shown in FIG. 63 (hereinafter referred to as the main flow).

  First, when the pachi slot 1 is powered on, the main CPU 93 performs processing at power on (S1). In this process, it is determined whether the backup has been performed normally, whether the setting has been properly changed, and the like, and initialization corresponding to the determination result is performed. The details of the power-on process will be described later with reference to FIG. 64 described later.

  Next, the main CPU 93 performs an initialization process at the end of one game (S2). In this initialization process, data in the designated storage area in the main RAM 95 is cleared. Here, the designated storage area is, for example, a storage area in which it is necessary to erase data for each unit game (game) such as an internal winning combination storing area and a display combination storing area.

  Next, the main CPU 93 performs medal acceptance / start check processing (S3). In this process, the input of a medal sensor (not shown) or the start switch 79 is checked. The details of the medal acceptance / start check process will be described later with reference to FIG. 65 described later.

  Next, the main CPU 93 performs random number value acquisition processing (S4). In this process, the main CPU 93 extracts random number values (0 to 65535) for internal winning combination lottery, and stores the extracted internal random number values in a random number storage area (not shown) provided in the main RAM 95. Do. Further, in the present embodiment, various random number values for presentation (0 to 65535 and / or 0 to 255) can be acquired in addition to the internal lottery random number values, and various random number values for presentation as necessary. May be acquired in S4.

  Next, the main CPU 93 performs internal lottery processing (S5). In this process, the internal winning combination is determined by lottery based on the internal lottery random number value extracted in S4. The details of the internal lottery process will be described later with reference to FIG. 67 described later.

  Next, the main CPU 93 performs reel stop initialization processing (S6). The details of the reel stop initial setting process will be described later with reference to FIG. 68 described later.

  Next, the main CPU 93 performs start command generation and storage processing (S7). In this process, the main CPU 93 generates data of a start command to be transmitted to the sub control circuit 101, and stores the command data in a communication data storage area provided in the main RAM 95. In addition, the start command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by the command data transmission process in the interrupt process described later with reference to FIG. The start command data includes various types of information necessary for producing an internal winning combination and the like.

  Next, the main CPU 93 performs wait processing (S8). In this process, when the predetermined time (for example, 4.1 seconds) has not elapsed from the start of the previous game, the main CPU 93 digests the waiting time until the predetermined time elapses.

  Next, the main CPU 93 performs reel rotation start processing (S9). In this process, the main CPU 93 requests start of rotation of all the reels. Then, when the start of rotation of all the reels is requested, the driving of three stepping motors (not shown) is performed by an interrupt process (see FIG. 76 described later) which is executed at a constant period (1.1172 msec). The rotation of the left reel 3L, the middle reel 3C and the right reel 3R is started under control. At this time, each reel is controlled to accelerate until its rotational speed reaches a constant speed, and thereafter, it is controlled to maintain the constant speed. In addition, when it is determined that the reel effect (lock effect) is to be performed during the reel acceleration period at the start of the game, the main CPU 93 sets the reel effect pattern in the reel rotation start process of S9 and performs the reel effect. It also controls the

  Next, the main CPU 93 performs reel rotation start command generation and storage processing (S10). In this process, the main CPU 93 generates data of a reel rotation start command to be transmitted to the sub control circuit 101, and stores the command data in a communication data storage area provided in the main RAM 95. The reel rotation start command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by command data transmission processing in the interrupt processing described later with reference to FIG. By this processing, the sub control circuit 101 can recognize the reel rotation start, and can determine the timing etc. at which various effects are to be executed.

  Next, the main CPU 93 performs a drawing priority storing process (S11). In this process, the main CPU 93 acquires the attraction priority data and stores the data in the attraction priority data storage area. The details of the leading priority storage process will be described later with reference to FIG. 69 described later.

  Next, the main CPU 93 performs reel stop control processing (S12). In this process, the rotation of the corresponding reel is stopped based on the timing when the left stop button 19L, the middle stop button 19C and the right stop button 19R are pressed and the internal winning combination. The details of the reel stop control process will be described later with reference to FIG. 72 described later.

  Next, the main CPU 93 performs a winning search process (S13). In this process, the main CPU 93 causes combinations of symbols displayed on the activated line (winning determination line) after the left reel 3L, the middle reel 3C and the right reel 3R are all stopped, and the symbol combination table (see FIGS. 10 to 12). Check with). Then, the main CPU 93 determines whether or not the display combination is displayed on the activated line, and stores the determination result in the display combination storage area.

  Next, the main CPU 93 performs a winning operation command generation storage process (S14). In this process, the main CPU 93 generates data of a winning operation command to be transmitted to the sub control circuit 101, and stores the command data in a communication data storage area provided in the main RAM 95. In addition, the winning operation command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by the command data transmission process in the interrupt process described later with reference to FIG. By this processing, the sub control circuit 101 can recognize the symbol combination displayed along the winning determination line, and can determine the timing and the like of executing various effects.

  Next, the main CPU 93 performs medal payout processing (S15). In this process, the hopper device 51 is driven and the number of credits is updated based on the number of payouts of the display combination determined in S13, and the medals are dispensed. Under the present circumstances, in this embodiment, although the payout number of medals changes according to a display combination, as shown in a symbol combination table (refer to FIGS. 10-12), when the insertion number of medals is three, of medals The maximum payout number (the payout upper limit) is ten.

  Next, the main CPU 93 performs payout end command generation and storage processing (S16). In this process, the main CPU 93 generates data of a payout end command to be transmitted to the sub control circuit 101, and stores the command data in a communication data storage area provided in the main RAM 95. The payout end command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by the command data transmission process in the interrupt process described later with reference to FIG.

  Next, the main CPU 93 performs bonus end check processing (S17). In this process, the main CPU 93 refers to various counters (not shown) provided in the main RAM 95 for managing an end trigger of the bonus game, and checks whether or not to end the operation of the bonus game. The details of the bonus end check process will be described later with reference to FIG. 74 described later.

  Next, the main CPU 93 performs bonus operation check processing (S18). In this process, the main CPU 93 checks whether or not to start the operation of the bonus game, and whether or not to play again. The details of the bonus operation check process will be described later with reference to FIG. 75 described later. Then, when the bonus operation check process is completed, the main CPU 93 returns the process to S2, and repeats the processes after S2.

[Power-on process]
Next, with reference to FIG. 64, the power-on process performed in S1 in the main flow (see FIG. 63) will be described.

  First, the main CPU 93 determines whether the backup is normal (S21). In this determination processing, the main CPU 93 performs error detection using a checksum value to determine whether the backup is normal.

  For example, when the power is off, the set value of pachislot 1 (the value to be set in one of the six predetermined stages of the ball withdrawal rate) and the checksum value calculated from the set value are stored in a predetermined area of the main RAM 95 as backup data. It is stored. In the process of S21, the main CPU 93 reads the setting value and the checksum value stored in the main RAM 95. Next, the main CPU 93 compares the checksum value calculated from the read setting value with the checksum value backed up. Then, if the two sum values match, the main CPU 93 determines that the backup is normal.

  When the main CPU 93 determines in S21 that the backup is not normal (when the determination in S21 is NO), the main CPU 93 performs the processing of S23 described later. On the other hand, when the main CPU 93 determines in S21 that the backup is normal (when the determination in S21 is YES), the main CPU 93 sets the backed up setting value in a predetermined area in the main RAM 95 (S22). Thereby, when the backup is normal, the setting value before the power-off is set to the main RAM 95.

  After the processing of S22 or when S21 is NO, the main CPU 93 determines whether the setting change switch (not shown) is in the on state (S23). In S23, when the main CPU 93 determines that the setting change switch is not in the on state (when the determination in S23 is NO), the main CPU 93 performs the processing of S29 described later.

  On the other hand, when the main CPU 93 determines in S23 that the setting change switch is in the on state (when the determination in S23 is YES), the main CPU 93 performs predetermined initialization processing at the time of setting change (S24). In this process, the main CPU 93 clears data stored in, for example, the internal winning combination storing area or the display combination storing area of the main RAM 95, and clears the setting value.

  Next, the main CPU 93 performs initialization command generation and storage processing (S25). In this process, the main CPU 93 generates data of an initialization command to be transmitted to the sub control circuit 101, and stores the command data in a communication data storage area provided in the main RAM 95. Further, the initialization command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by the command data transmission process in the interrupt process described later with reference to FIG. The initialization command data includes the presence or absence of setting value change, setting value information, and the like.

  After the processing of S25, the main CPU 93 executes setting value change processing (S26). In this process, the main CPU 93 selects a setting value from among predetermined ones of 1 to 6 in accordance with the operation result of the reset switch, and based on the operation result of the start lever 23 operated thereafter, the setting value. Determine the

  Next, the main CPU 93 determines whether the setting change switch is in the on state (S27).

  In S27, when the main CPU 93 determines that the setting change switch is in the on state (when the determination in S27 is YES), the main CPU 93 repeats the processing of S27. When the setting change switch is in the on state, this means that the operation of the setting change switch has not been completed. In this case, the main CPU 93 performs the process of S27 until the setting change switch is not in the on state. repeat.

  On the other hand, when the main CPU 93 determines that the setting change switch is not in the on state in S27 (when the determination in S27 is NO), the main CPU 93 performs initialization command generation and storage processing (S28). In this process, the main CPU 93 generates data of an initialization command to be transmitted to the sub control circuit 101, and stores the command data in a communication data storage area provided in the main RAM 95. Then, after the processing of S28, the main CPU 93 ends the power-on processing, and shifts the processing to S2 of the main flow (see FIG. 63).

  Here, the process returns to S23 again, and if the determination in S23 is NO, the main CPU 93 determines whether the backup is normal (S29).

  In S29, when the main CPU 93 determines that the backup is normal (when the determination in S29 is YES), the main CPU 93 restores the setting value to the state before power interruption based on the backup data (S30). Then, after the processing of S30, the main CPU 93 ends the power-on processing, and shifts the processing to S2 of the main flow (see FIG. 63).

  On the other hand, when the main CPU 93 determines in S29 that the backup is not normal (when the determination in S29 is NO), the main CPU 93 performs power-on error processing (S31). In this process, the main CPU 93 displays that the backup is not normal by an error display or the like.

  In this embodiment, an error (backup error) that occurs when the backup is not normal can not be canceled by the operation of the stop release switch or the reset switch, and the setting change is newly made. It is released.

[Medal acceptance and start check processing]
Next, with reference to FIG. 65, the medal reception / start check process performed in S3 in the main flow (see FIG. 63) will be described.

  First, the main CPU 93 determines whether or not there is an automatic input request (S41). The determination of the presence or absence of the automatic insertion request is performed by determining whether the automatic insertion counter is "0". That is, the main CPU 93 determines that there is no automatic insertion request when the automatic insertion counter is “0”, and determines that there is an automatic insertion request when the automatic insertion counter is “1” or more.

  The automatic insertion counter is data for identifying whether or not a display combination relating to replay (replay) has been established in the previous unit game. When the display combination relating to the re-game is established, medals for the number inserted in the previous unit game are automatically inserted into the automatic insertion counter.

  When the main CPU 93 determines in S41 that there is no request for automatic input (when the determination in S41 is NO), the main CPU 93 performs the processing in S44 described later. On the other hand, when the main CPU 93 determines that there is an automatic input request in S41 (when the determination in S41 is YES), the main CPU 93 performs an automatic input process (S42). In this process, the value of the automatic insertion counter is copied to the insertion number counter, and then the value of the automatic insertion counter is cleared.

  After the processing of S42, the main CPU 93 performs medal insertion command generation and storage processing (S43). In this process, the main CPU 93 generates data of a medal insertion command to be transmitted to the sub control circuit 101, and stores the command data in a communication data storage area provided in the main RAM 95. In addition, the medal insertion command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by the command data transmission process in the interrupt process described later with reference to FIG. The medal insertion command data includes information such as the number of medals inserted and the number of credits.

  After the processing of S43 or when S41 is NO, the main CPU 93 performs medal acceptance permission (S44). In this process, the solenoid of the selector 66 (see FIG. 5) is driven, and the medal inserted from the medal insertion slot 20 is accepted. The accepted medals are counted and then guided to the hopper device 51.

  Next, the main CPU 93 sets the maximum value of the number of inserted sheets according to the gaming state (S45). Specifically, when the gaming state is the non-MB gaming state (including the inter-flag state), the main CPU 93 sets the maximum number of inserted sheets to “3”. When the gaming state is the MB gaming state, the main CPU 93 sets the maximum number of inserted sheets to “2”.

  Next, the main CPU 93 performs MAX BET input processing (S46). In this process, the main CPU 93 determines the validity / invalidity of the MAX bet operation based on the gaming state, the number of medals inserted and the number of credits (reserved number). The details of the MAX BET input process will be described later with reference to FIG. 66 described later.

  Next, the main CPU 93 determines whether or not medal acceptance is permitted (S47). When the main CPU 93 determines that the medal acceptance is not permitted in S47 (when the determination in S47 is NO), the main CPU 93 performs the processing of S52 described later.

  On the other hand, when the main CPU 93 determines that the medal acceptance is permitted in S47 (when the determination in S47 is YES), the main CPU 93 performs medal insertion check processing (S48). In this process, the main CPU 93 determines whether or not the medal has been inserted, and adds “1” to the value of the inserted number counter when the medal is inserted.

  Next, the main CPU 93 performs medal insertion command generation and storage processing (S49). In this process, the main CPU 93 generates data of a medal insertion command to be transmitted to the sub control circuit 101, and stores the command data in a communication data storage area provided in the main RAM 95. In addition, the medal insertion command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by the command data transmission process in the interrupt process described later with reference to FIG.

  Next, the main CPU 93 determines whether or not medals can be inserted or credited (S50). In S50, when the main CPU 93 determines that medals can be inserted or credited (when the determination in S50 is YES), the main CPU 93 performs the processing of S52 described later. On the other hand, when the main CPU 93 determines that the medal is not inserted or creditable (S50 is NO), the main CPU 93 performs a medal acceptance prohibition process (S51). In this process, the solenoid of the selector 66 (see FIG. 5) is not driven, and the inserted medal is discharged from the medal payout opening 32.

  After the processing of S51, if S47 is NO or S50 is YES, the main CPU 93 determines whether or not the number of inserted cards is the game startable number (S52). Specifically, the main CPU 93 determines whether the insertion number is set to “2”.

  In S52, when the main CPU 93 determines that the inserted number is not the game startable number (when the determination in S52 is NO), the main CPU 93 returns the process to S46, and repeats the process from S46. On the other hand, when the main CPU 93 determines in S52 that the inserted number is the game startable number (when the determination in S52 is YES), the main CPU 93 determines whether the start switch 79 is on (S53) ).

  When the main CPU 93 determines in S53 that the start switch 79 is not turned on (when the determination in S53 is NO), the main CPU 93 returns the process to S46 and repeats the processes in and after S46. On the other hand, when the main CPU 93 determines in S53 that the start switch 79 is on (when the determination in S53 is YES), the main CPU 93 performs a medal acceptance prohibition process (S54).

  Then, after the processing of S54, the main CPU 93 ends the medal acceptance / start check processing, and shifts the processing to S4 of the main flow (see FIG. 63).

[MAX BET input processing]
Next, with reference to FIG. 66, the MAX BET input process performed in S46 in the medal reception / start check process (see FIG. 65) will be described.

  First, the main CPU 93 determines whether a MAX bet operation has been performed (S61). Specifically, the main CPU 93 determines whether or not the MAX bet button 21 has been pressed by the player.

  In S61, when the main CPU 93 determines that the MAX bet operation is not performed (S61 is NO determination), the main CPU 93 ends the MAX BET input processing, and the processing is a medal acceptance / start check processing (FIG. 65). Move to S47 of reference).

  On the other hand, when the main CPU 93 determines that the MAX bet operation has been performed in S61 (when the determination in S61 is YES), the main CPU 93 determines whether "2 MB" or "3 MB" is established (winning) or not. It discriminates (S62). That is, the main CPU 93 determines whether or not the current gaming state is the state between 2 MB flags or the state between 3 MB flags with reference to the carryover combination storage area (see FIG. 26).

  In S62, when the main CPU 93 determines that "2 MB" or "3 MB" is not established (winning) (when the determination in S62 is NO), the main CPU 93 performs the processing of S65 described later. On the other hand, when the main CPU 93 determines that "2 MB" or "3 MB" has been established (winning) in S62 (when the determination in S62 is YES), the main CPU 93 determines the number of medals inserted and the number of credits. It is determined whether the sum of (the number of stored sheets) is "3" or more (S63).

  When the main CPU 93 determines in S63 that the sum of the current number of medals inserted and the number of credits (stored number) is not "3" or more (when the determination in S63 is NO), the main CPU 93 performs MAX BET insertion processing. Then, the process proceeds to S47 of the medal acceptance / start check process (see FIG. 65).

  On the other hand, when the main CPU 93 determines in S63 that the sum of the current medal insertion number and the credit number (reserved number) is "3" or more (in the case of YES determination in S63), the main CPU 93 "3" is set to the number of sheets (S64). Then, after the processing of S64, the main CPU 93 ends the MAX BET insertion processing, and shifts the processing to S47 of the medal acceptance / start check processing (see FIG. 65).

  As described above, in the present embodiment, the total number of medals inserted and the number of credits is the number between the MB flags, even if the player performs the MAX bet operation in the 2 MB flag state or the 3 MB flag state. If the number is less than the maximum value "3", the number of medals is not set. That is, in this case, the MAX bet operation performed by the player is invalidated.

  Here, returning to the processing of S62, if the determination of S62 is NO, the main CPU 93 sets a predetermined number of medals that are credited (S65). At this time, the number of hangings of 2 or 3 is set. Then, after the process of S65, the main CPU 93 ends the MAX BET input process, and shifts the process to S47 of the medal reception / start check process (see FIG. 65).

  As described above, in the MAX BET insertion process of the present embodiment, the validity of the MAX bet operation by the player is determined based on the total number of medals inserted and the number of credits (stored number) in the inter-MB flag state. An invalid determination is performed, and this process is executed by the main control circuit 91. That is, in the present embodiment, the main control circuit 91 determines whether the MAX bet operation is valid or invalid based on the total number of medals inserted and the number of credits (stored number) in the inter-MB flag state. It also serves as (bet operation determination means).

[Internal lottery process]
Next, with reference to FIG. 67, the internal lottery process performed in S5 in the main flow (see FIG. 63) will be described.

  First, the main CPU 93 determines whether or not the gaming state is the MB gaming state with reference to the gaming state flag storage area (see FIG. 27) (S71).

  In S71, when the main CPU 93 determines that the gaming state is the MB gaming state (when the determination in S71 is YES), the main CPU 93 performs processing during MB operation (S72). As shown in the internal lottery tables for the 2 MB gaming state and the 3 MB gaming state in FIGS. 19 and 20, in the MB gaming state, the "CB role", that is, all the minor roles are always won. Therefore, in the processing during MB operation, the main CPU 93 turns on the bits of all the small winning combinations in the internal winning combination storing area (see FIG. 24). Then, after the processing of S72, the main CPU 93 ends the internal lottery processing, and shifts the processing to S6 of the main flow (see FIG. 63).

  On the other hand, when the main CPU 93 determines in S71 that the gaming state is not the MB gaming state (S71 is NO), the main CPU 93 sets an internal lottery table according to the gaming state (S73). In this process, the main CPU 93 determines the type of the internal lottery table by grasping the current gaming state with reference to the gaming state flag storage area (see FIG. 27).

  Next, the main CPU 93 acquires the internal lottery random number value stored in the random number value storage area (S74). Then, the main CPU 93 sets “1” as an initial value of the winning number.

  Next, the main CPU 93 refers to the internal lottery table to obtain a lottery value corresponding to the winning number, and subtracts the lottery value from the internal lottery random number value (S75).

  Next, the main CPU 93 determines whether or not the calculation result in S75 is less than "0" (negative value) (S76). In S76, when the main CPU 51 determines that the calculation result is less than “0” (when the determination in S76 is YES), the main CPU 93 performs the processing of S79 described later.

  On the other hand, when the main CPU 93 determines in S76 that the operation result is not less than “0” (when the determination in S76 is NO), the main CPU 51 updates the internal lottery random number value and the winning number (S77). Specifically, the value of the operation result is used as a random value for internal lottery, and the winning number is added by “1”.

  Next, the main CPU 93 determines whether all the winning numbers have been checked (S78). When the main CPU 93 determines in S78 that all the winning numbers have not been checked (when the determination in S78 is NO), the main CPU 93 returns the process to S75, and repeats the process from S75.

  On the other hand, when it is determined in S78 that the main CPU 93 has checked all the winning numbers (if YES in S78), the main CPU 93 performs the processing of S80 described later.

  Here again, returning to the processing of S76, if the determination in S76 is YES (if a digit is generated in the subtraction processing), the main CPU 93 determines the data pointer for small winning combination / replay corresponding to the winning number in which the digit is generated. And the bonus data pointer is acquired (S79).

  After the processing of S79 or when S78 is a YES determination, the main CPU 93 refers to the internal lottery table (see FIGS. 13 to 15 and the like) and acquires an internal winning combination based on the small winning combination / replay data pointer (S80). ). Next, the main CPU 93 stores the acquired internal winning combination in the carryover combination storage area (S81).

  Next, the main CPU 93 determines whether the data stored in the carryover combination storage area is “00000000” (S82). When the main CPU 93 determines in S82 that the data stored in the carryover combination storage area is not "00000000" (when the determination in S82 is NO), the main CPU 93 performs the processing of S87 described later.

  On the other hand, when the main CPU 93 determines in S82 that the data stored in the carryover combination storage area is "00000000" (when the determination in S82 is YES), the main CPU 93 selects the internal lottery table (FIGS. 15) to obtain an internal winning combination based on the bonus data pointer (S83).

  Next, the main CPU 93 stores the acquired internal winning combination in the carryover combination storage area (S84).

  Next, the main CPU 93 determines whether the MB (“2 MB” or “3 MB”) is being carried over with reference to the carryover combination storage area (S85). When the main CPU 93 determines in S85 that the MB is not carried over (when the determination in S85 is NO), the main CPU 93 performs the processing of S87 described later.

  On the other hand, when the main CPU 93 determines in S85 that the MB is being carried over (when the determination in S85 is YES), the main CPU 93 sets the RT gaming state corresponding to the type of MB being carried over (S86) . Specifically, when “2 MB” is being carried over (between 2 MB flags), the main CPU 93 sets the RT1 gaming state as the RT state (bit 3 of the gaming state flag storage area (see FIG. 27) Store (set) 1). On the other hand, when “3 MB” is being carried over (between 3 MB flags), the main CPU 93 sets the RT2 gaming state as the RT state (“1” in bit 4 of the gaming state flag storage area (see FIG. 27). Store (set)).

  After the process of S86, or if S82 or S85 is NO, the main CPU 93 updates the internal winning combination storing area based on the internal winning combination stored in the carryover combination storing area (S87). Thereafter, the main CPU 93 ends the internal lottery process, and shifts the process to S6 of the main flow (see FIG. 63).

  As described above, the internal lottery process of the present embodiment is executed by the main control circuit 91. That is, in the present embodiment, the main control circuit 91 doubles as a means (internal winning combination determination means) for executing an internal winning combination determination process. Further, at S86 in the above-mentioned internal lottery processing, the RT gaming state corresponding to the type of MB being carried over is set. That is, in the present embodiment, the main control circuit 91 doubles as a means (replay time state control means) for performing transition control of the RT gaming state.

[Reel stop initialization process]
Next, with reference to FIG. 68, the reel stop initial setting process performed in S6 in the main flow (see FIG. 63) will be described.

  First, the main CPU 93 determines whether the gaming state is the MB gaming state (S91).

  In S91, when the main CPU 93 determines that the gaming state is the MB gaming state (when the determination in S91 is YES), the main CPU 93 performs the processing of S93 described later. On the other hand, when the main CPU 93 determines in S91 that the gaming state is not the MB gaming state (S91 is NO determination), the main CPU 93 sets the value of the small winning combination / replay data pointer as the rotation stop number. (S92).

  After the processing of S92 or when the determination of S91 is YES, the main CPU 93 refers to the reel stop initialization setting table (not shown), and based on the acquired rotation stop number, various information corresponding to the rotation stop number Is acquired (S93). In this process, the number of the stop table of the reel used at the time of the first stop to the third stop, and the information required in the control change process (when the reel is stopped in a specific order and the reel stops at a specific position) Information for reselecting the stop table is acquired again.

  In the reel stop initial setting table, the correspondence relationship between the rotation stop number, and various information such as pull-in priority order table selection data and pull-in priority order table number described later is defined. The stop table is a table that directly or indirectly defines information on the number of sliding pieces for the pressed position of the stop button. In this stop table, using defined information, the number of sliding pieces is such that the reels stop at the stop position intended by the designer so as not to cause a disadvantage to the player and to prevent the occurrence of an erroneous prize. Is defined.

  Next, the main CPU 93 stores the rotating identifier “0FFH (11111111B)” in the symbol code storage area (see FIG. 30) (S94).

  Next, the main CPU 93 stores "3" in the stop button non-operation counter provided in the main RAM 95 (S95). After that, the main CPU 93 ends the reel stop initialization setting processing, and shifts the processing to S7 of the main flow (see FIG. 63). The stop button non-operation counter is a counter for managing the number of stop buttons for which a stop operation has not been detected.

[Import priority storage process]
Next, with reference to FIG. 69, the drawing priority priority storage process performed in S11 in the main flow (see FIG. 63) will be described.

  First, the main CPU 93 stores the value of the stop button non-operation counter in the main RAM 95 as the number of searches (S101). Next, the main CPU 93 executes search target reel determination processing (S102). In this process, for example, the main CPU 93 selects a predetermined reel from the rotating reels, and determines the selected reel as a search target reel.

  For example, in the process of S102, when all (three) reels are rotated, the left reel 3L is first determined as a search target reel. Thereafter, various processes up to S111 to be described later are performed on the left reel 3L, and when the process returns to S102 again, the middle reel 3C is determined as a search target reel next. Then, various processes up to S111 to be described later are performed on the middle reel 3C, and when the process returns to S102 again, the right reel 3R is determined as a search target reel next.

  Next, the main CPU 93 performs pull-in priority order table selection processing (S103). In this process, the pull-in priority order table is selected based on the internal winning combination (data pointer) and the operation stop button. The details of the pull-in priority order table selection process will be described later with reference to FIG. 70 described later.

  Next, the main CPU 93 sets "0" as position data of the search symbol, and sets "20" as the number of symbol checks (S104). Then, the main CPU 93 performs symbol code storage processing (S105). In this process, the symbol code corresponding to the position data of the current search symbol located on the valid line of the search target reel is stored in the symbol code storage area. At this time, symbol codes corresponding to the number of effective lines are stored. The details of the symbol code storage processing will be described later with reference to FIG. 71 described later.

  Next, the main CPU 93 updates the display combination storage area (see FIG. 25) based on the symbol code acquired in S105 and the data of the symbol code storage area (see FIG. 30) (S106). At this time, regardless of the presence or absence of the internal winning combination, a combination of symbols that can be displayed (displayable combination) is stored in the display combination storage area based on the stop symbol.

  In the present embodiment, the information on the symbol code storage area (the symbol code and the displayable part corresponding to the symbol code storage area) is updated for each stopped reel. At this time, the displayable part may be obtained from data prepared in advance that indicates the correspondence between the symbol of the stopped reel and the corresponding displayable part, or the symbol of the stopped reel And the symbol combination table (see FIGS. 10 to 12) may be collated and acquired. When the former method is used, the correspondence between the symbol and the displayable part changes for each reel.

  Next, the main CPU 93 executes a drawing priority data acquisition process (S107). In this process, the main CPU 93 sets the bit to "1" in the display combination storing area (see FIG. 25), and pulls priority for the combination in which the bit is "1" in the internal winning combination storing area. Acquisition priority data is acquired with reference to a rank table (not shown).

  The lead-in priority order table is a table that defines the correspondence between lead-in priority order data for each storage area type in each lead-in priority order table number and the predetermined priority order. In addition to the number of sliding pieces obtained based on the stop table, the drawing priority order table is used to search whether there is a more appropriate number of sliding pieces. The priority order is data that defines the order in which the stop display (retraction) is given priority among the types of symbol combinations relating to winning. In addition, normally, the priority is set in the order of the replay, the small winning combination and the bonus from the higher one.

  In addition, when it is the symbol position where it becomes the mistake winning a prize when it makes stop, in S107, it acquires “use prohibition (000H)” as the drawing priority data. Furthermore, if it is a symbol position which does not win an internal winning, but does not cause an erroneous prize even if it is stopped, in S107, “stoppable (001H)” is acquired as the draw-in priority order data.

  Next, the main CPU 93 stores the acquired draw-in priority order data in a draw-in priority order data storage area (not shown) corresponding to the search target reel (S108). At this time, the drawing priority order data is stored in the drawing priority order data storage area so that the value of each priority order corresponds to the bit of the storage area.

  In the drawing priority order data storage area, a storage area of priority order data is provided for each type of reel. In each drawing priority order data storage area, drawing priority order data determined according to each symbol position "0" to "19" of the corresponding reel is stored. In the present embodiment, by referring to the pull-in priority data storage area, it is searched whether there is a more appropriate number of sliding symbols in addition to the number of sliding symbols determined based on the stop table.

  In addition, the contents of the priority attraction-in data stored in the attraction priority data storage area differ depending on the type of the attraction priority table number in the attraction priority table referenced when determining the attraction priority data. Further, the higher the value of the attraction priority data, the higher the priority.

  By referring to the retraction priority data, it is possible to relatively evaluate the priorities among the symbols arranged on the circumferential surface of the reel. That is, the symbol for which the largest value is determined as the attraction priority data is the symbol with the highest priority. Therefore, it can be said that the drawing priority order data indicates the order between the symbols arranged on the circumferential surface of the reel. In addition, when two or more symbols with the same value of a drawing-in priority order data exist, one pattern is determined according to the priority order which a priority order table prescribes | regulates.

  Next, the main CPU 93 adds “1” to the position data of the search symbol and subtracts “1” from the symbol check count (S109). Next, the main CPU 93 determines whether or not the symbol check count is “0” (S110).

  In S110, when the main CPU 93 determines that the symbol check frequency is not “0” (when S110 is NO), the main CPU 93 returns the process to S105, and repeats the process of S105 and subsequent steps. On the other hand, when the main CPU 93 determines in S110 that the number of symbol checks is "0" (when the determination in S110 is YES), the main CPU 93 determines whether or not the number of searches has been searched (S111).

  When the main CPU 93 determines in S111 that the search has not been performed for the number of times for search (when the determination in S111 is NO), the main CPU 93 returns the process to S102 and repeats the processes after S102. On the other hand, when the main CPU 93 determines in S111 that the search has been performed for the number of searches (when the determination in S111 is YES), the main CPU 93 ends the withdrawal priority storage process and proceeds to S12 of the main flow (see FIG. 63). Transfer to

[Import priority table selection process]
Next, with reference to FIG. 70, the drawing priority order table selection process performed in S103 in the flowchart of the drawing priority order storage process (see FIG. 69) will be described.

  First, the main CPU 93 determines whether or not pull-in priority order table selection data is set (S121).

  In S121, when the main CPU 93 determines that the pull-in priority table selection data is set (when the determination in S121 is YES), the main CPU 93 stores the pressing order storage area (see FIG. 29) and the operation stop button storage area. Referring to FIG. 28, the drawing priority order table number corresponding to the drawing priority order table selection data is set from the drawing priority order table selection table (not shown) (S122). Then, after the process of S122, the main CPU 93 ends the drawing priority order table selection process, and moves the process to S104 of the drawing priority order storage process (see FIG. 69).

  The drawing priority order table selection table defines the correspondence between the combination of the drawing priority order selection number and the pressing order of the stop button and the drawing priority order table number in each combination. Further, the drawing priority order table number is data for acquiring information on the priority of the display combination defined in the drawing priority order table (not shown) described above.

  On the other hand, when the main CPU 93 determines that the pull-in priority table selection data is not set in S121 (when the determination in S121 is NO), the main CPU 93 selects the pull-in priority table corresponding to the pull-in priority table number. It sets (S123). Then, after the process of S123, the main CPU 93 ends the drawing priority order table selection process, and moves the process to S104 of the drawing priority order storage process (see FIG. 69).

[Symbol code storage processing]
Next, with reference to FIG. 71, symbol code storage processing performed in S105 in the flowchart of the retraction priority storage processing (see FIG. 69) will be described.

  First, the main CPU 93 sets valid line data (S131). In the present embodiment, the effective line is provided with one line (center line) as described above. Next, the main CPU 93 sets the check symbol position data of the search target reel based on the search symbol position and the valid line data (S132). For example, in the case where the search target reel is the left reel 3L, since it is desired to acquire middle information of the search target reel, the check symbol position data indicating the middle is set.

  Next, the main CPU 93 acquires the symbol code of the check symbol position data (S133). Then, after storing the acquired symbol code in the symbol code storage area, the main CPU 93 ends the symbol code storage processing, and shifts the processing to S106 of the drawing priority storage processing (see FIG. 69).

[Reel stop control processing]
Next, with reference to FIG. 72, the reel stop control process performed in S12 in the main flow (see FIG. 63) will be described.

  First, the main CPU 93 determines whether a valid stop button has been pressed (S141). In S141, when the main CPU 93 determines that a valid stop button is not pressed (S141 is NO determination), the main CPU 93 repeats the processing of S141 and a pressing operation of a valid stop button is executed. Wait up to.

  On the other hand, when the main CPU 93 determines that the effective stop button has been pressed in S141 (when the determination in S141 is YES), the main CPU 93 stores the pressing order storage area (see FIG. 29) and the operation stop button storage area (FIG. 28) is updated (S142). Next, the main CPU 93 subtracts “1” from the value of the stop button non-operation counter (S143).

  Next, the main CPU 93 determines a search target reel from the operation stop button (S144). Then, the main CPU 93 stores the stop start position in the main RAM 95 based on the symbol counter (S145).

  Next, the main CPU 93 performs sliding symbol number determination processing (S146). In this process, the main CPU 93 acquires sliding piece number determination data based on the type of stop button at the time of the first stop, various stop tables, and the like.

  Next, the main CPU 93 performs priority attraction control processing (S147). In this process, the pull-in priority order data are compared according to each symbol position within the range of the maximum number of sliding symbols “4” or “1” from the stop start position, and the most appropriate number of sliding symbols is determined. The details of the priority attraction-in control process will be described later with reference to FIG. 73 described later.

  Next, the main CPU 93 performs reel stop command generation and storage processing (S148). In this process, the main CPU 93 generates data of a reel stop command to be transmitted to the sub control circuit 101, and stores the command data in a communication data storage area provided in the main RAM 95. Further, the reel stop command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by the command data transmission process in the interrupt process described later with reference to FIG. The reel stop command transmitted in this process includes information such as the type of reel to be stopped, the number of sliding symbols, and the ON edge / OFF edge of the stop switch.

  Next, the main CPU 93 determines a planned stop position based on the stop start position and the sliding piece number determination data acquired in S146, and stores the determined planned stop position in the main RAM 95 (S149). In this process, the main CPU 93 adds the number of sliding symbols to the stop start position, and sets the result as the planned stop position.

  Next, the main CPU 93 sets the planned stop position determined in S149 as a search symbol position (S150). Next, the main CPU 93 executes the symbol code acquisition processing described with reference to FIG. 71 (S151). Thereafter, the main CPU 93 updates the symbol code storage area (see FIG. 30) using the acquired symbol code (S152).

  Next, the main CPU 93 performs control change processing (S153). Next, the main CPU 93 determines whether the stop button non-operation counter is “0” (S154). When the main CPU 93 determines in S154 that the inactivity counter is not "0" (when the determination in S154 is NO), the main CPU 93 performs the retraction priority storage processing described with reference to FIG. 69 (S155). ). Thereafter, the main CPU 93 returns the process to S141, and repeats the processes after S141.

  On the other hand, when the main CPU 93 determines in S154 that the inactivity counter is "0" (when the determination in S154 is YES), the main CPU 93 ends the reel stop control processing, and the main flow processing (FIG. 63). Move to S13 of reference).

  As described above, the reel stop control process of this embodiment is executed by the main control circuit 91. That is, in the present embodiment, the main control circuit 91 doubles as means (stop control means) for executing stop control of the rotation of the reel (variation display of symbols).

[Priority pull-in control processing]
Next, with reference to FIG. 73, the priority attraction-in control processing performed in S147 in the flowchart of the reel stop control processing (see FIG. 72) will be described.

  First, the main CPU 93 sets an acquisition priority data storage area corresponding to the operation stop button (S161). Next, the main CPU 93 acquires data of the stop start position (S162).

  Next, the main CPU 93 determines whether the MB ("2 MB" or "3 MB") is in operation (S163). In S163, when the main CPU 93 determines that the MB is not in operation (when the determination in S163 is NO), the main CPU 93 performs the processing of S165 described later. On the other hand, when the main CPU 93 determines in S163 that the MB is in operation (when the determination in S163 is YES), the main CPU 93 determines whether the search target reel is the left reel 3L (S164) .

  In S164, when the main CPU 93 determines that the search target reel is not the left reel 3L (when the determination of S164 is NO), the main CPU 93 performs the processing of S165 described later. On the other hand, when the main CPU 93 determines in S164 that the search target reel is the left reel 3L (when the determination in S164 is YES), the main CPU 93 performs the processing of S167 described later.

  If S163 or S164 is NO (if the maximum number of sliding symbols is 4 and the reel stop control is performed), the main CPU 93 sets a priority table corresponding to the number of sliding symbols determination data (S165).

  In the priority order table, the number-of-sliding pieces determination data obtained based on the stop table and the range of numerical values predetermined as the number of sliding pieces (“0” to “4” when the maximum number of sliding pieces is four) The order of priority to be applied from “)” (hereinafter referred to as “priority order”) is defined. That is, in the priority order table, the order of the number of sliding symbols to be preferentially applied is determined for each piece of sliding symbol number determination data. In the present embodiment, each numerical value is searched (checked) sequentially from the lower priority order “5” of the priority order table, and the numerical value corresponding to the priority order “1” is preferentially applied as the number of sliding symbols. To make Then, in the process of S165, if, for example, the number-of-sliding-pieces determination data is "4", the data of the priority defined in the address in the priority order table corresponding to the number-of-sliding pieces determination data "4" is Is set.

  After the processing of S165, the main CPU 93 sets “5” as the initial value of the priority order and the number of checks (S166). By this processing, the priority order is checked (searched) five times in the range of 0 frame to 4 frames. Then, after the process of S166, the main CPU 93 performs the process of S169 described later.

  If the determination in S164 is YES (the maximum number of sliding symbols is one and the reel stop control is performed), the main CPU 93 sets the priority table for the MB gaming state corresponding to the number of sliding symbols determination data. (S167). Next, the main CPU 93 sets “3” as the initial value of the priority order, and sets “2” as the number of checks (S168). By this processing, the priority order is checked (searched) twice in the range of 0 frame to 1 frame. Then, after the process of S168, the main CPU 93 performs the process of S169 described later.

  After the processing of S166 or S168, the main CPU 93 sets the sliding symbol number determination data as the sliding symbol number (S169).

  Next, the main CPU 93 extracts a stop search position based on the stop start position and the priority order (S170). Next, the main CPU 93 acquires pull-in priority data of the stop search position (S171).

  Next, the main CPU 93 determines whether or not the value of the drawing priority data acquired in S171 is equal to or greater than the value of the drawing priority data acquired earlier (S172). When the main CPU 93 determines in S172 that the retraction priority data acquired in S171 is not equal to or higher than the retraction priority data acquired earlier (in the case of NO determination in S172), the main CPU 93 performs the processing of S174 described later. .

  On the other hand, when the main CPU 93 determines in S172 that the pull-in priority data acquired in S171 is equal to or higher than the pull-in priority data acquired first (in the case of YES determination in S172), the main CPU 93 calculates the number of sliding symbols. It updates (S173).

  After the processing of S173 or when the determination of S172 is NO, the main CPU 93 subtracts “1” from the value of the priority order and the number of checks (S174).

  Next, the main CPU 93 determines whether the number of checks is “0” (S175). When the main CPU 93 determines in S175 that the number of checks is not “0” (when the determination in S175 is NO), the main CPU 93 returns the process to S170, and repeats the process from S170.

  On the other hand, when the main CPU 93 determines in S175 that the number of checks is “0” (when the determination in S175 is YES), the main CPU 93 sets the finally updated number of sliding symbols (S176). Then, after the processing of S176, the main CPU 93 ends the priority attraction-in control processing, and shifts the processing to S148 of the reel stop control processing (see FIG. 72).

[Bonus end check processing]
Next, with reference to FIG. 74, the bonus end check process performed in S17 in the main flow (see FIG. 63) will be described.

  First, the main CPU 93 determines whether the MB (“2 MB” or “3 MB”) is in operation with reference to the game state flag storage area (see FIG. 27) (S181). In S181, when the main CPU 93 determines that the MB is not in operation (S181 is NO), the main CPU 93 ends the bonus end check process, and the process proceeds to S18 in the main flow (see FIG. 63). Move.

  On the other hand, when the main CPU 93 determines in S181 that the MB is in operation (when the determination in S181 is YES), the main CPU 93 performs CB termination processing (S182). In this processing, processing such as turning off a gaming state flag (not shown) corresponding to "CB", clearing a winning possible number counter and a gaming possible number counter is performed. Next, the main CPU 93 updates the value of the bonus end number counter (S183).

  Next, the main CPU 93 determines whether or not the value of the bonus end number counter is less than “0” (S184). In S184, when the main CPU 93 determines that the value of the bonus end number counter is not less than “0” (when the determination in S 184 is NO), the main CPU 93 ends the bonus end check processing, and the main flow processing (FIG. Move to S18 in 63).

  On the other hand, when the main CPU 93 determines in S184 that the value of the bonus end number counter is less than "0" (when the determination in S184 is YES), the main CPU 93 performs an MB end process (S185). In this process, the main CPU 93 clears the bonus end number counter and turns off the gaming state flag (2 MB gaming state flag or 3 MB gaming state flag) corresponding to the active MB ("2 MB" or "3 MB"). Do. If the value of the bonus end number counter is less than "0", if the payout of medals exceeds 2 during the 2 MB gaming state, or the payout of medals exceeds 30 during the 3 MB gaming state Mean the case.

  Next, the main CPU 93 performs bonus end command generation and storage processing (S186). In this process, the main CPU 93 generates data of a bonus end command to be transmitted to the sub control circuit 101, and stores the command data in a communication data storage area provided in the main RAM 95. Further, the bonus end command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by the command data transmission process in the interrupt process described later with reference to FIG. The bonus end command includes information indicating that the bonus game has ended.

  Then, after the processing of S186, the main CPU 93 ends the bonus end check processing, and shifts the processing to S18 in the main flow (see FIG. 63).

[Bonus operation check process]
Next, with reference to FIG. 75, the bonus operation check process performed in S18 in the main flow (see FIG. 63) will be described.

  First, the main CPU 93 determines whether the MB (“2 MB” or “3 MB”) is in operation (S191). In S191, when the main CPU 93 determines that the MB is not in operation (when the determination in S191 is NO), the main CPU 93 performs the processing of S193 described later.

  On the other hand, when the main CPU 93 determines in S191 that the MB is in operation (when the determination in S191 is YES), the main CPU 93 performs CB operation processing (S192). Then, after the processing of S192, the main CPU 93 ends the bonus operation check processing, and shifts the processing to S2 of the main flow (see FIG. 63).

  When the determination in S191 is NO, the main CPU 93 determines whether the MB ("2 MB" or "3 MB") is a prize (S193). When the main CPU 93 determines in S193 that the MB is not a winning (when the determination in S193 is NO), the main CPU 93 performs the processing of S197 described later.

  On the other hand, when the main CPU 93 determines in S193 that the MB is a winning (when the determination in S193 is YES), the main CPU 93 performs an MB activation process corresponding to the type of the winning MB (S194). In this process, the main CPU 93 sets "1" to the corresponding bit in the gaming state flag storage area (see FIG. 27), and the value of the bonus end number counter is set to a predetermined value ("30" or "2"). Set to Furthermore, in this process, the main CPU 93 also performs the CB operation process of S192.

  Next, the main CPU 93 clears the value of the carryover combination storage area (S195). Next, the main CPU 93 performs bonus start command generation and storage processing (S196). In this process, the main CPU 93 generates data of a bonus start command to be transmitted to the sub control circuit 101, and stores the command data in a communication data storage area provided in the main RAM 95. Also, the bonus start command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by the command data transmission process in the interrupt process described later with reference to FIG. The bonus start command includes information indicating that the bonus game has been started.

  Then, after the processing of S196, the main CPU 93 ends the bonus operation check processing, and shifts the processing to S2 of the main flow (see FIG. 63).

  Further, if the determination in S193 is NO, the main CPU 93 determines whether or not a combination related to replay (replay) has won (S197). In S197, when the main CPU 93 determines that the combination related to re-playing has not been won (S197: NO), the main CPU 93 ends the bonus operation check process, and the main flow (see FIG. 63). Move to S2.

  On the other hand, when the main CPU 93 determines in S197 that the role associated with the re-play has won (when the determination in S197 is YES), the main CPU 93 requests automatic medal insertion (S198). That is, the main CPU 93 copies the insertion number counter to the automatic insertion number counter. Then, after the processing of S198, the main CPU 93 ends the bonus operation check processing, and shifts the processing to S2 of the main flow (see FIG. 63).

[Interrupt process under control of main CPU (1.1172 msec)]
Next, interrupt processing under control of the main CPU 93 will be described with reference to FIG. In the interrupt processing described below, the main control circuit 91 performs reel control processing as well as transmission processing of various command data. That is, in the present embodiment, the main control circuit 91 performs control processing of the variable display operation of the symbol and doubles as means (data transmission means) for transmitting various command data.

  First, the main CPU 93 saves a register (S201). Next, the main CPU 93 performs input port check processing (S202). In this process, signals input from various switches such as a stop switch are checked.

  Next, the main CPU 93 performs timer update processing (S203). In this process, the main CPU 93 executes, for example, a process of subtracting the value of the lock timer every interrupt process. Then, when the value of the lock timer becomes 0, the main CPU 93 clears the game lock flag.

  Next, the main CPU 93 performs reel control processing (S204). In this process, the main CPU 51 starts the rotation of the left reel 3L, the middle reel 3C and the right reel 3R when required to start the rotation of all the reels, and then rotates each reel at a constant speed, Drive control of three stepping motors. When the number of sliding symbols is determined, the main CPU 93 updates the symbol counter of the corresponding reel by the number of sliding symbols. The main CPU 93 then waits for the updated symbol counter to match the value corresponding to the planned stop position (the symbol at the planned stop position reaches the area on the effective line of the reel display window 4) The corresponding stepping motor is driven and controlled so that the rotation of the reel is decelerated and stopped. Further, in the present embodiment, in addition to the normal acceleration process, the constant speed process and the stop process described above in the process of S204, when the reel effect pattern is set at the acceleration process, the reel effect pattern is supported. It also performs control processing of reel effect (reel action) and lock.

  Next, the main CPU 93 performs command data transmission processing (S205). In this process, the main CPU 93 transmits various command data stored in the communication data storage area to the sub control circuit 101. The command data transmission process is executed not in a cycle of 1.1172 msec but in a cycle of about 16 msec (every 15 interruptions).

  Next, the main CPU 93 performs lamp 7 segment drive processing (S206). In this process, the main CPU 93 controls the 7-segment display 24 to display the number of payouts, the number of credits, and the like. Next, the main CPU 93 performs register restoration processing (S207). After that, the main CPU 93 ends the interrupt processing.

<Outline of Characteristic Various Processes Executed by Sub CPU>
Here, before the detailed operation of the sub control circuit 101 is described, an outline of various characteristic processes (including a penalty process) executed by the sub control circuit 101 of the pachislot 1 according to the present embodiment will be described. The more specific procedures and the like of various processes described below will be described in detail later with reference to various flowcharts.

[Initialization process of game information after power off for a predetermined time]
As described above, in the pachislot machine 1 of the present embodiment, the advantage / disadvantage of the game (acquisition of AT winning chances) is influenced by the game-playing situation (number of digested games). Therefore, in the present embodiment, for example, when the pachislot 1 is restored from the power interruption for a predetermined time or more to prevent the occurrence of the standing state of the game information (the number of digested games, etc.) when the game store is opened. At the time of power-on (for example, at the time of opening the game arcade), the same initialization process as the initialization process performed at the time of receiving the setting change command is automatically performed.

  Specifically, in the present embodiment, when the elapsed time of the power failure calculated based on the time of the most recent power failure occurrence and the time of the power failure recovery is four hours or more, the setting change command is received The same initialization process as that performed at the time is performed, and game information (the number of digested games etc.) is returned to the initial state.

  In addition, since there is no gaming shop which operates a gaming machine for 24 hours normally (except exception time, such as year-end and New Year holidays), the closing state of 8 hours-10 hours exists. Then, in most of the period of the closed state, the power of the gaming machine is turned off. Therefore, if the threshold of the power-off elapsed time is set to 4 hours as in the present embodiment, automatic initialization of the sub control is performed at the start of business the next day, and it is ensured that the number of games has been reduced. To start the game. However, the threshold value of the power-off elapsed time is not limited to four hours, and can be set arbitrarily as long as the game information can be automatically initialized at the time of opening the store, for example.

  By performing the above-mentioned automatic initialization processing of game information, when returning from power failure for a predetermined time, game information (the number of digested games etc.) is automatically reset, and the occurrence of the deferred state of game information is assured Can be prevented. As a result, it is possible to prevent the occurrence of unfairness of the game. Further, this process eliminates the need for the initialization process manually performed by the store clerk at the time of opening the store, which can reduce the burden on the store clerk.

[Subtraction display process of the number of remaining periodic games]
In the pachislot 1 of the present embodiment, during normal gaming, the number of remaining games in the normal game until the transition effect game starts in the current cycle (hereinafter referred to as “the number of remaining periodic games”) is displayed on the liquid crystal screen of the liquid crystal display device 11 Ru. Then, along with the normal game, the number of remaining periodic games displayed on the liquid crystal display device 11 is also displayed by subtraction (countdown display). However, in the normal game, if the game is reduced by 1 cycle, the reduced game interval is set to 1 game when the game is reduced by displaying the reduced number of reduced games in a group. Depending on the number, the subtraction display time may be significantly different, which may give the game a sense of pause.

  Therefore, in the present embodiment, in the case of winning the cycle shortening lottery in the normal game and collectively displaying the remaining cycle games by the number of reduced games collectively, the number of remaining cycle games is determined according to the number of shortened games won. Change the subtraction display interval (subtraction game number interval) of. Specifically, in the present embodiment, a value obtained by adding “1” to the quotient obtained by dividing the winning number of reduced games by “30” is set as the subtraction display interval of the remaining number of periodic games.

  In this case, when the number of shortened games won is less than 30 games, the subtraction display interval of the remaining number of periodic games is “1”, and the remaining number of periodic games is displayed by subtraction at one game interval. For example, when the number of remaining periodic games wins 20 games at the timing of 100 games, the number of remaining periodic games is "100", "99", "98", ..., "81", "80" Is displayed in the form of

  On the other hand, when the number of shortened games won is 30 or more, the subtraction display interval of the remaining number of periodic games is “2” or more, and the remaining number of periodic games is displayed by subtraction at an interval of 2 or more. For example, when the number of reduced games is “70”, the subtraction display interval of the remaining number of periodic games is “3” (“2” (quotient of 70/30) + “1”). Therefore, for example, when the number of remaining periodic games wins 70 games at the timing of 100 games, the number of remaining periodic games is "100", "97", "94", ..., "31". , And displayed in the form of "30". Note that if the subtraction display interval “3” is displayed from the remaining period game number “31”, the remaining period game number is a value (“28”) less than the remaining period game number “30” actually remaining. In such a case, the number of remaining periodic games "30" is displayed next to the number of remaining periodic games "31".

By performing the above-described subtraction display processing of the remaining periodic game number, the subtraction display time of the remaining periodic game number can be made approximately the same time regardless of the winning short game number. As a result, even if the normal game is progressed while performing the subtraction display of the remaining periodic game number, the feeling of extension during the normal game is lost, and the game can be advanced without making the player wait more than necessary. The method of calculating the subtraction display interval of the remaining number of periodic games is not limited to the above-described example, and the subtraction display time of the remaining number of periodic games can be made approximately the same time regardless of the number of shortened games won. Any method can be used as long as it is a method of calculating the display interval. For example, you may use values other than "30" as a value which divides the number of shortening games won.
By the way, in recent years, as a condition for transitioning the gaming state to a state advantageous to the player (for example, a state called an ART state or a pseudo BB state), the game digestion of a predetermined number of games (for example, the number of ceiling games etc.) Gaming machines exist. In such a gaming machine, the game digest status (the number of remaining games) is displayed on the liquid crystal display device, and a predetermined condition is established during the game digest period of the predetermined number of games, and the number of remaining games is summarized for a plurality of games. In the case of subtraction display, when the remaining game number is displayed by subtraction instantly, the player may not notice that the remaining game number has been subtracted. Also, in this case, when the number of remaining games is decremented by one and displayed, if the number of games to be collectively subtracted is large, the time until the change (subtraction) display process for the number of remaining games is completed increases. There is a possibility that a feeling of elongation occurs during the game, which may cause the player to get bored.
The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a gaming machine having a notification (display) function of the game digest status (the number of remaining games). It is to provide a technology capable of advancing a game without giving the player a sense of protraction.
And, according to the gaming machine of the present invention, it is possible to advance the game without giving the player a sense of extension during the game when the notification (display) operation of the game digest status (the number of remaining games) is operated.

[On / off control processing of MAX bet button]
In the present embodiment, as described above, in the 2 MB flag state (RT1 gaming state) or the 3 MB flag state (RT2 gaming state), the total number of medals stored in the credit and the current medal insertion number If the number of cards is less than three, even if the player presses the MAX bet button 21, the operation is treated as invalid.

  Therefore, in the present embodiment, the LED provided on the MAX bet button 21 is turned on / off in synchronization with the process of determining whether the player has made a pressing operation on the MAX bet button 21.

  Specifically, in the inter-MB flag state (non-MB state), the total number of medals (one or more) stored in the credit and the current medal insertion number (two or less) is less than three. When the player presses the MAX bet button 21 in a situation (when the pressing operation of the MAX bet button 21 becomes invalid), the LED provided on the MAX bet button 21 is turned off. On the other hand, in the inter-MB flag state (non-MB state), the game is performed in a situation where the total number of medals (one or more) stored in the credit and the current medal insertion number (two or less) is three or more. When the user performs the pressing operation of the MAX bet button 21 (when the pressing operation of the MAX bet button 21 is enabled), the LED provided on the MAX bet button 21 is lighted.

  Furthermore, in the present embodiment, even in the MB gaming state, the LED provided on the MAX bet button 21 is turned on / off in synchronization with the process of determining whether the MAX bet button 21 is pressed by the player. . Specifically, the player presses the MAX bet button 21 in a situation where the total number of medals (one or more) and the current number of medals inserted (one or less) stored in the credit is less than two. When the operation is performed (when the pressing operation of the MAX bet button 21 becomes invalid), the LED provided on the MAX bet button 21 is turned off. On the other hand, in a situation where the total number of medals (one or more) stored in the credit and the current number of medals inserted (one or less) is two or more, the player presses the MAX bet button 21. If it is determined that the pressing operation of the MAX bet button 21 is enabled, the LED provided on the MAX bet button 21 is lighted.

  In the on / off control process of the LED provided on the MAX bet button 21 described above, the LED on / off determination process is performed using the MAX bet button on / off determination table described in FIGS. 61 and 62. .

  When the on / off control process of the LED provided to the MAX bet button 21 described above is adopted, the LED provided to the MAX bet button 21 is also extinguished when the pressing operation of the MAX bet button 21 becomes invalid, so MAX A player who has no knowledge of the game can be notified in an easy-to-understand manner that the pressing operation of the bet button 21 is invalidated. In this case, even a player without knowledge of the game can play the game with ease.

[Process for generating random value for effect]
In the pachi slot 1 of the present embodiment, the effect random number values (0 to 32767) used in the various lottery processes performed by the sub control circuit 101 are generated on software. Here, a method of generating a random number for effect (random number for lottery) will be described.

(1) Various random numbers and various prime numbers used in generation process of effect random number values First, in the present embodiment, three random numbers of 16 bits (2 bytes: -32767 to 32767) necessary for generating effect random number values A random number (a first random number random number, a second random number random number and a third random number random number) and a 16-bit selective random number are prepared. The first lottery random number, the second lottery random number, and the third lottery random number are respectively stored in a first lottery random number storage area, a second lottery random number storage area, and a third lottery random number storage area provided in the sub RAM 103. Also, the selected random number is stored in a selected random number storage area provided in the sub RAM 103.

  Furthermore, in this embodiment, for the first random number for the first random number, and for the second random number, the first random number, the second random number, and the third random number are updated using 32 bits (4 bytes: 0 to 4294967295). A prime number and a prime number for a third lottery random number are prepared. In addition, a 32-bit prime number for selection random number is also prepared to update the selection random number. The first lottery random number prime number, the second lottery random number prime number, the third lottery random number prime number and the selection random number prime number are stored in the ROM cartridge substrate 86.

  The first random number prime number, the second random number random number prime number, the third random number random number prime number and the selected random number prime number are fixed values, for example, the first random number random number prime number is "443", and the second random number prime number is The prime number for random number selection may be “71171”, the prime number for third random number generation may be “5024141”, and the prime number for selection random number may be “375511”.

(2) Update process of various random numbers In this embodiment, the selected random number, the first lottery random number, the second lottery random number, and the third lottery random number are selected prime numbers for the selected random number, Each random number is updated by performing predetermined arithmetic processing using the first random number prime number, the second random number random number prime number, and the third random number random number prime number.

  Specifically, each 16-bit random number is multiplied by the corresponding 32-bit prime number, and the multiplication result is type-converted to 16-bit data (only the 16-bit data on the trailing side of the multiplication result is left) (Each random value in the range of -32767 to 32767)) Calculates the absolute value of the type-converted data. Thereby, each random number is updated in the range of 0 to 32767. Then, the calculation result of the absolute value (random number after update) is stored in the corresponding random number storage area, and the update process of each random number is completed. For example, in the update process of the first lottery random number, first, the 16-bit first lottery random number is multiplied by the 32-bit first lottery random number prime number, and the multiplication result is type-converted to 16-bit data. Then, the absolute value of the converted data is calculated, and the calculation result is stored in the first lottery random number storage area as the updated first lottery random number. Note that the initial value of each random number is the value at power-on, and is the value at reset (“−1”). When the value of each of the updated selected random number, the first lottery random number, the second lottery random number, and the third lottery random number becomes “0”, “1” is added to each random number (not Shown). In this embodiment, since the update operation of the random number is performed by the multiplication method as described above in the present embodiment, when the update operation result is “0”, all subsequent update operation results of the random number are also “0”. This is to avoid the problem that However, in the update process of each random number performed in generation and acquisition processing of the effect random number described later, since “0” as the effect random number generated is a valid value, “1” is added to each random number. There is no processing to add.

(3) Generation and Acquisition Process of Effect Random Number In the present embodiment, whenever the lottery process is executed in the sub control circuit 101, generation and acquisition process of effect random number is performed.

  In the generation and acquisition process of the effect random number, first, the above-described update process (predetermined arithmetic process) is performed on the selected random number to update the selected random number. Next, the updated selected random number is divided by "4" to calculate the remainder.

  Next, a predetermined lottery random number is selected from among the first lottery random number, the second lottery random number, and the third lottery random number based on the remaining value. In the present embodiment, as shown in the flowchart of random number acquisition processing in FIG. 84 described later, for example, when the remainder is “0” or “1”, the first lottery random number is selected and the remainder is “2”. In the case, the second lottery random number is selected, and in the case where the remainder is “3”, the third lottery random number is selected.

  Next, the above-described update process is performed on the selected predetermined random number to update the predetermined random number. Then, the updated predetermined random number (0 to 32767) is acquired as a random value for effect.

  In the present embodiment, the effect random number is generated and acquired as described above. When the effect random number value is generated by the above method, it is possible to cope with a lot of lottery processing by one type of random number update processing (predetermined operation processing). Further, in the present embodiment, since the effect random number value is updated and generated using a prime number, it is possible to easily cope with the output ball change specification for each content by adjusting the prime number.

  In addition, the production | generation method of the random number value for presentation is not limited to the example mentioned above, For example, it can change suitably according to the specification of a presentation, ball-out specification, etc. For example, in the method of selecting lottery random numbers based on the value of the remainder described above, the correspondence between the value of the remainder and the type of the lottery random number to be selected can be arbitrarily changed according to the ball specifications and the like. Also, the numerical value for dividing the selected random number is not limited to "4", and can be changed as appropriate. Furthermore, although the example which used three types of lottery random numbers was demonstrated in the said example, this invention is not limited to this, You may make it use two types or four or more types of lottery random numbers. In this case, according to the number of lottery random numbers to be used, the selection method of lottery random numbers based on the selected random numbers can also be appropriately changed.

[Various penalty processing]
The pachislot 1 according to the present embodiment has a function of giving a penalty, for example, when a push button navigation of a stop button, a push command rule defined in advance or the like is ignored, or an illegal action or the like is detected. Here, various types of penalty processing performed in the sub control circuit 101 will be described.

  In this embodiment, the on / off state of the penalty flag, the value of the penalty counter (the number of times of penalty) and the number of penalty games are provided as determination parameters of whether or not to perform the penalty process. Note that these determination parameters are stored in the sub RAM 103.

  Then, basically, these determination parameters are properly used according to the subject to which the penalty is imposed. Specifically, the penalty flag is used when imposing a penalty in the directly-on top lottery performed in the start waiting state (fixed screen state) of the simulated BB game. The penalty counter is used to penalize race win rate data. Further, the number of penalty games is used when imposing a penalty on the transition processing to the simulated BB game and the cycle shortening lottery processing in the normal game.

  In the case of using a plurality of determination parameters as described above in the penalty measure, a penalty can be appropriately imposed in accordance with the gaming characteristics of the gaming machine, the gaming state, and the situation of the gaming machine. While deterring, it is possible to make the player feel as unpleasant as possible (do not give an excessive penalty).

(1) Penalty Processing Based on Penalty Flag In the present embodiment, if the penalty flag is on in the wait state for waiting for the start of the simulated BB game (“wait for BB operation” described later), the number of AT games is directly added. At the time of lottery processing, the directly added lottery table (see FIGS. 47B and 47C) dedicated to the time when the penalty flag is ON is referred to.

  At this time, for example, if the current sub-playing state is the transition rendering state ("during the race" described later), it is assumed that the internal winning combination is other than the internal winning combination relating to "reach eye lip" and "decision combination". , AT game number "without additional" wins. Also, for example, when the current sub-gaming state is AT gaming ("AT in progress" described later) or in a state where pseudo BB gaming is started in AT gaming ("AB in BB" described later), internal winning combination Regardless of the type of the game, the AT game number "No extra" wins. That is, when the penalty flag is in the on state, the benefit of adding the number of AT games is almost lost.

  The penalty flag is generated, for example, when an abnormality occurs in a command sequence (order of receiving command data) in a predetermined sub-playing state ("raceing", "general middle BB", or "at middle" described later), It becomes an ON state, when pushing order navigation (the below-mentioned "BB entering navigation") and pushing order rule of the stop button at the time of pseudo BB game entry are disregarded. On the other hand, the penalty flag is reset (turned off), for example, at the end of the AT game or when the simulated BB game started during the AT game is ended.

  The on / off control of the penalty flag described above is performed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a means (penalty flag setting means) for on / off controlling the penalty flag. Further, the additional control lottery process of the number of AT games in the waiting state for the start of the pseudo BB game to be subjected to the penalty process based on the penalty flag is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a means (informing game number addition determination means) for performing a direct addition lottery process of the number of AT games.

(2) Penalty Processing Based on the Number of Penalty Games The number of penalty games is the number of games indicating the execution period of the penalty processing. In the present embodiment, when the number of penalty games is set to a value of “1” or more, for example, the pushing order navigation (bell navigation) performed at the time of winning of a predetermined internal winning combination (“pushing order bell”). Penalty processing such as prohibition, prohibition of cycle shortening lottery processing during normal gaming, prohibition of transition processing to a simulated BB game (BB rush determination processing described later), and the like are performed.

  In the present embodiment, the sub gaming state is a normal state ("generally described later"), a transition effect state ("raced" described later), or a wait state for start of simulated BB gaming ("BB operation wait" described later) If the small winning combination according to “push order bell” (CT bell) is won internally and the first stop operation is performed on the stop button other than the left stop button 19L (irregular press), the present The number of penalty games is added by "5" to the set number of penalty games. In the present embodiment, the upper limit of the number of penalty games is “10”, and the number of penalty games is set to the upper limit “10” when the number of penalty games exceeds “10” by the addition process of the number of penalty games. Be done.

  On the other hand, the sub gaming state is a normal state (described below "generally") or a waiting state for starting a simulated BB game (described later "BB operation waiting"), and a small winning combination associated with "push order bell" (CT bell) When the internal winning is performed and the first stop operation is performed on the left stop button 19L, the number of penalty games is decremented by one. Further, in the present embodiment, the number of penalty games is also decremented by “1” when the first stop operation is performed in the AT state (“in-AT” described later). The number of penalty games is reset at the end of the AT game (final game) or at the end of the simulated BB game started during the AT state (at the end of the "AT during BB" game (see below). 0) is set).

  In the penalty process based on the number of penalty games described above, by performing a general penalty process of prohibition of push order navigation (Bell navigation), it is suggested to the player that the gaming state is under penalty, according to the gaming state Can impose a penalty. Therefore, in this embodiment, it is possible to instruct the player to play the game according to the game rule while suppressing the illegal gain acquisition of the player by this penalty process.

  The sub-control circuit 101 executes the penalty process based on the number of penalty games described above. That is, in the present embodiment, the sub control circuit 101 is also a unit that adds the number of penalty games (penalty game number addition unit), and a unit that performs predetermined penalty processing based on the number of penalty games (penalty execution unit) Double as well.

(3) Penalty processing based on the penalty counter The penalty counter is a counter that counts the number of unauthorized operations (such as ignoring push order rules) performed during a predetermined game period, and it is determined that an unauthorized operation has been performed. The value of the penalty counter is incremented by one. Then, in the present embodiment, when the value of the penalty counter (number of times of penalty) is “1” or more, the race win rate data rewriting lottery (during penalty) table (see FIG. 40) is referred to and the value of the penalty counter is set. In response, the rewrite lottery of the probability of winning AT (race win rate) is performed.

  At this time, as the value of the penalty counter increases, the probability that the race win rate is rewritten to a value lower than the current race win rate increases. In this embodiment, as shown in the race win rate data rewrite lottery (during penalty) table of FIG. 40, the probability that the race win rate is rewritten to 0% increases as the value of the penalty counter increases.

  Further, in the present embodiment, when winning the race win rate data rewrite lottery and the race win rate is rewritten to 0% (when the right of the AT lottery becomes treated to disappear), the “race continuous loss counter” described later ( The addition process of the value of the ceiling counter (the number of continuous cycles without AT) is also prohibited. That is, when the value of the penalty counter is “1” or more and the race win rate is rewritten to 0%, the number of ceiling cycles of the normal game (the AT non-winning consecutive cycle) that becomes AT winning is decided as a penalty The AT wins when the number of times reaches 10) is substantially extended.

  In the present embodiment, the sub gaming state is a normal state ("generally in progress" described later) or a transition effect state ("in progress" described later), and the small winning combination according to the "push order bell" (CT bell) is When the internal win is performed and the first stop operation is performed on the stop button other than the left stop button 19L (irregular pressing), “1” is added to the currently set value of the penalty counter. Ru. Further, in the present embodiment, the upper limit of the penalty counter is “10”, and when the value of the penalty counter exceeds “10” by this addition processing, the value of the penalty counter is set to the upper limit “10”. .

  On the other hand, in the present embodiment, the value of the penalty counter is reset (“0” is set) when the sub gaming state shifts to the transition rendering state (“during race” described later) (when the race rendering occurs) Will be In addition, the value of the penalty counter is also reset at the end of the AT game (final game) or at the end of the simulated BB game started during the AT state (at the end of the "AT during BB" game described later) .

  By performing the penalty process based on the value of the penalty counter described above, it is possible to rewrite the race result (AT lottery result) with a predetermined probability corresponding to the number of incorrect operations. Therefore, when the value of the penalty counter is small (when the number of incorrect operations is small), the possibility of erroneous operation is high, so the AT occurrence rate may be set to a value close to the probability of a state without a penalty. it can. On the other hand, when the value of the penalty counter is large (when the number of unauthorized operations is large), there is a high possibility that the unauthorized operation has been performed intentionally, so the probability of decreasing the AT occurrence rate (including 0%) is increased. be able to. That is, in the present embodiment, an appropriate penalty can be imposed on the player according to the degree of unauthorized operation.

  The penalty process based on the value of the penalty counter described above is performed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 counts means for counting the number of times the unauthorized operation has been performed (penalty number counting means), and means for performing predetermined penalty processing based on the value of the penalty counter (penalty executing means) It also doubles.

<Description of operation of sub control circuit>
Next, contents of various processes (tasks) executed by the sub CPU 102 of the sub control circuit 101 using a program will be described with reference to FIGS. Note that various tables necessary for various processes of the sub CPU 102 described below are stored in the ROM cartridge substrate 86, and various control flags, various control counters, various storage areas, and the like are provided in the sub RAM 103.

  Further, in the various processes of the sub CPU 102 described below, various types of the sub gaming state in the previous unit game (game), the sub gaming state in the current unit game, and the sub gaming state in the next unit game are managed Ru. In the following, the sub gaming state in the previous unit game is referred to as "playing state (previous)", the sub gaming state in the current unit game is referred to as "playing state (current)", and the sub gaming state in the next unit game is It is called "playing state (next time)".

  Furthermore, hereinafter, the case where the sub gaming state is the normal state is referred to as "general medium", and the pseudo BB state when the pseudo BB game is started in the normal state is referred to as "general medium BB". The case where the sub gaming state is the transition rendering state is referred to as "in the race", and the case where the sub gaming state is the AT preparation state is referred to as "the AT preparation". Further, the case where the sub gaming state is the AT state is referred to as "AT in progress", and the pseudo BB state in the case where the pseudo BB game is started in the AT state is referred to as "AT mid BB". Furthermore, in the present embodiment, the case where the sub gaming state is the W chance state is referred to as "in the W chance", and the case where the sub gaming state is the additional challenge state is referred to as the "additional challenge in progress".

[Sub CPU power on process]
First, power-on processing of the sub CPU 102 will be described with reference to FIG. The start request process in the power-on process shown in FIG. 77 is a process for requesting the OS to start various tasks necessary for the pachislot 1 function.

  First, the sub CPU 102 performs an initialization process (S211). In this process, the sub CPU 102 executes processes such as initialization of the CPU and internal devices and initialization of peripheral ICs.

  Next, the sub CPU 102 acquires information on the power failure occurrence time stored in the power failure occurrence time storage area provided in the sub RAM 103 (S212). Next, the sub CPU 102 acquires current time information from the RTC 108 (S213). Next, the sub CPU 102 calculates an elapsed time by subtracting the power failure occurrence time (the latest power failure occurrence time) acquired in S212 from the current time acquired in S213 (S214).

  Next, based on the elapsed time calculated in S214, the sub CPU 102 determines whether four hours or more have elapsed since the last power failure (S215). In S215, when the sub CPU 102 determines that four hours or more have not elapsed since the most recent power failure (when the determination in S 215 is NO), the sub CPU 102 performs the processing of S 217 described later.

  On the other hand, when the sub CPU 102 determines in S215 that four hours or more have passed since the last power failure (when the determination in S215 is YES), the sub CPU 102 performs initialization command reception processing (S216). In this process, for example, a reset process of various game information (for example, the number of digested games, etc.) is performed. That is, in the present embodiment, initialization processing of various data controlled by the sub CPU 102 is automatically performed, for example, by power-on processing at the start of business of the game arcade. The details of the initialization command processing will be described later with reference to FIG. 93 described later.

  After the process of S216 or when the determination of S215 is NO, the sub CPU 102 makes a start request of the lamp control task (see FIG. 79 described later) as a start request of the sub task (S217). Next, the sub CPU 102 requests activation of the sound control task (see FIG. 80 described later) (S218). Then, the sub CPU 102 makes an activation request for the mother task (see FIG. 81 described later) (S219).

  As described above, in the power-on process of the present embodiment, when the elapsed time from the occurrence of power interruption is four hours (predetermined time) or more, the process at the time of initialization command reception is performed, and this process is performed. It is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as means for initializing various game information (power on initialization means) when an elapsed time from the occurrence of power interruption is equal to or longer than a predetermined time.

[Disruptive detection processing]
Next, the power failure detection process of the sub CPU 102 will be described with reference to FIG. This process is, for example, an interrupt process which is executed when a power-off state, which occurs when the power of the pachi slot 1 is turned off, is detected.

  Upon detection of a power failure, sub CPU 102 acquires current time information from RTC 108, and stores the current time information as a power failure occurrence time information in a power failure occurrence time storage area provided in sub RAM 103. (S221).

Lamp control task
Next, the lamp control task performed by the sub CPU 102 will be described with reference to FIG. In the above-described power-on process of sub CPU 102 (see FIG. 77), when the start command of the lamp control task is generated from the OS in response to the start request of the lamp control task by sub CPU 102, the lamp control is performed according The task is performed.

  First, the sub CPU 102 performs timer interrupt initialization processing (S231). Next, the sub CPU 102 performs lamp control related data initialization processing (S232).

  Next, the sub CPU 102 performs timer interruption waiting processing (S233). Next, the sub CPU 102 executes an execution process of the sound control task (see FIG. 80 described later) (S234).

  Next, the sub CPU 102 performs a lamp data analysis process (S235). In this process, for example, the sub CPU 102 analyzes (determines) whether or not there is an LED control request with respect to various LEDs (LED group 85, LED for lighting MAX bet button, etc.) provided on the front door 2b. .

  Next, the sub CPU 102 performs lamp effect execution processing (S236). If it is determined that there is an LED control request by the analysis processing of S235, the sub CPU 102 creates predetermined LED control data in response to the LED control request in the processing of S236, and corresponds the created LED control data. Transmit to the LED board. On the other hand, if it is determined in the analysis process of S235 that there is no LED control request, the sub CPU 102 creates LED update data as LED control data in the process of S236, and corresponds the LED control data to the corresponding LED board Send to etc.

  Then, after the processing of S236, the sub CPU 102 returns the processing to S233, and repeats the processing of S233 and subsequent steps.

[Sound control task]
Next, the sound control task performed by the sub CPU 102 will be described with reference to FIG. In the above-described power-on process of sub CPU 102 (see FIG. 77), when the start command of the sound control task is generated from the OS in response to the start request of the sound control task by sub CPU 102, the sound control is performed according to the procedure described below. The task is performed.

  First, the sub CPU 102 performs initialization processing of sound control related data (S241). Next, the sub CPU 102 performs an execution process of the lamp control task (see FIG. 79) (S242).

  Next, the sub CPU 102 performs sound data analysis processing (S243). Next, the sub CPU 102 performs a sound effect execution process (S244). Then, after the processing of S244, the sub CPU 102 returns the processing to S242, and repeats the processing of S242 and thereafter.

[Mother task]
Next, with reference to FIG. 81, a mother task performed by the sub CPU 102 will be described. In the above-described power-on process of the sub CPU 102 (see FIG. 77), when an instruction to start the mother task is issued from the OS in response to the start request of the mother task by the sub CPU 102, the mother task is executed according to the procedure described below. Be done.

  First, the sub CPU 102 makes an activation request for the main task (see FIG. 82 described later) (S251). Next, the sub CPU 102 makes an activation request for the main board communication task (see FIG. 85 described later) (S 252). Then, the sub CPU 102 makes an activation request for the animation task (see FIG. 86 described later) (S253).

[Main task]
Next, the main task performed by the sub CPU 102 will be described with reference to FIG. In the above-described mother task of sub CPU 102 (see FIG. 81), when a start instruction of the main task is issued from the OS in response to the start request of the main task by sub CPU 102, the main task is executed according to the procedure described below. Ru. In the present embodiment, the main task is executed in a cycle of about 4 msec.

  First, the sub CPU 102 performs a vertical synchronizing signal (VSYNC) interrupt initialization process (S261). Next, the sub CPU 102 performs VSYNC interrupt waiting processing (S262). Next, the sub CPU 102 performs a drawing process (S263).

  Next, the sub CPU 102 performs a random number update process (S264). In this processing, the sub CPU 102 performs update processing of selected random numbers and various lottery random numbers (first lottery random number to third lottery random number) for generating a random number for effect. The details of the random number update process will be described later with reference to FIG. 83 described later. Then, after the process of S264, the sub CPU 102 returns the process to S262, and repeats the processes after S262.

[Random number update process]
Next, with reference to FIG. 83, the random number updating process performed in S264 in the flowchart of the main task (see FIG. 82) will be described. In the present embodiment, the random number update process is executed in a cycle of about 4 msec.

  In the random number update process, the sub CPU 102 performs an update process of various random numbers stored in various random number storage areas provided in the sub RAM 103 (S271). In this process, the sub CPU 102 selects a 32-bit selection random number prime number corresponding to each of the 16-bit selection random number, the first random number selection random number, the second random number selection random number, and the third random number selection random number, and a first random number random number prime number The predetermined arithmetic processing described above is performed using the second lottery random number prime number and the third lottery random number prime number, and each random number is updated.

  Specifically, sub CPU 102 multiplies each 16-bit random number by the corresponding 32-bit prime number, and converts the result of the multiplication into 16-bit data (16 bits of data on the trailing side of the multiplication result) Leaving only (each random value in the range of -32767 to 32767), and calculating the absolute value of the type-converted data. Thereby, each random number is updated in the range of 0 to 32767. When the value of each of the updated selected random number, the first lottery random number, the second lottery random number, and the third lottery random number becomes “0”, “1” is added to each random number (not Shown). However, in the update process of each random number performed in generation and acquisition processing of the effect random number described later, since “0” as the effect random number generated is a valid value, “1” is added to each random number. There is no processing to add.

  Then, after the processing of S271, the sub CPU 102 ends the random number update processing, and shifts the processing to S262 of the main task (see FIG. 82).

  As described above, the sub-control circuit 101 executes the random number updating process of the present embodiment. That is, in the present embodiment, the sub control circuit 101 doubles as a means (random number update means) for updating various random numbers in a predetermined cycle.

[Random number acquisition process]
Next, random number acquisition processing will be described with reference to FIG. In the present embodiment, each kind of lottery processing (for example, race information lottery processing, pseudo BB lottery processing, direct overlay lottery processing, cycle shortening lottery processing, push order navigation lottery processing, etc. described later) by the sub CPU 102 is performed. Then, a program for random number acquisition processing described below is called and executed.

  First, the sub CPU 102 updates the 16-bit selection random number stored in the selection random number storage area using the 32-bit selection random number prime number, and generates the updated selection random number to generate the effect random number value. It is acquired as a selected random number (S281). Note that the update process of the selected random number in S281 is performed in the same manner as the update process of each random number described in the random number update process of FIG. 83, but the correction process when the value of the selected random number is "0" (" 1) The process of adding is not performed.

  Next, the sub CPU 102 divides the selected random number acquired in S281 by "4" to calculate the remainder (S282). Next, the sub CPU 102 determines whether the value of the remainder is "0" or "1" (S283).

  In S283, when the sub CPU 102 determines that the value of the remainder is "0" or "1" (when the determination in S283 is YES), the sub CPU 102 stores the 16-bit ones stored in the first lottery random number storage area. The first lottery random number is updated using a 32-bit first lottery random number prime number, and the updated first lottery random number is acquired as an effect random number value (0 to 32767) used in the callee's lottery process ( S284). Note that the update process of the first lottery random number in S284 is performed in the same manner as the update process of each random number described in the random number update process of FIG. 83, but the value of the first lottery random number becomes “0”. Correction processing (processing to add “1”) is not performed. Then, after the process of S284, the sub CPU 102 ends the random number acquisition process, and returns the effect random number value acquired in S284 to the callee lottery process.

  On the other hand, when the sub CPU 102 determines in S283 that the value of the remainder is not "0" or "1" (when the determination in S283 is NO), the sub CPU 102 determines whether the value of the remainder is "2". (S285).

  In S285, when the sub CPU 102 determines that the value of the remainder is “2” (when the determination in S 285 is YES), the sub CPU 102 stores the 16-bit second lottery random number stored in the second lottery random number storage area. Is updated using the 32-bit second random number for prime number, and the updated second random number is obtained as a rendering random value (0 to 32767) used in the callee's lottery process (S286). Although the update process of the second lottery random number in S286 is performed in the same manner as the update process of each random number described in the random number update process of FIG. 83, the value of the second lottery random number becomes “0”. Correction processing (processing to add “1”) is not performed. Then, after the process of S286, the sub CPU 102 ends the random number acquisition process and returns the effect random number value acquired in S286 to the call-out lottery process.

  On the other hand, when the sub CPU 102 determines in S285 that the value of the remainder is not "2" (the value of the remainder is "3") (when S285 is NO), the sub CPU 102 stores the third lottery random number. A 16-bit third lottery random number stored in the area is updated using a 32-bit third lottery random number prime number, and the updated third lottery random number is used in the lottery process of the call destination to use the effect random number value ( It acquires as 0-32767) (S287). Although the update process of the third lottery random number in S287 is performed in the same manner as the update process of each random number described in the random number update process of FIG. 83, the value of the third lottery random number becomes “0”. Correction processing (processing to add “1”) is not performed. Then, after the processing of S287, the sub CPU 102 ends the random number acquisition processing, and returns the effect random number value acquired in S287 to the call-out lottery processing.

  In the present embodiment, as described above, the selection random number and various lottery random numbers for generating the effect random number are updated not only in the random number update process performed in a cycle of about 4 msec, but also in the random number acquisition process. Be done.

  As described above, the sub-control circuit 101 executes the random number acquisition processing of the present embodiment. That is, in the present embodiment, the sub control circuit 101 doubles as means for generating effect random number values (random number generation means for lottery). Further, in the random number acquisition process described above, the selected random number is updated using the prime number for selected random number, and this process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as means (selected random number updating means) for updating the selected random number when generating the effect random number value. Further, in the random number acquisition process described above, a predetermined random number is selected based on the updated selected random number, and this process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as means (lottery random number selection means) for selecting a predetermined random number based on the updated selected random number. Furthermore, in the random number acquisition process described above, the effect random number value is acquired by updating the selected lottery random number, and this process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a means (random number value acquisition means for lottery) for acquiring the effect random number value by updating the selected random number.

Main board communication task
Next, the main board communication task performed by the sub CPU 102 will be described with reference to FIG. In the above-described mother task of sub CPU 102 (see FIG. 81), when the start instruction of the main board communication task is generated from the OS in response to the start request of the main board communication task by sub CPU 102, the main board follows the procedure described below. A substrate communication task is performed.

  First, the sub CPU 102 performs a communication message queue initialization process (S291). Next, the sub CPU 102 performs a check process of the received command (S292). In this process, the sub CPU 102 extracts the type and the like of the received command.

  Next, the sub CPU 102 determines whether a valid command has been received (S293). In the present embodiment, the command type is associated with any of 16 types of codes from "01H" to "10H", and when the game is operating normally, the command type is "01H" to Become one of "10H". Therefore, in the process of S293, if the code of the type of the received command is any one of "01H" to "10H", the sub CPU 102 determines that the command type is valid (defined type). On the other hand, if the code of the command type is other than "01H" to "10H", the sub CPU 102 determines that some abnormality (including cheating) has occurred during the game, and the command type is invalid. judge.

  In S293, when the sub CPU 102 determines that a valid command has not been received (S293 is NO), the sub CPU 102 returns the process to S292 and repeats the processes in and after S292. On the other hand, when the sub CPU 102 determines in S293 that a valid command has been received (S293 returns YES), the sub CPU 102 generates various game information based on the received command, and the generated various game information Are stored in the sub RAM 103 (S294).

  Next, the sub CPU 102 performs command analysis processing (S295). The details of the command analysis process will be described later with reference to FIG. 89 described later.

  Next, the sub CPU 102 performs command sequence check processing (S296). In this process, the sub CPU 102 determines whether or not there is an abnormality in the reception order (sequence) of the received command, and when there is an abnormality in the sequence, performs a predetermined penalty process. The details of the command sequence check process will be described later with reference to FIG. 90 described later. Then, after the process of S296, the sub CPU 102 returns the process to S292 and repeats the processes after S292.

[Anime task]
Next, with reference to FIG. 86, an animation task performed by the sub CPU 102 will be described. In the above-described mother task of sub CPU 102 (see FIG. 81), when an animation task activation command is generated from the OS in response to an animation task activation request from sub CPU 102, the animation task is executed according to the procedure described below. Ru. In the present embodiment, the animation task is executed in a cycle of about 33 msec.

  First, the sub CPU 102 checks the change from the previous game information of the current game information generated in the main board communication task (S301). Next, the sub CPU 102 performs object control processing (S302).

  Next, the sub CPU 102 performs animation task management processing (S303). The details of the animation task management process will be described later with reference to FIG. 87 described later. Then, after the processing of step S303, the sub CPU 102 returns the processing to step S301, and repeats the processing of step S301 and subsequent steps.

  As described above, each process of the animation task of the present embodiment is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as means (image display control means) for controlling the image display operation based on the determined effect.

[Animation task management processing]
Next, with reference to FIG. 87, an animation task management process performed in S303 in the flowchart of the animation task (see FIG. 86) will be described.

  First, the sub CPU 102 performs effect sequence update processing (S311). In this process, the sub CPU 102 mainly updates the effect timeline (the index of the reproduced image frame).

  Next, the sub CPU 102 performs time frame update processing (S312). In this process, the sub CPU 102 determines whether or not a predetermined event (for example, start event, rotation start event, reel stop event, display event, etc.) has occurred, and when the event occurs, uses the start position of the rendering sequence as the generation event. While changing to the corresponding position, clear the presentation timeline. Further, in this process, when there is call sign data associated (linked) with the image frame (time frame) of the presentation sequence data in the present presentation timeline, the call sign data is provided in the sub RAM 83. Stored in the call sign storage area.

  Next, the sub CPU 102 acquires call sign data associated with the time frame (S313). When the call sign data associated with the time frame is not stored in the call sign storage area, the call sign data is not acquired in this process.

  Next, the sub CPU 102 determines whether the call sign data acquired in S313 includes a sushi neta symbol rewrite instruction request (S314).

  In S314, when the sub CPU 102 determines that the call sign data does not include a sushi neta symbol rewrite instruction request (when the determination in S 314 is NO), the sub CPU 102 performs the process of S 316 described later. On the other hand, when the sub CPU 102 determines in S 314 that the call sign data includes a sushi neta symbol rewrite instruction request (when the determination in S 314 is YES), the sub CPU 102 processes sushi based on the acquired call sign data. Rewriting display data of the neta symbol is acquired, and rewriting drawing processing is registered (S315).

  In addition, when the data conversion generation lottery of sushi material (S802 during processing of Kappa victory _ game start in later described FIG. 127) is won at the time of processing of S315, and the display of sushi material symbol is determined. In the process of S315, a plurality of (five games worth) sushi neta symbols displayed on the liquid crystal display device 11 after the next game displayed on the liquid crystal display device 11 are simultaneously rewritten based on the rewrite display data of the sushi neta symbols. On the other hand, when the process of S315 does not win the data conversion generated lottery of the sushi material, since the rewriting display data of the sushi material symbol is not acquired in the process of S315, the sushi material symbol is not rewritten.

  After the process of S315 or when the determination of S314 is NO, the sub CPU 102 determines whether or not the cycle information (the number of remaining cycle games) of the normal game is being displayed (S316).

  In S316, when the sub CPU 102 determines that the normal game cycle information is not being displayed (S316 is NO), the sub CPU 102 ends the animation task management process, and the process is an animation task (see FIG. 86). Move to S301 of

  On the other hand, when the sub CPU 102 determines that the regular game cycle information is being displayed in S316 (when the determination in S316 is YES), the sub CPU 102 displays 5 from the display of the previous cycle information (the number of remaining cycle games). It is determined whether the image reproduction time greater than or equal to the frame has elapsed (S317). In this process, the sub CPU 102 determines whether or not the elapsed time from the previous display of the cycle information has reached the update display interval of the cycle information.

  If the update display interval of the cycle information is one frame interval, it becomes difficult for the player to visually recognize the change of the cycle information (the number of remaining cycle games). Therefore, in the present embodiment, the update display interval of the cycle information is five frames or more. I assume. However, the present invention is not limited to this, and the update display interval of the cycle information can be arbitrarily set as long as the change of the cycle information can be visually recognized by the player.

  In S317, when the sub CPU 102 determines that the image reproduction time of 5 frames or more has not elapsed from the previous display of the cycle information (when S317 is NO), the sub CPU 102 ends the animation task management process. Then, the process proceeds to S301 of the animation task (see FIG. 86). On the other hand, when the sub CPU 102 determines in S317 that the image reproduction time of 5 frames or more has elapsed from the previous display of the cycle information (when the S317 is YES), the sub CPU 102 performs cycle information display processing ( S318). In this process, the sub CPU 102 updates the regular game cycle information (the number of remaining games in the current cycle) and also determines the display mode (the mode of subtraction display of the number of remaining games). The details of the cycle information display process will be described later with reference to FIG. 88 described later.

  Then, after the processing of S318, the sub CPU 102 ends the animation task management processing, and shifts the processing to S301 of the animation task (see FIG. 86).

  As described above, S313 of the animation task management process of the present embodiment includes a sushi neta symbol rewrite request request associated with a predetermined image frame in the effect moving image displayed by the liquid crystal display device 11. Call sign data to be obtained is acquired, and this process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a unit (change command information acquisition unit) for acquiring call sign data including a sushi neta symbol rewrite instruction request in the animation task management process. In addition, in S315 of the above-mentioned animation task management process, when the rewriting display of the sushi neta symbol is decided and the call sign data including the rewriting instruction request of the sushi neta symbol is acquired, the sushi neta symbol The rewriting display is performed, and this process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a unit (additional game information change display unit) that performs a rewrite display (change display) of the sushi neta symbol based on the call sign data.

[Period information display process]
Next, with reference to FIG. 88, the period information display processing performed in S318 in the flowchart of the animation task management processing (see FIG. 87) will be described.

  First, the sub CPU 102 determines whether the value of the previous cycle counter is different from the value of the cycle counter (S321). The value of the cycle counter indicates the number of normal game games actually remaining in the current cycle (the true value of the number of remaining cycle games), and the value of the previous cycle counter is the cycle counter in the previous cycle information display process Is the value of Then, for example, when the game is transferred to the next game or the value of the cycle counter is decremented in winning the cycle shortening lottery between the previous cycle information display process and the current cycle information display process. The value of the previous cycle counter is different from the value of the cycle counter, and the determination in S321 is YES.

  In S321, when the sub CPU 102 determines that the value of the previous cycle counter does not differ from the value of the cycle counter (when the determination in S 321 is NO), the sub CPU 102 ends the cycle information display process and the animation task management process. (See FIG. 87) also ends. On the other hand, when the sub CPU 102 determines in S 321 that the value of the previous cycle counter is different from the value of the cycle counter (when the determination in S 321 is YES), the sub CPU 102 determines that the value of the previous cycle counter is the value of the display cycle counter. It is determined whether they are the same (S322). The value of the display cycle counter is the value of the number of remaining cycle games displayed on the liquid crystal screen of the liquid crystal display device 11.

  For example, if the current cycle information display process is performed immediately after the game shifts to the next game, or immediately after the value of the cycle counter is subtracted in winning the cycle shortening lottery, the previous time Since the value of the cycle counter is the same as the value of the display cycle counter, the determination in S322 is YES. Also, for example, after winning a cycle shortening lottery, cycle information during the operation of subtracting (counting down) the remaining number of cycle games displayed on the liquid crystal display device 11 at a predetermined subtraction game number interval (subtraction display interval) When the display process is performed, the value of the previous cycle counter is different from the value of the display cycle counter, and thus the determination in S322 is NO.

  In S322, when the sub CPU 102 determines that the value of the previous cycle counter is different from the value of the display cycle counter (when the determination in S322 is NO), the sub CPU 102 performs the process of S324 described later. On the other hand, when the sub CPU 102 determines in S 322 that the value of the previous cycle counter is the same as the value of the display cycle counter (when S 322 is YES), the sub CPU 102 displays the remaining displayed on the liquid crystal display device 11. A subtraction display interval (predetermined unit game number interval) is displayed when the periodic game number is displayed by subtraction (S323).

  In the process of determining the subtraction display interval in S323, for example, the value obtained by subtracting the value of the cycle counter from the value of the previous cycle counter (corresponding to the number of shortened games when winning the cycle shortening lottery) is divided by "30" A value obtained by adding “1” to the quotient obtained by the division is set as a subtraction display interval. For example, when the number of reduced games of 100 games is won in the cycle shortening lottery, the subtraction display interval is “4” (quotient of 100/30 + 1). Further, for example, when the number of shortened games won in the cycle shortening lottery is 20 games, the subtraction display interval is “1” (the quotient of 20/30 + 1).

  After the processing of S323 or when the determination of S322 is NO, the sub CPU 102 sets a value obtained by subtracting the subtraction display interval from the value of the display cycle counter to the value of the display cycle counter (S324). By this processing, the value of the display cycle counter is updated, and the number of remaining cycle games of the normal game displayed on the liquid crystal screen of the liquid crystal display device 11 is also subtracted. In addition, in the update process of the display period counter of S324 performed when S322 is NO determination, the subtraction display space | interval at the time of the last period information display process is used.

  Next, the sub CPU 102 determines whether the value of the cycle counter is equal to or more than the value of the display cycle counter (S325). In this process, the sub CPU 102 determines whether the number of remaining periodic games scheduled to be displayed on the liquid crystal screen of the liquid crystal display device 11 has become less than the true value of the number of remaining periodic games in the normal game currently actually remaining. To determine

  In S325, when the sub CPU 102 determines that the value of the cycle counter is not greater than or equal to the value of the display cycle counter (in the case of NO determination in S325), that is, the number of remaining cycle games of normal game to be displayed on the liquid crystal display device 11 is If the value of the number of remaining periodic games actually remaining is not less than the true value, the sub CPU 102 ends the periodic information display process and also ends the animation task management process (see FIG. 87). Do.

  On the other hand, when the sub CPU 102 determines in S325 that the value of the cycle counter is equal to or greater than the value of the display cycle counter (when S325 is YES), that is, the remaining cycle of normal game to be displayed on the liquid crystal display device 11. If the number of games is less than the true value of the number of remaining periodic games actually remaining, the sub CPU 102 sets the value of the period counter to the previous period counter (S326).

  Next, the sub CPU 102 sets the value of the cycle counter to the display cycle counter (S327). As a result of this processing, the true value of the number of remaining periodic games of the normal game that is actually remaining is displayed on the liquid crystal screen of the liquid crystal display device 11. That is, when the number of remaining periodic games in the normal game scheduled to be displayed on the liquid crystal display device 11 becomes a value less than the true value of the remaining periodic game numbers, the true value of the number of remaining periodic games in the normal game is the liquid crystal display device 11 Is displayed on the LCD screen. Then, after the processing of S327, the sub CPU 102 ends the cycle information display processing, and also ends the animation task management processing (see FIG. 87).

  As described above, in the cycle information display process of the present embodiment, when winning the cycle shortening lottery in the normal game, the remaining cycle game number is displayed by subtraction at a predetermined subtraction game number interval (subtraction display interval), This process is executed by the sub control circuit 101. That is, in the present embodiment, when the sub control circuit 101 wins the cycle shortening lottery in the normal game, the sub control circuit 101 subtracts the remaining cycle game number of the normal game (remaining unit game number) at a predetermined unit game number interval. It also serves as means (subtraction display control means). Further, in the above-described cycle information display processing, the subtraction game number interval at the time of subtracting and displaying the remaining number of cycle games is determined based on the winning number of reduced games, and this process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as means for determining the subtraction game number interval (subtraction display interval determination means) based on the winning short game number.

Command analysis processing
Next, with reference to FIG. 89, the command analysis processing performed in S295 in the flowchart of the main board communication task (see FIG. 85) will be described.

  First, the sub CPU 102 performs effect content determination processing (S331). In this process, the sub CPU 102 determines the effect contents according to the received data. The details of the effect content determination process will be described later with reference to FIGS. 91 and 92 described later.

  Next, the sub CPU 102 determines whether or not there is an effect determined in the effect content determination process of S331 (S332).

  In S332, when the sub CPU 102 determines that there is no determined effect (when S332 is NO), the sub CPU 102 ends the command analysis process, and the process proceeds to S296 of the main board communication task (see FIG. 85). Transfer to On the other hand, when the sub CPU 102 determines in S332 that there is a determined effect (when S332 is YES), the sub CPU 102 acquires effect sequence data (effect moving image data) based on the determined effect. (S333).

  Next, the sub CPU 102 performs a lamp data determination process (S334). In this process, the sub CPU 102 determines predetermined lamp data in accordance with the effect contents determined in S331. Next, the sub CPU 102 performs sound data determination processing (S335). In this process, the sub CPU 102 determines predetermined sound data in accordance with the effect contents determined in S331.

  Next, the sub CPU 102 registers the determined various data (S336). Then, after the processing of S336, the sub CPU 102 ends the command analysis processing, and shifts the processing to S296 of the main board communication task (see FIG. 85).

[Command sequence check process]
Next, with reference to FIG. 90, the command sequence check process performed in S296 in the flowchart of the main board communication task (see FIG. 85) will be described.

  First, the sub CPU 102 determines whether the received command is a determination target command of a command sequence (order of reception of commands) (S341).

  When the player is playing a game by normal operation, normally, in order of “BET”, “Start”, “Reel rotation start”, “Stop”, “Display of symbol combination”, and “Medal payout” (hereinafter, The operation is performed in the basic order, and the command of the type corresponding to each operation is transmitted to the sub CPU 102 in this basic order. Therefore, the determination target command in the process of S341 is a medal insertion command (BET command), a start command, a reel rotation start command, a reel stop command, a winning operation command (display command), and a payout end command. The present invention is not limited to this, and a bonus start command, a bonus end command, and the like may be included in the determination target command of the command sequence.

  In S341, when the sub CPU 102 determines that the received command is not a command sequence determination target command (S341 is NO determination), the sub CPU 102 ends the command sequence check process and performs the main board communication task ( Move to S292 of FIG.

  On the other hand, when the sub CPU 102 determines in S341 that the received command is a determination target command of a command sequence (when the determination in S341 is YES), the sub CPU 102 performs command sequence determination processing (S342). In this process, the sub CPU 102 determines whether or not the reception order of the determination target command is a predetermined order (order at the time of normal operation).

  Next, the sub CPU 102 determines whether or not there is an abnormality in the command sequence based on the result of the determination processing of S342 (S343). In S343, when the sub CPU 102 determines that the command sequence is not abnormal (S343 is NO determination), that is, when the game is performed by the normal operation, the sub CPU 102 performs the command sequence check process. The process is transferred to S292 of the main board communication task (see FIG. 85).

  On the other hand, when the sub CPU 102 determines in S343 that there is an abnormality in the command sequence (when S343 is determined as YES), that is, when it is determined that some abnormality (including cheating) has occurred during the game. The sub CPU 102 determines whether the gaming state (currently) is "general", "race", "general BB" or "AT BB" (S344).

  When it is determined in S344 that the sub CPU 102 does not satisfy the determination condition of S 344 (when S 344 is NO), the sub CPU 102 ends the command sequence check process and performs the main board communication task (see FIG. 85). Move to S292. On the other hand, when it is determined in S344 that the sub CPU 102 satisfies the determination condition of S344 (if YES in S344), the sub CPU 102 adds "5" to the current number of penalty games (S345). If the number of penalty games after the addition exceeds “10” (the upper limit of the number of penalty games) by the addition process, the sub CPU 102 sets “10” as the number of penalty games.

  After the processing of S345, the sub CPU 102 determines whether or not the gaming state (currently) is "Race in progress", "general middle BB" or "AT middle BB" (S346).

  When it is determined in S346 that the sub CPU 102 does not satisfy the determination condition of S 346 (when S346 is NO), the sub CPU 102 ends the command sequence check process and performs the main board communication task (see FIG. 85). Move to S292. On the other hand, when the sub CPU 102 determines in S346 that the determination condition of S346 is satisfied (when S346 is a YES determination), the sub CPU 102 determines whether the "BB entry check flag" is on (S347). ). The BB entry check flag is a flag provided to check the occurrence of an event called "command spill" due to a goto action (cheating action). Then, when a command spill occurs, the BB rush check flag is turned off, thereby generating a state in which the simulated BB game is not started.

  In S347, when the sub CPU 102 determines that the BB rush check flag is not in the on state (S347 is NO), the sub CPU 102 ends the command sequence check processing, and performs the main board communication task (see FIG. 85). Move to S292 of). On the other hand, when the sub CPU 102 determines in S347 that the BB rush check flag is in the on state (when the determination in S347 is YES), the sub CPU 102 sets the penalty flag in the on state (S348). Then, after the processing of S348, the sub CPU 102 ends the command sequence check processing, and shifts the processing to S292 of the main board communication task (see FIG. 85).

[Determination content determination processing]
Next, with reference to FIG. 91 and FIG. 92, the effect content determination processing performed in S331 in the flowchart of the command analysis processing (see FIG. 89) will be described. The effect data determined (registered) in the following process is data designating animation data, sound data and lamp data. Therefore, when effect data is registered in each of the following processes, corresponding animation data, sound data, lamp data, and the like are determined, and effects such as image display, sound reproduction, and lamp on / off are performed.

  First, the sub CPU 102 determines whether or not an initialization command is received (S351).

  In S351, when the sub CPU 102 determines that the initialization command has been received (when the determination in S351 is YES), the sub CPU 102 performs processing when receiving an initialization command (S352). In this processing, the sub CPU 102 determines (registers) effect data at the time of initialization processing based on information such as presence / absence of setting value change and setting values included in the initialization command. In addition, in the initialization command reception process, various game information (the number of digested games, etc.) is also reset. The details of the initialization command reception process will be described later with reference to FIG. 93 described later. Then, after the process of S352, the sub CPU 102 ends the effect content determination process, and moves the process to S332 of the command analysis process (see FIG. 89).

  On the other hand, when the sub CPU 102 determines in S351 that the initialization command is not received (when the determination in S351 is NO), the sub CPU 102 determines whether or not the medal insertion command is received (S353).

  In S353, when the sub CPU 102 determines that the medal insertion command is received (when the determination in S 353 is YES), the sub CPU 102 performs a medal insertion command reception process (S 354). In this process, the sub CPU 102 determines effect data at the time of medal insertion (at the time of bet) based on information such as the presence or absence of medal insertion, the value of the number-of-insertions counter, and the value of the credit counter included in the medal insertion command. (sign up. The details of the medal insertion command reception process will be described later with reference to FIG. 95 described later. Then, after the process of S354, the sub CPU 102 ends the effect content determination process, and moves the process to S332 of the command analysis process (see FIG. 89).

  On the other hand, when the sub CPU 102 determines in S353 that the medal insertion command is not received (when the determination in S353 is NO), the sub CPU 102 determines whether the start command is received (S355).

  In S355, when the sub CPU 102 determines that the start command has been received (when the determination in S 355 is YES), the sub CPU 102 performs processing when a start command is received (S 356). In this process, the sub CPU 102 includes information such as the type of gaming state flag, the value of the bonus end number counter, the type of the internal winning combination, the type of the flag relating to the lock effect, the value of the effect timer, etc. The effect data at the game start time (start time) is determined (registered) on the basis of. The details of the start command reception process will be described later with reference to FIG. 96 described later. Then, after the process of S356, the sub CPU 102 ends the effect content determination process, and moves the process to S332 of the command analysis process (see FIG. 89).

  On the other hand, when the sub CPU 102 determines in S355 that the start command has not been received (when the determination in S355 is NO), the sub CPU 102 determines whether the reel rotation start command is received (S357).

  In S357, when the sub CPU 102 determines that the reel rotation start command has been received (when the determination in S 357 is YES), the sub CPU 102 performs processing when the reel rotation start command is received (S358). In this process, the sub CPU 102 determines (registers) effect data at the start of reel rotation based on the reel rotation start command. Then, after the process of S358, the sub CPU 102 ends the effect content determination process, and moves the process to S332 of the command analysis process (see FIG. 89).

  On the other hand, when the sub CPU 102 determines in S357 that the reel rotation start command is not received (S357 returns NO), the sub CPU 102 determines whether the reel stop command is received (S359).

  In S359, when the sub CPU 102 determines that the reel stop command has been received (when the determination in S359 is YES), the sub CPU 102 performs a reel stop command reception process (S360). In this process, the sub CPU 102 performs effect data at the time of reel stop based on information such as the type of stop reel (operation stop button), the stop start position, the number of sliding symbols, the effect number, etc. included in the reel stop command. Decide (register). The details of the reel stop command reception process will be described later with reference to FIG. 136 described later. Then, after the process of S360, the sub CPU 102 ends the effect content determination process, and moves the process to S332 of the command analysis process (see FIG. 89).

  On the other hand, when the sub CPU 102 determines in S359 that the reel stop command is not received (when the determination in S359 is NO), the sub CPU 102 determines whether or not the winning operation command is received (S361).

  In S361, when the sub CPU 102 determines that the winning operation command has been received (when the determination in S361 is YES), the sub CPU 102 performs processing upon receiving a winning operation command (S362). In this process, the sub CPU 102 determines (registers) effect data at the time of winning operation based on information such as the type of display combination, a flag relating to a lock effect, the number of medals paid out, etc. included in the winning operation command. . The details of the winning operation command reception process will be described later with reference to FIG. 139 described later. Then, after the process of S362, the sub CPU 102 ends the effect content determination process, and moves the process to S332 of the command analysis process (see FIG. 89).

  On the other hand, when the sub CPU 102 determines in S361 that the winning operation command has not been received (when the determination in S361 is NO), the sub CPU 102 determines whether or not the payout end command is received (S363).

  In S363, when the sub CPU 102 determines that the payout end command is received (when the determination in S 363 is YES), the sub CPU 102 performs a payout end command reception process (S 364). In this process, the sub CPU 102 makes a lighting request of the LED provided on the MAX bet button 21 according to the number of credits of the current medal. The details of the payout end command reception process will be described later with reference to FIG. 145 described later. Then, after the process of S364, the sub CPU 102 ends the effect content determination process, and moves the process to S332 of the command analysis process (see FIG. 89).

  On the other hand, when the sub CPU 102 determines in S363 that the payout end command is not received (S363: NO), the sub CPU 102 determines whether a bonus start command is received (S365).

  In S365, when the sub CPU 102 determines that the bonus start command has been received (when the determination in S 365 is YES), the sub CPU 102 performs a bonus start command reception process (S 366). In this process, the sub CPU 102 determines (registers) effect data at the start of the bonus based on the bonus start command. Next, the sub CPU 102 determines whether or not the current number of credits of medals is two or more (S367).

  In S367, when the sub CPU 102 determines that the number of credits of the current medal is not two or more (when S367 is NO), the sub CPU 102 ends the effect content determination processing and analyzes the command analysis processing (FIG. Move to S332 of 89). On the other hand, when the sub CPU 102 determines that the number of credits of the current medal is two or more in S367 (when the determination of S 367 is YES), the sub CPU 102 requests the LED provided on the MAX bet button 21 to light up. (S368). Then, after the process of S368, the sub CPU 102 ends the effect content determination process, and moves the process to S332 of the command analysis process (see FIG. 89).

  If the sub CPU 102 determines that the bonus start command has not been received again (S365 is NO), whether the sub CPU 102 has received the bonus end command again. It is determined whether or not it is (S369).

  In S369, when the sub CPU 102 determines that the bonus end command is received (when the determination in S369 is YES), the sub CPU 102 performs a bonus end command reception process (S370). In this process, the sub CPU 102 determines (registers) effect data at the end of the bonus based on the bonus end command. Next, the sub CPU 102 determines whether the current number of credits of medals is three or more (S371).

  In S371, when the sub CPU 102 determines that the number of credits of the current medal is not three or more (S371 is NO), the sub CPU 102 ends the effect content determination processing, and the processing is command analysis processing (FIG. Move to S332 of 89). On the other hand, when the sub CPU 102 determines that the number of credits of the current medal is three or more in S 371 (when the determination of S 371 is YES), the sub CPU 102 requests lighting of the LED provided on the MAX bet button 21. (S372). Then, after the process of S372, the sub CPU 102 ends the effect content determination process, and moves the process to S332 of the command analysis process (see FIG. 89).

  Here, if the sub CPU 102 determines that it is not at the bonus end command reception time again in S 369 and returns to the process at S 369 (if S 369 is NO), whether the sub CPU 102 is at the non-operation command reception time It is determined whether or not (S373).

  In S373, when the sub CPU 102 determines that the non-operation command has not been received (when S 373 is NO), the sub CPU 102 ends the effect content determination processing, and the processing is S332 of the command analysis processing (see FIG. 89). Transfer to

  On the other hand, when the sub CPU 102 determines in S373 that the no-operation command has been received (YES in S373), the sub CPU 102 performs a no-operation command reception process (S 374).

  The no-operation command is transmitted from the main control circuit 71 to the sub control circuit 72 in a cycle of about 16 msec when there is no other command transmitted from the main control circuit 71. Then, in the non-operation command reception process, the sub CPU 102 sub-stores information (for example, on / off information of the BET switch 77, the start switch 78, etc.) of the input port status of each operation unit included in the non-operation command. It is stored in a predetermined storage area provided in the RAM 103. Further, in this process, various processes related to the determination of the number of AT start games are also performed based on the information of the input port state of each operation unit. The details of the no-operation command reception process will be described later with reference to FIG. 146 described later. Then, after the process of S374, the sub CPU 102 ends the effect content determination process, and moves the process to S332 of the command analysis process (see FIG. 89).

[Process on initialization command reception]
Next, with reference to FIG. 93, the initialization command reception process performed in S352 in the flowchart of the effect content determination process (see FIGS. 91 and 92) will be described.

  First, the sub CPU 102 initializes a ball related variable (S381). In this process, the sub CPU 102 sets “generally” to the gaming state (previous time), the gaming state (current time) and the gaming state (next time). Further, in this processing, the sub CPU 102 also resets various game information (the number of digested games and the like), and sets, for example, “180” to the value of the cycle counter (resets the number of remaining cycle games in normal game).

  Next, the sub CPU 102 performs race information lottery processing (S382). The details of the race information lottery process will be described later with reference to FIG. 94 described later. Then, after the processing of S382, the sub CPU 102 ends the processing at the time of initialization command reception and also ends the effect content determination processing (see FIGS. 91 and 92).

  As described above, in the initialization command reception process of the present embodiment, various game information (such as the number of digested games) is reset, and this process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a means (game information initialization means) for initializing various game information when receiving the initialization command.

[Race information lottery process]
Next, with reference to FIG. 94, the race information lottery process performed in S382 in the flowchart of the initialization command reception process (see FIG. 93) will be described. In this race information lottery process, various information related to the race presentation of the character performed in the transition presentation game is determined by lottery.

  First, the sub CPU 102 performs a race runner MAP lottery process with reference to the race runner MAP lottery table (see FIG. 32) (S391). Next, the sub CPU 102 sets the value (MAP number) of the lottery result of the race runner MAP lottery processing to "race runner MAP" (S392).

  Next, the sub CPU 102 refers to the race information MAP data table (see FIG. 33), and based on the value (race information MAP number) of "race runner MAP", the victory target person lottery table corresponding to the race information MAP data. The type (target tables A to J) of (see FIG. 34) is determined (S393). In this process, based on the set value of the race runner MAP (race information MAP), the "target table" (target table) corresponding to the race information MAP data up to four races ahead (first to fifth races) Any of A to J) is determined.

  Next, the sub CPU 102 sets the “target table” for the determined first to fifth races (S394). Then, the sub CPU 102 performs lottery processing of race victory target (candidates) from the first race to the fifth race based on the “target table” from the first race to the fifth race set in S394. S395).

  Next, the sub CPU 102 sets the lottery result of the winning candidate lottery process as the "race winner" (S396). As a result of this processing, race winners from the first race to the fifth race (any one of “male A”, “male B”, “female A”, “tendon”, “Kappa” and “male A and male B”) ) Is set as "race winner".

  Next, the sub CPU 102 performs race winning percentage MAP lottery processing with reference to the race winning percentage MAP lottery table (see FIG. 35) (S397). In this processing, the sub CPU 102 determines the race winning percentage data of the "race winner" (race winning target) set in S396 based on the current setting value (one of 1 to 6). Decide. Next, the sub CPU 102 sets the lottery result (race winning percentage MAP) of the race winning percentage MAP lottery process to the “race winning percentage map” (S 398).

  Next, the sub CPU 102 refers to the race win rate MAP data table (see FIG. 36) and acquires race win rate data corresponding to the set “race win rate map” (S399). In this process, as shown in FIG. 36, only the race win rate data of the current set of races (the first race) may be determined, or the race win rate data of the second and subsequent races may also be determined. is there. Next, the sub CPU 102 sets the race win rate data acquired in S399 (S400).

  Then, after the processing of S400, the sub CPU 102 ends the race information lottery processing, and also ends the initialization command reception processing (see FIG. 93). As described above, in the pachislot 1 of the present embodiment, the race victory target of the race effect to be executed in the transition effect game when the initialization command is received (when the information regarding the content of the race effect is not set in the initial state) The (candidate) person and the winning percentage are determined.

  As described above, in the race information lottery process of the present embodiment, the information regarding the contents of the race effect is determined from the first race to the fifth race (four sets from the current set) at the start of the game period of the normal game. This process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 is means for determining information related to the effect contents of each transition effect game to be performed after the end of the normal game from the current set to the fourth set destination at the start of the game period of the normal game It also serves as transition effect determination means).

[Process when medal input command is received]
Next, with reference to FIG. 95, the medal insertion command reception process carried out in S354 in the flowchart of the effect content determination process (see FIGS. 91 and 92) will be described.

  First, the sub CPU 102 acquires information on the number of medals inserted and the number of credits based on the reception parameter included in the received medal insertion command (S401). Next, the sub CPU 102 determines whether the gaming state (the gaming state managed by the main CPU 93) is the non-MB state (S402).

  In S402, when the sub CPU 102 determines that the gaming state is the non-MB state (when S 402 is a YES determination), the sub CPU 102 refers to the non-MB MAX bet button on / off determination table (see FIG. 61). Based on the information on the number of inserted medals and the number of credits, it is judged whether the LED provided on the MAX bet button 21 is turned on or off (S403). On the other hand, when the sub CPU 102 determines in S402 that the gaming state is not the non-MB state (when S402 is NO), the sub CPU 102 refers to the MB in-MB MAX bet button on / off determination table (see FIG. 62). Based on the information on the number of inserted medals and the number of credits, it is determined whether the LED provided on the MAX bet button 21 is turned on or off (S404).

  After the process of S403 or after the process of S404, the sub CPU 102 determines whether the determination result of S403 or S404 is lighting of an LED provided on the MAX bet button 21 (S405).

  In S405, when the sub CPU 102 determines that the determination result is the lighting of the LED (when the determination in S405 is YES), the sub CPU 102 makes a lighting request to the LED provided on the MAX bet button 21 (S406). Then, after the processing of S406, the sub CPU 102 ends the processing at the time of medal insertion command reception, and also ends the effect content determination processing (see FIGS. 91 and 92).

  On the other hand, when the sub CPU 102 determines in S405 that the determination result is not that the LED is on (S405 is NO), the sub CPU 102 makes a turn-off request to the LED provided on the MAX bet button 21 (S407). . Then, after the processing of S407, the sub CPU 102 ends the medal insertion command reception processing and the effect content determination processing (see FIGS. 91 and 92).

  The on / off control process of the LED of the MAX bet button 21 in the above-described medal insertion command reception process lights up the LED of the MAX bet button 21 in synchronization with the valid / invalid determination of the pressing operation of the MAX bet button 21 by the player. / Can be turned off.

  As described above, in the medal insertion command reception process of the present embodiment, on / off control of the LED provided on the MAX bet button 21 based on the information on the number of medals inserted and the number of credits (stored number). Is performed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as means (light emission control means) for performing on / off control of the LED provided on the MAX bet button 21 based on the information on the number of medals inserted and the number of credits. .

[Process when receiving start command]
Next, with reference to FIG. 96, the start command reception process performed in S356 in the flowchart of the effect content determination process (see FIGS. 91 and 92) will be described.

  First, the sub CPU 102 performs variable setting processing (S411). In this processing, the sub CPU 102 performs setting processing of various variables (various flags, counters, and the like) used for effect control according to the type of sub gaming state. The details of the variable setting process will be described later with reference to FIGS. 97 and 98 described later.

  Next, the sub CPU 102 performs an out ball state update process (S412). In this process, the sub CPU 102 updates information on the gaming state (previous time), the gaming state (current time) and the gaming state (next time). In addition, the details of the payout state update process will be described later with reference to FIG. 108 described later.

  Next, the sub CPU 102 performs Bns (bonus) state update processing (S413). In this processing, the sub CPU 102 performs setting processing of various variables (various flags, counters, and the like) used for effect control according to the type of pseudo BB state. The details of the Bns state update process will be described later with reference to FIG. 109 described later.

  The types of pseudo BB states to be managed in this embodiment are “at BB win”, “between BB flags”, “wait for BB operation”, “in BB”, “in JAC”, “in ChaBB” and “in Cha JAC” 7 types of Note that "between BB flags" indicates a state in which the simulated BB game is being carried over, and "in JAC" indicates a state in the "JACGAME guarantee section". Also, “in Cha BB” indicates the state of “JACIN challenge section” in “general mid BB”, and “in Cha JAC” indicates the state of “JACIN challenge segment” in “AT mid BB”.

  Next, the sub CPU 102 determines whether or not the sub gaming state is "generally in progress" when the game is started (hereinafter referred to as "generally, when the game is started") (S414).

  In S414, when the sub CPU 102 determines that the sub gaming state is "general _ game start time" (when S 414 is a YES determination), the sub CPU 102 performs processing during general _ game start (S 415) . It should be noted that the details of the processing during general_game start will be described later with reference to FIGS. 117 and 118 described later. Then, after the process of S415, the sub CPU 102 performs the process of S426 described later.

  On the other hand, when the sub CPU 102 determines in S 414 that the sub gaming state is not "generally in game start time" (when S 414 is NO determination), the sub CPU 102 is a game in which the sub gaming state is "general in BB" It is determined whether it is the start time (hereinafter referred to as "general medium BB_game start time") (S416).

  In S416, when the sub CPU 102 determines that the sub gaming state is "general medium BB_game start time" (when S416 is YES determination), the sub CPU 102 performs general medium BB_game start processing (S417). . The details of the general medium BB_game start process will be described later with reference to FIG. 120 described later. Then, after the process of S417, the sub CPU 102 performs the process of S426 described later.

  On the other hand, when the sub CPU 102 determines in S 416 that the sub gaming state is not “general medium BB_game start time” (when S 416 is NO determination), the sub CPU 102 starts the game in which the sub gaming state is “race”. It is determined whether it is time (hereinafter referred to as "during race_game start time") (S418).

  In S418, when the sub CPU 102 determines that the sub gaming state is "during race _ game start" (when S 418 is determined as YES), the sub CPU 102 performs processing during racing _ game start (S 419) . In addition, the details of the process during race_game start time will be described later with reference to FIG. 124 described later. Then, after the process of S419, the sub CPU 102 performs the process of S426 described later.

  On the other hand, when the sub CPU 102 determines in S418 that the sub gaming state is not "during race _ gaming start" (when S418 is NO determination), the sub CPU 102 determines that the sub gaming state is "AT in preparation" It is determined whether or not it is the start time (hereinafter referred to as "at preparation: during game start") (S420).

  In S420, when the sub CPU 102 determines that the sub gaming state is "at AT preparation 遊 技 game start time" (when S 420 is YES determination), the sub CPU 102 performs AT preparation in progress 遊 技 game start time ( S421). The details of the AT preparation process start process will be described later with reference to FIG. 125 described later. Then, after the process of S421, the sub CPU 102 performs the process of S426 described later.

  On the other hand, when the sub CPU 102 determines in S 420 that the sub gaming state is not “at preparation _ at the start of gaming” (when S 420 is NO), the sub CPU 102 determines that the sub gaming state is “at AT” It is determined whether or not it is the start time (hereinafter referred to as "at AT_game start time") (S422).

  In S422, when the sub CPU 102 determines that the sub gaming state is "at AT _ start of game" (when S 422 is YES), the sub CPU 102 performs processing at AT _ game start (S 423) . In addition, the details of the AT in-game start process will be described later with reference to FIG. 128 described later. Then, after the process of S423, the sub CPU 102 performs the process of S426 described later.

  On the other hand, when the sub CPU 102 determines in S 422 that the sub gaming state is not "at AT _ start of game" (when S 422 is NO determination), the sub CPU 102 determines that the sub gaming state is "at BB" It is determined whether or not it is a start time (hereinafter referred to as "at BB_game start time") (S424).

  In S424, when the sub CPU 102 determines that the sub gaming state is "at BB _ game start" (when S 424 is YES determination), the sub CPU 102 performs processing at the time of AT BB _ game start (S 425) . In addition, the details of the during-AT BB_game start process will be described later with reference to FIG. 129 described later. Then, after the processing of S425, the sub CPU 102 performs the processing of S426 described later.

  On the other hand, when the sub CPU 102 determines in S424 that the sub gaming state is not "at BB in game start time" (when S424 is NO), the sub CPU 102 performs the processing of S426 described later.

  After the processing of S415, S417, S419, S421, S423 or S425, or when S424 is NO, the sub CPU 102 performs BB precursor counter management processing (S426). In this process, the sub CPU 102 subtracts the value of the BB precursor counter indicating the number of remaining precursor games until the pseudo BB game is activated.

  Next, the sub CPU 102 performs gaming state setting processing (S427). In this process, the sub CPU 102 sets the gaming state (next time). The details of the game state setting process will be described later with reference to FIG. 130 described later. Then, after the processing of S427, the sub CPU 102 ends the processing at the time of start command reception and also ends the effect content determination processing (see FIGS. 91 and 92).

  Although not shown in FIG. 96, in the series of repeated processing of determination processing of the above-mentioned sub gaming state and processing at the time of game start during the processing of start command reception, the sub gaming state is actually "W in the middle" Also, the process of determining whether or not the game is "W during a chance", the process of determining whether or not the sub gaming state is "under an added challenge", and the game start of "over a challenge" are also performed. It will be.

[Variable setting process]
Next, with reference to FIGS. 97 and 98, the variable setting process performed in S411 in the flowchart of the process at the time of start command reception (see FIG. 96) will be described.

  First, the sub CPU 102 determines whether the gaming state (next time) is "general" (S431).

  In S431, when the sub CPU 102 determines that the gaming state (next time) is "in general" (when the determination in S431 is YES), the sub CPU 102 performs general_variable setting processing (S432). The details of the general medium_variable setting process will be described later with reference to FIG. 99 described later. Then, after the process of S432, the sub CPU 102 performs the process of S441 described later.

  On the other hand, when the sub CPU 102 determines that the gaming state (next time) is not "general" in S 431 (when the determination in S 431 is NO), the sub CPU 102 has the gaming state (next time) in simulated BB ("generally in progress" It is determined whether it is BB "or" BB during AT ") (S433).

  In S433, when the sub CPU 102 determines that the gaming state (next time) is pseudo BB (when the determination in S 433 is YES), the sub CPU 102 performs BB_variable setting processing (S 434). The details of the BB in-variable setting process will be described later with reference to FIG. 100 described later. Then, after the processing of S434, the sub CPU 102 performs the processing of S441 described later.

  On the other hand, if the sub CPU 102 determines in S433 that the gaming state (next time) is not pseudo BB (if S433 is NO), the sub CPU 102 determines whether the gaming state (next time) is "at AT". It is determined whether or not (S435).

  In S435, when the sub CPU 102 determines that the gaming state (next time) is "at preparation" (when the determination at S 435 is YES), the sub CPU 102 performs AT preparation _variable setting processing (S436). Note that details of the AT preparation-variable setting process will be described later with reference to FIG. 101 described later. Then, after the processing of S436, the sub CPU 102 performs the processing of S441 described later.

  On the other hand, when the sub CPU 102 determines in S435 that the gaming state (next time) is not "at preparation" (if the determination in S435 is NO), the sub CPU 102 has the gaming state (next time) "in AT". It is determined whether or not (S437).

  In S437, when the sub CPU 102 determines that the gaming state (next time) is "at AT" (when the determination of S 437 is YES), the sub CPU 102 performs an AT _variable setting process (S438). The details of the during-AT variable setting process will be described later with reference to FIG. 102 described later. Then, after the process of S438, the sub CPU 102 performs the process of S441 described later.

  On the other hand, when the sub CPU 102 determines that the gaming state (next time) is not "at AT" in S437 (if S437 is NO), the sub CPU 102 determines whether the gaming state (next time) is "racing" It is determined whether or not it is (S439).

  In S439, when the sub CPU 102 determines that the gaming state (next time) is not "in a race" (when the determination of S439 is NO), the sub CPU 102 performs the processing of S441 described later. On the other hand, when the sub CPU 102 determines in S439 that the gaming state (next time) is "in the race" (when the determination of S439 is YES), the sub CPU 102 performs a race_variable setting process (S440). The details of the in-race_variable setting process will be described later with reference to FIG. 103 described later. Then, after the processing of S440, the sub CPU 102 performs the processing of S441 described later.

  After the processing of S432, S434, S436, S438 or S440, or if S439 is NO, the sub CPU 102 marks the end of the game when the gaming state (present) is "general" (hereinafter, "general end") It is determined whether or not (S441).

  In S441, when the sub CPU 102 determines that the gaming state (present) is "at the general end" (when the determination at S441 is YES), the sub CPU 102 performs a general end_variable setting process (S442). Note that details of the general end_variable setting process will be described later with reference to FIG. 104 described later. Then, after the processing of S442, the sub CPU 102 performs the processing of S449 described later.

  On the other hand, when the sub CPU 102 determines that the gaming state (present) is not “at the general end” in S 441 (when S 441 is NO), the gaming state (present) is “general medium BB” It is determined whether or not the game is over (hereinafter referred to as "general medium BB end") (S443).

  In S443, when the sub CPU 102 determines that the gaming state (present) is "at the end of the general middle BB" (when the determination at S 443 is YES), the sub CPU 102 performs the general middle BB end _ variable setting process (S444). The details of the general medium BB end_variable setting process will be described later with reference to FIG. 105 described later. Then, after the process of S444, the sub CPU 102 performs the process of S449 described later.

  On the other hand, when the sub CPU 102 determines in S443 that the gaming state (present) is not "at the end of the general middle BB" (when S443 is NO), the sub CPU 102 has the gaming state (present) "in the race". It is determined whether or not the game is over (hereinafter referred to as "the end of the race") (S445).

  In S445, when the sub CPU 102 determines that the gaming state (present) is "at the end of the race" (when the determination in S 445 is YES), the sub CPU 102 performs a race end time variable setting process (S446). In addition, the details of the race end time-variable setting process will be described later with reference to FIG. 106 described later. Then, after the process of S446, the sub CPU 102 performs the process of S449 described later.

  On the other hand, when the sub CPU 102 determines in S445 that the gaming state (present) is not "at the end of the race" (when the determination in S 445 is NO), the sub CPU 102 has the gaming state (present) BB "at AT" It is determined whether or not the game is over (hereinafter referred to as "at MB during BB end") (S447).

  In S447, when the sub CPU 102 determines that the gaming state (present) is not “at the time of BB termination at AT” (when S 447 is NO), the sub CPU 102 performs the processing of S 449 described later. On the other hand, when the sub CPU 102 determines in S447 that the gaming state (present) is "at the end of BB during AT" (when the determination of S 447 is YES), the sub CPU 102 performs the processing at the end of BB during AT _ variable setting processing (S448). The details of the at-BB end-time variable setting process will be described later with reference to FIG. 107 described later. Then, after the process of S448, the sub CPU 102 performs the process of S449 described later.

  After the processing of S 442, S 444, S 446 or S 448, or if S 447 is NO, the sub CPU 102 initializes “the number of AT direct addition G (game)” (S 449). In this process, the sub CPU 102 sets “0” to the number of additional AT games. Then, after the process of S449, the sub CPU 102 ends the variable setting process, and shifts the process to S412 of the process upon start command reception (see FIG. 96).

  Further, although not shown in FIGS. 97 and 98, in the series of repeated processing of determination processing of the gaming state (next time) mentioned above during variable setting processing and variable setting processing, actually, the gaming state (next time) A determination process as to whether or not the player is in a W chance or in an extra challenge is also performed, and a variable setting process in these sub gaming states is also performed. Note that, in the variable setting process when the gaming state (next time) is "W in chance", "5" is set as the number of bell navigations.

  Furthermore, although not shown in FIGS. 97 and 98, in the series of repeated processing of determination processing of the gaming state (present) mentioned above during variable setting processing and variable setting processing, actually, the gaming state (present) is “ A determination process as to whether or not the player is in a W chance or in an extra challenge is also performed, and a variable setting process in these sub gaming states is also performed. In the variable setting process when the gaming state (currently) is "W in chance", "5" is set as the number of bell navigations.

[General _ variable setting process]
Next, with reference to FIG. 99, general medium_variable setting processing performed in S432 in the flowchart of the variable setting processing (see FIGS. 97 and 98) will be described.

  First, the sub CPU 102 determines whether the gaming state (currently) is different from the gaming state (next time) ("generally") (S451).

  When the sub CPU 102 determines that the gaming state (current) is not different from the gaming state (next time) in S 451 (in the case of NO determination in S 451), the sub CPU 102 ends the general _variable setting process and performs the process. The process proceeds to S441 in the variable setting process (see FIGS. 97 and 98). On the other hand, when the sub CPU 102 determines that the gaming state (present) is different from the gaming state (next) in S 451 (when the determination in S 451 is YES), the gaming state (present) is “in race” It is determined whether there is any (S452).

  In S452, when the sub CPU 102 determines that the gaming state (present) is not "in the race" (when the determination in S 452 is NO), the sub CPU 102 ends the general _variable setting process, and the process is set to the variable setting process. The process moves to S441 (see FIGS. 97 and 98).

  On the other hand, when the sub CPU 102 determines that the gaming state (present) is "in the race" in S 452 (in the case of YES determination in S 452), the sub CPU 102 determines the next cycle (based on The number of shortening games (the number of next shortening games) of the non-AT game period in the next set) is calculated (S 453).

  In addition, the "booking point" is the total shortening game number for the surplus generated by the cycle shortening lottery (which may be carried out a plurality of times) performed during the normal game of the current cycle (the current set), It corresponds to the total number of games of the total number of the shortened games in surplus generated by the pseudo BB cycle shortening lottery (which may be performed a plurality of times) performed during the pseudo BB game.

  Next, the sub CPU 102 sets "180" in the cycle counter (S454). Next, the sub CPU 102 subtracts the number of the next reduced game calculated in S453 from the value (180) of the cycle counter (S455). By this processing, the subtraction result is set as the number of stay games in the normal state in the next set. Then, after the processing of S455, the sub CPU 102 ends the general middle_variable setting processing, and shifts the processing to S441 of the variable setting processing (see FIGS. 97 and 98).

  As described above, in S455 of the general medium_variable setting process of the present embodiment, the number of set games (180 games) of the next set of normal games is reduced to the next number of shortened games (the number of surplus games in the current set). Is carried out by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a means (game number subtraction means) for subtracting the surplus reduced game number from the set game number of the next set of normal games.

[BB _ variable setting process]
Next, with reference to FIG. 100, the during-BB_variable setting process performed in S434 in the flowchart of the variable setting process (see FIGS. 97 and 98) will be described.

  First, the sub CPU 102 determines whether the gaming state (currently) is different from the gaming state (next time) ("general middle BB" or "AT middle BB") (S461).

  When the sub CPU 102 determines that the gaming state (current) is not different from the gaming state (next time) in S 461 (in the case of NO determination in S 461), the sub CPU 102 ends the BB_variable setting process and performs the process. The process proceeds to S441 in the variable setting process (see FIGS. 97 and 98). On the other hand, when the sub CPU 102 determines in S 461 that the gaming state (present) is different from the gaming state (next) (when the determination in S 461 is YES), the value of the BB precursor counter is “0” in the sub CPU 102 It is determined whether or not (S462).

  If the sub CPU 102 determines in S 462 that the value of the BB precursor counter is not “0” (S 462 is NO), the sub CPU 102 ends the BB variable setting processing and performs variable setting processing ( Move to S441 of FIG. 97 and FIG. 98).

  On the other hand, when the sub CPU 102 determines in S 462 that the value of the BB precursor counter is “0” (when the determination in S 462 is YES), the sub CPU 102 resets the value of the BB precursor counter (“−1” Set) (S463). Then, after the process of S463, the sub CPU 102 ends the during BB_variable setting process, and moves the process to S441 of the variable setting process (see FIGS. 97 and 98).

[At preparation _ variable setting process]
Next, with reference to FIG. 101, the AT preparation in progress_variable setting process performed in S436 in the flowchart of the variable setting process (see FIGS. 97 and 98) will be described.

  First, the sub CPU 102 determines whether the gaming state (currently) is different from the gaming state (next time) ("at AT preparation") (S471).

  When the sub CPU 102 determines that the gaming state (current) is not different from the gaming state (next time) in S 471 (in the case of NO determination in S 471), the sub CPU 102 ends AT preparation _ variable setting processing, and processing Is transferred to S441 of the variable setting process (see FIGS. 97 and 98). On the other hand, when the sub CPU 102 determines that the gaming state (present) is different from the gaming state (next) in S 471 (if S 471 is YES), the sub CPU 102 displays “race victory flag”, “race runners map “Race win percentage map” and “race continuous loss counter” are cleared (S 472).

  The "race victory flag" is a flag indicating whether the set "race winner" (race winner (candidate)) wins by the race effect, and the "race winner" wins the race. , "Race victory flag" is set to "1". Also, the "race continuous loss counter" is a counter that manages the number of times the set "race winner" loses continuously in the race effect (the number of times the AT does not win successfully). In the present embodiment, when the "race winner" loses the race effect 10 times in a row (at the ceiling), the AT wins.

  Then, after the processing of S472, the sub CPU 102 ends the AT preparation-variable setting processing, and shifts the processing to S441 of the variable setting processing (see FIGS. 97 and 98).

[At _ variable setting process]
Next, referring to FIG. 102, the during-AT variable setting process performed in S438 in the flowchart of the variable setting process (see FIGS. 97 and 98) will be described.

  First, the sub CPU 102 determines whether the gaming state (currently) is different from the gaming state (next time) ("at AT preparation") (S481). In S481, when the sub CPU 102 determines that the gaming state (present) is not different from the gaming state (next) (in the case of NO determination in S 481), the sub CPU 102 ends the in-AT _variable setting process, and the process The process proceeds to S441 in the variable setting process (see FIGS. 97 and 98).

  On the other hand, when the sub CPU 102 determines that the gaming state (present) is different from the gaming state (next) in S 481 (if S 481 is YES), the sub CPU 102 sets the number of penalty games to “0” ( S482). Next, the sub CPU 102 sets “0” to the value of the penalty counter (S483).

  Next, the sub CPU 102 turns off the penalty flag (S484). Then, after the process of S484, the sub CPU 102 ends the in-AT variable setting process, and shifts the process to S441 of the variable setting process (see FIGS. 97 and 98).

[During race _ variable setting process]
Next, with reference to FIG. 103, the during-race_variable setting process performed in S440 in the flowchart of the variable setting process (see FIGS. 97 and 98) will be described.

  The sub CPU 102 sets “0” to the value of the penalty counter (S491). Then, after the process of S491, the sub CPU 102 ends the in-race_variable setting process, and shifts the process to S441 of the variable setting process (see FIGS. 97 and 98).

[General end_variable setting process]
Next, general end_variable setting processing performed in S442 in the flowchart of variable setting processing (see FIGS. 97 and 98) will be described with reference to FIG.

  First, the sub CPU 102 determines whether the gaming state (present) ("general end time") is different from the gaming state (next time) (S501).

  In S501, when the sub CPU 102 determines that the gaming state (present) is not different from the gaming state (next) (when the determination in S 501 is NO), the sub CPU 102 ends the general termination_variable setting processing, and processing Is transferred to S449 of the variable setting process (see FIGS. 97 and 98). On the other hand, when the sub CPU 102 determines in S501 that the gaming state (present) is different from the gaming state (next) (when the determination in S501 is YES), the sub CPU 102 clears the "winning combination history" (S502) .

  In addition, the "winning combination history" is data representing the winning combination history of the internal winning combination of five games (including "lost", "small combination" and "replay"), used for cycle shortening lottery and directly superimposed lottery Be

  Then, after the processing of S502, the sub CPU 102 ends the general termination_variable setting processing, and shifts the processing to S449 of the variable setting processing (see FIGS. 97 and 98).

[When general medium BB end _ variable setting process]
Next, with reference to FIG. 105, general medium BB end_variable setting processing performed in S444 in the flowchart of the variable setting processing (see FIGS. 97 and 98) will be described.

  First, the sub CPU 102 determines whether or not the gaming state (present) ("general middle BB") is different from the gaming state (next time) (S511).

  In S511, when the sub CPU 102 determines that the gaming state (present) is not different from the gaming state (next) (when S 511 is NO determination), the sub CPU 102 ends the general medium BB end_variable setting process. Then, the process proceeds to S449 of the variable setting process (see FIGS. 97 and 98). On the other hand, when the sub CPU 102 determines that the gaming state (present) is different from the gaming state (next) in S 511 (if S 511 is determined as YES), the sub CPU 102 initializes the “BB game counter” (“- 1) is set) (S512). The “BB game counter” is a counter that manages the number of remaining games in the JACIN challenge section (a section in which a game of a push order 2-option challenge for JACGAME acquisition is performed).

  Then, after the process of S512, the sub CPU 102 ends the general medium BB end_variable setting process, and moves the process to S449 of the variable setting process (see FIGS. 97 and 98).

[At the end of the race _ variable setting process]
Next, with reference to FIG. 106, at the time of race end_variable setting processing performed in S446 in the flowchart of the variable setting processing (see FIGS. 97 and 98) will be described.

  First, the sub CPU 102 determines whether the gaming state (currently) ("in the race") is different from the gaming state (next time) (S521).

  In S521, when the sub CPU 102 determines that the gaming state (present) is not different from the gaming state (next) (when the determination in S 521 is NO), the sub CPU 102 ends the race end_variable setting process, and the process Is transferred to S449 of the variable setting process (see FIGS. 97 and 98). On the other hand, when the sub CPU 102 determines in S 521 that the gaming state (present) is different from the gaming state (next) (when the determination in S 521 is YES), the sub CPU 102 counts “race game number”, “race occurrence flag” , And clears the data of the "AT after race flag" and the "race win rate renewal flag" (S522).

  In addition, "the number of race games" is data for managing the number of progressed games (1 to 10 games) of the race effect performed in the transition effect game, and the "race occurrence flag" indicates whether or not to generate the race effect. It is a flag to indicate. The "AT after-race flag" is a flag indicating whether or not to generate a race effect after AT, and the "race win rate rewriting flag" is a flag indicating whether or not data on the race win rate is to be rewritten. Although a detailed description is omitted, in the present embodiment, if the player plays a role of "rare" in the normal state game, the race winning percentage is raised. Then, when winning the race win rate up lottery, the "race win rate rewriting flag" is turned on.

  Then, after the processing of S522, the sub CPU 102 ends the race completion_variable setting processing, and shifts the processing to S449 of the variable setting processing (see FIGS. 97 and 98).

[At mid BB end _ variable setting processing]
Next, with reference to FIG. 107, the during-AT end BB_variable setting process performed in S448 in the flowchart of the variable setting process (see FIGS. 97 and 98) will be described.

  First, the sub CPU 102 determines whether the gaming state (present) ("at BB") is different from the gaming state (next) (S531).

  In S531, when the sub CPU 102 determines that the gaming state (present) is not different from the gaming state (next) (when the determination in S 531 is NO), the sub CPU 102 ends the at-BB in-time _ variable setting process during AT Then, the process proceeds to S449 of the variable setting process (see FIGS. 97 and 98).

  On the other hand, when the sub CPU 102 determines that the gaming state (present) is different from the gaming state (next) in S 531 (if S 531 is YES), the sub CPU 102 initializes the “BB game counter” (“- 1) is set) (S532). Next, the sub CPU 102 sets “0” to the number of penalty games (S533).

  Next, the sub CPU 102 sets “0” to the value of the penalty counter (S534). Next, the sub CPU 102 turns off the penalty flag (S535). Then, after the processing of S535, the sub CPU 102 ends the at-BB end_variable setting processing, and shifts the processing to S449 of the variable setting processing (see FIGS. 97 and 98).

[Dumped ball status update process]
Next, with reference to FIG. 108, the payout state update process performed in S412 in the flowchart of the process at the time of start command reception (see FIG. 96) will be described.

  First, the sub CPU 102 determines whether the gaming state (previous time) is different from the gaming state (present time) (S541).

  In S541, when the sub CPU 102 determines that the gaming state (previous time) is not different from the gaming state (present time) (when the determination of S 541 is NO), the sub CPU 102 performs the process of S543 described later. On the other hand, when the sub CPU 102 determines that the gaming state (previous) is different from the gaming state (present) in S 541 (if S 541 is YES), the sub CPU 102 enters the gaming state (present) in the gaming state (previous) Is set (S 542).

  After the processing of S 542 or when S 541 is NO, the sub CPU 102 determines whether the gaming state (present) is different from the gaming state (next) (S 543). In S543, when the sub CPU 102 determines that the gaming state (current) is not different from the gaming state (next time) (when S 543 is NO determination), the sub CPU 102 ends the withdrawal state updating process and starts the process. The process moves to step S413 in the command reception process (see FIG. 96).

  On the other hand, when the sub CPU 102 determines in S543 that the gaming state (present) is different from the gaming state (next) (when the determination in S 543 is YES), the sub CPU 102 enters the gaming state (present) in the gaming state (present) Is set (S544). Then, after the process of S544, the sub CPU 102 ends the balls state update process, and moves the process to S413 of the process at the time of start command reception (see FIG. 96).

[Bns state setting process]
Next, with reference to FIG. 109, the Bns state setting process performed in S413 in the flowchart of the start command reception process (see FIG. 96) will be described.

  First, the sub CPU 102 determines whether the pseudo BB state is "BB winning" (S551).

  In S551, when the sub CPU 102 determines that the pseudo BB state is “BB winning” (when S551 is YES), the sub CPU 102 performs BB winning _Bns state setting processing (S552). The details of the BB winning state_Bns state setting process will be described later with reference to FIG. 110 described later. Then, after the process of S552, the sub CPU 102 ends the Bns state setting process, and moves the process to S414 of the start command reception process (see FIG. 96).

  On the other hand, if the sub CPU 102 determines in S551 that the pseudo BB state is not "BB winning" (if S551 is NO), the sub CPU 102 determines whether the pseudo BB state is "between BB flags". (S553).

  When the sub CPU 102 determines in S553 that the pseudo BB state is "between BB flags" (when the determination in S553 is YES), the sub CPU 102 performs inter BB flag _Bns state setting processing (S554). Note that details of the BB flag-to-BBs state setting process will be described later with reference to FIG. 111 described later. Then, after the process of S554, the sub CPU 102 ends the Bns state setting process, and moves the process to S414 of the start command reception process (see FIG. 96).

  On the other hand, when the sub CPU 102 determines in S553 that the pseudo BB state is not “between BB flags” (when S553 is NO), the sub CPU 102 determines whether the pseudo BB state is “wait for BB operation”. (S555).

  In S555, when the sub CPU 102 determines that the pseudo BB state is “wait for BB operation” (when the determination in S 555 is YES), the sub CPU 102 performs BB operation wait_Bns state setting processing (S556). The details of the BB operation wait_Bns state setting process will be described later with reference to FIG. 112 described later. Then, after the process of S556, the sub CPU 102 ends the Bns state setting process, and moves the process to S414 of the start command reception process (see FIG. 96).

  On the other hand, when the sub CPU 102 determines in S 555 that the pseudo BB state is not “wait for BB operation” (when S 555 is NO), the sub CPU 102 determines whether the pseudo BB state is “BB”. It discriminates (S557).

  In S557, when the sub CPU 102 determines that the pseudo BB state is "in BB" (when the determination in S 557 is YES), the sub CPU 102 performs BB_Bns state setting processing (S558). Note that details of the BB during-Bns state setting process will be described later with reference to FIG. 113 described later. Then, after the process of S558, the sub CPU 102 ends the Bns state setting process, and moves the process to S414 of the start command reception process (see FIG. 96).

  On the other hand, when the sub CPU 102 determines in S557 that the pseudo BB state is not "in BB" (when S557 is NO), the sub CPU 102 determines whether the pseudo BB state is "in JAC". (S559).

  In S559, when the sub CPU 102 determines that the pseudo BB state is "in JAC" (when the determination in S559 is YES), the sub CPU 102 performs J_n_Bns state setting processing (S560). Note that the details of the JAC-during-Bns state setting process will be described later with reference to FIG. 114 described later. Then, after the process of S560, the sub CPU 102 ends the Bns state setting process, and moves the process to S414 of the start command reception process (see FIG. 96).

  On the other hand, when the sub CPU 102 determines in S559 that the pseudo BB state is not "in JAC" (when S559 is NO), the sub CPU 102 determines whether the pseudo BB state is "in ChaBB". (S561).

  In S561, when the sub CPU 102 determines that the pseudo BB state is "in ChaBB" (when the determination in S561 is YES), the sub CPU 102 performs ChaBB_Bns state setting processing (S562). Note that details of the ChaBB_Bns state setting process will be described later with reference to FIG. 115 described later. Then, after the process of S562, the sub CPU 102 ends the Bns state setting process, and moves the process to S414 of the start command reception process (see FIG. 96).

  On the other hand, when the sub CPU 102 determines in S561 that the pseudo BB state is not “in ChaBB” (when S561 is NO), the sub CPU 102 determines whether the pseudo BB state is “in ChaJAC”. (S563).

  In S563, when the sub CPU 102 determines that the pseudo BB state is “Cha JAC in progress” (when the determination in S 563 is YES), the sub CPU 102 performs Cha JAC _ Bns state setting processing (S 564). Note that details of the Cha JAC in-Bns state setting process will be described later with reference to FIG. 116 described later. Then, after the process of S564, the sub CPU 102 ends the Bns state setting process, and moves the process to S414 of the start command reception process (see FIG. 96).

  On the other hand, when the sub CPU 102 determines in S563 that the pseudo BB state is not “ChaJAC in progress” (when S563 is NO), the sub CPU 102 ends the Bns state setting process, and performs processing when the start command is received. Move to S414 (see FIG. 96).

[BB winning _ Bns state setting processing]
Next, with reference to FIG. 110, the BB winning time_Bns state setting process performed in S552 in the flowchart of the Bns state setting process (see FIG. 109) will be described.

  First, the sub CPU 102 causes the pseudo BB state to transition to “between BB flags” (S571). Next, the sub CPU 102 performs an inter-BB flag_Bns state setting process (S572). Note that details of the BB flag-to-BBs state setting process will be described later with reference to FIG. 111 described later. Then, after the process of S572, the sub CPU 102 ends the BB winning time_Bns state setting process and also ends the Bns state setting process (see FIG. 109).

[Inter-BB flag _ Bns state setting processing]
Next, with reference to FIG. 111, S554 in the flowchart of Bns state setting processing (see FIG. 109), or BB flag inter BB flag _Bns to be performed in S572 in the flowchart of the winning B_Bns state setting processing (see FIG. 110). The state setting process will be described.

  First, the sub CPU 102 determines whether the gaming state (present) is "general medium BB" or "at medium BB" (S581).

  In S581, when the sub CPU 102 determines that the gaming state (present) is not "general middle BB" or "AT middle BB" (when S581 is NO), the sub CPU 102 performs the processing of S583 described later. On the other hand, when the sub CPU 102 determines that the gaming state (present) is "general medium BB" or "at medium BB" in S581 (in the case of YES determination in S581), the sub CPU 102 sets "false BB state". It is transited to "BB operation waiting" (S582).

  After the process of S582 or when the determination of S581 is NO, the sub CPU 102 performs a BB operation wait_Bns state setting process (S583). The details of the BB operation wait_Bns state setting process will be described later with reference to FIG. 112 described later. Then, after the processing of S583, the sub CPU 102 ends the BB flag_Bns state setting process, and also ends the Bns state setting process (see FIG. 109) or the BB winning_Bns state setting process (see FIG. 110).

[Wait for BB operation _ Bns state setting processing]
Next, with reference to FIG. 112, S556 in the flowchart of Bns state setting processing (see FIG. 109), or BB operation waiting _Bns performed in S583 in the flowchart of BB flag_Bns state setting processing (see FIG. 111) The state setting process will be described.

  First, the sub CPU 102 determines whether or not the “BB rush flag” is in the on state (S591). The “BB entry flag” is a flag indicating whether or not the pseudo BB state shifts from “waiting for BB operation” to “during BB”, and when the flag is in the on state, the pseudo BB state is “ It shifts to "in BB", and a simulated BB game is started.

  When the sub CPU 102 determines in S591 that the BB rush flag is not in the on state (when S591 is NO), the sub CPU 102 ends the BB operation wait_Bns state setting process and the Bns state setting process (FIG. 109). Also, the inter-BB flag _Bns state setting process (see FIG. 111) ends.

  On the other hand, when the sub CPU 102 determines that the BB rush flag is in the on state in S591 (when the determination in S591 is YES), the sub CPU 102 sets the BB rush flag in the off state (S592). Next, the sub CPU 102 causes the pseudo BB state to transition to "during BB" (S593).

  Next, the sub CPU 102 sets an initial value "2" to the "BB guaranteed number of JACs" (S594). Note that “the number of BB guaranteed JACs” is the number of successes of JACIN (the number of executions of JACGAME) guaranteed in the JACGAME guaranteed section, and in the present embodiment, two JACGAMEs are guaranteed in the JACGAME guaranteed section.

  Next, the sub CPU 102 sets an initial value "10" to the value of the BB game counter (S595).

  Next, the sub CPU 102 sets an initial value “5” to the value of “the number of times of JAC bell navigation” (S596). In the present embodiment, the game period of one JACGAME is managed by the number of navigations (number of bell navigations) of the small part according to the "push order bell" (CT bell) where payout of 10 medals is performed, and five times When the number of bell navigators is over, one JACGAME game period is over. And "the number of JAC bell navigations" represents the number of remaining bell navigations in JAC GAME.

  Next, the sub CPU 102 turns off the "penalty flag" (S597). The "penalty flag" is a flag indicating the presence or absence of the occurrence of a penalty. Then, after the process of S597, the sub CPU 102 ends the BB operation wait_Bns state setting process, and also ends the Bns state setting process (see FIG. 109) or the BB flag_Bns state setting process (see FIG. 111).

[BB during _ Bns state setting processing]
Next, with reference to FIG. 113, a during-BB_Bns state setting process performed in S558 in the flowchart of the Bns state setting process (see FIG. 109) will be described.

  First, the sub CPU 102 determines whether the "BAR JAC rush flag" is in the on state (S601). The “BAR JAC entry flag” is a flag indicating whether or not the transition of the pseudo BB state to “in JAC” has been determined. "BARJAC rush flag" is a predetermined line combination (in the present embodiment, "black BAR"-"black BAR"-"black BAR" or "black cherry"-"black BAR"-"black BAR") is an effective line It is turned on when it is stopped and displayed above.

  In S601, when the sub CPU 102 determines that the BARJAC rush flag is not in the on state (S601 is NO), the sub CPU 102 ends the BB_Bns state setting process and also performs the Bns state setting process (see FIG. 109). ) Also ends.

  On the other hand, when the sub CPU 102 determines in S601 that the BARJAC entry flag is in the on state (when the determination in S601 is YES), the sub CPU 102 turns off the BAR JAC entry flag (S602). Next, the sub CPU 102 causes the pseudo BB state to transition to "during JAC" (S603).

  Next, the sub CPU 102 determines whether the number of BB guaranteed JACs is larger than “0” (S604). When the sub CPU 102 determines in S 604 that the BB guaranteed JAC count is not larger than “0” (S 604 is NO), the sub CPU 102 ends the BB_Bns state setting process and the Bns state setting process. (See FIG. 109) also ends.

  On the other hand, when the sub CPU 102 determines in S604 that the number of BB guaranteed JACs is larger than "0" (when the determination in S604 is YES), the sub CPU 102 subtracts one from the number of BB guaranteed JACs (S605). Then, after the processing of S605, the sub CPU 102 ends the BB_Bns state setting processing and also ends the Bns state setting processing (see FIG. 109).

[JAC during _ Bns state setting processing]
Next, with reference to FIG. 114, the JAC-during_Bns state setting process performed in S560 in the flowchart of the Bns state setting process (see FIG. 109) will be described.

  First, the sub CPU 102 determines whether the number of times of JAC bell navigation is "0" (S611). In S611, when the sub CPU 102 determines that the number of times of JAC bell navigation is not “0” (when the determination in S 611 is NO), the sub CPU 102 ends the JAC_Bns state setting process and the Bns state setting process (FIG. See also).

  On the other hand, when the sub CPU 102 determines that the number of times of JAC bell navigation is "0" in S611 (when the determination of S611 is YES), the sub CPU 102 determines whether the number of BB guaranteed JACs is larger than "0". (S612).

  In S612, when the sub CPU 102 determines that the number of BB guaranteed JACs is not larger than “0” (S612 is NO), the sub CPU 102 shifts the pseudo BB state to “ChaBB in progress” (S613). On the other hand, when the sub CPU 102 determines that the number of BB guaranteed JACs is larger than “0” in S 612 (S 612 is YES), the sub CPU 102 shifts the pseudo BB state to “BB in progress” (S 614). .

  After the processing of S613 or S614, the sub CPU 102 sets an initial value "5" to the value of the number of times of JAC bell navigation (S615). Then, after the processing of step S615, the sub CPU 102 ends the JAC_Bns state setting processing and also ends the Bns state setting processing (see FIG. 109).

[ChaBB _ Bns state setting process]
Next, with reference to FIG. 115, the ChaBB_Bns state setting process performed in S562 in the flowchart of the Bns state setting process (see FIG. 109) will be described.

  First, the sub CPU 102 determines whether the BB game counter is less than "0" (S621).

  In S621, when the sub CPU 102 determines that the BB game counter is not less than "0" (when the determination in S621 is NO), the sub CPU 102 performs the processing of S623 described later. On the other hand, when the sub CPU 102 determines in S621 that the BB game counter is less than "0" (when the determination in S621 is YES), the sub CPU 102 causes the pseudo BB state to transition to "none" (S622). In this process, data indicating the pseudo BB state is reset, and the sub gaming state returns from the pseudo BB state to the normal state.

  After the process of S 622 or when the determination of S 621 is NO, the sub CPU 102 determines whether the BAR JAC entry flag is in the on state (S 623). In S623, when the sub CPU 102 determines that the BARJAC entry flag is not in the on state (S623: NO), the sub CPU 102 ends the processing for setting the ChaBB_Bns state and processing for setting the Bns state (see FIG. 109). ) Also ends.

  On the other hand, when the sub CPU 102 determines in S623 that the BARJAC entry flag is in the on state (when the determination in S623 is YES), the sub CPU 102 turns off the BAR JAC entry flag (S624). Next, the sub CPU 102 shifts the pseudo BB state to "during Cha JAC" (S625).

  Then, after the processing of S625, the sub CPU 102 ends the processing of setting the state of ChaBB during _Bns, and also ends the processing of setting Bns state (see FIG. 109).

[Cha JAC during _ Bns state setting processing]
Next, with reference to FIG. 116, the ChaJAC-- Bns state setting process performed in S564 in the flowchart of the Bns state setting process (see FIG. 109) will be described.

  First, the sub CPU 102 determines whether the number of times of JAC bell navigation is "0" (S631). In S631, when the sub CPU 102 determines that the number of times of JAC bell navigation is not “0” (S631 is NO), the sub CPU 102 ends the process of setting the Cha_JAN_Bns state and the Bns state setting process (FIG. 109). See also).

  On the other hand, when the sub CPU 102 determines that the number of times of JAC bell navigation is "0" in S631 (when S631 is YES), the sub CPU 102 determines whether the value of the BB game counter is larger than "0" or not. It discriminates (S632).

  When the sub CPU 102 determines in S632 that the value of the BB game counter is not larger than "0" (when the determination in S632 is NO), the sub CPU 102 shifts the pseudo BB state to "none" (S633). In this process, data indicating the pseudo BB state is reset, and the sub gaming state returns from the pseudo BB state to the AT state. On the other hand, when the sub CPU 102 determines in S632 that the value of the BB game counter is larger than "0" (when the determination in S632 is YES), the sub CPU 102 shifts the pseudo BB state to "ChaBB in progress" (S634). ).

  After the processing of S633 or S634, the sub CPU 102 sets an initial value "5" to the value of the number of times of JAC bell navigation (S635). Then, after the process of S635, the sub CPU 102 ends the process of setting the Cha_J_N_Bns state and also ends the Bns state setting process (see FIG. 109).

[General _ game start processing]
Next, with reference to FIG. 117 and FIG. 118, a description will be given of the general middle game start time processing performed in S415 in the flowchart of the start command reception processing (see FIG. 96).

  First, the sub CPU 102 determines whether the value of the cycle counter is larger than “0” (S641).

  When the sub CPU 102 determines in S641 that the value of the cycle counter is not larger than "0" (in the case of NO determination in S641), the sub CPU 102 performs the processing of S643 described later. On the other hand, when the sub CPU 102 determines in S641 that the value of the cycle counter is larger than "0" (when the determination in S641 is YES), the sub CPU 102 subtracts "1" from the value of the cycle counter (S642).

  After the process of S642 or when the determination of S641 is NO, the sub CPU 102 determines whether the race information MAP data is "0" (S643). In the present embodiment, as described above, five sets of race information MAP data ("1" to "10") up to four races ahead (first race to fifth race) are stored in advance at the start of normal game set. It is set in the area, but each time one race effect is completed, the race information MAP data of the end race is erased, and the race information MAP data of the next set and subsequent ones are stored in the storage area at the head side. It is shifted and stored. At this time, “0” is stored as race information MAP data in the storage area at the end of the empty state. Therefore, in the process of S643, the sub CPU 102 determines whether the race information data of the storage area to be referred to is empty.

  In S643, when the sub CPU 102 determines that the race information MAP data is “0” (when the determination is “YES” in S643), the sub CPU 102 performs the race information lottery processing described in FIG. 94 (S644). That is, when the information regarding the contents of the race effect of the current set (the type of the ally character serving as the race victory target (candidate), the race win rate data of the ally character) is not set, the normal game of the current set is played At the beginning of the period, information on the content of the race presentation is determined by lottery. At this time, information on the contents of the race effect from the current set to four sets ahead (first to fifth races) is determined. Then, after the process of S644, the sub CPU 102 performs the process of S659 described later.

  On the other hand, when the sub CPU 102 determines that the race information MAP data is not "0" in S643 (if S643 is NO), the sub CPU 102 determines whether the gaming state (previous time) is "in the race" or not. (S645). In S645, when the sub CPU 102 determines that the gaming state (previous time) is not "in the race" (when the determination in S 645 is NO), the sub CPU 102 performs the processing of S659 described later.

  On the other hand, when the sub CPU 102 determines that the gaming state (previous time) is "in the race" in S645 (when the S645 is determined as YES), the sub CPU 102 satisfies the relotter condition of the race runner MAP. It is determined whether or not there is (S646). In the present embodiment, the re-lottery condition of the race runner MAP is a case where the number of consecutive losses of the race (the value of the consecutive race loss counter) is “5”.

  In S646, when the sub CPU 102 determines that the re-lottery condition of the race runner MAP is not satisfied (in the case of NO determination in S 646), the sub CPU 102 performs the process of S649 described later.

  On the other hand, when the sub CPU 102 determines in S646 that the re-lottery condition of the race runner MAP is satisfied (when the determination in S 646 is YES), the sub CPU 102 selects the race runner MAP lottery table (see FIG. 32). The race runner MAP lottery processing is performed with reference to (S 647). Next, the sub CPU 102 sets the value (race information MAP number) of the lottery result of the race runner MAP lottery processing to "race runner MAP" (S648).

  After the processing of S648 or when S646 is NO, the sub CPU 102 refers to the race information MAP data table (see FIG. 33), and race information based on the value (race information MAP number) of "race runner MAP". The type (target tables A to J) of the victory target person lottery table (see FIG. 34) corresponding to the MAP data is determined (S649). In this process, based on the set value of the race runner MAP (race information MAP), the "target table" (target table) corresponding to the race information MAP data up to four races ahead (first to fifth races) Any of A to J) is determined. Next, the sub CPU 102 sets the “target table” of the determined first to fifth races (S650).

  Next, the sub CPU 102 performs lottery processing of race victory target (candidates) for the first to fifth races based on the “target table” for the first to fifth races set in S650 ( S651). Next, the sub CPU 102 sets the lottery result of the winning candidate lottery process as the "race winner" (S652). As a result of this processing, race winners from the first race to the fifth race (any one of “male A”, “male B”, “female A”, “tendon”, “Kappa” and “male A and male B”) ) Is set as "race winner".

  Next, the sub CPU 102 checks the race winning percentage data of the current set (S653).

  Next, the sub CPU 102 determines whether “race information data” is “0” (S654). Note that "race information data" is race win rate data, and in the process of S654, the sub CPU 102 determines whether or not the race win rate data of the current set is set.

  When the sub CPU 102 determines in S654 that the race information data is not "0" (when the determination in S654 is NO), the sub CPU 102 performs the processing of S659 described later.

  On the other hand, when the sub CPU 102 determines that the race information data is "0" in S654 (when S654 is YES), the sub CPU 102 refers to the race win rate MAP lottery table (see FIG. 35) and races. A winning percentage MAP lottery process is performed (S655). In this process, the sub CPU 102 determines the race winning percentage data of the “race winner” (race winning target) set in S652 based on the current setting value (one of 1 to 6). Decide.

  Next, the sub CPU 102 sets the lottery result (race winning percentage MAP) of the race winning percentage MAP lottery process to the “race winning percentage map” (S656).

  Next, the sub CPU 102 refers to the race win rate MAP data table (see FIG. 36) and acquires race win rate data corresponding to the set “race win rate map” (S657). In this process, as shown in FIG. 36, only the race win rate data of the current set of races (the first race) may be determined, or the race win rate data of the second and subsequent races may also be determined. is there. Next, the sub CPU 102 sets the race win rate data acquired in S657 (S658).

  After the processing of S644 or S658, or if S645 or S654 is NO, the sub CPU 102 performs pseudo BB lottery processing (S659). The details of the pseudo BB lottery process will be described later with reference to FIG. 119 described later.

  Next, the sub CPU 102 determines whether the number of penalty games is "0" (S660). In S660, when the sub CPU 102 determines that the number of penalty games is not "0" (in the case of NO determination in S 660), the sub CPU 102 ends the processing during general _ gaming start time, and the processing when the start command is received Move to S426 (see FIG. 96). That is, when the current game is under penalty, the cycle shortening related process of S661 described later is not performed, and a benefit of shortening the number of normal game can not be obtained.

  On the other hand, when the sub CPU 102 determines in S660 that the number of penalty games is "0" (when the determination in S 660 is YES), the sub CPU 102 performs cycle shortening related processing (S661). In this process, the sub CPU 102 refers to the cycle shortening lottery table (see FIG. 44 and FIG. 45) and performs cycle shortening lottery based on the data of “winning combination history”.

  Next, the sub CPU 102 determines whether the value of the cycle counter is “10” or more and the “race occurrence flag” is off (S662).

  When the sub CPU 102 determines that the determination condition of S 662 is not satisfied in S 662 (when S 662 is NO determination), the sub CPU 102 determines that the result of lottery for the cycle shortening lottery determined in S 661 is “Hot point”. The corresponding number of shortened games is added (S663).

  After the processing of S663, the sub CPU 102 refers to a race victory expectation degree lottery table (not shown) and performs race victory expectation data up lottery (S664). Next, the sub CPU 102 sets the lottery result of the race victory expectation data up lottery for the race victory rate data (S665). Then, after the processing of S665, the sub CPU 102 ends the processing during general_game start, and shifts the processing to S426 of the start command reception processing (see FIG. 96).

  On the other hand, when the sub CPU 102 determines that the determination condition of S 662 is satisfied in S 662 (when the determination of S 662 is YES), the sub CPU 102 determines the extraction result of the cycle shortening lottery determined in S 661 from the value of the cycle counter (short The number of games) is subtracted, and the result of the calculation is set to the value of the cycle counter. Then, the sub CPU 102 determines whether or not the value of the cycle counter after subtraction is less than "10" (S666).

  In S666, when the sub CPU 102 determines that the value of the cycle counter after subtraction is not less than “10” (when the determination in S 666 is NO), the sub CPU 102 ends the processing during general_game start, and the processing The process moves to S426 in the processing upon receiving a start command (see FIG. 96).

  On the other hand, when the sub CPU 102 determines in S666 that the value of the cycle counter after subtraction is less than “10” (when the determination in S 666 is YES), the sub CPU 102 determines the surplus corresponding to the calculation (subtraction) result. The number of shortened games of is added to the "stay point" (S667). Next, the sub CPU 102 sets "10" to the value of the cycle counter (S668). Then, after the processing of S668, the sub CPU 102 ends the processing during general_game start, and shifts the processing to S426 of the start command reception processing (see FIG. 96).

  Note that, as described above, in S661 of the processing during the general middle_game start of the present embodiment, the shortening lottery of the game period of the normal game is performed, and this process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a means (normal game shortening means, first normal game shortening means) for determining the subtraction number of the current remaining unit game number of the normal game in the normal game. In addition, in S667 of processing during the general _ game start time, the subtraction result when the value obtained by subtracting the number of reduced games determined by the regular game period shortening lottery from the remaining unit game number of normal games becomes less than 10 games Is stocked as the number of shorted surplus games. That is, in the present embodiment, when the subtraction result is less than 10 games, the sub control circuit 101 doubles as a means for stocking the subtraction result as the surplus shortened game number (surplus game number stocking means).

[Pseudo BB lottery process]
Next, with reference to FIG. 119, the pseudo BB lottery process performed in S659 in the flowchart of the general inside game start time process process (see FIGS. 117 and 118) will be described.

  First, the sub CPU 102 determines whether the value of the BB precursor counter is “0” or more (S671). In S671, when the sub CPU 102 determines that the value of the BB precursor counter is “0” or more (when the determination in S 671 is YES), the sub CPU 102 ends the pseudo BB lottery process, and the processing is in the middle The process moves to S660 of the start process (see FIGS. 117 and 118).

  On the other hand, when the sub CPU 102 determines that the value of the BB precursor counter is not "0" or more in S671 (if S671 is NO), the sub CPU 102 determines whether the gaming state (present) is "general". It is determined whether or not (S672).

  In S672, when the sub CPU 102 determines that the gaming state (present) is not "general" (when S 672 is NO), the sub CPU 102 is a pseudo BB lottery (in AT, in AT preparation, in race) table The pseudo BB lottery process is performed based on the internal winning combination with reference to (see FIG. 42) (S673). On the other hand, when the sub CPU 102 determines that the gaming state (present) is "general" in S672 (when the determination in S 672 is YES), the sub CPU 102 generates a pseudo BB lottery (general) table (see FIG. 41). The pseudo BB lottery processing is performed based on the internal winning combination with reference to step S674).

  After the processing of S673 or S674, the sub CPU 102 determines whether or not the pseudo BB lottery has been won (S675). In S675, when it is determined that the sub CPU 102 did not win the pseudo BB lottery (when the determination in S 675 is NO), the sub CPU 102 ends the pseudo BB lottery processing, and the processing during the general game start processing (FIG. 117) And move to S660 of FIG.

  On the other hand, when it is determined in S675 that the sub CPU 102 has won the pseudo BB lottery (if the determination in S 675 is YES), the sub CPU 102 sets "at BB win" in the pseudo BB state (S676). Next, the sub CPU 102 refers to the pseudo BB precursor lottery table (see FIG. 43) and performs pseudo BB precursor lottery processing based on the internal winning combination (S677).

  Next, the sub CPU 102 sets the lottery result of the pseudo BB precursor lottery (the number of precursor games of the pseudo BB game) in the BB precursor counter (S678). Then, after the processing of S 678, the sub CPU 102 ends the pseudo BB lottery processing, and shifts the processing to S 660 of the processing during general_game start (see FIG. 117 and FIG. 118).

  As described above, the pseudo BB lottery process of this embodiment is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a means (special game determination means) for determining execution of the simulated BB game.

[Process during general BB_ game start]
Next, with reference to FIG. 120, the general medium BB_game start time process performed in S417 in the flowchart of the start command reception process (see FIG. 96) will be described.

  First, the sub CPU 102 determines whether the number of penalty games is "0" (S681).

  In S681, when the sub CPU 102 determines that the number of penalty games is not “0” (when the determination in S 681 is NO), the sub CPU 102 performs the process of S683 described later. That is, when the current game is under penalty, the BB rush determination process (at the game start time) in S682 described later is not performed. In this case, since the process of turning on the BB rush check flag (transition process to simulated BB gaming) is not performed, a state in which the simulated BB gaming is not started occurs.

  On the other hand, when the sub CPU 102 determines in S681 that the number of penalty games is “0” (when the determination in S 681 is YES), the sub CPU 102 performs BB rush determination processing (at the time of game start) (S682). In this process, the sub CPU 102 manages on / off of the “BB rush check flag” provided to check the occurrence of “command spill”. In addition, the details of the BB rush determination processing (at the time of game start) will be described later with reference to FIG. 121 described later.

  Next, the sub CPU 102 performs BBJAC shift determination processing (at the start of the game) (S683). In this process, the sub CPU 102 manages on / off of the "BAR JAC rush check flag" provided to check the occurrence of "command spill". In addition, the details of the BBJAC transition determination processing (at the game start time) will be described later with reference to FIG. 122 described later.

  Next, the sub CPU 102 performs BB counter management processing (S684). The details of the BB counter management process will be described later with reference to FIG. 123 described later.

  Next, the sub CPU 102 determines whether the race occurrence flag is in the on state (S685).

  In S685, when the sub CPU 102 determines that the race occurrence flag is in the on state (when the determination in S 685 is YES), the sub CPU 102 refers to the not-shown race winning after win winning ratio lottery table and wins after winning race winning ratio lottery The process is performed (S686). Next, the sub CPU 102 sets the lottery result of the winning ratio increase lottery processing after the winning of the race in the race winning percentage data (S687). Then, after the process of S687, the sub CPU 102 performs the process of S695 described later.

  On the other hand, when the sub CPU 102 determines in S685 that the race occurrence flag is not on (S685 is NO), the sub CPU 102 determines whether the value of the cycle counter is "1" or more. (S688). In S688, when the sub CPU 102 determines that the value of the cycle counter is not “1” or more (when the determination in S 688 is NO), the sub CPU 102 performs the processing of S 695 described later.

  On the other hand, when the sub CPU 102 determines that the value of the cycle counter is "1" or more in S688 (if S688 is YES), the sub CPU 102 refers to the pseudo BB cycle shortening lottery table (see FIG. 46). Then, based on the "winning combination history", the pseudo BB period shortening lottery process is performed (S689). Next, the sub CPU 102 subtracts the number of reduced games determined in the pseudo BB period shortening lottery process from the current value of the period counter, and sets the calculation result in the period counter (S690).

  Next, the sub CPU 102 determines whether the value of the cycle counter after the calculation processing of S690 is "0" or less (S691). In S691, when the sub CPU 102 determines that the value of the cycle counter is not “0” or less (when the determination in S691 is NO), the sub CPU 102 performs the processing of S695 described later.

  On the other hand, when the sub CPU 102 determines in S691 that the value of the cycle counter is "0" or less (when the determination in S691 is YES), the sub CPU 102 turns on the race occurrence flag (S692). By this processing, after the end of the simulated BB game, the race effect of the transition effect game is started.

  Next, the surplus shortened game number (absolute value of the calculation result) corresponding to the value of the calculation result of S690 is added to the "booking point" (S693). Next, the sub CPU 102 sets “0” to the value of the cycle counter (S694). Then, after the process of S694, the sub CPU 102 performs the process of S695 described later.

  After the processing of S687 or S694, or when S688 or S691 is NO, the sub CPU 102 refers to the push order navigation lottery table not shown and performs push order navigation lottery processing of the small winnings according to "push order bell". (S695). Next, the sub CPU 102 sets the lottery result of the push order navigation lottery process to the "push order navigation number" (S696). Then, after the processing of S 696, the sub CPU 102 ends the processing during the general medium BB_game start, and shifts the processing to S 426 of the start command reception processing (see FIG. 96).

  As described above, in S689 of the general medium BB_game start process of this embodiment, a short lottery for the game period of the normal game (false BB cycle shortening lottery) is performed, and this process is executed by the sub control circuit 101 Be done. That is, in the present embodiment, the secondary control circuit 101 doubles as a means (second normal game shortening means) for determining the subtraction number of the current remaining unit game number of the normal game in the pseudo BB game.

[BB rush determination processing (at the start of the game)]
Next, with reference to FIG. 121, the BB rush determination process (at the game start time) performed in S682 in the flowchart of the normal medium BB_game start time process (see FIG. 120) will be described.

  First, the sub CPU 102 determines whether the BB entry check flag is in the on state (S701).

  In S701, when the sub CPU 102 determines that the BB rush check flag is not in the on state (when S 701 is NO), the sub CPU 102 performs the processing of S 703 described later. On the other hand, when the sub CPU 102 determines that the BB rush check flag is in the on state in S701 (when the determination in S701 is YES), the sub CPU 102 turns the penalty flag in the on state (S702).

  After the processing of S702 or when the determination of S701 is NO, the sub CPU 102 turns off the BB rush check flag (S703). Next, the sub CPU 102 determines whether the gaming state (present) is "in the race" (S704).

  In S704, when the sub CPU 102 determines that the gaming state (present) is not "race" (when S 704 is NO), the sub CPU 102 determines whether the pseudo BB state is "wait for BB operation". It discriminates (S705). In S705, when the sub CPU 102 determines that the pseudo BB state is not "wait for BB operation" (when S 705 is NO determination), the sub CPU 102 ends the BB rush determination processing (at the time of game start) and performs processing in general Move to S683 in the middle BB_game start process (see FIG. 120).

  On the other hand, when the sub CPU 102 determines that the pseudo BB state is “wait for BB operation” in S 705 (when S 705 is a YES determination), the sub CPU 102 determines that the internal winning combination is “normal ripple 1” to “normal ripple. It is determined whether or not it is 8 "(S706).

  In S706, when the sub CPU 102 determines that the internal winning combination is not any one of “normal ripple 1” to “normal ripple 8” (when S706 is NO determination), the sub CPU 102 performs BB rush determination processing (game start At the same time, the process is transferred to S683 of the general medium BB_game start process (see FIG. 120). On the other hand, when the sub CPU 102 determines in S706 that the internal winning combination is any one of “normal ripple 1” to “normal ripple 8” (when S706 is YES), the sub CPU 102 checks the BB rush check flag. Is turned on (S 707). Then, after the process of S707, the sub CPU 102 ends the BB rush determination process (at the game start time), and shifts the process to S683 of the general medium BB_game start process (see FIG. 120).

  Here again, returning to the process of S704, when the sub CPU 102 determines that the sub gaming state is "in the race" in S 704 (when S 704 is a YES determination), the sub CPU 102 is in the pseudo BB state " It is determined whether or not it is "between BB flags" (S708). In S708, when the sub CPU 102 determines that the pseudo BB state is not "between BB flags" (when S 708 is NO determination), the sub CPU 102 ends the BB rush determination processing (at the time of game start) and performs the processing in general. Move to S683 in the middle BB_game start process (see FIG. 120).

  On the other hand, when the sub CPU 102 determines that the pseudo BB state is “between BB flags” in S 708 (when S 708 is a YES determination), the sub CPU 102 determines that the internal winning combination is “normal ripple 2” or “normal ripple. It is determined whether or not it is 4 "(S709).

  When the sub CPU 102 determines in S709 that the internal winning combination is not “normal 2” or “normal 4” (when the determination in S 709 is NO), the sub CPU 102 performs BB rush determination processing (at the start of the game). The process ends, and the process moves to S683 of the general medium BB_game start process (see FIG. 120). On the other hand, when the sub CPU 102 determines in S 709 that the internal winning combination is “normal 2” or “normal 4” (YES in S 709), the sub CPU 102 turns on the BB rush check flag. (S710). Then, after the process of S710, the sub CPU 102 ends the BB rush determination process (at the game start time) and shifts the process to S683 of the general medium BB_game start process (see FIG. 120).

[BBJAC transition judgment processing (at the start of the game)]
Next, with reference to FIG. 122, the BBJAC transition determination process (at the game start time) performed in S683 in the flowchart of the normal medium BB_game start time process (see FIG. 120) will be described.

  First, the sub CPU 102 determines whether the BARJAC entry check flag is in the on state (S721). In S721, when the sub CPU 102 determines that the BARJAC entry check flag is not in the on state (when the determination in S 721 is NO), the sub CPU 102 performs the processing of S 725 described later.

  On the other hand, when the sub CPU 102 determines that the BARJAC entry check flag is on in S 721 (when S 721 is YES), the sub CPU 102 determines whether the pseudo BB state is “BB”. (S722). In S722, when the sub CPU 102 determines that the pseudo BB state is not “in BB” (when S 722 is NO), the sub CPU 102 performs the process of S725 described later.

  On the other hand, when the sub CPU 102 determines in S722 that the pseudo BB state is “BB in progress” (YES in S722), the sub CPU 102 turns on the BAR JAC entry flag (S723). Next, the sub CPU 102 performs a BB_Bns state setting process described in FIG. 113 (S724). Then, after the process of S724, the sub CPU 102 performs the process of S725 described later.

  After the processing of S724, or if S721 or S722 is NO, the sub CPU 102 turns off the BARJAC entry check flag (S725).

  Next, the sub CPU 102 determines whether the pseudo BB state is "in BB" or "in ChaBB" (S726). In S726, when the sub CPU 102 determines that the pseudo BB state is not "in BB" or "in ChaBB" (when S 726 is NO determination), the sub CPU 102 ends the BBJAC transition determination processing (at the game start time). Then, the process proceeds to S684 in the general BB_game start process (see FIG. 120).

  On the other hand, when the sub CPU 102 determines in S 726 that the pseudo BB state is “in BB” or “in Cha BB” (when S 726 is YES), the internal CPU winning combination is “normally 1”. It is determined whether or not “normal lip 8” and “bell lip 1” to “bell lip 4” (S727).

  In S727, when the sub CPU 102 determines that the internal winning combination is not any of “normal lip 1” to “normal lip 8” and “bell lip 1” to “bell lip 4” (when S 727 is NO), the sub CPU 102 The CPU 102 ends the BBJAC transition determination process (at the game start time), and shifts the process to S684 of the general medium BB_game start process (see FIG. 120). On the other hand, when the sub CPU 102 determines in S727 that the internal winning combination is any one of “normal lip 1” to “normal lip 8” and “bell lip 1” to “bell lip 4” (when S 727 is YES). And the sub CPU 102 turns on the BARJAC entry check flag (S 728). Then, after the process of S728, the sub CPU 102 ends the BBJAC transition determination process (at the game start time) and shifts the process to S684 of the general medium BB_game start process (see FIG. 120).

[BB counter management processing]
Next, with reference to FIG. 123, the BB counter management process performed in S684 in the flowchart of the general medium BB_game start time process (see FIG. 120) will be described.

  First, the sub CPU 102 determines whether or not the pseudo BB state is "in ChaBB" (S731). In S731, when the sub CPU 102 determines that the pseudo BB state is not “in ChaBB” (when the determination in S 731 is NO), the sub CPU 102 performs the process of S734 described later.

  On the other hand, when the sub CPU 102 determines in S731 that the pseudo BB state is "in ChaBB" (when S731 is YES), the sub CPU 102 determines whether the value of the BB game counter is larger than "0" or not. (S732).

  When the sub CPU 102 determines in S732 that the value of the BB game counter is not larger than "0" (when the determination in S732 is NO), the sub CPU 102 performs the processing of S734 described later. On the other hand, when the sub CPU 102 determines in S732 that the value of the BB game counter is larger than "0" (when the determination in S732 is YES), the sub CPU 102 subtracts "1" from the value of the BB game counter (S733). ). Then, after the process of S733, the sub CPU 102 performs the process of S734 described later.

  After the process of S733, or when S731 or S732 is NO, the sub CPU 102 determines whether the pseudo BB state is "in JAC" or "in Cha JAC" (S734).

  In S734, when the sub CPU 102 determines that the pseudo BB state is not “in JAC” or “in Cha JAC” (when S 734 is NO), the sub CPU 102 ends the BB counter management processing and performs processing in general. The processing moves to S685 in the BB_game start processing (see FIG. 120). On the other hand, when the sub CPU 102 determines that the pseudo BB state is "in JAC" or "in Cha JAC" in S734 (when S734 is YES), the internal CPU winning combination is "push order bell". It is determined whether (CT bell: any of winning numbers "17" to "48") (S735).

  In S735, when the sub CPU 102 determines that the internal winning combination is not a "push order bell" (S 735 is NO determination), the sub CPU 102 ends the BB counter management process, and the process is started during general BB_game start The process moves to S685 in the process (see FIG. 120). On the other hand, when the sub CPU 102 determines that the internal winning combination is “push order bell” in S 735 (if S 735 is YES), the sub CPU 102 determines whether the JAC bell navigation count is greater than “0”. It discriminates (S736).

  When the sub CPU 102 determines that the number of JAC bell navigations is not larger than “0” in S 736 (when S 736 is NO), the sub CPU 102 ends the BB counter management process, and the process is started during general BB_game start. The process moves to S685 in the process (see FIG. 120).

  On the other hand, when the sub CPU 102 determines in S736 that the number of times of JAC bell navigation is larger than "0" (when the determination of S736 is YES), the sub CPU 102 subtracts "1" from the number of JAC bell navigations (S737). Then, after the process of S737, the sub CPU 102 ends the BB counter management process, and shifts the process to S685 of the general medium BB_game start process (see FIG. 120).

[During race _ game start processing]
Next, with reference to FIG. 124, the during-race processing-at-a-game start-up process performed in S419 in the flowchart of the start command reception process (see FIG. 96) will be described.

  First, the sub CPU 102 determines whether the number of penalty games is “0” (S741).

  In S741, when the sub CPU 102 determines that the number of penalty games is not “0” (S741 is NO), the sub CPU 102 performs the processing of S743 described later. That is, when the current game is under penalty, the BB rush determination process (at the game start time) in S742 described later is not performed. In this case, since the process of turning on the BB rush check flag (transition process to simulated BB gaming) is not performed, a state in which the simulated BB gaming is not started occurs.

  On the other hand, when the sub CPU 102 determines in S741 that the number of penalty games is "0" (when the determination in S741 is YES), the sub CPU 102 performs the BB rush determination processing (at the time of game start) described in FIG. Perform (S742).

  After the processing of S742 or when S741 is NO, the sub CPU 102 adds “1” to the number of racing games (S743).

  Next, the sub CPU 102 determines whether the number of racing games is "1" (S744). In S744, when the sub CPU 102 determines that the number of racing games is not "1" (when the determination in S 744 is NO), the sub CPU 102 performs the processing of S 749 described later.

  On the other hand, when the sub CPU 102 determines in S744 that the number of racing games is "1" (when the determination in S 744 is YES), the sub CPU 102 refers to the race result lottery table (see FIG. 38) and is set. Race result lottery processing is performed based on the winning race percentage data (S745). In this process, the result (race winning / not winning) of the race presentation performed in the transition presentation game is determined. That is, in the present embodiment, the race result (AT game winning / not winning) is determined by lottery in the first game (starting game) of the race effect.

  Next, whether the sub CPU 102 wins the race victory by race result lottery (whether or not AT wins), or is the value of the race consecutive loss counter (consecutive non-execution number counting means) “9” or more? It is determined whether or not it is determined (S746).

  In S746, when the sub CPU 102 determines that the determination condition of S 746 is satisfied (when the determination in S 746 is YES), the sub CPU 102 turns on the race victory flag (S 747). Then, after the process of S747, the sub CPU 102 performs the process of S749 described later.

  On the other hand, when the sub CPU 102 determines that the determination condition of S 746 is not satisfied in S 746 (S 746 is NO), the sub CPU 102 adds “1” to the value of the race continuity loss counter (S 748). Then, after the process of S748, the sub CPU 102 performs the process of S749 described later.

  In this embodiment, when winning the race winning percentage data rewriting lottery (S945 in FIG. 137) described later and the race winning percentage is rewritten to 0% (when the penalty processing based on the penalty counter is performed) In the process of S748, the addition process of the race consecutive loss counter (ceiling counter) is not performed. In this case, the ceiling cycle number of the normal game for which AT winning is determined is substantially extended.

  After the processing of S747 or S748, or if S744 is NO, the sub CPU 102 performs the pseudo BB lottery processing described in FIG. 119 (S749). Next, the sub CPU 102 determines whether or not the pseudo BB state is “BB winning” (S750).

  In S750, when the sub CPU 102 determines that the pseudo BB state is not “BB winning” (when S 750 is NO), the sub CPU 102 performs the processing of S 752 described later. On the other hand, when the sub CPU 102 determines in S750 that the pseudo BB state is “BB winning” (when the determination in S 750 is YES), the sub CPU 102 turns on the race victory flag (S 751).

  After the processing of S751 or when the determination of S750 is NO, the sub CPU 102 determines whether the pseudo BB state is "between BB flags" or "wait for BB operation" (S752). In S752, when the sub CPU 102 determines that the pseudo BB state is not "between BB flags" or "wait for BB operation" (when S752 is NO), the sub CPU 102 performs the process of S755 described later.

  On the other hand, when the sub CPU 102 determines that the pseudo BB state is “between BB flags” or “wait for BB operation” in S 752 (when S 752 is YES determination), the sub CPU 102 selects the directly added lottery table (FIG. 47A). And with reference to FIG. 47B), the additional lottery processing (direct-on additional lottery processing) is performed based on the “game winning combination history” (S753). At this time, when the penalty flag is in the off state, the direct addition lottery (penalty flag OFF) table in FIG. 47A is referred to, and when the penalty flag is in the on state, the direct addition lottery in FIG. Penalty flag ON: During the race) The table is referenced. Next, the sub CPU 102 adds the value of the lottery result of the direct addition lottery processing (number of AT games added) to the remaining number of AT games (S754).

  After the processing of S754 or when the determination of S752 is NO, the sub CPU 102 refers to a push order navigation lottery table not shown, and performs push order navigation lottery processing of a small winning combination according to "push order bell" (S755). Next, the sub CPU 102 sets the lottery result of the push order navigation lottery process to the "push order navigation number" (S756). Then, after the process of S756, the sub CPU 102 ends the process during the race_game start time, and shifts the process to S426 of the start command reception process (see FIG. 96).

  Note that, as described above, in S745 of the process during the race_game start time of this embodiment, the AT lottery is performed, and this process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a means (notification game determination means) for determining whether or not to perform AT game.

[AT preparation in progress _ game start processing]
Next, with reference to FIG. 125, the AT preparation in-progress processing at the time of start preparation received at S421 in the flowchart of the start command reception processing (see FIG. 96) will be described.

  First, the sub CPU 102 performs the pseudo BB lottery process described in FIG. 119 (S761). Next, the sub CPU 102 determines whether or not the gaming state (present) is different from the gaming state (previous) (S762).

  In S762, when the sub CPU 102 determines that the gaming state (present) is different from the gaming state (previous) (when the determination in S 762 is YES), the sub CPU 102 performs the processing of S 775 described later. On the other hand, when it is determined in S762 that the sub CPU 102 does not differ from the gaming state (present) from the gaming state (previous) (in the case of NO determination in S 762), the sub CPU 102 "" Is determined (S763).

  In S 763, when the sub CPU 102 determines that the “race winner” is “male A” (when the determination in S 763 is YES), the sub CPU 102 performs processing when male A wins _ game start (S 764) . In this process, the sub CPU 102 determines the number of AT start games of AT game (the number of basic stay games of AT state) according to the contents of the AT start game number determination game at the time of "man A" victory described above. Further, in this processing, the sub CPU 102 turns on the AT rush flag. Then, after the process of S764, the sub CPU 102 performs the process of S775 described later.

  On the other hand, when the sub CPU 102 determines that the "race winner" is not "male A" in S763 (when the determination in S763 is NO), the sub CPU 102 determines whether the "race winner" is "male B" It is determined whether or not (S765).

  In S765, when the sub CPU 102 determines that the "race winner" is "male B" (when the determination in S 765 is YES), the sub CPU 102 performs processing when male B wins _ game start (S766) . In this process, the sub CPU 102 determines the number of AT start games of AT game according to the contents of the above-described determination of the number of AT start games at the time of the “male B” victory. Further, in this processing, the sub CPU 102 turns on the AT rush flag. Then, after the process of S766, the sub CPU 102 performs the process of S775 described later.

  On the other hand, when the sub CPU 102 determines that the "race winner" is not the "male B" in S765 (if the determination in S765 is NO), the sub CPU 102 determines whether the "race winner" is "woman A". It is determined whether or not (S767).

  In S767, when the sub CPU 102 determines that the "race winner" is "woman A" (when the determination in S 767 is YES), the sub CPU 102 performs processing when woman A wins _ game start (S768) . In this process, the sub CPU 102 determines the number of AT start games of AT game according to the contents of the above-mentioned AT start game number determination game when "woman A" is won. In addition, the details of the woman A victory time--game start time process will be described later with reference to FIG. 126 described later. Then, after the process of S768, the sub CPU 102 performs the process of S775 described later.

  On the other hand, when the sub CPU 102 determines that the "race winner" is not "woman A" in S767 (when the determination in S 767 is NO), the sub CPU 102 determines whether the "race winner" is "Kappa". It is determined (S769).

  In S769, when the sub CPU 102 determines that the "race winner" is "Kappa" (when S769 is a YES determination), the sub CPU 102 performs Kappa victory time_game start time processing (S770). In this processing, the sub CPU 102 determines the number of AT start games of AT game according to the content of the AT start game number determination game at the time of the “Kappa” victory described above. Note that the details of the Kappa victory_game start processing will be described later with reference to FIG. 127 described later. Then, after the process of S770, the sub CPU 102 performs the process of S775 described later.

  On the other hand, if the sub CPU 102 determines in S769 that the "race winner" is not "Kappa" (if the determination in S769 is NO), the sub CPU 102 determines whether the "race winner" is "tengu" Is determined (S771).

  In S771, when the sub CPU 102 determines that the "race winner" is "tengu" (when the determination in S771 is YES), the sub CPU 102 performs a processing at the time of winning the game of Tengu (S772). In this process, the sub CPU 102 determines the number of AT start games of AT game according to the contents of the above-mentioned AT start game number determination game at the time of "tengu" victory. Further, in this processing, the sub CPU 102 turns on the AT rush flag. Then, after the process of S772, the sub CPU 102 performs the process of S775 described later.

  On the other hand, when the sub CPU 102 determines that the "race winner" is not "tengu" (S771 is NO) in S771, the sub CPU 102 determines that the "race winner" is "male A, male B". It is determined whether there is any (S773). In S773, when the sub CPU 102 determines that the "race winner" is not "male A · male B" (when the determination in S773 is NO), the sub CPU 102 performs the processing of S775 described later.

  On the other hand, when the sub CPU 102 determines that the "race winner" is "man A · man B" at S 773 (when the determination in S 773 is YES), the sub CPU 102 processes man A · man B at victory _ game The start process is performed (S774). In this process, the sub CPU 102 determines the number of AT start games of AT game according to the contents of the AT start game number determination game at the time of “male A, male B” victory described above. Further, in this processing, the sub CPU 102 turns on the AT rush flag. Then, after the process of S774, the sub CPU 102 performs the process of S775 described later.

  After the processing of S 764, S 766, S 768, S 770, S 772 or S 774, if the determination of S 762 is YES or S 773 is NO, the sub CPU 102 refers to the push order navigation lottery table (not shown) "Side order navigation lottery processing of the small part according to" is performed (S775). Next, the sub CPU 102 sets the lottery result of the push order navigation lottery process to the “push order navigation number” (S776). Then, after the processing of S776, the sub CPU 102 ends the AT preparation-game start processing, and shifts the processing to S426 of the start command reception processing (see FIG. 96).

[Woman A victory _ game start processing]
Next, with reference to FIG. 126, the woman A victory time 女 game start time process performed at S768 in the flowchart of AT preparation 遊 技 game start time process (see FIG. 125) will be described.

  First, the sub CPU 102 turns on the AT rush flag (S781). Next, the sub CPU 102 determines a AT start game number lottery (at the time of female A victory) table (see FIG. 48A and FIG. 48B) used in the determination processing of the AT start game number (S 782).

  In the process of S 782, the first game in which the number of AT start games is increased by 50 in one MAX bet operation and the continuation probability is 50%, and the AT start game in one MAX bet operation An AT-started game number lottery (at the time of female A victory) table corresponding to one of the second modes in which the number is increased by 5 and the continuation probability is 95% is determined. In the present embodiment, at S782, the AT start game number lottery (at the time of female A victory) table (see FIG. 48B) corresponding to the second mode is automatically determined. The present invention is not limited to this, and it may be set so that the AT start game number lottery (at the time of female A victory) table (see FIG. 48A) corresponding to the first mode is automatically determined in S782.

  Then, after the processing of S 782, the sub CPU 102 ends the processing when the woman A wins _ the game start time, and shifts the processing to S 775 of AT preparation _ game start processing (see FIG. 125).

[Kappa victory _ game start processing]
Next, with reference to FIG. 127, Kappa victory time _ game start time processing performed in S770 in the flowchart of AT preparation-game start time processing (see FIG. 125) will be described.

  First, the sub CPU 102 determines whether Kappa Sushi MAP data (see FIG. 53) of the current game is “0” (whether Kappa Sushi MAP is not set or not) (S791).

  In S791, when the sub CPU 102 determines that the Kappa Sushi MAP data is not “0” (when the S791 is NO), the sub CPU 102 moves the Kappa Sushi MAP data of the next game onward to the storage area on the top side. Move one (S 792). Specifically, the sub CPU 102 is a second plate to a 10th plate of Kappa sushi MAP data (whether any of “1” to “8” is stored or empty (“0”) state) by 1 plate. The data is shifted to the storage area of the Kappa Sushi map data of the eyes to the 9th dish, and the storage area of the Kudo sushi MAP data of the 10th dish is emptied ("0" is stored). Then, after the process of S792, the sub CPU 102 performs the process of S797 described later.

  On the other hand, when the sub CPU 102 determines that the Kappa Sushi MAP data is "0" in S791 (when the determination in S791 is YES), the sub CPU 102 selects the AT start game number lottery (when Kappa wins) table (FIG. 49). -See FIG. 52) and perform Kappa Sushi MAP lottery processing (S 793). By this processing, the number of "Kappa Sushi MAP" is determined. Next, the sub CPU 102 refers to the Kappa Sushi MAP data table (see FIG. 53), and based on the “Kappa Sushi MAP” number determined in S793, the Kappa Sushi MAP data from the first dish to the 10th dish ( The data of sushi material is acquired (S794).

  After the processing of S794, the sub CPU 102 sets Kappa Sushi MAP data of the first to tenth dishes acquired in S794 (S795). Specifically, the sub CPU 102 stores Kappa Sushi MAP data of first to tenth dishes specified in the Kappa Sushi MAP in the corresponding storage area. Next, the sub CPU 685 sets an initial value “5” in the kappa end counter (S796).

  After the processing of S792 or S796, the sub CPU 102 determines whether or not the Kappa Sushi MAP data of the sixth plate is in an empty state (“0”) (S797). In S 797, when the sub CPU 102 determines that the Kappa sushi map data for the sixth dish is not empty (in the case of NO determination in S 797), the sub CPU 102 performs the processing of S 801 described later.

  On the other hand, when the sub CPU 102 determines that the Kappa sushi map data for the sixth dish is empty in S 797 (if YES in S 797), the sub CPU 102 randomly selects the number of AT start games (when Kappa wins). Referring to the table (see FIGS. 49 to 52), Kappa Sushi MAP lottery processing is performed based on the current Kappa Sushi MAP number (S798). By this processing, the number of "Kappa Sushi MAP" to be set to the sixth plate is determined.

  Next, the sub CPU 102 refers to the Kappa Sushi MAP data table (see FIG. 53) and acquires Kappa Sushi MAP data for 10 dishes based on the “Kappa Sushi MAP” number determined in S798 (S799) . Next, the sub CPU 102 sets Kappa-zushi MAP data for 10 dishes specified in the Kappa-zushi MAP acquired in S799 in the storage area of the sixth and subsequent dishes which are empty (S800).

  After the processing of S800 or when the determination of S797 is NO, the sub CPU 102 determines whether the internal winning combination is the "group 1 combination" (S801). Note that "group 1 role" is an internal winning combination corresponding to any of winning numbers "9" to "14", and "213 bell 1" to "213 bell 8", "231 bell 1" to "231". Bell 8 "," 312 Bell 1 "to" 312 Bell 8 "," 321 Bell 1 "to" 321 Bell 8 "," 1xx 3 Sheets Bell "," 2xx 3 Sheets Bell "and" 3xx 3 Sheets Bell " I'm in prison.

  In S801, when the sub CPU 102 determines that the internal winning combination is not "group 1 combination" (when S801 is NO), the sub CPU 102 refers to the Kappa sushi data conversion occurrence lottery table (see FIG. 55), Based on the internal winning combination, Kappa sushi data conversion occurrence lottery processing is performed (S802).

  Next, the sub CPU 102 determines whether or not the Kappa sushi data conversion generation lottery has been won (S803). In S803, when the sub CPU 102 determines that the Kappa sushi data conversion generation lottery has not won (S803 is NO determination), the sub CPU 102 ends the Kappa victory _ game start processing, prepares AT processing Move to S775 of middle processing start process (see FIG. 125).

  On the other hand, when the sub CPU 102 determines that the Kappa sushi data conversion generation lottery has been won in S 803 (when the determination in S 803 is YES), the sub CPU 102 selects the Kappa sushi data conversion lottery table (see FIGS. 56 to 60). Referring to the following game, the conversion lottery process is performed on the sushi plate (Kappa sushi MAP data) for five dishes (second to sixth dishes) (S804).

  Next, the sub CPU 102 rewrites Kappa Sushi MAP data (sushi material) of the second to sixth dishes based on the lottery result of Kappa sushi data conversion generation / lottery processing of S804 (S805). Then, after the process of S805, the sub CPU 102 ends the process of Kappa victory_game start time, and shifts the process to S775 of AT preparation_game start process (see FIG. 125).

  Here, returning to the processing of S801 again, when the sub CPU 102 determines that the internal winning combination is "group 1 combination" in S801 (when S801 is a YES determination), the sub CPU 102 determines the number of Kappa games The number of acquired AT games is determined by lottery based on the Kappa-zushi MAP data (sushi material) with reference to the acquired lottery table (see FIG. 54) (S806). Next, the sub CPU 102 adds the determined acquired AT game number to the current acquired AT game number (S807).

  Next, the sub CPU 102 determines whether the sushi neta at the time of obtaining the number of AT games is any of "squid", "salmon" and "tuna" (Kappa Sushi MAP data is "1", "4" and "6" (S808). In S808, when the sub CPU 102 determines that the sushi material is not any of "squid", "salmon" and "tuna" (when the determination in S 808 is NO), the sub CPU 102 performs the processing of S 810 described later.

  On the other hand, when the sub CPU 102 determines that the sushi material is any of “squid”, “salmon” and “tuna” in S 808 (when the determination in S 808 is YES), the sub CPU 102 determines the value of the Kappa end counter. Is decremented by "1" (S809).

  After the processing of S809 or when S808 is NO, the sub CPU 102 determines whether the value of the Kappa end counter is less than “0” (S810).

  When the sub CPU 102 determines in S810 that the value of the Kappa end counter is not less than “0” (S810 is NO), the sub CPU 102 determines the number of AT games after the addition operation in S807 as “the number of AT start games "Set" (S811). Then, after the processing of S811, the sub CPU 701 ends the processing at Kappa victory_game start time processing, and shifts the processing to S775 of AT preparation in progress_game start processing (see FIG. 125).

  On the other hand, when the sub CPU 102 determines in S810 that the value of the Kappa end counter is less than "0" (when the determination in S810 is YES), the sub CPU 102 turns on the AT rush flag (S812). Next, the sub CPU 102 sets “20 times” to “BET return chance” (S813).

  As a result of the processing of this S813, the reversion of the AT start game number determination game performed at the end of the Kappa victory_game start time processing can be performed by 20 bet button pressing operations (repetitive hit recovery). If the player has won a revival lottery by pressing the BET button 20 times, the process of Kappa victory_game start time (AT start game number acquisition process) is performed again.

  Then, after the processing of S813, the sub CPU 102 ends the processing at Kappa victory_game start time processing, and shifts the processing to S775 of AT preparation in progress_game start processing (see FIG. 125).

  Although not shown in FIG. 127, when the sushi neta is "Kappamaki" (Kappa Sushi MAP data is "3") in the lottery process of the number of acquired AT games in S806, "LIFE UP". Will win. In this case, the sub CPU 102 adds “1” to the value of the Kappa end counter instead of the series of processes from the addition processing of the AT game number (S 807) to the subtraction processing of the Kappa end counter (S 809). To be done.

  As described above, in S793 of the processing at the time of Kappa victory _ game start of this embodiment, sushi neta (Kappa sushi MA data) for 10 dishes (10 games) sequentially displayed on the liquid crystal display device 11 is determined. This process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a means (additional game information determination means) for determining the game information for 10 games sequentially displayed on the liquid crystal display device 11 in the Kappa sushi effect.

  In addition, in S804 of Kappa victory time _ game start process, when the internal winning combination is other than “group role 1” (for example, “losing”), and winning Kappa sushi data conversion lottery, 2nd to 6th dishes It is determined by lottery whether or not the eye Kappa sushi map data (sushi material) is to be rewritten, and this process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 determines whether or not to change the Kappa Sushi MAP data (sushi material) after the second dish if the internal winning combination is a loss (gaming information change Decision means). In addition, in S805 of processing when Kappa wins _ game start, when rewriting of Kappa sushi MAP data (sushi material) is decided, Kappa sushi MAP data (sushi material) of the second to sixth dishes is rewritten This process is executed by the sub control circuit 101. That is, in this embodiment, the sub control circuit 101 doubles as a means (game information changing means) for changing Kappa-zushi MAP data (sushi material) after the second dish.

  In addition, in S807 of processing when Kappa victory _ game start, when the internal winning combination is "group role 1" (prescribed internal winning combination), the number of AT games acquired is added to the current number of AT games acquired This process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a unit (unit game number addition unit) for adding the acquired AT game number to the current acquired AT game number.

  In addition, in S807 to S809 of Kappa victory time _ game start processing, when the internal winning combination is “group role 1”, the value of the Kappa end counter is updated according to the sushi neta (Kappa sushi MA data) (“ 1) subtraction or “1” addition), and this process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a means (end information update means) for updating the value of the kappa end counter. In addition, if the value of the Kappa end counter is less than “0” at S 811 of the Kappa victory_game start process (when the number of AT start games determined at the time of “Kappa” victory game ends), it is acquired at that time The sum of the number of AT games being played is set as the number of AT start games, and this process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 sets the sum of the number of AT games acquired by the end of the AT start game number determination at the time of the "Kappa" victory as the AT start game number (basic unit It also doubles as a game number determination means). Furthermore, in S813 of Kappa victory-game start processing, at the end of AT start game number determination game, rebirth lottery of AT start game number determination game at the time of "Kappa" victory is performed. To be executed. That is, in the present embodiment, the sub control circuit 101 is a unit that performs the revival lottery of the AT start game number determination game at the time of winning the “Kappa” state at the end of the game period of AT number start game determination at the time of the “Kappa” victory. It also doubles as a return lottery means.

[At _ game start processing]
Next, with reference to FIG. 128, an AT_game start time process performed in S423 in the flowchart of the process on start command reception (see FIG. 96) will be described.

  First, the sub CPU 102 determines whether the number of penalty games is greater than “0” (S 821).

  In S821, when the sub CPU 102 determines that the number of penalty games is not larger than “0” (when the determination in S821 is NO), the sub CPU 102 performs the processing of S823 described later. On the other hand, when the sub CPU 102 determines in S821 that the number of penalty games is larger than "0" (when the determination in S821 is YES), the sub CPU 102 subtracts "1" from the number of penalty games (S822).

  After the processing of S822 or when the determination of S821 is NO, the sub CPU 102 determines whether the number of remaining AT games is larger than "0" (S823).

  In S823, when the sub CPU 102 determines that the number of remaining AT games is not larger than "0" (in the case of NO determination in S823), the sub CPU 102 performs the processing of S825 described later. On the other hand, when the sub CPU 102 determines in S823 that the number of remaining AT games is greater than "0" (when the determination in S823 is YES), the sub CPU 102 subtracts "1" from the number of remaining AT games (S824).

  After the processing of S824 or when S823 is NO, the sub CPU 102 determines whether the gaming state (present) is different from the gaming state (previous) and the gaming state (previous) is "at AT preparation". (S825). In S825, when the sub CPU 102 determines that the determination condition of S 825 is not satisfied (in the case of NO determination of S 825), the sub CPU 102 performs the process of S832 described later.

  On the other hand, when the sub CPU 102 determines in S825 that the determination condition of S825 is satisfied (YES in S825), the sub CPU 102 determines whether the game number lottery end flag is off (S826). ).

  It should be noted that the number-of-games lottery end flag is determined whether the AT-started game number determination process by the player's continuous hitting operation (continuously hitting lottery) is completed in the AT start game number determination game when "woman A" is won This flag is a flag that determines whether or not the pressing operation has been performed until the addition lottery of the AT start game number is not won. In the AT start game number determination game at the time of "woman A" victory, when the AT start game number determination process by the continuous hitting operation of the MAX bet button 21 is finished (when the AT start game number is determined), The game number lottery end flag is turned on. However, in the AT start game number determination game at the time of "woman A" victory, the continuous hitting operation of the MAX bet button 21 is not executed, or in the middle of the continuous hitting lottery Before) If the player has stopped pressing the MAX bet button 21, that is, if the number of AT start games at the time of winning the "woman A" is not determined, the game number lottery end flag is turned off .

  In S826, when the sub CPU 102 determines that the number-of-games lottery end flag is in the OFF state (when S826 is YES determination), that is, in the previous game (final game of AT start game number determination game) If the AT start game number at the time of victory is not determined, the sub CPU 102 executes a woman A_AT start game number determination process (S827). In this process, the predetermined AT start game number (5 games or 50) is referred to with reference to the AT start game number lottery (at the time of female A victory) table (FIG. 48A or FIG. 48B) determined in the AT start game number determination game. If the lottery result is a winning (continuation), the predetermined AT start game number is added to the currently determined AT start game number. The details of the woman A_AT start game number determination process will be described later with reference to FIG. 148 described later.

  Next, after the process of S827, the sub CPU 102 returns the process to S826. Then, the processing of S826 and S827 is repeated until the number-of-games lottery end flag is turned off. That is, in this embodiment, when the AT start game number is not determined in the AT start game number determination game at the time of the "woman A" victory, a predetermined AT start game number (five games or (50 games) loop addition lottery is automatically performed, and the number of AT start games when "woman A" is won is determined.

  On the other hand, when the sub CPU 102 determines that the number-of-games lottery end flag is not in the off state in S826 (when S826 is NO), that is, when the number of AT start games upon winning "woman A" is determined. Then, the sub CPU 102 refers to the winning subject lottery table (see FIG. 34) and performs lottery processing of the race winning candidate (candidate) (S828). Next, the sub CPU 102 sets the lottery result of the winning candidate lottery process as the "race winner" (S829).

  Next, the sub CPU 102 refers to the post-AT race victory expectation data selection lottery table (see FIG. 39), and performs winning percentage lottery processing (post-AT race winning ratio lottery processing) of the race performed in the transition effect game after AT S830). Next, the sub CPU 102 sets the lottery result of the after-AT race winning percentage lottery process of S 830 in the race winning percentage data (S 831).

  After the process of S831 or when the determination of S825 is NO, the sub CPU 102 performs the pseudo BB lottery process described in FIG. 119 (S832). Next, the sub CPU 102 refers to the directly added lottery table (see FIGS. 47A and 47C), and performs added lottery processing (directly added lottery processing) for the number of AT games (S833). At this time, when the penalty flag is in the off state, the direct addition lottery (penalty flag OFF) table in FIG. 47A is referred to, and when the penalty flag is in the on state, the direct addition lottery in FIG. Penalty flag ON: During AT, during AT BB) table is referenced. Next, the sub CPU 102 adds the value of the lottery result of the direct addition lottery processing (number of AT games added) to the remaining number of AT games (S 834).

  Next, the sub CPU 102 refers to a push order navigation lottery table (not shown) and performs push order navigation lottery processing of the small winning combination according to the "push order bell" (S835). Next, the sub CPU 102 sets the lottery result of the push order navigation lottery process to the “push order navigation number” (S 836). Then, after the processing of S 836, the sub CPU 102 ends the processing during AT_game start time, and shifts the processing to S 426 of the start command reception processing (see FIG. 96).

  Note that, as described above, in the processing during AT_game start of the present embodiment, additional lottery of the number of AT games is performed, and this processing is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a unit (informing game adding means, first informing game adding means) for determining an addition number of unit game numbers of AT games in AT gaming. Further, in the above-described AT_game start process, when the number of AT start games is not determined in the transition effect game when the “woman A” is won (when the number-of-games lottery end flag is off), AT game At the start, the number of AT start games at the time of "woman A" victory is determined, and this process is executed by the sub control circuit 101. That is, in the present embodiment, when the AT start game number (basic unit game number) is not determined in the transition effect game at the time of "woman A" victory in the secondary control circuit 101, "woman A" at the start of AT game. It also serves as a means (second basic game number determination means) for determining the number of AT start games at the time of victory.

[AT during BB_ game start processing]
Next, with reference to FIG. 129, the during-AT BB_gaming start process performed in S425 in the flowchart of the start command reception process (see FIG. 96) will be described.

  First, the sub CPU 102 determines whether the number of penalty games is “0” (S841).

  In S841, when the sub CPU 102 determines that the number of penalty games is not “0” (when the determination in S841 is NO), the sub CPU 102 performs the processing of S843 described later. That is, when the current game is under penalty, the BB rush determination process (at the time of game start) in S842 described later is not performed. In this case, since the process of turning on the BB rush check flag (transition process to simulated BB gaming) is not performed, a state in which the simulated BB gaming is not started occurs.

  On the other hand, when the sub CPU 102 determines in S841 that the number of penalty games is "0" (when the determination in S841 is YES), the sub CPU 102 performs the BB rush determination processing (at the time of game start) described in FIG. Perform (S842).

  After the processing of S842 or when S841 is NO, the sub CPU 102 performs the BBJAC transition determination processing (at the time of the game start) described in FIG. 122 (S843). Next, the sub CPU 102 performs the BB counter management process described in FIG. 123 (S844).

  Next, the sub CPU 102 refers to the directly added lottery table (see FIG. 47A and FIG. 47C), and performs added lottery processing (directly added lottery processing) for the number of AT games (S845). At this time, when the penalty flag is in the off state, the direct addition lottery (penalty flag OFF) table in FIG. 47A is referred to, and when the penalty flag is in the on state, the direct addition lottery in FIG. Penalty flag ON: During AT, during AT BB) table is referenced. Next, the sub CPU 102 adds the value of the lottery result of the direct addition lottery processing (number of AT games added) to the remaining number of AT games (S846).

  Next, the sub CPU 102 refers to a push order navigation lottery table (not shown) and performs push order navigation lottery processing of the small winning combination according to the "push order bell" (S847). Next, the sub CPU 102 sets the lottery result of the push order navigation lottery process to the “push order navigation number” (S848). Then, after the process of S848, the sub CPU 102 ends the during-AT BB_game start process, and moves the process to S426 of the start command reception process (see FIG. 96).

  As described above, in the AT middle BB_game start time process of the present embodiment, additional lottery of the number of AT games is performed, and this process is executed by the sub control circuit 101. That is, in the present embodiment, the sub control circuit 101 doubles as a means (second notification game addition means) for determining the addition number of unit game numbers of AT games in the pseudo BB game.

[Playing state setting process]
Next, with reference to FIG. 130, the game state setting process performed in S427 in the flowchart of the start command reception process (see FIG. 96) will be described.

  First, the sub CPU 102 determines whether or not the gaming state (present) is "general" (S851).

  In S851, when the sub CPU 102 determines that the gaming state (present) is "general" (when the determination of S 851 is YES), the sub CPU 102 performs general _ gaming state setting processing (S 852). In addition, the details of the general middle-gaming state setting process will be described later with reference to FIG. 131 described later. Then, after the process of S852, the sub CPU 102 ends the gaming state setting process, and also ends the start command reception process (see FIG. 96).

  On the other hand, when the sub CPU 102 determines that the gaming state (present) is not "general" in S 851 (if S 851 is NO), the sub CPU 102 has the gaming state (present) "general BB". It is determined whether or not (S853).

  In S853, when the sub CPU 102 determines that the gaming state (present) is "general medium BB" (when the determination in S853 is YES), the sub CPU 102 performs general medium BB_gaming state setting processing (S854). The details of the general medium BB_gaming state setting process will be described later with reference to FIG. 132 described later. Then, after the processing of S 854, the sub CPU 102 ends the gaming state setting processing, and also ends the start command reception processing (see FIG. 96).

  On the other hand, when the sub CPU 102 determines that the gaming state (present) is not "general middle BB" in S853 (when the determination in S853 is NO), the gaming state (present) is "racing" in the sub CPU 102 It is determined whether or not (S855).

  In S855, when the sub CPU 102 determines that the gaming state (present) is "in the race" (when the determination in S 855 is YES), the sub CPU 102 performs a race_gaming state setting process (S 856). In addition, the details of the in-race_gaming state setting process will be described later with reference to FIG. 133 described later. Then, after the processing of S 856, the sub CPU 102 ends the gaming state setting processing, and also ends the start command reception processing (see FIG. 96).

  On the other hand, when the sub CPU 102 determines in S855 that the gaming state (present) is not "in the race" (when the determination in S 855 is NO), the sub CPU 102 has the gaming state (present) in the "AT preparation". It is determined whether or not (S857).

  In S857, when the sub CPU 102 determines that the gaming state (present) is "at AT preparation" (when the determination at S 857 is YES), the sub CPU 102 performs AT preparation _ gaming state setting processing (S 858) . The details of the AT preparation process state setting process will be described later with reference to FIG. 134 described later. Then, after the processing of S 858, the sub CPU 102 ends the gaming state setting processing, and also ends the start command reception processing (see FIG. 96).

  On the other hand, when the sub CPU 102 determines that the gaming state (present) is not "at preparation for AT" in S 857 (when S 857 is NO), the gaming state (present) is "BB during AT" It is determined whether there is any (S859).

  In S859, when the sub CPU 102 determines that the gaming state (present) is "at BB" (when S859 is a YES determination), the sub CPU 102 performs in-AT BB_playing state setting processing (S860). The details of the during-AT BB_playing state setting process will be described later with reference to FIG. 135 described later. Then, after the processing of S 860, the sub CPU 102 ends the gaming state setting processing, and also ends the start command reception processing (see FIG. 96).

  On the other hand, when the sub CPU 102 determines in S 859 that the sub gaming state is not “at BB” (when S 859 is NO), the sub CPU 102 ends the gaming state setting process and also processes when receiving a start command. (See FIG. 96) also ends.

  Although not shown in FIG. 130, in the series of repeated processing of the determination processing of the sub gaming state and the gaming state setting processing described above during the gaming state setting processing, actually, the sub gaming state is "W in the middle" Determination processing whether or not there is a game state setting processing of "during a chance", and determination processing whether sub gaming state is "during AT" and a processing state setting processing of "during AT" are also performed. .

[General _ gaming state setting process]
Next, with reference to FIG. 131, a description will be given of a general-- gaming state setting process performed in S852 in the flowchart of the gaming state setting process (see FIG. 130).

  First, the sub CPU 102 determines whether the value of the cycle counter is “0” (S871).

  In S871, when the sub CPU 102 determines that the value of the cycle counter is not "0" (when the determination in S871 is NO), the sub CPU 102 performs the processing of S873 described later. On the other hand, when the sub CPU 102 determines in S 871 that the value of the cycle counter is “0” (when the determination in S 871 is YES), the sub CPU 102 sets “playing” to the gaming state (next time) ( S872).

  After the processing of S 872 or when the determination of S 871 is NO, the sub CPU 102 determines whether the value of the BB precursor counter is “0” (S 873). In S873, when the sub CPU 102 determines that the value of the BB precursor counter is not "0" (when the determination in S 873 is NO), the sub CPU 102 ends the general _ game state setting process and the game state setting process. (See FIG. 130) also ends.

  On the other hand, when the sub CPU 102 determines that the value of the BB precursor counter is “0” in S 873 (when the determination in S 873 is YES), the sub CPU 102 determines whether the gaming state (next time) is “race”. It is determined whether or not (S874).

  In S874, when the sub CPU 102 determines that the gaming state (next time) is not "racing" (when the determination of S 874 is NO), the sub CPU 102 performs the processing of S 876 described later. On the other hand, when the sub CPU 102 determines in S874 that the gaming state (next time) is "racing" (when the determination of S 874 is YES), the sub CPU 102 turns on the race occurrence flag (S 875).

  After the processing of S875 or when the determination of S874 is NO, the sub CPU 102 determines whether or not the race occurrence flag is in the on state (S876). In S876, when the sub CPU 102 determines that the race occurrence flag is not in the on state (when S876 is NO), the sub CPU 102 performs the process of S878 described later. On the other hand, when the sub CPU 102 determines in S876 that the race occurrence flag is in the on state (YES in S876), the sub CPU 102 sets “0” in the cycle counter (S 877).

  After the processing of S877 or when the determination of S876 is NO, the sub CPU 102 sets "general medium BB" to the gaming state (next time) (S878). Then, after the processing of S 878, the sub CPU 102 ends the general middle game state setting process and also ends the game state setting process (see FIG. 130).

[General medium BB_ game state setting process]
Next, with reference to FIG. 132, the general medium BB_gaming state setting process performed in S854 in the flowchart of the gaming state setting process (see FIG. 130) will be described.

  First, the sub CPU 102 determines whether the value of the BB game counter is “0” (S881). In S881, when the sub CPU 102 determines that the value of the BB game counter is not “0” (when the determination in S 881 is NO), the sub CPU 102 ends the general BB_gaming state setting processing, and the gaming state setting processing. (See FIG. 130) also ends.

  On the other hand, when the sub CPU 102 determines in S881 that the value of the BB game counter is "0" (when the determination in S881 is YES), the sub CPU 102 has a pseudo BB state of "ChaJAC" and the JAC. It is determined whether the number of bell navigations is larger than "0" (S882). In S882, when the sub CPU 102 determines that the determination condition of S 882 is satisfied (when S 882 is YES determination), the sub CPU 102 ends the general medium BB_gaming state setting processing and also sets the gaming state setting processing (see FIG. 130). ) Also ends.

  On the other hand, when the sub CPU 102 determines in S 882 that the determination condition of S 882 is not satisfied (S 882 is NO), the sub CPU 102 determines whether the race occurrence flag is in the on state (S 883). .

  In S883, when the sub CPU 102 determines that the race occurrence flag is not in the on state (when S883 is NO), the sub CPU 102 sets "general" to the gaming state (next time) (S884). Then, after the processing of S884, the sub CPU 102 ends the general medium BB_gaming state setting processing and also ends the gaming state setting processing (see FIG. 130).

  On the other hand, when the sub CPU 102 determines in S883 that the race occurrence flag is in the on state (if S883 is YES), the sub CPU 102 sets "playing" in the gaming state (next time) (S885) . Then, after the processing of S885, the sub CPU 102 ends the general medium BB_gaming state setting processing and also ends the gaming state setting processing (see FIG. 130).

[During race _ gaming state setting processing]
Next, with reference to FIG. 133, the in-race_gaming state setting process performed in S856 in the flowchart of the gaming state setting process (see FIG. 130) will be described.

  First, the sub CPU 102 determines whether the number of racing games is the 10th game (S891). In S891, when the sub CPU 102 determines that the number of racing games is not the 10th game (when S 891 is NO), the sub CPU 102 ends the racing _ game state setting process and the game state setting process (FIG. 130) is also finished.

  On the other hand, when the sub CPU 102 determines that the number of racing games is the tenth game in S891 (when the determination of S891 is YES), the sub CPU 102 determines whether the race victory flag is in the on state ( S892).

  In S892, when the sub CPU 102 determines that the race victory flag is not in the on state (S892 is NO), the sub CPU 102 sets "general" to the gaming state (next time) (S893). Then, after the processing of S 893, the sub CPU 102 ends the in-race_gaming state setting processing and also ends the gaming state setting processing (see FIG. 130).

  On the other hand, when the sub CPU 102 determines in S 892 that the race victory flag is on (when S 892 is YES), the sub CPU 102 determines whether the value of the BB precursor counter is “0”. (S894).

  In S894, when the sub CPU 102 determines that the value of the BB precursor counter is not “0” (S894: NO), the sub CPU 102 sets “at preparation” to the gaming state (next time) (S 895) ). Then, after the processing of S895, the sub CPU 102 ends the in-race_gaming state setting process and also ends the gaming state setting process (see FIG. 130).

  On the other hand, when the sub CPU 102 determines that the value of the BB precursor counter is “0” in S 894 (when the determination in S 894 is YES), the sub CPU 102 sets “playing BB” to the gaming state (next time). (S896). Then, after the processing of S896, the sub CPU 102 ends the in-race_gaming state setting process and also ends the gaming state setting process (see FIG. 130).

[AT preparation _ gaming state setting process]
Next, with reference to FIG. 134, a description will be given of AT preparation in progress_gaming state setting processing performed in S858 in the flowchart of the gaming state setting processing (see FIG. 130).

  First, the sub CPU 102 determines whether the AT entry flag is in the on state (S901). In S901, when the sub CPU 102 determines that the AT rush flag is not in the on state (when S 901 is NO), the sub CPU 102 ends the AT preparation process _ game state setting process and the game state setting process ( 130) is also finished.

  On the other hand, when the sub CPU 102 determines that the AT rush flag is in the on state in S901 (when the determination in S901 is YES), the sub CPU 102 sets "at AT" to the gaming state (next time) (S902) . Next, the sub CPU 102 determines whether the value of the BB precursor counter is “0” or more (S903).

  In S903, when the sub CPU 102 determines that the value of the BB precursor counter is not "0" or more (when the determination in S903 is NO), the sub CPU 102 performs the processing of S906 described later.

  On the other hand, when the sub CPU 102 determines in S 903 that the value of the BB precursor counter is “0” or more (when the determination in S 903 is YES), the sub CPU 102 sets the value of the BB precursor counter to “0”. (S904). Next, the sub CPU 102 sets "AT Medium BB" to the gaming state (next time) (S905).

  After the processing of S 905 or when the determination of S 903 is NO, the sub CPU 102 turns off the “number of games lottery end flag” (S 906). The “game number lottery end flag” is a flag indicating whether or not the AT start game number determination game is ended. Then, after the processing of S 906, the sub CPU 102 ends the AT preparation in-progress-gaming state setting processing and also ends the gaming state setting processing (see FIG. 130).

[At BB_ game state setting process]
Next, with reference to FIG. 135, the during-AT BB_gaming state setting process performed in S860 in the flowchart of the gaming state setting process (see FIG. 130) will be described.

  First, the sub CPU 102 determines whether the value of the BB game counter is "0" (S911). In S911, when the sub CPU 102 determines that the value of the BB game counter is not “0” (when the determination in S 911 is NO), the sub CPU 102 ends the in-AT BB_gaming state setting process and the gaming state setting process. (See FIG. 130) also ends.

  On the other hand, when the sub CPU 102 determines in S911 that the value of the BB game counter is "0" (when the determination in S911 is YES), the sub CPU 102 has a pseudo BB state of "ChaJAC", and the JAC It is determined whether the number of bell navigations is larger than "0" (S912). In S912, when it is determined that the sub CPU 102 satisfies the determination condition of S 912 (when S912 is a YES determination), the sub CPU 102 ends the during-AT BB_gaming state setting process and also the gaming state setting process (see FIG. 130). ) Also ends.

  On the other hand, when the sub CPU 102 determines that the determination condition of S 912 is not satisfied in S 912 (S 912 is NO), the sub CPU 102 determines whether the race victory flag is on (S 913). .

  In S913, when the sub CPU 102 determines that the race victory flag is in the on state (when the determination in S 913 is YES), the sub CPU 102 sets "at preparation" to the gaming state (next time) (S 914). Then, after the process of S914, the sub CPU 102 ends the during-AT BB_gaming state setting process and also ends the gaming state setting process (see FIG. 130).

  On the other hand, when the sub CPU 102 determines in S913 that the race victory flag is not in the on state (when the determination in S913 is NO), the sub CPU 102 determines whether or not the "additional challenge flag" is in the on state ( S 915). Note that the “additional challenge flag” is a flag indicating whether or not the game in the additional challenge state is executed, and is not shown, but is set in the AT preparation process state setting process.

  In S915, when the sub CPU 102 determines that the additional challenge flag is in the on state (when the determination in S 915 is YES), the sub CPU 102 sets "during additional challenge" as the gaming state (next time) (S916). Then, after the process of S916, the sub CPU 102 ends the during-AT BB_gaming state setting process and also ends the gaming state setting process (see FIG. 130).

  On the other hand, when the sub CPU 102 determines that the additional challenge flag is not in the on state in S 915 (when S 915 is NO), the sub CPU 102 sets "at AT" to the gaming state (next time) (S 917). Then, after the processing of S917, the sub CPU 102 ends the during-AT BB_gaming state setting processing and also ends the gaming state setting processing (see FIG. 130).

[Reel stop command reception processing]
Next, with reference to FIG. 136, the reel stop command reception process performed in S360 in the flowchart of the effect content determination process (see FIGS. 91 and 92) will be described.

  First, the sub CPU 102 determines whether a special processing condition is satisfied (S921). The "special processing condition" is a condition in which the penalty determination is not performed. Specifically, when the maximum number of medals that can be inserted is two, the gaming state is between 3 MB flags. Or if the MB is active.

  In step S921, when the sub CPU 102 determines that the special processing condition is satisfied (when the determination in step S921 is YES), the sub CPU 102 ends the reel stop command reception processing and performs effect content determination processing (FIG. 91). And see FIG. 92). On the other hand, when the sub CPU 102 determines that the special processing condition is not satisfied in S921 (when S921 is NO), the sub CPU 102 determines whether the current reel stop state is a state other than the first stop. It is determined whether or not it is (S922).

  In S922, when the sub CPU 102 determines that the current stop state of the reel is a state other than the first stop (when the determination in S 922 is YES), the sub CPU 102 ends the reel stop command reception processing. The effect content determination processing (see FIGS. 91 and 92) is also ended. On the other hand, when the sub CPU 102 determines in S922 that the current stop state of the reel is not the state other than the first stop (when the determination in S922 is NO), the sub CPU 102 has the gaming state (currently) "generally". It is determined whether or not (S923).

  In S923, when the sub CPU 102 determines that the gaming state (present) is "in general" (when the determination in S 923 is YES), the sub CPU 102 performs general middle penalty processing (S 924). The details of the general medium penalty process will be described later with reference to FIG. 137 described later. Then, after the processing of S924, the sub CPU 102 ends the processing at the time of receiving the reel stop command, and also ends the effect content determination processing (see FIGS. 91 and 92).

  On the other hand, if the sub CPU 102 determines in S923 that the gaming state (present) is not "general" (if the determination in S 923 is NO), the sub CPU 102 determines whether the gaming state (present) is "in race" It is determined whether or not (S925).

  In S925, when the sub CPU 102 determines that the gaming state (present) is "in the race" (when the determination in S 925 is YES), the internal CPU winning combination is "push bell" (CT bell) Then, it is determined whether or not the first stopped reel is other than the left reel 3L (S926).

  When the sub CPU 102 determines that the determination condition of S 926 is not satisfied in S 926 (S 926 is NO determination), the sub CPU 102 ends the reel stop command reception processing and performs effect content determination processing (FIG. 91 and See also FIG. 92). On the other hand, when the sub CPU 102 determines that the determination condition of S 926 is satisfied in S 926 (if S 926 is a YES determination), the sub CPU 102 adds “5” to the number of penalty games and sets “1” to the penalty counter value. Is added (S927).

  If the number of penalty games after the addition exceeds “10” (the upper limit of the number of penalty games) in the process of S 927, the sub CPU 102 sets “10” as the number of penalty games. If the value of the penalty counter after the addition exceeds “10” (the upper limit of the value of the penalty counter), the sub CPU 102 sets “10” to the value of the penalty counter. Then, after the processing of S927, the sub CPU 102 ends the processing at the time of receiving the reel stop command, and also ends the effect content determination processing (see FIGS. 91 and 92).

  Here, again, returning to the process of S925, when the sub CPU 102 determines that the gaming state (present) is not "in the race" in S 925 (when the determination in S 925 is NO), the sub CPU 102 determines the gaming state ( It is determined whether or not “current medium BB” or “at medium BB” (S 928).

  In S928, when the sub CPU 102 determines that the gaming state (present) is "general medium BB" or "at medium BB" (when the determination in S 928 is YES), the sub CPU 102 performs a penalty process during BB ( S 929). The details of the BB-in-progress penalty process will be described later with reference to FIG. 138 described later. Then, after the processing of S929, the sub CPU 102 ends the processing at the time of receiving the reel stop command, and also ends the effect content determination processing (see FIGS. 91 and 92).

  On the other hand, when the sub CPU 102 determines that the gaming state (current) is not "general middle BB" or "at middle BB" in S928 (if S928 is NO), the sub CPU 102 determines that the gaming state (current) is It is determined whether or not "at AT" (S930).

  In S930, when the sub CPU 102 determines that the gaming state (present) is not "at AT" (when the determination in S 930 is NO), the sub CPU 102 ends the processing at the time of receiving the reel stop command, and the effect content determination processing (See FIGS. 91 and 92) also end. On the other hand, when the sub CPU 102 determines that the gaming state (present) is "at AT" in S 930 (if S 930 is YES), the sub CPU 102 determines whether the number of penalty games is greater than "0". (S931).

  In S931, when the sub CPU 102 determines that the number of penalty games is not larger than “0” (when the determination in S 931 is NO), the sub CPU 102 ends the reel stop command reception processing and performs effect content determination processing ( Also refer to FIG. 91 and FIG. 92). On the other hand, when the sub CPU 102 determines in S931 that the number of penalty games is larger than “0” (YES in S 931), the sub CPU 102 subtracts “1” from the number of penalty games (S 932). Then, after the processing of S932, the sub CPU 102 ends the processing at the time of receiving the reel stop command, and also ends the effect content determination processing (see FIGS. 91 and 92).

[General medium penalty processing]
Next, with reference to FIG. 137, the general medium penalty processing performed in S924 in the flowchart of the reel stop command reception processing (see FIG. 136) will be described.

  First, the sub CPU 102 determines whether the internal winning combination is the "push order bell" (CT bell) and the first stopped reel is other than the left reel 3L (S941).

  When the sub CPU 102 determines in S941 that the determination condition of S941 is not satisfied (in the case of NO determination in S941), the sub CPU 102 determines whether the number of penalty games is larger than “0” (S942).

  In S942, when the sub CPU 102 determines that the number of penalty games is not larger than “0” (S942 is NO), the sub CPU 102 ends the general middle penalty processing and processing for reel stop command reception ( See FIG. 136) also ends. On the other hand, when the sub CPU 102 determines in S942 that the number of penalty games is larger than "0" (when the determination in S942 is YES), the sub CPU 102 subtracts "1" from the number of penalty games (S943). Then, after the processing of S943, the sub CPU 102 ends the general medium penalty processing and also ends the reel stop command reception processing (see FIG. 136).

  Here, the process returns to S941 again, and when the sub CPU 102 determines that the determination condition of S941 is satisfied in S941 (in the case of YES determination of S941), the sub CPU 102 sets “5” as the number of penalty games. Addition is performed, and "1" is added to the value of the penalty counter (S944). In this process, if the number of penalty games after the addition exceeds “10” (the upper limit of the number of penalty games), the sub CPU 102 sets “10” as the number of penalty games. If the value of the penalty counter after the addition exceeds “10” (the upper limit of the value of the penalty counter), the sub CPU 102 sets “10” to the value of the penalty counter.

  Next, the sub CPU 102 refers to the race win rate data rewrite (during penalty) table shown in FIG. 40 and performs race win rate data rewrite / lottery processing (S945). When the lottery process is won (when the winning classification is other than "no rewriting"), the race winning percentage data is rewritten as a penalty such that the race winning percentage (AT winning probability) of the current cycle is decreased.

  Next, the sub CPU 102 determines whether it has won the race winning percentage data rewriting lottery in S945 (whether or not the winning classification is other than "no rewriting") (S946). In S946, when the sub CPU 102 determines that the race win rate data rewriting lottery has not won (when S 946 is NO determination), the sub CPU 102 ends the general medium penalty processing and processing for reel stop command reception (FIG. 136) is also finished.

  On the other hand, when it is determined that the sub CPU 102 wins the race winning percentage data rewriting lottery in S946 (if S946 is determined as YES), the sub CPU 102 determines that the race winning percentage is the lottery result (in this embodiment, the race winning percentage is 0%). Is set (S947). Then, after the processing of S947, the sub CPU 102 ends the general medium penalty processing and also ends the reel stop command reception processing (see FIG. 136).

[BB during penalty processing]
Next, with reference to FIG. 138, the during-BB penalty processing performed in S929 in the flowchart of the reel stop command reception processing (see FIG. 136) will be described.

  First, the sub CPU 102 determines whether the number of penalty games is larger than “0” (S 951).

  In S951, when the sub CPU 102 determines that the number of penalty games is not larger than “0” (when the determination of S 951 is NO), the sub CPU 102 performs the processing of S 953 described later. On the other hand, when the sub CPU 102 determines in S951 that the number of penalty games is larger than "0" (when the determination in S951 is YES), the sub CPU 102 subtracts one from the number of penalty games (S952).

  After the process of S952 or when the determination of S951 is NO, the sub CPU 102 determines whether or not the pseudo BB state is “wait for BB operation” (S953).

  When the sub CPU 102 determines that the pseudo BB state is not “wait for BB operation” in S 953 (when S 953 is NO), the sub CPU 102 ends the penalty processing during BB, and the reel stop command reception processing ( See FIG. 136) also ends. On the other hand, when the sub CPU 102 determines in S953 that the pseudo BB state is “wait for BB operation” (when the determination in S 953 is YES), the sub CPU 102 determines that the number of penalty games is greater than “0” or It is determined whether the flag is on (S954).

  When the sub CPU 102 determines that the determination condition of S 954 is not satisfied in S 954 (when S 954 is NO determination), the sub CPU 102 ends the penalty processing during BB, and processing during reel stop command reception (see FIG. 136). ) Also ends. On the other hand, when the sub CPU 102 determines that the determination condition of S 954 is satisfied in S 954 (if S 954 is a YES determination), the internal CPU winning combination is “push order bell” (CT bell), and It is determined whether the first stopped reel is other than the left reel 3L (S955).

  When the sub CPU 102 determines that the determination condition of S 955 is not satisfied in S 955 (S 955 is NO determination), the sub CPU 102 ends the penalty processing during BB, and processing during reel stop command reception (see FIG. 136). ) Also ends. On the other hand, when the sub CPU 102 determines in S 955 that the determination condition of S 955 is satisfied (YES in S 955), the sub CPU 102 adds “5” to the number of penalty games (S 956). In this process, if the number of penalty games after the addition exceeds “10” (the upper limit of the number of penalty games), the sub CPU 102 sets “10” as the number of penalty games.

  Then, after the processing of S956, the sub CPU 102 ends the BB middle penalty processing, and also ends the reel stop command reception processing (see FIG. 136).

[Process when receiving prize operation command]
Next, with reference to FIG. 139, a winning operation command reception process performed in S362 in the flowchart of the effect content determination process (see FIGS. 91 and 92) will be described.

  First, the sub CPU 102 determines whether or not the sub gaming state is a winning of "general medium BB" (hereinafter referred to as "general medium BB_winning time") (S961).

  In S 961, when the sub CPU 102 determines that the sub gaming state is “general medium BB_winning state” (when S 961 is YES determination), the sub CPU 102 performs general medium BB winning state processing (S 962). In addition, the details of the general medium BB_pricing process will be described later with reference to FIG. 140 described later. Then, after the processing of S 962, the sub CPU 102 ends the processing at the time of winning operation operation command reception, and also ends the effect content determination processing (see FIGS. 91 and 92).

  On the other hand, when the sub CPU 102 determines in S 961 that the sub gaming state is not “general mid BB_winning” (when S 961 is NO), the sub CPU 102 determines that the sub gaming state is “in race” Hereinafter, it is determined whether or not it is described as "during race_winning time" (S963).

  In S963, when the sub CPU 102 determines that the sub gaming state is “during race _ winning” (when S 963 is determined as YES), the sub CPU 102 performs during racing _ winning processing (S 964). In addition, the details of the in-race processing will be described later with reference to FIG. 143 described later. Then, after the processing of S964, the sub CPU 102 ends the processing at the time of winning operation operation command reception, and also ends the effect contents determination processing (see FIGS. 91 and 92).

  On the other hand, when the sub CPU 102 determines in S963 that the sub gaming state is not "during race _ winning" (when S963 is NO), the sub CPU 102 receives a winning when the sub gaming state is "at BB". It is determined whether or not it is (hereinafter referred to as "at mid-BB_winning time") (S965). In S965, when the sub CPU 102 determines that the sub gaming state is not "at BB _ winning in AT" (when S 965 is NO determination), the sub CPU 102 ends the processing at the time of receiving the winning operation command and determines the contents of the effect. The process (see FIGS. 91 and 92) is also completed.

  On the other hand, when the sub CPU 102 determines in S965 that the sub gaming state is "at BB in prize winning" (when S965 is YES determination), the sub CPU 102 performs at BB in prize winning processing (S966) . The details of the during-AT processing BB_prize will be described later with reference to FIG. 144 described later. Then, after the processing of S966, the sub CPU 102 ends the processing at the time of receiving the winning operation command, and also ends the effect content determination processing (see FIGS. 91 and 92).

[Process during general BB_ prize winning]
Next, with reference to FIG. 140, the general medium BB_prize process will be described which is performed in S962 in the flowchart of the winning operation command reception process (see FIG. 139).

  First, the sub CPU 102 performs BB rush determination processing (at the time of winning) (S971). The details of the BB entry determination process (at the time of winning) will be described later with reference to FIG. 141 described later.

  Next, the sub CPU 102 performs BBJAC shift determination processing (at the time of winning) (S972). The details of the BBJAC shift determination process (at the time of winning) will be described later with reference to FIG. 142 described later. Then, after the processing of S 972, the sub CPU 102 ends the general medium BB_pricing processing, and also ends the winning operation command reception processing (see FIG. 139).

[BB rush determination processing (at the time of winning)]
Next, with reference to FIG. 141, the BB rush determination processing (at the time of winning) performed in S971 in the flowchart of the general medium BB_at winning processing (see FIG. 140) will be described.

  First, the sub CPU 102 determines whether the BB rush check flag is in the on state (S 981). In S981, when the sub CPU 102 determines that the BB rush check flag is not in the on state (when S981 is NO), the sub CPU 102 ends the BB rush determination processing (at the time of winning), and performs the general middle BB_winning processing. Move to S972 of the hour process (see FIG. 140).

  On the other hand, when the sub CPU 102 determines that the BB rush check flag is in the on state in S981 (when the determination in S981 is YES), the sub CPU 102 turns the BB rush check flag in the off state (S982).

  Next, the sub CPU 102 determines whether or not the player has pressed the stop button in accordance with the order of pressing the stop button (hereinafter referred to as "BB entry navigation") notified by the liquid crystal display device 11 at the time of entering the simulated BB game. (S983).

  In the present embodiment, when the internal winning combination is “normal lip 1” or “normal lip 3”, the order of “right and left middle” is notified as the pressing order of the stop button. When the internal winning combination is “normal 2” or “normal 4”, the order of “right middle left” is informed as the pressing order of the stop button. When the internal winning combination is “normal 5” or “normal 7”, the order of “middle left and right” is notified as the pressing order of the stop button. In addition, when the internal winning combination is “normal 6” or “normal 8”, the order of “middle right left” is informed as the pressing order of the stop button.

  In S983, when the sub CPU 102 determines that the player has followed the BB rush navigation (when the determination in S983 is YES), the sub CPU 102 turns on the BB rush flag (S984). Next, the sub CPU 102 turns off the penalty flag (S985). Then, after the processing of S985, the sub CPU 102 ends the BB rush determination processing (at the time of winning), and moves the processing to S972 of the general medium BB_at the time of winning processing (see FIG. 140).

  On the other hand, when the sub CPU 102 determines that the player does not follow the BB rush navigation in S 983 (when the S 983 is NO determination), that is, when the BB rush navigation is ignored, the sub CPU 102 counts the number of penalty games. It is determined whether it is "0" (S986).

  In S986, when the sub CPU 102 determines that the number of penalty games is not “0” (S986 is NO), the sub CPU 102 ends the BB rush determination processing (at the time of winning), and performs the processing during the general BB_winning Move to S972 of the hour process (see FIG. 140). On the other hand, when the sub CPU 102 determines in S986 that the number of penalty games is "0" (when the determination in S986 is YES), the sub CPU 102 turns on the penalty flag (S987). Then, after the processing of S987, the sub CPU 102 ends the BB rush determination processing (at the time of winning), and shifts the processing to S972 of the general medium BB_at winning processing (see FIG. 140).

[BBJAC transition judgment processing (at the time of winning)]
Next, with reference to FIG. 142, the BBJAC transition determination processing (at the time of winning) performed in S972 in the flowchart of the general medium BB_pricing processing (see FIG. 140) will be described.

  First, the sub CPU 102 determines whether the BARJAC entry check flag is in the on state (S991). In S991, when the sub CPU 102 determines that the BARJAC entry check flag is not in the on state (when the determination in S991 is NO), the sub CPU 102 performs the processing of S998 described later.

  On the other hand, when the sub CPU 102 determines in S991 that the BARJAC entry check flag is on (when the determination in S991 is YES), the sub CPU 102 turns off the BAR JAC entry check flag (S992). Next, the sub CPU 102 determines whether or not the pseudo BB state is "in BB" (S993).

  In S993, when the sub CPU 102 determines that the pseudo BB state is "in BB" (when the determination in S993 is YES), the sub CPU 102 performs the processing of S997 described later. On the other hand, when the sub CPU 102 determines in S993 that the pseudo BB state is not "in BB" (when S993 is NO), the sub CPU 102 determines whether the pseudo BB state is "in ChaBB". (S994).

  In S994, when the sub CPU 102 determines that the pseudo BB state is not "in ChaBB" (when the determination of S 994 is NO), the sub CPU 102 performs the processing of S998 described later. On the other hand, when the sub CPU 102 determines in S994 that the pseudo BB state is "ChaBB in" (if S 994 is YES), the sub CPU 102 determines whether the display combination (winning combination) is "BAR rep" It is determined whether or not (S995). The winning combination "BAR Lip" corresponds to "Bell Lip 3" or "Bell Lip 4".

  In S995, when the sub CPU 102 determines that the display combination (winning combination) is "BAR rep" (when the determination of S 995 is YES), the sub CPU 102 performs the processing of S 997 described later. On the other hand, when the sub CPU 102 determines that the display combination (winning combination) is not "BAR rep" in S995 (if S995 is NO), the gaming state (present) is "BB during AT" It is determined whether there is any (S996).

  In S996, when the sub CPU 102 determines that the gaming state (present) is “at BB” (when the determination in S 996 is YES), the sub CPU 102 performs the process of S 997 described later. On the other hand, when the sub CPU 102 determines in S996 that the gaming state (present) is not "at BB" (when S996 is NO), the sub CPU 102 performs the processing of S998 described later.

  If S993, S995 or S996 is determined as YES, the sub CPU 102 turns on the BAR JAC entry flag (S997).

  After the processing of S997, or if S991, S994 or S996 is NO, the sub CPU 102 determines whether the gaming state (present) is different from the gaming state (next) (S998). In S998, when the sub CPU 102 determines that the gaming state (present) is not different from the gaming state (next) (when S 998 is NO), the sub CPU 102 ends the BBJAC transition determination processing (at the time of winning). The process during the general medium BB_ prize (see FIG. 140) is also ended.

  On the other hand, when the sub CPU 102 determines that the gaming state (present) is different from the gaming state (next) in S 998 (if YES in S 998), the sub CPU 102 determines whether the BARJAC rush flag is on or not. (S999). In S999, when the sub CPU 102 determines that the BARJAC entry flag is not in the on state (when S 999 is NO), the sub CPU 102 ends the BBJAC shift determination processing (at the time of winning) and also performs the middle medium BB_ winning processing. (See FIG. 140) also ends.

  On the other hand, when the sub CPU 102 determines that the BARJAC entry flag is on in S 999 (when the determination in S 999 is YES), the sub CPU 102 sets the gaming state (present) to the gaming state (next time) (S 1000) ). Next, the sub CPU 102 sets “0” to the value of the BB game counter (S1001). Then, after the processing of S1001, the sub CPU 102 ends the BBJAC shift determination processing (at the time of winning) and also ends the general medium BB_pricing processing (see FIG. 140).

[During race _ winning process]
Next, with reference to FIG. 143, the during-race_winning process performed in S964 in the flowchart of the winning operation command reception process (see FIG. 139) will be described.

  First, the sub CPU 102 determines whether the BB entry check flag is in the on state (S1011). In S1011, when the sub CPU 102 determines that the BB rush check flag is not in the on state (when S1011 is NO), the sub CPU 102 ends the in-race processing-at-a-prize processing and the processing at a winning operation command reception ( See FIG. 139) also ends.

  On the other hand, when the sub CPU 102 determines in S1011 that the BB rush check flag is in the on state (when the determination in S1011 is YES), the sub CPU 102 turns the BB rush check flag in the off state (S1012).

  Next, the sub CPU 102 determines whether or not the order of depression of the stop button by the player is a predetermined order (whether the order of depression is the correct one) (S1013).

  In S1013, when the sub CPU 102 determines that the player does not press the stop button in the predetermined order (in the case of NO determination in S1013), the sub CPU 102 turns on the penalty flag (S1014). Then, after the processing of S1014, the sub CPU 102 ends the in-race_pricing process and also ends the winning-operation command reception process (see FIG. 139).

  On the other hand, when the sub CPU 102 determines in S1013 that the order of depression of the stop button by the player is a predetermined order (when S1013 is YES determination), the sub CPU 102 turns on the BB rush flag (S1015). ). Next, the sub CPU 102 sets “at BB” to the gaming state (next time) (S1016). Then, after the processing of S1016, the sub CPU 102 ends the in-race_pricing process and also ends the winning-operation command reception process (see FIG. 139).

[At BB_ winning process]
Next, with reference to FIG. 144, the during-AT BB_winning process performed in S966 in the flowchart of the winning operation command reception process (see FIG. 139) will be described.

  First, the sub CPU 102 performs the BB rush determination process (at the time of winning) described in FIG. 141 (S1021). Next, the sub CPU 102 performs the BBJAC shift determination process (at the time of winning) described with reference to FIG. 142 (S1022). Then, after the processing of S 1022, the sub CPU 102 ends the during-AT BB_prize processing, and also ends the winning operation command reception processing (see FIG. 139).

[Processing when receiving a payment end command]
Next, with reference to FIG. 145, a payout end command reception process performed in S364 in the flowchart of the effect content determination process (see FIGS. 91 and 92) will be described.

  First, the sub CPU 102 determines whether the gaming state (the gaming state managed by the main CPU 93) is in the non-MB state (S1031).

  In S1031, when the sub CPU 102 determines that the gaming state is in the non-MB state (when the determination in S 1031 is YES), the sub CPU 102 determines whether or not the credit number of medals is “3” or more ( S1032).

  In S1032, when the sub CPU 102 determines that the credit card number of medals is not “3” or more (when the determination in S 1032 is NO), the sub CPU 102 ends the payout end command reception processing and the effect contents determination processing ( Also refer to FIG. 91 and FIG. 92). On the other hand, when the sub CPU 102 determines in S1032 that the credit number of medals is “3” or more (when the determination in S1032 is YES), the sub CPU 102 performs the processing of S1034 described later.

  Here, returning to the processing of S1031 again, when the sub CPU 102 determines that the gaming state is not the non-MB state in S1031 (in the case of NO determination in S1031), the sub CPU 102 determines that the credit number of medals is “2 It is determined whether or not it is "more than" (S1033).

  In S1033, when the sub CPU 102 determines that the credit card number of medals is not “2” or more (when S 1033 is NO), the sub CPU 102 ends the payout end command reception processing and the effect contents determination processing ( Also refer to FIG. 91 and FIG. 92). On the other hand, when the sub CPU 102 determines in S1033 that the credit number of medals is “2” or more (when the determination in S1033 is YES), the sub CPU 102 performs the processing of S1034 described later.

  If the determination in S1032 or S1033 is YES, the sub CPU 102 makes a lighting request to the LED provided on the MAX bet button 21 (S1034). Then, after the process of S1034, the sub CPU 102 ends the payout end command reception process and also ends the effect content determination process (see FIGS. 91 and 92).

[Process when receiving no operation command]
Next, with reference to FIG. 146, the no-operation command reception process performed in S374 in the flowchart of the effect content determination process (see FIGS. 91 and 92) will be described.

  First, the sub CPU 102 is provided in the sub RAM 103 with state information (for example, on / off information of the BET switch 77, the start switch 79, etc.) of the input port of each operation unit included in the data of the received no operation command. It is stored in the input port state storage area (S1041). Next, the sub CPU 102 determines whether or not the current state is after receiving the payout end command and before receiving the medal insertion command (S1042).

  When the sub CPU 102 determines in S1042 that the determination condition of S1042 is not satisfied (in the case of NO determination in S1042), the sub CPU 102 ends the processing when no operation command is received, and the effect content determination processing (FIG. 91 and See also FIG. 92). On the other hand, when the sub CPU 102 determines in S1042 that the determination condition of S1042 is satisfied (in the case of YES determination in S1042), the sub CPU 102 determines whether or not the gaming state (present) is "at preparation". (S1043).

  In S1043, when the sub CPU 102 determines that the gaming state (present) is not "at preparation" (S1043 is NO determination), the sub CPU 102 ends the processing when no operation command is received, and determines the contents of the effect. The process (see FIGS. 91 and 92) is also completed.

  On the other hand, when the sub CPU 102 determines in S1043 that the gaming state (present) is "at preparation" (when the determination at S1043 is "YES"), the sub CPU 102 performs AT preparation button pressing time processing (S1044) ). In this process, the AT start game number determination process at the time of "woman A" victory, and the reversion lottery process of the AT start game number determination game at the time of "Kappa" victory are performed. The details of the AT preparation button pressing time process will be described later with reference to FIG. 147 described later. Then, after the process of S1044, the sub CPU 102 ends the no-operation command reception process and also ends the effect content determination process (see FIGS. 91 and 92).

[AT preparation button press processing]
Next, with reference to FIG. 147, the process of pressing the button under preparation for AT performed in S1044 in the flowchart of the process at the time of non-operation command reception (see FIG. 146) will be described.

  First, the sub CPU 102 determines whether the MAX bet button 21 is pressed by the player and the race winner is "Kappa" (S1051).

  When the sub CPU 102 determines in S1051 that the determination condition of S1051 is satisfied (when the determination in S1051 is YES), the sub CPU 102 performs processing when the Kappa victory _MAX bet button is pressed (S1052). In this process, a return lottery of the AT start game number determination game when the "Kappa" is won is performed. Then, after the processing of step S1052, the sub CPU 102 ends the processing at the time of AT preparation button pressing time, and also ends the non-operation command reception time processing (see FIG. 146).

  On the other hand, when the sub CPU 102 determines in S1051 that the determination condition of S1051 is not satisfied (in the case of NO determination in S1051), the selection button 25 (chance button) of the sub CPU 102 is pressed by the player and the race is It is determined whether the winner is the "woman A" (S1053).

  When the sub CPU 102 determines in S1053 that the determination condition of S1053 is satisfied (when the determination in S1053 is YES), the sub CPU 102 performs switching processing of the AT start game number lottery table (S1054).

  In the AT start game number determination game at the time of "woman A" victory, as described above, the first mode (continuation probability is 50%, addition for each MAX bet operation) as a determination form (determination mode) of the number of AT start games The number of games is 50, and the second mode (the continuity probability is 95%, and the number of added games per MAX bet operation is 5) is prepared. Then, in the process of S1054, the AT start game number lottery table (one of FIG. 48A and FIG. 48B) corresponding to one mode currently set is extracted as the AT start game number lottery (woman A win) corresponding to the other mode. At the same time, switch to the table (the other in FIG. 48A and FIG. 48B).

  For example, in a situation where the currently set AT start game number lottery table (at the time of woman A victory) is the table of AT start game number lottery (at the time of woman A victory) table (FIG. 48B) corresponding to the second mode When the user presses the selection button 25 (chance button), the AT start game number lottery table (at the time of female A victory) table (FIG. 48A) corresponding to the first mode is “female A” by the switching process of S1054. AT start game number determination at the time of victory The number of AT start games used in the game is set as a lottery (at the time of female A victory) table. Then, after the processing of S1054, the sub CPU 102 ends the processing at the time of AT preparation button pressing time, and also ends the non-operation command reception time processing (see FIG. 146).

  On the other hand, when the sub CPU 102 determines in S1053 that the determination condition of S1053 is not satisfied (in the case of NO determination in S1053), in the sub CPU 102, the MAX bet button 21 is pressed by the player and the race winner is It is determined whether it is "woman A" (S1055).

  When the sub CPU 102 determines in S1055 that the determination condition of S1055 is not satisfied (when S1055 is NO determination), the sub CPU 102 ends the processing at the time of AT preparation button pressing and processing at the time of no operation command reception ( See also FIG. 146).

  On the other hand, when the sub CPU 102 determines in S1055 that the determination condition of S1055 is satisfied (when the determination in S1055 is YES), the sub CPU 102 performs a woman A_AT start game number determination process (S1056). In this process, the sub CPU 102 determines the number of AT start games when the "woman A" is won. The details of the woman A_AT start game determination process will be described later with reference to FIG. 148 described later.

  Then, after the processing of S1056, the sub CPU 102 ends the processing at the time of AT preparation button pressing time, and also ends the non-operation command reception time processing (see FIG. 146).

  As described above, in the AT preparation button pressing time process of the present embodiment, when the MAX bet button 21 is pressed by the player and the race winner is "woman A", "woman A". The number of AT start games at the time of victory is determined, and this process is executed by the sub control circuit 101. That is, in the present embodiment, when the race winner is “woman A”, the sub control circuit 101 determines the number of AT start games triggered by the pressing operation of the MAX bet button 21 (first basic game) It also doubles as a number determining means).

[Female A_AT start game determination processing]
Next, with reference to FIG. 148, the woman performed in S827 in the flowchart of AT_game start time processing (see FIG. 128) or S1056 in the flowchart of AT preparation button press time processing (see FIG. 147). A_AT start game determination processing will be described.

  First, the sub CPU 102 determines whether the number-of-games lottery end flag is off (S1061).

  In S1061, when the sub CPU 102 determines that the game number lottery end flag is not in the off state (S1061 is NO), the sub CPU 102 ends the woman A_AT start game determination process, and the woman A_AT start game determination process. If the call destination of is the processing during AT start-game processing (see FIG. 128), the processing is shifted to S826 of the processing during AT-game start processing. In addition, when the call destination of the woman A_AT start game determination process is an AT preparation button pressing process (see FIG. 147) and the determination in S1061 is NO, the sub CPU 102 ends the woman A_AT start game determination process. At the same time, the processing at the time of AT preparation button pressing is ended.

  On the other hand, when the sub CPU 102 determines in S1061 that the number-of-games lottery end flag is off (when the determination of S1061 is YES), the sub-CPU 102 selects the AT start game number lottery table (see FIGS. 48A and 48B). By reference, a woman A_AT start game number lottery process is performed (S1062). Next, the sub CPU 102 determines whether or not the woman A_AT start game number lottery in S1062 has been won (S1063).

  In S1063, when the sub CPU 102 determines that the woman A_AT start game number lottery has won (if S1063 is YES), the sub CPU 102 determines the predetermined number of games (5 games or 50 games) corresponding to the lottery result. , And is added to the currently determined AT start game number (S1064). Then, after the process of S1064, the sub CPU 102 ends the woman A_AT start game determination process, and when the call destination of the woman A_AT start game determination process is an AT_game start time process (see FIG. 128), The processing is shifted to S826 of AT. If the call destination of the woman A_AT start game determination process is an AT preparation button pressing process (see FIG. 147), after the process of S1064, the sub CPU 102 ends the woman A_AT start game determination process, The processing at the time of pressing the AT preparation button also ends.

  On the other hand, when the sub CPU 102 determines in S1063 that the A-AT start game number lottery has not been won (S1063 is NO), the sub CPU 102 turns on the game number lottery end flag (S1065). Then, after the process of S1065, the sub CPU 102 ends the woman A_AT start game determination process, and when the call destination of the woman A_AT start game determination process is AT_game start time process (see FIG. 128), The processing is shifted to S826 of AT. If the call destination of the woman A_AT start game determination process is an AT preparation button pressing process (see FIG. 147), after the process of S1065, the sub CPU 102 ends the woman A_AT start game determination process, The processing at the time of pressing the AT preparation button also ends.

<Various effects>
In the pachislot 1 of the present embodiment, the following various effects can be obtained in the playability.

[Various effects obtained by the game between 2 MB flags]
In the present embodiment, as described above, the predetermined number of games (190 in the RT1 (high RT) gaming state in which the bonus “2 MB” to be won and won only in the two-piece game is carried), ie, the 2 MB flag state Various games such as a non-AT state game (a normal game and a transition effect game) with one game as a cycle) and an AT state game of a specific number of games are performed. Then, in the game of the 2 MB flag state, the suggestion of 3 pieces is made, and as long as the player plays the 3 pieces of games according to the suggestion, it is possible to play the game without winning the bonus “2 MB”. It should be noted that as long as the player plays a 3-card game in the 2 MB flag state, since the lottery table in which establishment of the bonus “2 MB” and winning are not defined is referred to, the bonus “2 MB” performs any stop operation It is configured not to win a prize.

  In addition, in the pachislot 1 of the present embodiment, the game period of the non-AT state (normally, when a "losing" or a specific internal winning combination (small part or replay role) wins one internal winning or a continuous winning in a normal game) A lottery (cycle shortening lottery) is performed to shorten the number of games in the game period of the game. And, if winning the cycle shortening lottery, the game period of the current non-AT state is shortened, it is possible to shorten the period until it shifts to the AT state. Furthermore, in the present embodiment, when the "losing" or a predetermined internal winning combination (replay combination) is internally won once in the AT game, or when continuously won, the additional lottery for the number of AT games (directly added lottery) is performed. If the player wins the extra lottery, the number of remaining AT games increases.

  That is, in the pachislot 1 of the present embodiment, in the high RT gaming state game during bonus carryover, even if the internal winning combination becomes "loss", it is possible to continue the advantageous game without winning the bonus. . Further, in the present embodiment, the contents of the benefit given at the time of winning the "lost" are differentiated according to the type ("normal state" or "AT state") of the sub gaming state in the high RT gaming state during bonus carryover. be able to.

  Therefore, in the present embodiment, it is possible to give a game value to the "loss" generated in the high RT gaming state game during bonus carryover, and the range of the game can be expanded. In addition, in the high RT gaming state game during bonus carryover, "losing" in which the bonus is not won can be appropriately generated, so that the prosperity of the gaming machine can be maintained. From the above, in the Pachislot machine 1 of the present embodiment, it is possible to improve the player's interest in the game in the high RT gaming state during bonus transfer.

  Furthermore, in the pachislot 1 of the present embodiment, in the 2 MB flag state game, if the total of the credit number of the current medal and the insertion number is less than three, the MAX bet operation is performed by the player. Also, the MAX bet operation is invalidated. In this case, in the state between the 2 MB flags, the game of double sheet by the MAX bet operation is not started, and it is possible to more surely avoid winning of the bonus “2 MB” during carry over.

  That is, in the present embodiment, in the 2 MB flag state, the game of the number of medals to be placed which is disadvantageous to the player can not be played by the MAX bet operation. Therefore, in the pachislot machine 1 of the present embodiment, even a player who does not have knowledge of the game can play the game with ease.

[Various effects obtained by cycle shortening lottery of normal game]
In this embodiment, the reduced number of remaining normal games in the current set is subtracted from the number of reduced games determined by the cycle shortening lottery performed during the normal game, and the subtraction result is less than the predetermined number of games (10 games). If it does, the surplus shortening game number corresponding to the subtraction result is stocked. Then, the surplus reduced number of saved games is applied as the next set of reduced number of games. In this case, the game is played with the non-AT gaming period being shortened from the start of the next set.

  Therefore, in the present embodiment, in the normal game, since it is possible to apply to the next set of normal games without wasting the reduced number of bonus games (benefits) which became surplus in the current set, the next set of normal It is possible to give the player an interest in the game. Further, in this case, since the motive to cause the player to execute the normal game of the next set can be generated, the operation rate of the gaming machine can be increased.

[Various effects obtained by simulated BB game]
As described above, the pachislot 1 according to this embodiment includes the simulated BB game in which the payout of medals increases, and the simulated BB game is started as an interrupt process when the simulated BB lottery is won in the normal game or the AT game. Ru. Therefore, the normal game is not a game that merely digests the game, but a game in which more medals can be obtained by the simulated BB game.

  Further, in this embodiment, in the simulated BB game started during the normal game, the cycle of the non-AT state game period (the normal game period) even when the "losing" or the "rare role" is internally won. A shortened lottery will be made. Then, as a result of subtracting the number of remaining games of the normal game of the current set by the number of shortened games determined by the cycle shortening lottery at this time, if the subtraction result is less than "0", the surplus corresponding to the subtraction result The number of shortened games is stocked. Then, the surplus reduced number of saved games is applied as the next set of reduced number of games.

  On the other hand, in the case of simulated BB game started during AT game, when "losing" or "rare role" is internally won, additional lottery of AT game number (directly added lottery) is carried out, and the extra lottery is won. If so, the current number of remaining AT games increases.

  That is, in the simulated BB game, a benefit is given to the winning of the "loss" or "rare" according to the type ("normal state" or "AT state") of the sub gaming state at the start of the simulated BB game The content of can be different. Furthermore, even in the simulated BB game, it is possible to give a game value to the "loss". Therefore, in the present embodiment, it is possible to improve the interest to the simulated BB game.

  In addition, in the AT game in the 2 MB flag state, not only is a game in which the player is notified simply of the small winning combination internally won, but also a pseudo BB game may be started. The AT game can be prevented from becoming a monotonous game.

[Various effects obtained by AT number game start decision game at the time of "Kappa" victory]
In the AT start game number determination game at the time of the "Kappa" victory of the present embodiment, as described above, the sushi neta in which the character "Kappa" is sequentially taken out for each game is eaten according to the type of internal winning combination, The number of AT start games is determined in accordance with the type of sushi material eaten. That is, in the AT start game number determination game at the time of the "Kappa" victory, the basic stay game number of AT state (AT start game number) is not determined by one lottery, but a plurality of games This is determined based on the type of the internal winning combination and the sushi material (game information) displayed on the liquid crystal screen of the liquid crystal display device 11. Therefore, in the present embodiment, it is possible to enhance the player's interest in the acquired game of the number of AT state games (AT start game number determination game).

  In addition, in the AT start game number determination game at the time of the “Kappa” victory of the present embodiment, as described above, even if the internal winning combination becomes “loss”, the data (game information) of sushi neta after the next game is , May be converted to better data for the player. That is, in the present embodiment, even in the AT start game number determination game, it is possible to give a game value to the "loss", and even when the "loss" is determined, the interest can be maintained.

<Various modifications>
The present invention is not limited to the above-described embodiment, and the following various modifications can be considered, for example.

[Modification 1]
In the pachislot 1 of the above embodiment, when a "losing" is won in a normal game or a simulated BB game (when one or continuous wins), shortening of the game period (the number of stay games) in the normal state (cycle shortening) There is a possibility that you can get the benefits. Further, in the Pachislot machine 1 of the above-described embodiment, there is a possibility that a bonus of the addition of the number of AT games may be obtained when a "loss" is won in the AT game.

  However, the present invention is not limited to this, and even in the normal gaming, pseudo BB gaming, and sub gaming status games other than AT gaming, a function is provided to award a benefit by winning (once or continuously winning) "losing". May be Therefore, in the first modification, a pachislot machine having a function capable of obtaining a benefit of winning an AT will be described further in the case where a "loss" is won in the transition effect game (race effect).

(1) During the race _ Loss at the time of the lottery table First, with reference to FIG. 149, during the race necessary to execute the award function of the above benefits (AT winning) in the transition effect game (race effect) _ explain the lottery table at the time of loss Do. FIG. 149 is a diagram showing the configuration of a lottery table at the time of race_loss. In addition, during the race, the lottery table is, for example, during the race, described later, during the game start process (see FIG. 150, described later), during the race, when the game is lost, during the lottery process (S1118). Referenced in determining AT game wins / not wins.

  During the race, the lottery table defines the correspondence between the winning / non winning of the race win and the lottery value for each value (“1” to “4”) of the lost counter. The loss counter is a counter that manages (counts) the number of consecutive winnings of “lost” during the race effect period (10 games).

  Therefore, for example, when "losing" is won three times in a row during the race effect, the value of the losing counter becomes "3". Then, in this case, the race victory is not won with a probability of 6554/32768, and the race victory is won (race victory flag ON) with a probability of 26214/32768. In addition, when the value of the loss counter is “1” (when the first “losing” is won), the race victory is always not won (AT not won).

(2) During Race_Game Start Processing Next, with reference to FIG. 150, the during race_game start processing in the first modification will be described. Note that the process during race_game start of this example is also performed in S419 in the flowchart of the process upon start command reception of the above embodiment (see FIG. 96).

  Further, in this example, the processes other than the during-race process start process by the sub control circuit 101 are the same as those in the above embodiment. Therefore, here, only the process during the race_game start will be described.

  As apparent from the comparison between the flowchart of the process during game start-up in the example shown in FIG. 150 and the process during the game start-up process in the above embodiment shown in FIG. The processing of S1101 to S1114 in the flowchart of the processing at the game start time is the same as the processing of S741 to S754 in the flowchart of the processing during racing_game start of the above embodiment. Therefore, the description of the processing of S1101 to S1114 is omitted here.

  In this example, after the process of S1114 or when S1112 is NO, the sub CPU 102 determines whether or not the result of the race result lottery is not a winning race and the internal winning combination is "loss". (S1115).

  When the sub CPU 102 determines in S1115 that the determination condition of S1115 is not satisfied (in the case of NO determination in S1115), the sub CPU 102 sets “0” in the loss counter (S1116). Then, after the process of S1116, the sub CPU 102 performs the process of S1121, which will be described later.

  On the other hand, when the sub CPU 102 determines in S1115 that the determination condition of S1115 is satisfied (YES in S1115), the sub CPU 102 adds “1” to the value of the loss counter (S1117). Next, the sub CPU 102 refers to the lottery table (see FIG. 149) during race_loss and performs lottery processing during race_loss based on the value of the loss counter after addition (S1118).

  Next, the sub CPU 102 determines whether or not the result of the lottery process during race_loss is not winning of the race victory (S1119). In S1119, when the sub CPU 102 determines that the result of the lottery process during race_loss is not winning of the race victory (when S1119 is a YES determination), the sub CPU 102 performs the process of S1121 described later.

  On the other hand, when the sub CPU 102 determines in S1119 that the result of the lottery processing during the race _ loss is not a win for the race victory (S1119 is NO determination), the sub CPU 102 turns on the race victory flag. (S1120). Then, after the process of S1120, the sub CPU 102 performs the process of S1121, which will be described later.

  After the processing of S1116 or S1120, or if S1119 is a YES determination, the sub CPU 102 refers to the push order navigation lottery table (not shown) and performs push order navigation lottery processing of the small winning combination according to "push order bell" (S1121 ). Next, the sub CPU 102 sets the lottery result of the pushing order navigation lottery process to the pushing order navigation number (S1122). Then, after the process of S1122, the sub CPU 102 ends the process during the race_game start time, and shifts the process to S426 of the start command reception process (see FIG. 96).

  In the pachislot of the first modification described above, the same effects as those of the above embodiment can be obtained, and also in the transition stage state (during the period of the race stage), it is possible to give a game value to the "losing" The interest for the transition effect game can be improved. In the first modification, an example is described in which the non-winning of the race victory is always determined when the “losing” is internally won once (when the value of the losing counter is “1”), but the present invention is not limited thereto. The invention is not limited to the above, and it may be configured such that the winning of the race victory can be obtained with a predetermined probability even at the single winning of the "losing".

[Modification 2]
In the second modification, as in the first modification, a pachislot machine having a function of obtaining a benefit of winning the AT when the "loss" is won in the transition effect game (race production) (when the game is won once or continuously). Will be explained. However, in this example, the lottery mode of the AT lottery performed at the time of winning "losing" is different from that of the first modification.

  Specifically, in this example, according to the value of the loss counter, not only the winning / non winning of the race win but also the race winning percentage MAP lottery table determined at the start (set of period) of the normal game (see FIG. 35) The re-lottery of the race win rate using is also made selectable. Therefore, the configuration of the lottery table during race_loss used in this example is different from that of the first modification.

  Here, with reference to FIG. 151, the during-race-when-loss lottery table in the second modification will be described. FIG. 151 is a diagram showing the configuration of a lottery table at the time of race_loss in this example. Also in this example, the lottery table during race_loss is referred to, for example, during the race during processing of the first variation of the first modification described with reference to FIG. Ru.

  During the race in this example, the lottery table at the time of the loss is the type of the lottery result (race win win / not win and race win rate re-lottery) for each value (“1” to “3”) of the lose counter and the Define the correspondence with the lottery value. Also in this example, the value of the loss counter indicates the number of consecutive winnings of “loss” during the race effect period (10 games).

  In this example, as shown in FIG. 151, when the value of the loss counter is “1”, a race winning non-winning is always obtained as a lottery result. When the value of the loss counter is "2", a re-lottery of the race win rate is always obtained as a lottery result. Then, when the value of the loss counter is "3", the winning of the race victory is always obtained as the lottery result.

  In this example, if the value of the lost counter is “2” in the lottery shown in FIG. 150 during the race _ game start process _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The sub CPU 102 refers to the race winning percentage MAP lottery table determined at the start of setting in the processing of S1118, and performs re-lottering of the race winning percentage data based on the set value.

  In this example, the configuration is the same as that of the first modification except that the lottery mode of the AT lottery performed at the time of winning the "losing" is different from that of the first modification. Therefore, in the second modification, the same effect as the first modification can be obtained. In the second modification, an example is described in which the non-winning of the race victory is always determined when the "losing" is internally won once (when the value of the losing counter is "1"), but the present invention is not limited thereto. The present invention is not limited to the above, and it may be configured such that at least one of the win of the re-lottery of the race win rate and the win of the race win can be obtained with a predetermined probability also at the first win of "losing".

[Modification 3]
In the above variations 1 and 2, the pachislot having the function of obtaining the benefit of winning the AT winning is described when the “losing” is won in the transition effect game (race effect) (when it is won once or continuously). The present invention is not limited to this. In the transition effect game, another bonus may be given when “losing” is won. For example, the game in the "superimposed challenge state" in which the simulated BB game is won with a high probability over a predetermined number of games when the "loss" is won in the transition effect game (when it is won once or continuously) May be stocked.

  In this case, the game in the "superimposed challenge state" stocked during the transition effect game (race effect) is a specific symbol combination ("yellow BAR"-"yellow BAR"-"yellow BAR") after transition to the AT state. It is displayed stopped on the effective line and started.

  In the configuration of this example, it is possible to make the game after AT state transition be made more advantageous to the player, and to increase the difference in the playability (the advantage of the game) between the AT state and other states. Can. Therefore, in this example, it is possible to emphasize the game characteristics between the AT state and the other states, and to further improve the interest of the game.

[Modification 4]
In the pachislot 1 of the above embodiment, when a "losing" is won in a normal game or a simulated BB game (when one or continuous wins), shortening of the game period (the number of stay games) in the normal state (cycle shortening) Although the present invention is configured to obtain the benefits of the present invention, the present invention is not limited thereto. When “losing” is won in the normal game or the simulated BB game (when it is won once or continuously), the cycle shortening lottery may not be performed.

  In this case, the configurations of the cycle shortening lottery table and the pseudo BB cycle shortening lottery table used in this example are the cycle shortening lottery table (see FIGS. 44 and 45) and the pseudo BB cycle shortening lottery table (see FIG. 46) of the above embodiment. In the above, the column specifying the lottery value for "loss" is deleted.

  As in this example, the game property between the AT state and the other states (benefits of the game) can be obtained by adopting a configuration that does not give a benefit when a "losing" is won in a normal game or a simulated BB game. Difference can be increased. Therefore, in this example, it is possible to emphasize the game characteristics between the AT state and the other states, and to further improve the interest of the game.

[Modification 5]
In the pachislots of the above-described embodiment or the above-described various modifications, the configuration has been described in which predetermined benefits are given at the time of winning a "losing" in multiple types of sub gaming states, but the present invention is not limited thereto. Only in the sub game state in one of the game states, you may be provided with a bonus giving function at the time of winning the "lost".

  The configuration and operation of the gaming machine according to the present invention have been described above including the effects and advantages thereof. However, the present invention is not limited to the above-described embodiments and modifications, and includes various other embodiments and modifications without departing from the scope of the present invention described in the claims. In the above embodiment and modifications, the pachislot machine has been described as an example of the gaming machine, but the present invention is not limited to this, and the present invention can be applied to a gaming machine called "pachinko" The effect of

  DESCRIPTION OF SYMBOLS 1 ... Pachislo (game machine), 2 ... Exterior body, 2a ... Cabinet, 2b ... Front door, 3L ... Left reel, 3C ... Medium reel, 3R ... Right reel, 4 ... Reel display window, 11 ... Liquid crystal display device, 19L ... left stop button, 19C ... middle stop button, 19R ... right stop button, 20 ... medal insertion slot, 21 ... MAX bet button, 23 ... start lever, 25 ... selection button, 51 ... hopper device, 53 ... power supply device, 55 ... main control board case 57 ... sub control board case 71 ... main control board, 72 ... sub control board, 91 ... main control circuit, 93 ... main CPU, 101 ... sub control circuit, 102 ... sub CPU

Claims (2)

Display means capable of displaying numerical information on the remaining game period controlled to the predetermined gaming state, and changing the numerical information for each unit game ;
Cycle progressing means for reducing the remaining period of the game period controlled to the predetermined game state by one unit game for each unit game,
Shortening control means capable of shortening the remaining period of the gaming period controlled to the predetermined gaming state in a unit game in which a predetermined shortening condition is established;
Display control means for changing the display at predetermined numerical intervals when changing the value of the numerical information displayed on the display means from the first value to the second value;
An interval determining means capable of determining the predetermined numerical interval based on a change value which is a difference between the first value and the second value;
The interval determining means, when the change value is the specific value or more, Ri determinable der a value obtained by adding 1 to the quotient when divided the change value at a specified value as the predetermined value interval,
The display control means can update the display of the numerical information in a unit game in which the remaining period of the game period controlled to the predetermined game state is shortened by the shortening control means.
The interval determining means changes the numerical value information from the first value to the second value in the unit game, and the numerical value information from the first value to the first value in the unit game And the third value different from the second value according to the change amount of the numerical information such that the time required for the change of the display of the numerical information in each case is substantially the same time A game machine characterized in that the predetermined numerical interval can be determined . The gaming machine according to claim 1, wherein the interval determining means sets 1 to the predetermined numerical interval when the change value is less than the specific value.

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