JP6528545B2 - Semiconductor device and method of manufacturing the same - Google Patents

Description

  The present invention relates to a semiconductor device and a method of manufacturing the same.

For example, there is a high electron mobility transistor (HEMT; High Electron Mobility Transistor) as one of communication ultra high speed transistors that can operate in the millimeter wave band (about 30 to about 300 GHz) and the submillimeter wave band (about 300 GHz to about 3 THz) .
For example, as a HEMT using a III-V compound semiconductor, for example, InAlAs / InGaAs HEMT or AlGaAs using InAlAs or AlGaAs for the electron supply layer (barrier layer) using InGaAs for the channel layer (electron traveling layer) Or InGaAs-based HEMTs, or AlGaAs / InGaP-based HEMTs or InAlP / InGaP-based HEMTs that use InGaP for the channel layer and AlGaAs or InAlP for the electron supply layer.

In order to realize such speeding up of the HEMT by shortening the intrinsic delay time, there are methods such as, for example, reducing the gate length and increasing the electron velocity in the channel layer.
Among these, in order to increase the electron velocity in the channel layer, a semiconductor having a light effective mass of electrons may be used for the channel layer.

Therefore, there is a composite channel HEMT in which a layer made of a semiconductor having a light effective mass of electrons is provided in the channel layer of the HEMT.
For example, there is an InGaAs / InAs / InGaAs composite channel HEMT in which an InAs layer made of InAs, which is a semiconductor with a light effective mass of electrons, is provided in the InGaAs channel layer of the InAlAs / InGaAs HEMT or AlGaAs / InGaAs HEMT. In addition, for example, there is an InGaP / InP / InGaP composite channel HEMT in which an InP layer made of InP which is a semiconductor having a light effective mass of electrons is provided in the InGaP channel layer of AlGaAs / InGaP HEMT or InAlP / InGaP HEMT.

JP 2002-313815 A JP-A-9-205197 JP 2012-523712 gazette

By the way, for example, in the InGaAs / InAs / InGaAs composite channel HEMT, the channel layer has a structure in which the InGaAs layer, the InAs layer, and the InGaAs layer are sequentially stacked, and the InAs layer is a semiconductor having a lighter effective mass of electrons than the InGaAs layer. Layer.
In this case, since the lattice constant of InAs is larger than that of InGaAs, compressive strain is applied to the InAs layer constituting the channel layer.

The compressively strained InAs layer increases the effective mass of electrons more than the unstrained InAs layer. As a result, the effectiveness of InAs in which the effective mass of electrons is a light semiconductor can not be fully utilized. This is not preferable for speeding up the HEMT.
In addition, when compressive strain is applied to the InAs layer, the crystal of the InAs layer is degraded. As a result, it becomes difficult to thicken the InAs layer, and if the InAs layer can not be thickened, the electrons can not be sufficiently stored in the InAs layer and the electrons spread to the InGaAs layers sandwiching the InAs layer. become. This is not preferable for speeding up the HEMT.

Here, although the problem is described in the InGaAs / InAs / InGaAs composite channel HEMT, the same problem also occurs in composite channel HEMTs of other material systems (for example, InGaP / InP / InGaP composite channel HEMT).
Therefore, it is desirable to reduce the compressive strain applied to a layer made of a semiconductor having a light effective mass of electrons that constitutes a channel layer.

The semiconductor device has a semiconductor laminated structure including at least an electron transit layer and an electron supply layer above the substrate, and the electron transit layer is made of a Group III-V compound semiconductor, and includes a first layer, a second layer, and a third layer. And the second layer is made of a semiconductor having a lighter effective mass of electrons than the first and third layers, and the energy of the conduction band of the second layer is of the first and third layers. The group V element of the III-V compound semiconductor is lower than the energy of the conduction band at the interface between the first layer and the second layer and at the interface between the second layer and the third layer. than V group element have a mixed crystal regions that are substituted with large V element atomic radius, V group element of the III-V compound semiconductor is As, than V group element of group III-V compound semiconductor The group V element having a large atomic radius is Sb.
The semiconductor device further includes a semiconductor laminated structure including at least an electron transit layer and an electron supply layer above the substrate, and the electron transit layer is made of a III-V compound semiconductor and includes a first layer, a second layer, and a second layer. It has a structure in which three layers are sequentially stacked, the second layer is made of a semiconductor having a lighter effective mass of electrons than the first and third layers, and the energy of the conduction band of the second layer is the first and third layers. Group V element of the group III-V compound semiconductor is lower than the energy of the conduction band of the layer, at the interface between the first layer and the second layer and at the interface between the second layer and the third layer; A mixed crystal region substituted by a V group element having a larger atomic radius than a V group element of a semiconductor, the V group element of a III-V compound semiconductor is P, and a V group element of a III-V compound semiconductor The group V element having a larger atomic radius than that of the other is As.
The semiconductor device further includes a semiconductor laminated structure including at least an electron transit layer and an electron supply layer above the substrate, and the electron transit layer is made of a III-V compound semiconductor and includes a first layer, a second layer, and a second layer. It has a structure in which three layers are sequentially stacked, the second layer is made of a semiconductor having a lighter effective mass of electrons than the first and third layers, and the energy of the conduction band of the second layer is the first and third layers. Group V element of the group III-V compound semiconductor is lower than the energy of the conduction band of the layer, at the interface between the first layer and the second layer and at the interface between the second layer and the third layer; A mixed crystal region substituted by a V group element having a larger atomic radius than a V group element of a semiconductor, the V group element of a III-V compound semiconductor is P, and a V group element of a III-V compound semiconductor The group V element having a larger atomic radius than that of Sb is Sb.

The method of manufacturing the semiconductor device includes the step of forming a semiconductor laminated structure including at least an electron transit layer and an electron supply layer above the substrate, and the step of forming the electron transit layer comprises a III-V compound semiconductor Forming a first layer, and forming a second layer formed of a Group III-V compound semiconductor having a lighter effective mass of electrons than the first layer on the first layer, and having a conduction band energy lower than that of the first layer; And each step of forming on the second layer a III-V compound semiconductor having a heavier electron effective mass than the second layer and forming a third layer having a conduction band energy higher than that of the second layer, Between the step of forming the first layer and the step of forming the second layer, and between the step of forming the second layer and the step of forming the third layer, the group V element of the III-V compound semiconductor look including the step of irradiating a large group V element atomic radius than, III- V group element group compound semiconductor is As, larger V group element atomic radius than V group element of the III-V compound semiconductor is Sb.
In addition, the method of manufacturing the semiconductor device includes the step of forming a semiconductor laminated structure including at least an electron transit layer and an electron supply layer above the substrate, and the step of forming the electron transit layer comprises III-V compound semiconductor Forming a first layer, and forming on the first layer a second layer composed of a group III-V compound semiconductor having a lighter effective mass of electrons than the first layer and having a conduction band energy lower than that of the first layer Forming a third layer of a III-V compound semiconductor which has a heavy electron effective mass than the second layer on the second layer and which has a conduction band energy higher than that of the second layer. Furthermore, V in the III-V group compound semiconductor may be formed between the step of forming the first layer and the step of forming the second layer, and between the step of forming the second layer and the step of forming the third layer. Irradiating the group V element having a larger atomic radius than the group element I, V group element I-V group compound semiconductor is P, and a large group V element atomic radius than V group element of the III-V compound semiconductor is As.
In addition, the method of manufacturing the semiconductor device includes the step of forming a semiconductor laminated structure including at least an electron transit layer and an electron supply layer above the substrate, and the step of forming the electron transit layer comprises III-V compound semiconductor Forming a first layer, and forming on the first layer a second layer composed of a group III-V compound semiconductor having a lighter effective mass of electrons than the first layer and having a conduction band energy lower than that of the first layer Forming a third layer of a III-V compound semiconductor which has a heavy electron effective mass than the second layer on the second layer and which has a conduction band energy higher than that of the second layer. Furthermore, V in the III-V group compound semiconductor may be formed between the step of forming the first layer and the step of forming the second layer, and between the step of forming the second layer and the step of forming the third layer. Irradiating the group V element having a larger atomic radius than the group element I, V group element I-V group compound semiconductor is P, and a large group V element atomic radius than V group element of the III-V compound semiconductor is Sb.

  Therefore, according to the present semiconductor device and the method of manufacturing the same, there is an advantage that the compressive strain applied to the layer made of a semiconductor having a light effective mass of electrons constituting the channel layer can be reduced.

It is a typical sectional view showing the composition of the semiconductor device (InAlAs / InGaAs system HEMT; InGaAs / InAs / InGaAs composite channel HEMT) of this embodiment. It is a schematic diagram which shows the conduction band structure of the semiconductor device (InAlAs / InGaAs system HEMT; InGaAs / InAs / InGaAs composite channel HEMT) of this embodiment. FIG. 1 is a schematic cross-sectional view showing a configuration of a general semiconductor device (InAlAs / InGaAs based HEMT; InGaAs / InAs / InGaAs composite channel HEMT). It is a schematic diagram which shows the conduction band structure of a general semiconductor device (InAlAs / InGaAs type | system | group HEMT; InGaAs / InAs / InGaAs composite channel HEMT). It is a typical sectional view for explaining the manufacturing method of the semiconductor device (InAlAs / InGaAs system HEMT; InGaAs / InAs / InGaAs composite channel HEMT) of this embodiment. It is a typical sectional view for explaining the manufacturing method of the semiconductor device (InAlAs / InGaAs system HEMT; InGaAs / InAs / InGaAs composite channel HEMT) of this embodiment. It is a typical sectional view for explaining the manufacturing method of the semiconductor device (InAlAs / InGaAs system HEMT; InGaAs / InAs / InGaAs composite channel HEMT) of this embodiment. It is a typical sectional view for explaining the manufacturing method of the semiconductor device (InAlAs / InGaAs system HEMT; InGaAs / InAs / InGaAs composite channel HEMT) of this embodiment. It is a typical sectional view for explaining the manufacturing method of the semiconductor device (InAlAs / InGaAs system HEMT; InGaAs / InAs / InGaAs composite channel HEMT) of this embodiment. It is a typical sectional view for explaining the manufacturing method of the semiconductor device (InAlAs / InGaAs system HEMT; InGaAs / InAs / InGaAs composite channel HEMT) of this embodiment. It is a typical sectional view for explaining the manufacturing method of the semiconductor device (InAlAs / InGaAs system HEMT; InGaAs / InAs / InGaAs composite channel HEMT) of this embodiment. It is a typical sectional view for explaining the manufacturing method of the semiconductor device (InAlAs / InGaAs system HEMT; InGaAs / InAs / InGaAs composite channel HEMT) of this embodiment. It is a typical sectional view for explaining the manufacturing method of the semiconductor device (InAlAs / InGaAs system HEMT; InGaAs / InAs / InGaAs composite channel HEMT) of this embodiment. It is a typical sectional view for explaining the manufacturing method of the semiconductor device (InAlAs / InGaAs system HEMT; InGaAs / InAs / InGaAs composite channel HEMT) of this embodiment. It is a typical sectional view showing the composition of the semiconductor device (InAlP / InGaP HEMT; InGaP / InP / InGaP composite channel HEMT) of the modification of this embodiment. It is a schematic diagram which shows the conduction band structure of the semiconductor device (InAlP / InGaP HEMT; InGaP / InP / InGaP composite channel HEMT) of the modification of this embodiment. FIG. 1 is a schematic cross-sectional view showing a configuration of a general semiconductor device (InAlP / InGaP based HEMT; InGaP / InP / InGaP composite channel HEMT). It is a schematic diagram which shows the conduction band band structure of a general semiconductor device (InAlP / InGaP system HEMT; InGaP / InP / InGaP composite channel HEMT).

Hereinafter, a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings with reference to FIGS.
The semiconductor device according to the present embodiment includes, for example, a HEMT using a III-V compound semiconductor, which is one of ultra-high-speed transistors used for communication, that is, a HEMT having a III-V compound semiconductor heterostructure.

  In the present embodiment, the semiconductor device is, for example, a HEMT having a semiconductor laminated structure using an InAlAs / InGaAs-based compound semiconductor as a III-V compound semiconductor on a substrate, that is, InGaAs in an electron transit layer (channel layer). An InAlAs / InGaAs HEMT (InGaAs channel HEMT) using InAlAs in the electron supply layer (barrier layer) is used.

The HEMT is, for example, a transistor that can operate in a millimeter wave (about 30 to about 300 GHz) or sub-millimeter wave (about 300 GHz to about 3 THz) region.
The present InAlAs / InGaAs HEMT includes, as shown in FIG. 1, a substrate 10, a semiconductor multilayer structure 26 provided on the substrate 10, and a gate electrode 33, source electrode 31 and drain provided on the semiconductor multilayer structure 26. And an electrode 32.

In the present embodiment, the substrate 10 is a semi-insulating InP substrate [for example, semi-insulating (100) InP substrate; semiconductor substrate]. A GaAs substrate or a Si substrate can also be used as the substrate 10.
The semiconductor multilayer structure 26 is a semiconductor multilayer structure including the electron transit layer 24 and the electron supply layer 25. Here, the semiconductor laminated structure 26 has a structure in which the buffer layer 11, the lower barrier layer 12, the electron transit layer (channel layer) 24, the electron supply layer (upper barrier layer) 25, the etching stop layer 21 and the cap layer 22 are laminated in order. It has become. The cap layer 22 is also referred to as an ohmic contact cap layer.

In the present embodiment, the buffer layer 11 has, for example, a thickness of about 1000 nm. The material used for the buffer layer 11 differs depending on the substrate 10. The buffer layer 11 may be provided as necessary.
The lower barrier layer 12 is an InAlAs layer. Here, it is an undoped InAlAs layer. For example, an i-In _0.52 Al _0.48 As layer, and its thickness is about 200 nm. When the buffer layer 11 is not provided, the lower barrier layer 12 also functions as a buffer layer.

The electron transit layer 24 is made of InGaAs-based compound semiconductor (III-V compound semiconductor), and InGaAs layer (first layer) 13, InAs layer (second layer) 15, and InGaAs layer (third layer) 17 are sequentially stacked. Structure (here, three-layer structure). In this case, the InAs layer 15 is made of a semiconductor in which the effective mass of electrons is lighter than that of the InGaAs layers 13 and 17.
As described above, the InAlAs / InGaAs HEMT according to the present embodiment is an InGaAs / InAs / InGaAs composite in which an InAs layer made of InAs, which is a semiconductor having a light effective mass of electrons, is provided in the InGaAs channel layer of the InAlAs / InGaAs HEMT. It is a channel HEMT. The InGaAs / InAs / InGaAs composite channel HEMT is also referred to as an As-based composite channel HEMT.

The semiconductor multilayer structure 26 of the InGaAs / InAs / InGaAs composite channel HEMT has a structure in which a lower barrier layer (InAlAs layer) 12, an electron transit layer 24 and an electron supply layer (InAlAs layer) 25 are sequentially stacked.
Then, as shown in the conduction band structure of FIG. 2 (the conduction band structure in the vertical direction), the electron transit layer is formed in the quantum well formed by the lower barrier layer 12, the electron transit layer 24 and the electron supply layer 25. 24 is formed of the first layer 13, the second layer 15, and the third layer 17, and the energy of the conduction band is deeper (lower) than the quantum well.

Further, as shown in the conduction band structure of FIG. 2, the energy of the conduction band of the first layer 13 and the third layer 17 (InGaAs layer) of the electron transit layer 24 is lower the barrier layer 12 and the electron supply layer 25 (InAlAs layer). The energy of the conduction band of the second layer 15 (InAs layer) is lower than the energy of the conduction band of the second layer 15 (InAs layer).
That is, the energy of the conduction band decreases in the order of the lower barrier layer 12 and the electron supply layer 25, the first layer 13 and the third layer 17 of the electron transit layer 24, and the second layer 15 of the electron transit layer 24, The second layer 15 of the electron transit layer 24 having the lowest energy function as a channel, and then the first layer 13 and the third layer 17 of the electron transit layer 24 having the next lowest energy of the conduction band serve as subchannels. It has become.

  Then, as shown in FIG. 1, the electron transit layer 24 is a V-group element of the InGaAs-based compound semiconductor constituting the interface between the InGaAs layer 13 and the InAs layer 15 and the interface between the InAs layer 15 and the InGaAs layer 17. And As has a mixed crystal region 14 or 16 substituted with Sb, which is a V-group element having a larger atomic radius than As, which is a V-group element of the InGaAs-based compound semiconductor.

That is, the electron transit layer 24 is a group V element of the III-V group compound semiconductor that constitutes these quantum wells between the quantum well whose energy in the conduction band is shallow and the quantum well whose energy in the conduction band is deep. Have mixed crystal regions 14 and 16 substituted with Sb, which is a V-group element having a larger atomic radius than As, which is a V-group element of the III-V compound semiconductor.
Thereby, the compressive strain applied to the InAs layer 15 made of a semiconductor having a light effective mass of electrons, which constitutes the electron transit layer 24, can be reduced.

In this case, as shown in the conduction band structure of FIG. 2, the energy of the conductor of the mixed crystal regions 14 and 16 is lower than the energy of the conduction band of the InAs layer 15. This makes it possible to further confine electrons in the InAs layer 15 of the quantum well formed of the InGaAs layer 13, the InAs layer 15 and the InGaAs layer 17 of the electron transit layer 24.
The InGaAs layer 13 is also referred to as a lower layer or a lower channel layer. The InAs layer 15 is also referred to as an intermediate layer or an intermediate channel layer. The InGaAs layer 17 is also referred to as an upper layer or an upper channel layer. The mixed crystal regions 14 and 16 are also referred to as a mixed crystal region containing Sb, a substitution region, an As / Sb substitution region, an Sb beam irradiation region, and a mixed crystal region by Sb atmosphere. The mixed crystal region 14 provided at the interface between the InGaAs layer 13 and the InAs layer 15 is also referred to as a lower mixed crystal region. The mixed crystal region 16 provided at the interface between the InAs layer 15 and the InGaAs layer 17 is also referred to as an upper mixed crystal region.

In the present embodiment, as shown in FIG. 1, the electron transit layer 24 includes the undoped InGaAs layer 13, the Sb beam irradiation region 14, the undoped InAs layer 15, the Sb beam irradiation region 16, and the undoped InGaAs layer 17 from below. It has a structure provided in order.
Here, the undoped InGaAs layer 13 is, for example, an i-In _0.53 Ga _0.47 As layer lattice-matched to InP, and has a thickness of about 3 nm. Further, the Sb beam irradiation area 14 is an extremely thin area of, for example, about one atomic layer. Also, the undoped InAs layer 15 has a thickness of, for example, about 5 nm. Further, the Sb beam irradiation area 16 is an extremely thin area of, for example, about one atomic layer. Also, the undoped InGaAs layer 17 is, for example, an i-In _0.53 Ga _0.47 As layer lattice-matched to InP, and has a thickness of about 2 nm.

Thus, the electron transit layer 24 is made of a group III-V compound semiconductor, and has a structure in which the first layer 13, the second layer 15, and the third layer 17 are sequentially stacked, and the second layer 15 is a first layer. It is made of a semiconductor having a lighter effective mass of electrons than the layer 13 and the third layer 17.
The energy of the conduction band of the second layer 15 is lower than the energy of the conduction bands of the first layer 13 and the third layer 17, and the interface between the first layer 13 and the second layer 15 and the second layer 15 and the third layer At the interface with the layer 17, the mixed crystal regions 14 and 16 in which the group V element of the group III-V compound semiconductor is substituted by a group V element having a larger atomic radius than the group V element of the group III-V compound semiconductor .

In the present embodiment, the V-group element of the III-V compound semiconductor is As, and the V-group element having a larger atomic radius than the V-group element of the III-V compound semiconductor is Sb. The electron transit layer 24 has a structure in which an InGaAs layer as the first layer 13, an InAs layer as the second layer 15, and an InGaAs layer as the third layer 17 are sequentially stacked.
The electron supply layer 25 has a structure in which an InAlAs spacer layer 18, a Si-δ doping layer 19, and an InAlAs barrier layer 20 are sequentially stacked.

Here, the electron supply layer 25 is formed by sequentially stacking an undoped InAlAs spacer layer 18, a Si-.delta. Doping layer 19 formed of InAlAs to which n-type conductivity is imparted by doping .delta. With Si, and an undoped InAlAs barrier layer 20. It has a structure that
For example, the electron supply layer 25, _{i-In 0.52 Al 0.48} As spacer layer 18, Si-[delta] doping layer a [delta] doping amount was about 1 × ¹⁰ 13 ^{cm -2} order of Si having a thickness of about 3nm 19 has a structure in which an i-In _0.52 Al _0.48 As barrier layer 20 having a thickness of about 6 nm is sequentially stacked.

The etch stop layer 21 is an InP layer and is an etch stop layer for the cap layer 22.
Here, it is an undoped InP layer, i.e., an i-InP layer, and its thickness is about 3 nm.
The etching stop layer 21 also has a function as a protective layer that prevents the oxidation of the InAlAs electron supply layer 25.

The cap layer 22 is an InGaAs layer. Here, it is an n-InGaAs layer doped with Si to give n-type conductivity. For example, it is an n-In _0.53 Ga _0.47 As layer, its thickness is about 20 nm, and the Si doping amount is about 2 × 10 ¹⁹ cm ⁻³ . Note that an n-In _0.70 Ga _0.30 As layer may be stacked on an n-In _0.53 Ga _0.47 As layer to form a cap layer having a two-layer structure. In this case, the thickness of the n-In _0.53 Ga _0.47 As layer is about 20 nm, the thickness of the n-In _0.70 Ga _0.30 As layer is about 10 nm, and the Si doping amount is about 2 × It may be about 10 ¹⁹ cm ⁻³ . Alternatively, an n-type InGaAs layer and an n-type InAlAs layer may be stacked to form a cap layer having a two-layer structure.

The semiconductor laminated structure 26 may be any laminated structure as long as it includes at least the electron transit layer 24 and the electron supply layer 25 above the substrate 10. The semiconductor multilayer structure 26 is also referred to as a heterostructure semiconductor layer.
The gate electrode 33, the source electrode 31, and the drain electrode 32 are provided on the semiconductor multilayer structure 26 configured as described above, and the surface of the semiconductor multilayer structure 26 is covered with the SiO ₂ film (insulating film) 23. ing.

Here, a source electrode (metal electrode) 31 and a drain electrode (metal electrode) 32 using, for example, Ti / Pt / Au as an electrode metal are provided on the cap layer 22.
That is, the source electrode 31 and the drain electrode 32 which are metal electrodes are provided on the cap layer 22 so that the contact between the cap layer 22 and the source electrode 31 and the drain electrode 32 which are metal electrodes is an ohmic contact. Therefore, the source electrode 31 and the drain electrode 32 are referred to as ohmic electrodes.

Further, on the i-InP layer 21, a gate electrode (metal electrode) 33 using, for example, Ti / Pt / Au as an electrode metal is provided.
By the way, in the present embodiment, the reason why the electron transit layer 24 is configured as described above is as follows.
In order to increase the speed of the HEMT, in order to increase the electron velocity in the channel layer, a semiconductor having a light effective mass of electrons may be used for the channel layer.

Here, as a semiconductor having a light effective mass of electrons, for example, InAs (0.022 m ₀ ), InSb (0.014 m ₀ ), InAsSb which is a mixed crystal thereof, and the like can be given. Here, m ₀ is a stationary mass of electrons.
For example, InAs is used as a HEMT with Al (Ga) Sb as a barrier layer, or introduced as an ultrathin layer in the InGaAs channel layer of an InAlAs / InGaAs HEMT to form an InGaAs / InAs / InGaAs composite channel HEMT. It is used for

Among them, when InAs is used as a HEMT using Al (Ga) Sb as a barrier layer, the lattice constant of InAs, AlSb, GaSb is about 0.61 nm, so a relatively good heterostructure is obtained by combining these. can get.
On the other hand, in the InGaAs / InAs / InGaAs composite channel HEMT, as shown in FIG. 3, the electron transit layer (channel layer) 24 is sandwiched between the upper and lower In _0.53 Ga _0.47 As layers 13 and 17 and the InAs layer 15. The lower barrier layer 12 and the electron supply layer 25 are made of In _0.52 Al _0.48 As, and the In _0.53 Ga _0.47 As of the electron transit layer 24 and the lower barrier layer 12 and the electron supply layer 25 are formed. In _0.52 Al _0.48 As is lattice matched. In this case, the conduction band structure is as shown in FIG.

In the case of such an InGaAs / InAs / InGaAs composite channel HEMT, since the lattice constant of InAs is larger than that of InGaAs, compressive strain is applied to the InAs layer 15 introduced into the channel layer 24.
Then, in the InAs layer 15 to which the compressive strain is applied, the effective mass of electrons increases more than that of the unstrained InAs layer 15. As a result, the effectiveness of InAs in which the effective mass of electrons is a light semiconductor can not be fully utilized. This is not preferable for speeding up the HEMT.

  In addition, if compressive strain is applied to the InAs layer 15, the crystal of the InAs layer 15 is degraded, so it is difficult to make the InAs layer 15 thick. Also, if the InAs layer 15 is made too thick, the crystal quality of the InAs layer 15 is degraded. In addition, if the InAs layer 15 can not be made thick, electrons can not be sufficiently stored in the InAs layer 15, and the electrons will spread to the InGaAs layers 13 and 17 sandwiching the InAs layer 15. For example, the thickness at which the crystal quality does not deteriorate is about 2 nm at this time, and with this thickness, electrons can not be sufficiently stored in the InAs layer 15, and the upper and lower InGaAs layers 13, 17 Electrons will spread to This is not preferable for speeding up the HEMT.

  Therefore, in the present embodiment, as described above, the electron transit layer 24 of the InGaAs / InAs / InGaAs composite channel HEMT is formed on the interface between the InGaAs layer 13 and the InAs layer 15 and the interface between the InAs layer 15 and the InGaAs layer 17. Mixed crystal regions 14 and 16 in which As, which is a V-group element of the InGaAs-based compound semiconductor constituting it, is substituted by Sb which is a V-group element having a larger atomic radius than As which is a V-group element of the InGaAs-based compound semiconductor It is assumed that

  In the mixed crystal regions 14 and 16, mixed crystals containing Sb having a larger atomic radius than As, such as InSb, InAsSb, InGaSb, InGaAsSb, etc., are substituted for As contained in InGaAs and InAs that are InGaAs-based compound semiconductors. It has become. A mixed crystal containing Sb having a larger atomic radius than As has a lattice constant larger than that of InAs (larger and smaller relation of lattice constant; mixed crystal including InGaAs <InAs <Sb), thereby reducing the compressive strain applied to InAs. It works.

  As a result, it is possible to reduce the compressive strain applied to the InAs layer 15 made of a semiconductor with a light effective mass of electrons constituting the electron transit layer 24 of the InGaAs / InAs / InGaAs composite channel HEMT. As a result, the increase of the effective mass of electrons in the InAs layer 15 is suppressed, and the intrinsic physical properties of InAs that the semiconductor is a light effective mass of electrons are fully utilized. In addition, deterioration of the crystal quality of the InAs layer 15 due to the application of compressive strain can be suppressed, and the InAs layer 15 can be made as thick as possible while maintaining high quality crystals, and electrons can be sufficiently accumulated in the InAs layer 15 You will be able to (containment). These points make it possible to realize speeding up of InGaAs / InAs / InGaAs composite channel HEMTs.

In this case, as shown in the conduction band structure of FIG. 2, the energy of the conductor of the mixed crystal regions 14 and 16 is lower than the energy of the conduction band of the InAs layer 15. This makes it possible to further confine electrons in the InAs layer 15 of the quantum well formed of the InGaAs layer 13, the InAs layer 15, and the InGaAs layer 17 of the electron transit layer 24.
Next, a method of manufacturing the semiconductor device according to the present embodiment will be described.

The method of manufacturing a semiconductor device according to the present embodiment includes the step of forming a semiconductor multilayer structure 26 including at least the electron transit layer 24 and the electron supply layer 25 above the substrate 10 (see FIG. 5).
Further, in the step of forming the electron transit layer 24, a first layer (here, InGaAs layer) 13 made of a III-V compound semiconductor (here, InGaAs-based compound semiconductor) is formed, and a first layer 13 is formed on the first layer 13. The second layer (in this case, InAs layer) 15 is formed of a III-V compound semiconductor which has an effective mass of electrons lighter than that of the first layer 13 and whose energy in the conduction band is lower than that of the first layer. Forming a third layer (here, InGaAs layer) 17 which is made of a III-V group compound semiconductor which has an effective mass of electrons heavier than that of the second layer 15 and whose conduction band energy is higher than that of the second layer 15; Including steps (see FIG. 5).

Furthermore, between the step of forming the first layer 13 and the step of forming the second layer 15 and between the step of forming the second layer 15 and the step of forming the third layer 17, III-V compounds A step of irradiating a group V element (here, Sb) having a larger atomic radius than a semiconductor group V element (here, As) is included (see FIG. 5).
In the present embodiment, the semiconductor multilayer structure 26 further includes a lower barrier layer (here, an InAlAs layer) 12. Then, in the step of forming the semiconductor laminated structure 26, the lower barrier layer 12 is formed, and the first layer 13 and the third layer 17 having lower conduction band energy than the lower barrier layer 12 are included on the lower barrier layer 12. The electron transit layer 24 is formed, and on the electron transit layer 24, an electron supply layer (here, InAlAs layer) 25 in which the energy of the conduction band is higher than the first layer 13 and the third layer 17 of the electron transit layer 24 is formed. , Includes each step. That is, in the quantum well constituted by the lower barrier layer 12, the electron transit layer 24 and the electron supply layer 25, it is constituted by the first layer 13, the second layer 15 and the third layer 17 of the electron transit layer 24 The energy of the conduction band is deeper (lower) than that of the quantum well to form a quantum well (see FIGS. 5 and 2).

In the present embodiment, in the step of irradiating the group V element having a larger atomic radius than the group V element of the group III-V compound semiconductor, the group V having a larger atomic radius than the group V element of the III-V compound semiconductor The energy of the conductor of the mixed crystal regions 14 and 16 formed by irradiating the element is lower than the energy of the conduction band of the second layer 15 (see FIGS. 5 and 2).
Hereinafter, a method of manufacturing an InAlAs / InGaAs-based HEMT (InGaAs / InAs / InGaAs composite channel HEMT) will be described by way of example with reference to FIGS.

First, as shown in FIG. 5, a buffer layer 11, i-In _0.52 Al _0.48 As lower barrier layer is formed on a semi-insulating InP substrate 10 by, for example, Molecular Beam Epitaxy (MBE) method. 12, the i-In _0.53 Ga _0.47 As layer 13 constituting the electron transit layer 24, the Sb beam irradiation region 14, the i-In As layer 15, the Sb beam irradiation region 16, the i-In _0.53 Ga _{0. 47} As layer 17, i-In _0.52 Al _0.48 As spacer layer 18 constituting electron supply layer 25, Si-δ doped layer 19, i-In _0.52 Al _0.48 As barrier layer 20, i The InP etching stop layer 21 and the n-In _0.53 Ga _0.47 As cap layer 22 are sequentially stacked to form the semiconductor multilayer structure 26.

Thus, the semiconductor multilayer structure 26 including at least the electron transit layer 24 and the electron supply layer 25 is formed above the substrate 10.
In particular, in the step of forming the electron transit layer 24, the i-In _0.53 Ga _0.47 As layer 13, the Sb beam irradiation region 14, the i-InAs layer 15, the Sb beam irradiation region 16 as follows. An i-In _0.53 Ga _0.47 As layer 17 is formed.

That is, first, the i-In _0.53 Ga _0.47 As layer (first layer) 13 is formed on the i-In _0.52 Al _0.48 As lower barrier layer 12.
Next, the surface of the i-In _0.53 Ga _0.47 As layer 13 is irradiated with an Sb beam to form an Sb beam irradiation region 14. That is, on the surface of the i-In _0.53 Ga _0.47 As layer 13, the atomic radius is larger than that of As, which is the V-group element of the InGaAs-based compound semiconductor (III-V group compound semiconductor) constituting the electron transit layer 24. The Sb beam irradiation area 14 is formed by irradiating a large V group element Sb beam.

Here, after the i-In _0.53 Ga _0.47 As layer 13 is formed, before the i-InAs layer 15 is formed, ie, the i-In _0.53 Ga _0.47 As layer 13 is formed. Between the process and the process of forming the i-InAs layer 15, the beam of group III, As is stopped and the Sb beam is irradiated.
Thus, occur substitution of As and _Sb, on the surface of the i-In _{0.53 Ga 0.47} As layer 13, _i.e., thereafter the i-In _{0.53 Ga 0.47} As layer 13 on the Between the i-InAs layer 15 to be formed, an Sb beam irradiation area 14 which is a very thin (for example, about one atomic layer) mixed crystal area containing Sb such as InSb, InAsSb, InGaSb, InGaAsSb, etc. is formed.

A mixed crystal containing Sb having a larger atomic radius than As, which is formed in this manner, has a lattice constant larger than that of InAs, so that compressive strain applied to the i-InAs layer 15 can be reduced.
Here, although the Sb beam is irradiated to form the Sb beam irradiation area 14, the Sb beam irradiation area 14 which is a mixed crystal area by the Sb atmosphere may be formed under the Sb atmosphere.

Next, on the i-In _0.53 Ga _0.47 As layer 13, that is, on the Sb beam irradiation region 14 on the surface of the i-In _0.53 Ga _0.47 As layer 13, the i-InAs layer Second layer) 15 is formed. That is, on the i-In _0.53 Ga _0.47 As layer 13, it is made of InAs (III-V compound semiconductor) which has a smaller effective mass of electrons than the i-In _0.53 Ga _0.47 As layer 13. The i-InAs layer 15 is formed in which the energy of the conduction band is lower than that of the i-In _0.53 Ga _0.47 As layer 13.

Next, the surface of the i-InAs layer 15 is irradiated with Sb beam to form an Sb beam irradiation area 16. That is, an Sb beam having a V-group element larger in atomic radius than As which is a V-group element of an InGaAs-based compound semiconductor (III-V group compound semiconductor) constituting the electron transit layer 24 on the surface of the i-InAs layer 15 To form an Sb beam irradiation area 16.
Here, after the i-InAs layer 15 is formed, before the i-In _0.53 Ga _0.47 As layer 17 is formed, ie, the step of forming the i-InAs layer 15 and the i-In _0.53 During the process of forming the Ga _0.47 As layer 17, the beam of group III, As is stopped and the Sb beam is irradiated.

As a result, substitution of As and Sb occurs, and an i-In _0.53 Ga _0.47 As layer 17 is formed on the surface of the i-InAs layer 15, ie, the i-InAs layer 15 and thereafter. In the above, an Sb beam irradiation region 16 which is an ultrathin (for example, about one atomic layer) mixed crystal region containing Sb such as InSb, InAsSb, InGaSb, InGaAsSb, etc. is formed.
A mixed crystal containing Sb having a larger atomic radius than As, which is formed in this manner, has a lattice constant larger than that of InAs, so that compressive strain applied to the i-InAs layer 15 can be reduced.

Here, although the Sb beam is irradiated to form the Sb beam irradiation area 16, the Sb beam irradiation area 16 which is a mixed crystal area by the Sb atmosphere may be formed under the Sb atmosphere.
Next, an i-In _0.53 Ga _0.47 As layer (third layer) 17 is formed on the i-InAs layer 15, that is, on the Sb beam irradiation region 16 on the surface of the i-InAs layer 15. Do. That is, on the i-InAs layer 15, the effective mass of electrons is heavier than that of the i-InAs layer 15, and In _0.53 Ga _0.47 As (III-V compound semiconductor) is used, and the energy of the conduction band is i- An i-In _0.53 Ga _0.47 As layer 17 higher than the InAs layer 15 is formed.

Thus, the i-In _0.53 Ga _0.47 As layer 13, the Sb beam irradiation region 14, the i-In As layer 15, the Sb beam irradiation region 16, the i-In _0.53 Ga _0.47 As layer 17 To form an electron transit layer 24.
The crystal growth method is not limited to the MBE method. For example, metal organic chemical vapor deposition (MOCVD) can be used.

Here, the buffer layer 11 has a thickness of about 1000 nm. The i-In _0.52 Al _0.48 As lower barrier layer 12 has a thickness of about 200 nm. The i-In _0.53 Ga _0.47 As layer 13 has a thickness of about 3 nm. In addition, the Sb beam irradiation region 14 is an extremely thin layer of about one atomic layer. In addition, the i-InAs layer 15 has a thickness of about 5 nm. In addition, the Sb beam irradiation area 16 is an extremely thin layer of about one atomic layer. The i-In _0.53 Ga _0.47 As layer 17 has a thickness of about 2 nm. The i-In _0.52 Al _0.48 As spacer layer 18 has a thickness of about 3 nm. The Si-δ doping layer 19 has a δ doping amount of Si of about 1 × 10 ¹³ cm ⁻² or so. Also, the thickness of the i-In _0.52 Al _0.48 As barrier layer 20 is about 6 nm. In addition, the i-InP etching stop layer 21 has a thickness of about 3 nm. The n-In _0.53 Ga _0.47 As cap layer 22 has a thickness of about 20 nm and a Si doping amount of about 2 × 10 ¹⁹ cm ⁻³ .

Next, after element separation, as shown in FIG. 6, for example, a source electrode 31 and a drain electrode 32 having a three-layer structure of Ti / Pt / Au are formed. Thereby, the source electrode 31 and the drain electrode 32 are formed on the n-In _0.53 Ga _0.47 As cap layer 22.
Next, as shown in FIG. 7, an SiO ₂ film 23 is formed on the cap layer 22 between the source electrode 31 and the drain electrode 32 by, for example, plasma CVD (Chemical Vapor Deposition). Here, the SiO ₂ film 23 has a thickness of about 20 nm.

Next, as shown in FIGS. 8 to 14, the T-shaped gate electrode 33 is formed.
That is, first, as shown in FIG. 8, resist films 41 to 43 having a three-layer structure are formed. Here, a three-layer structure in which a ZEP resist film 41, a PMGI resist film 42, and a ZEP resist film 43 are sequentially laminated by sequentially applying a ZEP resist (made by Nippon Zeon), a PMGI (Poly-dimethylglutarimide) resist, and a ZEP resist. A resist film is formed.

  Next, as shown in FIG. 9, the area for forming the head portion of the T-shaped gate electrode 33 is exposed by electron beam exposure, for example, to form an opening in the ZEP resist film 43 and the PMGI resist film 42. Further, for example, as shown in FIG. 10, the region forming the foot portion of the T-shaped gate electrode 33 is exposed by electron beam exposure, and the opening is formed in the lowermost ZEP resist film 41 in accordance with the desired gate length. Form.

Next, as shown in FIG. 11, SiO _{2 is formed} by reactive ion etching using, for example, CF ₄ as an etching gas, using the lowermost ZEP resist film 41 having an opening formed to the gate length as a mask. An opening is formed in the membrane 23.
Then, in order to electrically separate the cap layer 22, wet etching is performed using, for example, a mixed solution of citric acid (C ₆ H ₈ O ₇ ) and hydrogen peroxide water (H ₂ O ₂ ) as an etching solution. As shown in FIG. 12, a recess is formed.

Finally, as shown in FIG. 13, for example, Ti, Pt, and Au are deposited, and then lift-off is performed, and as shown in FIG. 14, a T-shaped gate electrode 33 having a three-layer structure of Ti / Pt / Au, for example. Form Thereby, the T-shaped gate electrode 33 is formed on the i-InP etching stop layer 21.
Thus, the semiconductor device (InAlAs / InGaAs based HEMT; InGaAs / InAs / InGaAs composite channel HEMT) according to the present embodiment can be manufactured.

Therefore, the semiconductor device according to the present embodiment has an advantage of being able to reduce the compressive strain applied to the layer (here, the InAs layer 15) made of a semiconductor having a light effective mass of electrons constituting the channel layer 24. .
As a result, the increase of the effective mass of electrons in the InAs layer 15 provided in the electron transit layer 24 is suppressed, and the deterioration of the crystal quality of the InAs layer 15 due to the application of compressive strain can be suppressed. It is possible to make it as thick as possible, and it becomes possible to realize speeding up of the HEMT.

In the above embodiment, the present invention is applied to an InGaAs / InAs / InGaAs composite channel HEMT (InAlAs / InGaAs HEMT) using InAlAs as a barrier layer (electron supply layer 25 and lower barrier layer 12). Although mentioned and explained, the material system is not limited to this.
For example, the present invention can be applied to an InGaAs / InAs / InGaAs composite channel HEMT (AlGaAs / InGaAs HEMT) in which AlGaAs is used as a barrier layer (electron supply layer and lower barrier layer).

  That is, in the InGaAs / InAs / InGaAs composite channel HEMT (AlGaAs / InGaAs HEMT), as in the case of the above-described embodiment, the electron transit layer is composed of an InGaAs layer (first layer) and an InAs layer (second layer). At the interface between the InAs layer (the second layer) and the InGaAs layer (the third layer), the V-group element (As in this case) of the InGaAs-based compound The InGaAs-based compound semiconductor may have a mixed crystal region (Sb beam irradiation region) substituted with a V-group element (here, Sb) having a larger atomic radius than the V-group element of the InGaAs-based compound semiconductor.

  In this case, the manufacturing method includes the step of forming the InGaAs layer (first layer) included in the step of forming the electron transit layer and the step of forming the InAs layer (second layer), and the InAs layer (second layer) Between the step of forming the layer) and the step of forming the InGaAs layer (third layer), the atomic radius is larger than the V-group element (here, As) of the InGaAs-based compound semiconductor (III-V compound semiconductor) A step of irradiating a group V element (here, Sb) (Sb beam irradiation step) may be included.

Further, for example, the present invention is applied to an InGaP / InP / InGaP composite channel HEMT (AlGaAs / InGaP-based HEMT or InAlP / InGaP-based HEMT) using AlGaAs (or InAlP) as a barrier layer (electron supply layer and lower barrier layer). It can also be done.
For example, as shown in FIG. 17, the electron transit layer (channel layer) 24X has a structure in which the InP layer 15X is sandwiched between the upper and lower InGaP layers 13X and 17X, and InAlP is used for the lower barrier layer 12X and the electron supply layer 25X. There is an InGaP / InP / InGaP composite channel HEMT in which the InGaP of the layer 24X and the lower barrier layer 12X and the InAlP of the electron supply layer 25X are lattice-matched, and the conduction band structure thereof is as shown in FIG. Even in such an InGaP / InP / InGaP composite channel HEMT, the same problem as the InGaAs / InAs / InGaAs composite channel HEMT of the above-described embodiment is present, so the present invention is applied as in the above-described embodiment. Can.

  Here, the InGaP / InP / InGaP composite channel HEMT using AlGaAs (or InAlP) as a barrier layer is light in the effective mass of electrons in the InGaP channel layers 13X and 17X of the AlGaAs / InGaP HEMT or InAlP / InGaP HEMT. It is an InGaP / InP / InGaP composite channel HEMT provided with an InP layer 15X made of InP, which is a semiconductor.

  That is, in the InGaP / InP / InGaP composite channel HEMT (AlGaAs / InGaP-based HEMT or InAlP / InGaP-based HEMT), the electron transit layer 24X includes the InGaP layer (first layer) 13X and the InP layer (second layer) 15X. At the interface and at the interface between the InP layer (second layer) 15X and the InGaP layer (third layer) 17X, a V-group element (P in this case) of the InGaP-based compound semiconductor (III-V group compound semiconductor) that composes it A mixed crystal region (As beam irradiation region; Sb beam irradiation region) 14X, 16X substituted with a V group element (here, As or Sb) having a larger atomic radius than the V group element of the InGaP compound semiconductor Also good.

  In this case, the manufacturing method is between the step of forming InGaP layer (first layer) 13X included in the step of forming electron transit layer 24X and the step of forming InP layer (second layer) 15X, and the InP layer Between the step of forming the (second layer) 15X and the step of forming the InGaP layer (third layer) 17X, the V group element (here, P) of the InGaP-based compound semiconductor (III-V group compound semiconductor) Also, the step of irradiating a group V element having a large atomic radius (here, As or Sb) (As beam irradiation step; Sb beam irradiation step) may be included.

Hereinafter, an InGaP / InP / InGaP composite channel HEMT (InAlP / InGaP-based HEMT) in which InAlP is used as a barrier layer (electron supply layer and lower barrier layer) will be specifically described.
Here, the InGaP / InP / InGaP composite channel HEMT (InAlP / InGaP-based HEMT) is formed, for example, as shown in FIG. 15 on a GaAs substrate (semiconductor substrate) 10X, buffer layer 11X, InAlP lower barrier layer 12X, InGaP / The semiconductor multilayer structure 26X is formed by sequentially laminating an InP / InGaP electron traveling layer (channel layer) 24X, an InAlP electron supply layer (upper barrier layer) 25X, and an InGaP cap layer 22X.

For example, the GaAs substrate 10X is, for example, a semi-insulating (100) GaAs substrate. The buffer layer 11X may be provided as needed. Further, the InAlP lower barrier layer 12X is an i-InAlP lower barrier layer, and its thickness is about 200 nm. The InGaP / InP / InGaP electron traveling layer 24X has a structure in which an InGaP layer 13X, an InP layer 15X, and an InGaP layer 17X are sequentially stacked. Further, the InAlP electron supply layer 25X is formed by sequentially stacking an i-InAlP spacer layer 18X, a Si-.delta.-doped layer 19X formed of InAlP to which n-type conductivity is imparted by doping .delta. With Si, and an i-InAlP barrier layer 20X. It has a structure that Here, the thickness of the i-InAlP spacer layer 18X is about 3 nm, the δ doping amount of Si of the Si-δ doping layer 19X is about 1 × 10 ¹³ cm ⁻² , and the thickness of the i-InAlP barrier layer 20X is The thickness is about 6 nm. The InGaP cap layer 22X is an n-InGaP layer doped with Si to give n-type conductivity. Here, the thickness of the n-InGaP layer 22X is about 20 nm, and the Si doping amount is about 2 × 10 ¹⁸ cm ⁻³ . The composition ratio of group III elements in the above-described InAlP layer and InGaP layer may be about 1: 1 (about 0.5 each).

The semiconductor multilayer structure 26X may be any multilayer structure as long as it includes at least the electron transit layer 24X and the electron supply layer 25X above the substrate 10X.
Then, the gate electrode 33X, the source electrode 31X, and the drain electrode 32X may be provided on the semiconductor multilayer structure 26X, and the surface of the semiconductor multilayer structure 26X may be covered with the SiO ₂ film (insulating film) 23X.

  As described above, the electron transit layer 24X is made of InGaP-based compound semiconductor (III-V compound semiconductor), and InGaP layer (first layer) 13X, InP layer (second layer) 15X, InGaP layer (second layer) It has a structure (here, a three-layer structure) in which three layers are stacked in the order of 17X. In this case, the InP layer 15X is made of a semiconductor having a lighter effective mass of electrons than the InGaP layers 13X and 17X.

  As described above, in the InAlP / InGaP HEMT of this modification, the InGaP / HEMT in which the InGaP channel layer 13X, 17X of the InAlP / InGaP HEMT is provided with the InP layer 15X made of InP, which is a semiconductor with a small effective mass of electrons. It is an InP / InGaP composite channel HEMT. The InGaP / InP / InGaP composite channel HEMT is also referred to as a P-based composite channel HEMT.

In this InGaP / InP / InGaP composite channel HEMT, the semiconductor multilayer structure 26X has a structure in which a lower barrier layer (InAlP layer) 12X, an electron transit layer 24X, and an electron supply layer (InAlP layer) 25X are sequentially stacked.
That is, as shown in the conduction band structure of FIG. 16 (the conduction band structure in the vertical direction), the electron transit layer in the quantum well formed of the lower barrier layer 12X, the electron transit layer 24X, and the electron supply layer 25X. A 24W first layer 13X, a second layer 15X, and a third layer 17X are provided, and a quantum well having a conduction band energy deeper (lower) than that of the quantum well is provided.

Further, as shown in the conduction band structure of FIG. 16, the energy of the conduction band of the first layer 13X and the third layer 17X (InGaP layer) of the electron transit layer 24X is the conduction band of the lower barrier layer 12X and the electron supply layer 25X. The energy of the conduction band of the second layer 15X (InP layer) is lower than the energy of the conduction bands of the first layer 13X and the third layer 17X.
That is, the energy of the conduction band decreases in the order of the lower barrier layer 12X and the electron supply layer 25X, the first layer 13X and the third layer 17X of the electron transit layer 24X, and the second layer 15X of the electron transit layer 24X. The second layer 15X of the electron transit layer 24X having the lowest energy function as a channel, and the first layer 13X and the third layer 17X of the electron transit layer 24X having the second lowest energy of the conduction band function as a subchannel It has become.

  As shown in FIGS. 15 and 16, the electron transit layer 24X is an InGaP-based compound semiconductor constituting the interface between the InGaP layer 13X and the InP layer 15X and the interface between the InP layer 15X and the InGaP layer 17X. The mixed crystal regions 14X and 16X are substituted with As or Sb, which is a V-group element having a larger atomic radius than P, which is a V-group element of the InGaP-based compound semiconductor.

That is, the electron transit layer 24X is a P-group element P of the III-V group compound semiconductor constituting these quantum wells between the quantum well whose energy in the conduction band is shallow and the quantum well whose energy in the conduction band is deep. Have mixed crystal regions 14X and 16X substituted with As or Sb which is a V group element having a larger atomic radius than P which is a V group element of the III-V compound semiconductor.
In the mixed crystal regions 14X and 16X, P contained in InGaP and InP that are InGaP-based compound semiconductors is substituted with As or Sb, and InAs, InGaAs, InAsP, InGaAsP or the like, or InSb, InPSb, InGaSb, InGaPSb or the like It is a mixed crystal containing As or Sb whose atomic radius is larger than P. A mixed crystal containing As or Sb having a larger atomic radius than P has a lattice constant larger than that of InP (the relation of the lattice constant; InGaP <InP <As or mixed crystal containing Sb), the compression added to InP It acts to reduce distortion.

  This makes it possible to reduce the compressive strain applied to the InP layer 15X made of a semiconductor with a light effective mass of electrons constituting the electron transit layer 24X of the InGaP / InP / InGaP composite channel HEMT. As a result, the increase of the effective mass of electrons in the InP layer 15X is suppressed, and the inherent physical properties of InP that the effective mass of electrons is a light semiconductor can be fully utilized. In addition, deterioration of the crystal quality of the InP layer 15X due to the application of compressive strain can be suppressed, and the InP layer 15X can be made as thick as possible while maintaining high quality crystals, and electrons can be sufficiently accumulated in the InP layer 15X. You will be able to (containment). These points make it possible to realize high-speed InGaP / InP / InGaP composite channel HEMTs.

In this case, as shown in the conduction band structure of FIG. 16, the energy of the conductor of mixed crystal regions 14X and 16X is lower than the energy of the conduction band of InP layer 15X. This makes it possible to further confine electrons in the InP layer 15X of the quantum well formed of the InGaP layer 13X, the InP layer 15X, and the InGaP layer 17X of the electron transit layer 24X.
Note that the InGaP layer 13X is also referred to as a lower layer or a lower channel layer. The InP layer 15X is also referred to as an intermediate layer or an intermediate channel layer. The InGaP layer 17X is also referred to as an upper layer or an upper channel layer. The mixed crystal regions 14X and 16X are also referred to as a mixed crystal region containing As or Sb, a substitution region, a P / As or P / Sb substitution region, an As or Sb beam irradiation region, or a mixed crystal region by As or Sb atmosphere. The mixed crystal region 14X provided at the interface between the InGaP layer 13X and the InP layer 15X is also referred to as a lower mixed crystal region. The mixed crystal region 16X provided at the interface between the InP layer 15X and the InGaP layer 17X is also referred to as an upper mixed crystal region.

In this modification, as shown in FIG. 15, the electron transit layer 24X is an undoped InGaP layer 13X, an As or Sb beam irradiation area 14X, an undoped InP layer 15X, an As or Sb beam irradiation area 16X, an undoped InGaP layer The structure has 17X in order from the bottom.
Here, the undoped InGaP layer 13X is, for example, an i-InGaP layer lattice-matched to GaAs, and has a thickness of about 3 nm. Further, the As or Sb beam irradiation area 14X is an extremely thin area of, for example, about one atomic layer. Also, the undoped InAs layer 15X has, for example, a thickness of about 5 nm. In addition, the As or Sb beam irradiation area 16X is an extremely thin area of, for example, about one atomic layer. The undoped InGaAs layer 17X is, for example, an i-InGaP layer lattice-matched to GaAs and has a thickness of about 2 nm.

  As described above, the electron transit layer 24X is made of a group III-V compound semiconductor and has a structure in which the first layer 13X, the second layer 15X, and the third layer 17X are sequentially stacked, and the second layer 15X is the first layer. It is made of a semiconductor having a lighter effective mass of electrons than the layer 13X and the third layer 17X. The energy of the conduction band of the second layer 15X is lower than the energy of the conduction band of the first layer 13X and the third layer 17X, and the interface between the first layer 13X and the second layer 15X and the second layer 15X and the third layer At the interface with the layer 17X, mixed crystal regions 14X and 16X in which the group V element of the group III-V compound semiconductor is substituted by a group V element having a larger atomic radius than the group V element of the group III-V compound semiconductor .

In this modification, the V-group element of the III-V compound semiconductor is P, and the V-group element having a larger atomic radius than the V-group element of the III-V compound semiconductor is As or Sb. The electron transit layer 24X has a structure in which an InGaP layer as the first layer 13X, an InP layer as the second layer 15X, and an InGaP layer as the third layer 17X are sequentially stacked.
Next, a method of manufacturing a semiconductor device (InAlP / InGaP-based HEMT; InGaP / InP / InGaP composite channel HEMT) according to this modification will be described.

  First, on the semi-insulating GaAs substrate 10X, the InGaP layer 13X constituting the buffer layer 11X, the InAlP lower barrier layer 12X, and the electron transit layer 24X by MBE or MOCVD, for example, As or Sb beam irradiation region 14X, InP layer 15X, As or Sb beam irradiation region 16X, InGaP layer 17X, InAlP spacer layer 18X constituting electron supply layer 25X, Si-δ doping layer 19X, InAlP barrier layer 20X, n-InGaP cap layer 22X in order, A semiconductor multilayer structure 26X is formed (see FIG. 15).

Thus, the semiconductor multilayer structure 26X including at least the electron transit layer 24X and the electron supply layer 25X is formed above the substrate 10X (see FIG. 15).
In particular, in the step of forming the electron transit layer 24X, the InGaP layer 13X, the As or Sb beam irradiation area 14X, the InP layer 15X, the As or Sb beam irradiation area 16X, the InGaP layer 17X are formed as follows (see FIG. 15).

That is, first, the InGaP layer (first layer) 13X is formed on the InAlP lower barrier layer 12X.
Next, the surface of the InGaP layer 13X is irradiated with an As or Sb beam to form an As or Sb beam irradiation region 14X. That is, an As or Sb beam which is a V-group element having a larger atomic radius than P, which is a V-group element of the InGaP-based compound semiconductor (III-V group compound semiconductor) constituting the electron transit layer 24X, on the surface of the InGaP layer 13X. To form an As or Sb beam irradiation area 14X.

Here, after forming the InGaP layer 13X, before forming the InP layer 15X, that is, stopping the beams of group III and P between the step of forming the InGaP layer 13X and the step of forming the InP layer 15X. , As or Sb beam.
As a result, substitution of P with As or Sb takes place, and InAs, InGaAs, InAsP, InGaAsP on the surface of the InGaP layer 13X, ie, between the InGaP layer 13X and the InP layer 15X formed thereon thereafter. An As or Sb beam irradiation area 14X which is an ultrathin (for example, about one atomic layer) mixed crystal area containing As or Sb such as InSb, InPSb, InGaSb, InGaPSb, etc. is formed.

A mixed crystal containing As or Sb having a larger atomic radius than P, which is formed in this manner, has a larger lattice constant than InP, so that the compressive strain applied to the InP layer 15X can be reduced.
Here, the As or Sb beam irradiation is performed to form the As or Sb beam irradiation area 14X, but the As or Sb beam irradiation area 14X which is a mixed crystal area by the As or Sb atmosphere in the As or Sb atmosphere You may form

  Next, an InP layer (second layer) 15X is formed on the InGaP layer 13X, that is, on the As or Sb beam irradiation region 14X on the surface of the InGaP layer 13X. That is, on the InGaP layer 13X, an InP layer 15X is formed which is made of InP (III-V group compound semiconductor) lighter in effective mass of electrons than the InGaP layer 13X and whose energy of conduction band is lower than that of the InGaP layer 13X.

  Next, the surface of the InP layer 15X is irradiated with an As or Sb beam to form an As or Sb beam irradiation region 16X. That is, an As or Sb beam which is a V-group element having a larger atomic radius than P which is a V-group element of the InGaP-based compound semiconductor (III-V group compound semiconductor) constituting the electron transit layer 24X on the surface of the InP layer 15X. To form an As or Sb beam irradiation area 16X.

Here, after forming the InP layer 15X, before forming the InGaP layer 17X, that is, stopping the beams of Group III and P between the step of forming the InP layer 15X and the step of forming the InGaP layer 17X. , As or Sb beam.
As a result, substitution of P and As or Sb occurs and InAs, InGaAs, InAsP, InGaAsP on the surface of the InP layer 15X, that is, between the InP layer 15X and the InGaP layer 17X formed thereon thereafter. An As or Sb beam irradiation region 16X which is an ultrathin (for example, about one atomic layer) mixed crystal region containing As or Sb such as InSb, InPSb, InGaSb, InGaPSb, etc. is formed.

A mixed crystal containing As or Sb having a larger atomic radius than P, which is formed in this manner, has a larger lattice constant than InP, so that the compressive strain applied to the InP layer 15X can be reduced.
Here, the As or Sb beam irradiation is performed to form the As or Sb beam irradiation region 16X, but the As or Sb beam irradiation region 16X which is a mixed crystal region by the As or Sb atmosphere in the As or Sb atmosphere You may form

  Next, an InGaP layer (third layer) 17X is formed on the InP layer 15X, that is, on the As or Sb beam irradiation region 16X on the surface of the InP layer 15X. That is, on the InP layer 15X, the InGaP layer 17X is formed of InGaP (III-V group compound semiconductor) which is heavier in effective mass of electrons than the InP layer 15X, and the energy of the conduction band is higher than that of the InP layer 15X.

Thus, the electron transit layer 24X including the InGaP layer 13X, the As or Sb beam irradiation area 14X, the InP layer 15X, the As or Sb beam irradiation area 16X, and the InGaP layer 17X in this order is formed.
Thereafter, as in the above embodiment, after element separation, the source electrode 31X and the drain electrode 32X are formed, and the SiO ₂ film 23X is formed on the cap layer 22X between the source electrode 31X and the drain electrode 32X. , T-shaped gate electrode 33X.

Thus, the semiconductor device (InAlP / InGaP-based HEMT; InGaP / InP / InGaP composite channel HEMT) of this modification can be manufactured.
As described above, the method of manufacturing the semiconductor device of this modification includes the step of forming the semiconductor multilayer structure 26X including at least the electron transit layer 24X and the electron supply layer 25X above the substrate 10X (see FIG. 15).

  Further, in the step of forming the electron transit layer 24X, a first layer (here, InGaP layer) 13X made of a III-V compound semiconductor (here, InGaP-based compound semiconductor) is formed, and the first layer 13X is formed on the first layer 13X. The second layer (here, InP layer) 15X is formed of a III-V compound semiconductor which has an effective mass of electrons lighter than that of the first layer 13X, and the energy of the conduction band is lower than that of the first layer. And a third layer (here, an InGaP layer) 17X, which is made of a III-V compound semiconductor having a heavier effective mass of electrons than the second layer 15X, and whose conduction band energy is higher than that of the second layer 15X. Including steps (see FIG. 15).

Furthermore, between the step of forming the first layer 13X and the step of forming the second layer 15X, and between the step of forming the second layer 15X and the step of forming the third layer 17X, III-V compounds A step of irradiating a group V element (here, As or Sb) having an atomic radius larger than that of the semiconductor group V element (here, P) is included (see FIG. 15).
In the present embodiment, the semiconductor multilayer structure 26X further includes a lower barrier layer (here, an InAlP layer) 12X. Then, in the step of forming the semiconductor laminated structure 26X, the lower barrier layer 12X is formed, and on the lower barrier layer 12X, the first layer 13X and the third layer 17X whose energy of the conduction band is lower than that of the lower barrier layer 12X are included. The electron transit layer 24X is formed, and an electron supply layer (here, InAlP layer) 25X in which the energy of the conduction band is higher than the first layer 13X and the third layer 17X of the electron transit layer 24X is formed on the electron transit layer 24X. , Includes each step. That is, in the quantum well constituted by the lower barrier layer 12X, the electron transit layer 24X and the electron supply layer 25X, it is constituted by the first layer 13X, the second layer 15X and the third layer 17X of the electron transit layer 24X The energy of the conduction band is deeper (lower) than that of the quantum well to form a quantum well (see FIGS. 15 and 16).

In the present embodiment, in the step of irradiating the group V element having a larger atomic radius than the group V element of the group III-V compound semiconductor, the group V having a larger atomic radius than the group V element of the III-V compound semiconductor The energy of the conductor of the mixed crystal regions 14X and 16X formed by irradiating the element is lower than the energy of the conduction band of the second layer 15X (see FIGS. 15 and 16).
(Others)
In addition, this invention is not limited to the structure described in embodiment mentioned above and modification, It is possible to deform variously in the range which does not deviate from the meaning of this invention.

Hereinafter, additional notes will be disclosed regarding the above-described embodiment and modifications.
(Supplementary Note 1)
A semiconductor multilayer structure including at least an electron transit layer and an electron supply layer above the substrate;
The electron transit layer is made of a group III-V compound semiconductor, and has a structure in which a first layer, a second layer, and a third layer are sequentially stacked, and the second layer is a layer including the first layer and the third layer. And the conduction band of the second layer is lower in energy than the conduction bands of the first layer and the third layer, and the first layer and the second layer The group V element of the group III-V compound semiconductor has a larger atomic radius than the group V element of the group III-V compound semiconductor at the interface between the second layer and the third layer; What is claimed is: 1. A semiconductor device comprising a mixed crystal region substituted with an element.

(Supplementary Note 2)
The semiconductor laminated structure further includes a lower barrier layer, and the lower barrier layer, the electron transit layer, and the electron supply layer are sequentially laminated, and the first and third layers of the electron transit layer are formed. The semiconductor device according to claim 1, wherein the energy of the conduction band of the layer is lower than the energy of the conduction band of the lower barrier layer and the electron supply layer.

(Supplementary Note 3)
The semiconductor device according to claim 1 or 2, wherein the energy of the conductor in the mixed crystal region is lower than the energy of the conduction band of the second layer.
(Supplementary Note 4)
The group V element of the group III-V compound semiconductor is As, and the group V element having a larger atomic radius than the group V element of the group III-V compound semiconductor is Sb, The semiconductor device of any one of 1 to 3.

(Supplementary Note 5)
The semiconductor device according to claim 4, wherein the electron transit layer has a structure in which an InGaAs layer as the first layer, an InAs layer as the second layer, and an InGaAs layer as the third layer are sequentially stacked. .
(Supplementary Note 6)
The V group element of the III-V compound semiconductor is P, and the V group element having a larger atomic radius than the V group element of the III-V compound semiconductor is As. The semiconductor device of any one of 1 to 3.

(Appendix 7)
The V group element of the III-V compound semiconductor is P, and the V group element having a larger atomic radius than the V group element of the III-V compound semiconductor is Sb. The semiconductor device of any one of 1 to 3.
(Supplementary Note 8)
The electron traveling layer has a structure in which an InGaP layer as the first layer, an InP layer as the second layer, and an InGaP layer as the third layer are sequentially stacked, according to appendix 6 or 7, Semiconductor device.

(Appendix 9)
Forming a semiconductor laminate structure including at least an electron transit layer and an electron supply layer above the substrate;
In the step of forming the electron transit layer,
Forming a first layer comprising a Group III-V compound semiconductor,
On the first layer, a second layer is formed of a Group III-V compound semiconductor that is lighter in effective mass of electrons than the first layer, and the energy of the conduction band is lower than that of the first layer;
Forming on the second layer a third layer composed of a III-V group compound semiconductor having a heavy effective mass of electrons than the second layer, and having a conduction band energy higher than that of the second layer; Including
Furthermore, between the step of forming the first layer and the step of forming the second layer, and between the step of forming the second layer and the step of forming the third layer, the group III-V A method of manufacturing a semiconductor device comprising the step of irradiating a group V element having a larger atomic radius than a group V element of a compound semiconductor.

(Supplementary Note 10)
The semiconductor stack further includes a lower barrier layer,
The step of forming the semiconductor laminated structure is
Forming the lower barrier layer;
Forming the electron transit layer including the first layer and the third layer on the lower barrier layer, wherein energy of a conduction band is lower than that of the lower barrier layer;
The method according to appendix 9, including the steps of forming the electron supply layer on the electron transit layer in which the energy of the conduction band is higher than the first layer and the third layer of the electron transit layer. The manufacturing method of the described semiconductor device.

(Supplementary Note 11)
Irradiating the group V element having a larger atomic radius than the group V element of the group III-V compound semiconductor, the group V element having a larger atomic radius than the group V element of the group III-V compound semiconductor The method of manufacturing the semiconductor device according to any one of Appendices 9 or 10, wherein the energy of the conductor of the mixed crystal region formed by irradiating the lower layer is lower than the energy of the conduction band of the second layer.

(Supplementary Note 12)
The group V element of the group III-V compound semiconductor is As, and the group V element having a larger atomic radius than the group V element of the group III-V compound semiconductor is Sb, The manufacturing method of the semiconductor device of any one of 9-11.
(Supplementary Note 13)
In the step of forming the electron transit layer, an InGaAs layer is formed as the first layer, an InAs layer is formed as the second layer, and an InGaAs layer is formed as the third layer. The manufacturing method of the semiconductor device as described in these.

(Supplementary Note 14)
The V group element of the III-V compound semiconductor is P, and the V group element having a larger atomic radius than the V group element of the III-V compound semiconductor is As. The manufacturing method of the semiconductor device of any one of 9-11.
(Supplementary Note 15)
The V group element of the III-V compound semiconductor is P, and the V group element having a larger atomic radius than the V group element of the III-V compound semiconductor is Sb. The manufacturing method of the semiconductor device of any one of 9-11.

(Supplementary Note 16)
In the step of forming the electron transit layer, an InGaP layer is formed as the first layer, an InP layer is formed as the second layer, and an InGaP layer is formed as the third layer. Or the manufacturing method of the semiconductor device as described in 15.

10 substrate (InP substrate)
10X substrate (GaAs substrate)
11, 11X buffer layer 12 InAlAs lower barrier layer 12X InAlP lower barrier layer 13 InGaAs layer (first layer)
13X InGaP layer (first layer)
14 Sb irradiation area (mixed crystal area)
14X As or Sb irradiation region (mixed crystal region)
15 InAs layer (second layer)
15X InP layer (second layer)
16 Sb irradiation area (mixed crystal area)
16X As or Sb irradiation region (mixed crystal region)
17 InGaAs layer (third layer)
17X InGaP layer (third layer)
18 InAlAs spacer layer 18X InAlP spacer layer 19, 19X Si-δ doping layer 20 InAlAs barrier layer 20X InAlP barrier layer 21 InP etching stop layer 22 n-InGaAs cap layer 22X n-InGaP cap layer 23, 23X SiO ₂ film 24, 24X Electron traveling layer (composite channel layer)
25, 25X Electron Supply Layer 26, 26X Semiconductor Layer Structure 31, 31X Source Electrode 32, 32X Drain Electrode 33, 33X Gate Electrode 41 Resist Film (ZEP)
42 Resist film (PMGI)
43 Resist film (ZEP)

Claims (12)

A semiconductor multilayer structure including at least an electron transit layer and an electron supply layer above the substrate;
The electron transit layer is made of a group III-V compound semiconductor, and has a structure in which a first layer, a second layer, and a third layer are sequentially stacked, and the second layer is a layer including the first layer and the third layer. And the conduction band of the second layer is lower in energy than the conduction bands of the first layer and the third layer, and the first layer and the second layer The group V element of the group III-V compound semiconductor has a larger atomic radius than the group V element of the group III-V compound semiconductor at the interface between the second layer and the third layer; have a mixed area, which is substituted with an element,
The semiconductor device according to claim 1, wherein the group V element of the group III-V compound semiconductor is As, and the group V element having a larger atomic radius than the group V element of the group III-V compound semiconductor is Sb. . The electron transit layer, the InGaAs layer as the first layer, InAs layer as the second layer, wherein the third layer InGaAs layer is characterized by having a structure laminated in this order, a semiconductor according to claim 1 apparatus. A semiconductor multilayer structure including at least an electron transit layer and an electron supply layer above the substrate;
The electron transit layer is made of a group III-V compound semiconductor, and has a structure in which a first layer, a second layer, and a third layer are sequentially stacked, and the second layer is a layer including the first layer and the third layer. And the conduction band of the second layer is lower in energy than the conduction bands of the first layer and the third layer, and the first layer and the second layer The group V element of the group III-V compound semiconductor has a larger atomic radius than the group V element of the group III-V compound semiconductor at the interface between the second layer and the third layer; Having a mixed crystal region substituted with an element,
Wherein said group V elements, group III-V compound semiconductor is P, and greater the V group element in atomic radius than the Group V element of the group III-V compound semiconductor is you being a As half Conductor device. A semiconductor multilayer structure including at least an electron transit layer and an electron supply layer above the substrate;
The electron transit layer is made of a group III-V compound semiconductor, and has a structure in which a first layer, a second layer, and a third layer are sequentially stacked, and the second layer is a layer including the first layer and the third layer. And the conduction band of the second layer is lower in energy than the conduction bands of the first layer and the third layer, and the first layer and the second layer The group V element of the group III-V compound semiconductor has a larger atomic radius than the group V element of the group III-V compound semiconductor at the interface between the second layer and the third layer; Having a mixed crystal region substituted with an element,
Wherein said group V elements, group III-V compound semiconductor is P, and greater the V group element in atomic radius than the Group V element of the group III-V compound semiconductor is you being a Sb half Conductor device. The electron transit layer, InGaP layer as the first layer, the InP layer as the second layer, characterized by having a InGaP layer as the third layer are sequentially stacked, according to claim 3 or 4 Semiconductor devices. The semiconductor laminated structure further includes a lower barrier layer, and the lower barrier layer, the electron transit layer, and the electron supply layer are sequentially laminated, and the first and third layers of the electron transit layer are formed. The semiconductor device according to any one of claims 1 to 5, wherein the energy of the conduction band of the layer is lower than the energy of the conduction band of the lower barrier layer and the electron supply layer. The semiconductor device according to any one of claims 1 to 6 , wherein the energy of the conduction band of the mixed crystal region is lower than the energy of the conduction band of the second layer . Forming a semiconductor laminate structure including at least an electron transit layer and an electron supply layer above the substrate;
In the step of forming the electron transit layer,
Forming a first layer comprising a Group III-V compound semiconductor,
On the first layer, a second layer is formed of a Group III-V compound semiconductor that is lighter in effective mass of electrons than the first layer, and the energy of the conduction band is lower than that of the first layer;
Forming on the second layer a third layer composed of a III-V group compound semiconductor having a heavy effective mass of electrons than the second layer, and having a conduction band energy higher than that of the second layer; Including
Furthermore, between the step of forming the first layer and the step of forming the second layer, and between the step of forming the second layer and the step of forming the third layer, the group III-V a step of irradiating the compound semiconductor of the V group large V group element atomic radius than element seen including,
The semiconductor device according to claim 1, wherein the group V element of the group III-V compound semiconductor is As, and the group V element having a larger atomic radius than the group V element of the group III-V compound semiconductor is Sb. Manufacturing method. In the step of forming the electron transit layer, an InGaAs layer is formed as the first layer, an InAs layer is formed as the second layer, and an InGaAs layer is formed as the third layer. 8. The manufacturing method of the semiconductor device according to 8. Forming a semiconductor laminate structure including at least an electron transit layer and an electron supply layer above the substrate;
In the step of forming the electron transit layer,
Forming a first layer comprising a Group III-V compound semiconductor,
On the first layer, a second layer is formed of a Group III-V compound semiconductor that is lighter in effective mass of electrons than the first layer, and the energy of the conduction band is lower than that of the first layer;
Forming on the second layer a third layer composed of a III-V group compound semiconductor having a heavy effective mass of electrons than the second layer, and having a conduction band energy higher than that of the second layer; Including
Furthermore, between the step of forming the first layer and the step of forming the second layer, and between the step of forming the second layer and the step of forming the third layer, the group III-V Irradiating the group V element having a larger atomic radius than the group V element of the compound semiconductor;
The semiconductor device, wherein the V group element of the III-V compound semiconductor is P, and the V group element having a larger atomic radius than the V group element of the III-V compound semiconductor is As. Manufacturing method.   Forming a semiconductor laminate structure including at least an electron transit layer and an electron supply layer above the substrate;
  In the step of forming the electron transit layer,
  Forming a first layer comprising a Group III-V compound semiconductor,
  On the first layer, a second layer is formed of a Group III-V compound semiconductor that is lighter in effective mass of electrons than the first layer, and the energy of the conduction band is lower than that of the first layer;
  Forming on the second layer a third layer composed of a III-V group compound semiconductor having a heavy effective mass of electrons than the second layer, and having a conduction band energy higher than that of the second layer; Including
  Furthermore, between the step of forming the first layer and the step of forming the second layer, and between the step of forming the second layer and the step of forming the third layer, the group III-V Irradiating the group V element having a larger atomic radius than the group V element of the compound semiconductor;
The semiconductor device is characterized in that the group V element of the group III-V compound semiconductor is P, and the group V element having a larger atomic radius than the group V element of the group III-V compound semiconductor is Sb. Manufacturing method. In the step of forming the electron transit layer, an InGaP layer is formed as the first layer, an InP layer is formed as the second layer, and an InGaP layer is formed as the third layer. The manufacturing method of the semiconductor device as described in 10 or 11.

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