JP6491894B2 - シンボルタイミング同期用回路 - Google Patents
シンボルタイミング同期用回路 Download PDFInfo
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- JP6491894B2 JP6491894B2 JP2015015692A JP2015015692A JP6491894B2 JP 6491894 B2 JP6491894 B2 JP 6491894B2 JP 2015015692 A JP2015015692 A JP 2015015692A JP 2015015692 A JP2015015692 A JP 2015015692A JP 6491894 B2 JP6491894 B2 JP 6491894B2
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions
- H04L7/0335—Gardner detector
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
- H04L27/14—Demodulator circuits; Receiver circuits
- H04L27/156—Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/22—Demodulator circuits; Receiver circuits
- H04L27/233—Demodulator circuits; Receiver circuits using non-coherent demodulation
- H04L27/2331—Demodulator circuits; Receiver circuits using non-coherent demodulation wherein the received signal is demodulated using one or more delayed versions of itself
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/38—Demodulator circuits; Receiver circuits
- H04L27/3845—Demodulator circuits; Receiver circuits using non - coherent demodulation, i.e. not using a phase synchronous carrier
- H04L27/3854—Demodulator circuits; Receiver circuits using non - coherent demodulation, i.e. not using a phase synchronous carrier using a non - coherent carrier, including systems with baseband correction for phase or frequency offset
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0004—Initialisation of the receiver
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
- H04L7/002—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation
- H04L7/0029—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation interpolation of received data signal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
- H04L7/0062—Detection of the synchronisation error by features other than the received signal transition detection of error based on data decision error, e.g. Mueller type detection
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
- H04L7/007—Detection of the synchronisation error by features other than the received signal transition detection of error based on maximum signal power, e.g. peak value, maximizing autocorrelation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Description
1)タイミングのオフセットを検出すること、
2)タイミングを調節する方法を決定すること、
及び、
3)タイミングのオフセットを実際に補償すること。
位相の連続性は高いスペクトル効率をもたらし、一定のエンベロープは優れた電力効率をもたらす。CPFSKは連続位相変調(CPM)の大きな族に属する。CPM変調された信号は、次式で表すことができる。
Claims (13)
- ディジタル受信機構造のためのタイミング同期回路であって、
上記タイミング同期回路は、タイミング誤差検出モジュールと、タイミング誤差制御モジュールとを備え、
上記タイミング誤差検出モジュールは、ディジタルデータストリームの到来するサンプル間の位相差を計算するように構成された位相差計算ユニットと、上記計算された位相差に基づいてタイミング誤差推定値を決定し、上記決定されたタイミング誤差推定値に基づいてタイミング誤差検出を示す信号を生成するように構成されたタイミング誤差推定器とを備え、
上記タイミング誤差制御モジュールは、上記タイミング誤差検出を示す信号を受信し、上記タイミング誤差検出を示す受信された信号の個数をしきい値と比較し、上記比較結果に応答して、上記ディジタルデータストリームを取得するために行われるサンプリングの瞬間を調整するためのサンプリング調整コマンドを出力するように構成されるタイミング同期回路。 - 上記位相差計算ユニットは構成可能な遅延を与えるように適合される請求項1記載のタイミング同期回路。
- 上記到来するサンプルは同相/直交位相のペアとして供給される請求項1記載のタイミング同期回路。
- 上記タイミング誤差推定器は、複数の上記タイミング誤差推定値を格納するための構成可能な長さを有するレジスタを備える請求項1記載のタイミング同期回路。
- 上記格納されたタイミング誤差推定値の平均を演算し、平均されたタイミング誤差推定値を生成するように構成された請求項4記載のタイミング同期回路。
- 上記タイミング誤差検出を示す信号は、上記タイミング誤差推定値の極性の表示を含む請求項1記載のタイミング同期回路。
- 上記タイミング誤差推定器は、上記タイミング誤差推定値をしきい値レベルと比較するように構成される請求項1〜4、6のうちの1つに記載のタイミング同期回路。
- 上記タイミング誤差推定器は、上記平均されたタイミング誤差推定値をしきい値レベルと比較するように構成される請求項5記載のタイミング同期回路。
- 上記タイミング誤差検出モジュールは、上記タイミング誤差推定値に対してダウンサンプリングを行うように構成される請求項1記載のタイミング同期回路。
- 上記タイミング誤差検出モジュールは、上記サンプリング調整コマンドを受信するように構成される請求項1記載のタイミング同期回路。
- 上記到来するサンプルは、周波数偏移変調又は位相偏移変調の変調方式により変調されている請求項1記載のタイミング同期回路。
- 請求項1記載のタイミング同期回路を備えるディジタル受信機構造。
- 受信された入力ストリームをダウンサンプリングして上記ディジタルデータストリームを取得するように構成されたダウンサンプリングブロック備える請求項12記載のディジタル受信機構造。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP14153485.9 | 2014-01-31 | ||
EP14153485.9A EP2903199B1 (en) | 2014-01-31 | 2014-01-31 | Circuit for symbol timing synchronization |
Publications (3)
Publication Number | Publication Date |
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JP2015146570A JP2015146570A (ja) | 2015-08-13 |
JP2015146570A5 JP2015146570A5 (ja) | 2017-09-14 |
JP6491894B2 true JP6491894B2 (ja) | 2019-03-27 |
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JP2015015692A Expired - Fee Related JP6491894B2 (ja) | 2014-01-31 | 2015-01-29 | シンボルタイミング同期用回路 |
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US (1) | US9425807B2 (ja) |
EP (1) | EP2903199B1 (ja) |
JP (1) | JP6491894B2 (ja) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
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KR101817544B1 (ko) * | 2015-12-30 | 2018-01-11 | 어보브반도체 주식회사 | 개선된 반송파 주파수 오프셋 보상을 사용하는 블루투스 수신 방법 및 장치 |
KR101906149B1 (ko) * | 2015-12-30 | 2018-10-10 | 어보브반도체 주식회사 | 개선된 심볼 타이밍 오프셋 보상을 사용하는 블루투스 수신 방법 및 장치 |
US10187235B2 (en) * | 2016-07-01 | 2019-01-22 | Intel IP Corporation | Long range bluetooth low energy synchronization system |
CN111373690B (zh) * | 2017-09-20 | 2023-05-23 | 弗劳恩霍夫应用研究促进协会 | 用于突发和连续信号的接收的自适应定时同步 |
KR102048630B1 (ko) * | 2018-04-02 | 2019-11-25 | 벨로넥트 인코퍼레이션 | 데이터의 고속 전송을 위한 변조 및 복조 방법과 그 방법을 위한 장치 |
GB2575120B (en) * | 2018-06-29 | 2020-09-30 | Imagination Tech Ltd | O-QPSK symbol timing estimation |
JP7164810B2 (ja) | 2018-09-06 | 2022-11-02 | 日本電信電話株式会社 | 信号処理装置及び光受信器 |
US10581587B1 (en) * | 2019-04-29 | 2020-03-03 | Advanced Micro Devices, Inc. | Deskewing method for a physical layer interface on a multi-chip module |
CN110557195B (zh) * | 2019-08-30 | 2020-08-28 | 北京邮电大学 | 一种基于相干光通信的定时误差检测方法及装置 |
WO2021089322A1 (en) * | 2019-11-08 | 2021-05-14 | Widex A/S | Digital receiver with phase offset compensation |
CN110995286B (zh) * | 2019-12-28 | 2023-05-02 | 复旦大学 | 一种s=2编码方式的低功耗蓝牙维特比联合解调解码方法 |
WO2022029085A1 (en) | 2020-08-06 | 2022-02-10 | Siliconally Gmbh | Method and timing recovery circuit for recovering a sampling clock from a serial data stream encoded using pam |
CN113708913B (zh) * | 2021-09-03 | 2023-04-11 | 四川安迪科技实业有限公司 | 一种定时偏差的对称折半查找估计值的有效性的判定方法 |
CN114760175B (zh) * | 2022-03-21 | 2023-08-01 | 上海航天电子通讯设备研究所 | 基于星载vde的qpsk-cpm分段双向差分解调系统 |
CN115604063B (zh) * | 2022-10-10 | 2024-04-30 | 电子科技大学 | 一种基于频相转换的高速磁悬浮列车通信系统解调方法 |
CN115834311B (zh) * | 2023-02-21 | 2023-04-28 | 天津讯联科技有限公司 | 通用cpfsk预滤波直接调制装置及其调制方法 |
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US5473637A (en) * | 1993-10-05 | 1995-12-05 | Pacific Communication Sciences, Inc. | Open-loop phase estimation methods and apparatus for coherent demodulation of phase modulated carriers in mobile channels |
US6154510A (en) * | 1999-05-03 | 2000-11-28 | Sicom, Inc. | Symbol timing recovery based on adjusted, phase-selected magnitude values |
US6567480B1 (en) * | 1999-08-10 | 2003-05-20 | Lucent Technologies Inc. | Method and apparatus for sampling timing adjustment and frequency offset compensation |
GB2359705B (en) * | 2000-02-28 | 2003-11-26 | Virata Ltd | xDSL sample rate compensation using phase balancing |
JP3481574B2 (ja) * | 2000-09-19 | 2003-12-22 | 沖電気工業株式会社 | 復調装置 |
US6985549B1 (en) * | 2000-10-20 | 2006-01-10 | Ati Research, Inc. | Blind cost criterion timing recovery |
JP3636097B2 (ja) * | 2001-06-05 | 2005-04-06 | 三菱電機株式会社 | 無線通信装置及びその受信タイミング推定方法 |
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EP1753193B1 (en) * | 2005-08-12 | 2009-12-09 | STMicroelectronics Belgium N.V. | Receiver with clock drift compensation |
JP5214990B2 (ja) * | 2008-02-06 | 2013-06-19 | ローム株式会社 | 差動位相偏移変調(DifferentialPhaseShiftKeying)された信号の復調回路、それを利用した無線機器 |
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2014
- 2014-01-31 EP EP14153485.9A patent/EP2903199B1/en active Active
-
2015
- 2015-01-29 JP JP2015015692A patent/JP6491894B2/ja not_active Expired - Fee Related
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US20150222419A1 (en) | 2015-08-06 |
EP2903199A1 (en) | 2015-08-05 |
EP2903199B1 (en) | 2019-03-06 |
JP2015146570A (ja) | 2015-08-13 |
US9425807B2 (en) | 2016-08-23 |
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