JP6414256B2 - Microlens array substrate, microlens array substrate manufacturing method, electro-optical device, and electronic apparatus - Google Patents

Description

  The present invention relates to a microlens array substrate, a method for manufacturing a microlens array substrate, an electro-optical device, and an electronic apparatus.

  There is known an electro-optical device including an electro-optical material (for example, liquid crystal) between an element substrate and a counter substrate. Examples of the electro-optical device include a liquid crystal device used as a liquid crystal light valve of a projector. Such a liquid crystal device is required to realize high light utilization efficiency.

  Therefore, for example, a configuration is known in which a microlens array substrate is provided on at least one of the element substrate and the counter substrate of the liquid crystal device, thereby converging light incident on the liquid crystal device and improving the substantial aperture ratio of the liquid crystal device. It has been. The microlens array substrate includes a base material (substrate) made of quartz or the like having a plurality of concave portions formed on the surface, and a lens layer that covers the base material and is embedded to embed the concave portions and has a refractive index different from that of the base material. (For example, refer to Patent Document 1).

JP 2011-118324 A

  By the way, in the case of an element substrate including a microlens array substrate, when forming a TFT element after forming the microlens array substrate, the microlens array substrate is heated at a temperature such as high temperature heating or cooling during the high temperature heat treatment in the process of forming the TFT element. Exposed to change. Then, due to the difference in thermal expansion coefficient between the substrate and the lens layer, the composition change of the lens layer, etc., there is a problem that stress is applied to the lens layer and the lens layer is cracked.

  On the other hand, like the liquid crystal display element (electro-optical device) described in Patent Document 1, the lens layer of the microlens array substrate is divided between the lenses to disperse the stress applied to the lens layer. Mitigating configurations have been proposed. However, according to the configuration of the liquid crystal display element described in Patent Document 1, since the adjacent lenses are arranged with a space therebetween, the light incident between the lenses is not collected by the lenses, and the light is used. There exists a subject that efficiency may fall. Therefore, there is a need for a microlens array substrate that can prevent cracks in the lens layer and improve the light utilization efficiency.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

  Application Example 1 The microlens array substrate according to this application example is arranged in a first direction, a second direction that intersects the first direction, the first direction, and a third direction that intersects the second direction. A concave portion is formed on one surface and has a light transmitting property, and is formed so as to embed the concave portion on the one surface of the substrate and cover a region where the concave portion is formed, and has a light transmitting property. A lens layer having a different refractive index, and the concave portion adjacent to the lens layer in the third direction among the first direction, the second direction, and the third direction in a plan view. A discontinuous portion is provided between each other, and the lens layer is continuous between the concave portions adjacent in at least one of the first direction and the second direction.

  According to the configuration of this application example, the third direction among the first direction, the second direction, and the third direction in the lens layer formed to embed the concave portion of the substrate and cover the region where the concave portion is formed. Since the discontinuous portion is provided between the adjacent concave portions in FIG. 2, the stress applied to the lens layer is dispersed. Further, since the volume of the entire lens layer is reduced by the discontinuous portion, the stress applied to the lens layer is relieved. On the other hand, the lens layer is continuous between the concave portions adjacent in at least one of the first direction and the second direction, and the light incident between the microlenses is collected and used by the microlens. The light utilization efficiency is improved as compared with the case where the microlenses are arranged with a space therebetween. Thereby, it is possible to provide a microlens array substrate in which cracking of the lens layer is suppressed and light utilization efficiency is improved.

  Application Example 2 In the microlens array substrate according to the application example described above, the concave portion is partitioned in a lattice shape along the first direction and the second direction, and the third direction is the lattice of the lattice. It is a direction that connects the intersections diagonally, and the discontinuous portion is preferably provided at a position corresponding to the intersection of the lattice.

  According to the configuration of this application example, the concave portions are partitioned in a lattice shape along the first direction and the second direction, and the discontinuous portion of the lens layer is provided at a position corresponding to the intersection of the lattice. The stress applied to the lens layer can be dispersed between the microlenses adjacent in the third direction, which is the direction connecting the intersections diagonally. Further, since the lens layer is continuous except at the position corresponding to the intersection of the gratings, the light use efficiency can be improved.

  [Application Example 3] A microlens array substrate according to the application example described above, which is provided for each pixel on the opposite side of the lens layer from the substrate and includes a channel region transistor, the lens layer, and the transistor. A light shielding layer provided so as to overlap at least the channel region of the transistor in plan view, and the discontinuous portion is preferably provided in a region overlapping the light shielding layer in plan view. .

  According to the configuration of this application example, since the microlens array substrate includes the transistor provided for each pixel, this substrate can be restated as an element substrate including the microlens array substrate. In such an element substrate, a light shielding layer is provided in a region that overlaps a channel region of a transistor that needs to be shielded, and a discontinuous portion is provided in a region that overlaps the light shielding layer of the lens layer. Can be reduced.

  Application Example 4 In the microlens array substrate according to the application example described above, it is preferable that the lens layer has a through hole reaching the substrate as the discontinuous portion.

  According to the configuration of this application example, the stress applied to the lens layer can be dispersed by the through hole reaching the substrate. In addition, since the volume of the entire lens layer is reduced by the amount of the through holes, the stress applied to the lens layer can be relaxed.

  Application Example 5 In the microlens array substrate according to the application example, the lens layer is formed between the concave portions along at least one direction of the first direction and the second direction in a plan view. It is preferable that a groove portion having a depth reaching the substrate is provided between the concave portions adjacent in the third direction, and the discontinuous portion is a portion reaching the substrate in the groove portion.

  According to the configuration of this application example, it is possible to disperse the stress applied to the lens layer at a portion having a depth reaching the substrate in the groove portion. Further, since the volume of the entire lens layer is reduced by the amount of the groove, the stress applied to the lens layer can be relaxed. Since the lens layer is continuous even in the portion where the groove portion is formed other than the portion reaching the substrate, the light incident on the groove portion can also be used effectively.

  Application Example 6 The microlens array substrate according to the application example, wherein the microlens array substrate is formed so as to embed the discontinuous portion of the lens layer, has light transmittance, and has substantially the same refractive index as the lens layer. And a transparent layer having higher heat resistance than the lens layer.

  According to the configuration of this application example, since the transparent layer is formed so as to fill the discontinuous portion of the lens layer, the step on the surface of the lens layer due to the discontinuous portion is reduced. Thereby, when forming a light shielding layer and wiring in the upper layer of a lens layer, a light shielding layer and wiring can be formed in the stable state. In addition, the transparent layer is light transmissive and has substantially the same refractive index as that of the lens layer, so that unnecessary reflection and scattering of light at the interface of the discontinuous portion can be suppressed. It is possible to suppress a decrease in light transmittance. Furthermore, since the transparent layer has higher heat resistance than the lens layer, even when the microlens array substrate is exposed to a temperature change such as high temperature heating or cooling, the crack of the lens layer can be further suppressed. .

  Application Example 7 An electro-optical device according to this application example includes the microlens array substrate according to the application example described above.

  According to the configuration of this application example, since the microlens array substrate that suppresses cracks in the lens layer and improves the light utilization efficiency is provided, it is possible to provide a high-quality and bright electro-optical device.

  Application Example 8 An electronic apparatus according to this application example includes the electro-optical device according to the application example.

  According to the configuration of this application example, it is possible to provide an electronic apparatus including a high-quality and bright electro-optical device.

  [Application Example 9] A method of manufacturing a microlens array substrate according to this application example includes a grating along a first direction and a second direction intersecting the first direction on one surface of a light-transmitting substrate. A step of forming a concave portion partitioned in a shape, and a refractive index different from that of the substrate, having light transmittance so as to embed the concave portion on the one surface of the substrate and cover the region where the concave portion is formed. A lens layer forming step of forming a lens layer having a portion, and a portion where the substrate is exposed at a position overlapping with four corners of the region partitioned in the lattice shape in plan view by removing a part of the lens layer And a removing step to be formed.

  According to the manufacturing method of this application example, after forming the concave portion partitioned in a lattice shape on one surface of the substrate, embedding the concave portion on one surface of the substrate and covering the region where the concave portion is formed, A part of the lens layer is removed to form a portion where the substrate is exposed at a position overlapping with the four corners of the region partitioned in a lattice shape. Therefore, the portion of the lens layer where the substrate is exposed becomes a discontinuous portion, and the stress applied to the lens layer is dispersed. Further, since the volume of the entire lens layer is reduced by the amount removed, the stress applied to the lens layer is relieved. On the other hand, the lens layer is continuous except for the positions corresponding to the four corners of the grid-divided area, and the light incident between the microlenses is collected and used by the microlenses. Efficiency can be improved. Thereby, it is possible to manufacture a microlens array substrate in which cracking of the lens layer is suppressed and light utilization efficiency is improved.

  Application Example 10 A method for manufacturing a microlens array substrate according to the application example, wherein a light shielding layer forming step of forming a light shielding layer on the lens layer between the lens layer forming step and the removing step. In the light shielding layer forming step, a lattice-shaped light shielding layer is formed at a position overlapping with the boundary between the concave portions in plan view, and in the removing step, a portion of the lens layer that is not covered with the light shielding layer Is preferably removed in the thickness direction from the light shielding layer side until the substrate is exposed at the boundary with the portion of the lens layer covered with the light shielding layer.

  According to the manufacturing method of this application example, after the lens layer is formed and the lattice-shaped light shielding layer is formed on the lens layer, the portion not covered with the light shielding layer is removed in the thickness direction from the light shielding layer side. The lens layer can be etched using the light shielding layer as an etching mask. This eliminates the need for an etching mask for the lens layer, thereby reducing the photolithography process for forming the etching mask. Further, by etching the lens layer using the light shielding layer as an etching mask, it is possible to suppress the positional shift of the microlens with respect to the light shielding layer and the discontinuous portion of the lens layer where the substrate is exposed. Therefore, it is possible to suppress a decrease in the light utilization rate due to the mutual positional deviation between the microlens and the light shielding layer.

  Application Example 11 In the method for manufacturing a microlens array substrate according to the application example, the method includes a step of forming a transparent layer so as to embed the removed portion of the lens layer after the removing step, It is preferable that the layer has light transmittance, has substantially the same refractive index as the lens layer, and has higher heat resistance than the lens layer.

  According to the manufacturing method of this application example, since the transparent layer is formed so as to embed the discontinuous portion of the lens layer, the step on the surface of the lens layer due to the discontinuous portion is alleviated. When forming a wiring or a wiring, the light shielding layer and the wiring can be formed in a stable state. In addition, the transparent layer is light transmissive and has substantially the same refractive index as the lens layer, so that unnecessary reflection and scattering of light at the interface of the discontinuous portion can be suppressed, so that the light enters. A decrease in light transmittance can be suppressed. Furthermore, since the transparent layer has higher heat resistance than the lens layer, even when the microlens array substrate is exposed to a temperature change such as high temperature heating or cooling, the crack of the lens layer can be further suppressed. .

1 is a schematic plan view showing a configuration of a liquid crystal device according to a first embodiment. FIG. 2 is an equivalent circuit diagram illustrating an electrical configuration of the liquid crystal device according to the first embodiment. 1 is a schematic cross-sectional view illustrating a configuration of a liquid crystal device according to a first embodiment. 1 is a schematic plan view showing a configuration of a microlens array substrate according to a first embodiment. 1 is a schematic cross-sectional view showing a configuration of a microlens array substrate according to a first embodiment. FIG. 3 is a schematic cross-sectional view showing the method for manufacturing the microlens array substrate according to the first embodiment. FIG. 3 is a schematic cross-sectional view showing the method for manufacturing the microlens array substrate according to the first embodiment. FIG. 3 is a schematic cross-sectional view showing the method for manufacturing the microlens array substrate according to the first embodiment. FIG. 3 is a schematic cross-sectional view showing the method for manufacturing the microlens array substrate according to the first embodiment. The schematic plan view which shows the structure of the microlens array board | substrate which concerns on 2nd Embodiment. The schematic sectional drawing which shows the structure of the microlens array board | substrate which concerns on 2nd Embodiment. The schematic plan view which shows the structure of the micro lens array board | substrate which concerns on 3rd Embodiment. The schematic sectional drawing which shows the structure of the micro lens array board | substrate which concerns on 3rd Embodiment. FIG. 6 is a schematic cross-sectional view showing a method for manufacturing a microlens array substrate according to a third embodiment. The schematic plan view which shows the structure of the micro lens array board | substrate which concerns on 4th Embodiment. Schematic which shows the structure of the projector as an electronic device which concerns on 5th Embodiment.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, embodiments of the invention will be described with reference to the drawings. The drawings to be used are appropriately enlarged, reduced or exaggerated so that the part to be described can be recognized. In addition, illustrations of components other than those necessary for the description may be omitted.

  In the following embodiments, for example, when “on the substrate” is described, the substrate is disposed so as to be in contact with the substrate, or is disposed on the substrate via another component, or the substrate. It is assumed that a part is arranged so as to be in contact with each other and a part is arranged via another component.

(First embodiment)
<Electro-optical device>
Here, as an electro-optical device, an active matrix liquid crystal device including a thin film transistor (TFT) as a pixel switching element will be described as an example. This liquid crystal device can be suitably used, for example, as a light modulation element (liquid crystal light valve) of a projection display device (projector) described later.

  First, a liquid crystal device as an electro-optical device according to the first embodiment will be described with reference to FIGS. 1, 2, and 3. FIG. 1 is a schematic plan view showing the configuration of the liquid crystal device according to the first embodiment. FIG. 2 is an equivalent circuit diagram showing an electrical configuration of the liquid crystal device according to the first embodiment. FIG. 3 is a schematic cross-sectional view illustrating the configuration of the liquid crystal device according to the first embodiment. Specifically, FIG. 3 is a schematic cross-sectional view taken along the line A-A ′ of FIG. 1.

  As shown in FIGS. 1 and 3, the liquid crystal device 1 according to the first embodiment includes an element substrate 20 and a counter substrate 30 that are arranged to face each other, and a liquid crystal that is arranged between the element substrate 20 and the counter substrate 30. Layer 40. As shown in FIG. 1, the element substrate 20 is slightly larger than the counter substrate 30, and both the substrates are joined via a sealing material 42 arranged in a frame shape.

  The liquid crystal layer 40 is composed of liquid crystal having positive or negative dielectric anisotropy enclosed in a space surrounded by the element substrate 20, the counter substrate 30, and the sealing material 42. The sealing material 42 is made of an adhesive such as a thermosetting or ultraviolet curable epoxy resin. Spacers (not shown) are mixed in the sealing material 42 to keep the distance between the element substrate 20 and the counter substrate 30 constant.

  A light shielding layer 22 (26, 32) having a frame-shaped peripheral edge portion is provided inside the sealing material 42 arranged in a frame shape. The light shielding layer 22 (26, 32) is made of, for example, a light shielding metal or metal oxide. Inside the light shielding layer 22 (26, 32) is a display area E in which a plurality of pixels P are arranged. The pixels P have, for example, a substantially rectangular shape and are arranged in a matrix. The light shielding layer 22 (26, 32) is provided, for example, in a lattice shape in the display region E so as to partition the plurality of pixels P in a plane (see FIG. 4).

  A data line driving circuit 51 and a plurality of external connection terminals 54 are provided outside the sealing material 42 on one side of the element substrate 20 along the one side. Further, an inspection circuit 53 is provided inside the sealing material 42 along the other one side facing the one side. Further, a scanning line driving circuit 52 is provided inside the sealing material 42 along the other two sides that are orthogonal to these two sides and face each other.

  A plurality of wirings 55 that connect the two scanning line driving circuits 52 are provided inside the sealing material 42 on one side where the inspection circuit 53 is provided. Wirings connected to the data line driving circuit 51 and the scanning line driving circuit 52 are connected to a plurality of external connection terminals 54. In addition, a vertical conduction portion 56 is provided at a corner portion of the counter substrate 30 to establish electrical continuity between the element substrate 20 and the counter substrate 30. The arrangement of the inspection circuit 53 is not limited to this, and the inspection circuit 53 may be provided at a position along the inner side of the seal material 42 between the data line driving circuit 51 and the display area E.

  In the following description, the direction along one side where the data line driving circuit 51 is provided is defined as the X direction as the first direction, and the direction along the other two sides perpendicular to the one side and facing each other. Is the Y direction as the second direction. The X direction is a direction along the line A-A ′ in FIG. 1. Further, a direction perpendicular to the X direction and the Y direction and directed upward in FIG. In this specification, viewing from the normal direction (Z direction) of the surface of the liquid crystal device 1 on the counter substrate 30 side is referred to as “plan view”.

  As shown in FIG. 2, in the display area E, the scanning lines 2 and the data lines 3 are formed so as to intersect with each other, and pixels P are provided corresponding to the intersections of the scanning lines 2 and the data lines 3. Yes. Each pixel P is provided with a pixel electrode 28 and a TFT 24 (Thin Film Transistor) as a switching element.

  A source electrode (not shown) of the TFT 24 is electrically connected to the data line 3 extending from the data line driving circuit 51. Image signals (data signals) S1, S2,..., Sn are supplied to the data line 3 from the data line driving circuit 51 (see FIG. 1) in a line sequential manner. A gate electrode (not shown) of the TFT 24 is a part of the scanning line 2 extending from the scanning line driving circuit 52. The scanning signals G1, G2,..., Gm are supplied to the scanning line 2 from the scanning line driving circuit 52 in a line sequential manner. A drain electrode (not shown) of the TFT 24 is electrically connected to the pixel electrode 28.

  The image signals S1, S2,..., Sn are written to the pixel electrode 28 via the data line 3 at a predetermined timing by turning on the TFT 24 for a certain period. The image signal of a predetermined level written in the liquid crystal layer 40 through the pixel electrode 28 in this manner is constant by the liquid crystal capacitance formed between the common electrode 34 (see FIG. 3) provided on the counter substrate 30. Hold for a period.

  In order to prevent the retained image signals S1, S2,..., Sn from leaking, a storage capacitor 5 is formed between the capacitor line 4 formed along the scanning line 2 and the pixel electrode 28. Arranged in parallel with the liquid crystal capacitor. Thus, when a voltage signal is applied to the liquid crystal of each pixel P, the alignment state of the liquid crystal changes depending on the applied voltage level. As a result, the light incident on the liquid crystal layer 40 (see FIG. 3) is modulated to enable gradation display.

  The liquid crystal constituting the liquid crystal layer 40 modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. For example, in the normally white mode, the transmittance for incident light decreases according to the voltage applied in units of each pixel P. In the normally black mode, the transmittance for incident light increases in accordance with the voltage applied in units of each pixel P, and light having a contrast corresponding to an image signal is emitted from the liquid crystal device 1 as a whole.

  As shown in FIG. 3, the element substrate 20 includes a microlens array substrate 10, a path layer 21, a light shielding layer 22, an insulating layer 23, a TFT 24, an insulating layer 25, a light shielding layer 26, and an insulating layer 27. And a pixel electrode 28 and an alignment film 29.

  The microlens array substrate 10 includes a substrate 11 and a lens layer 12. The substrate 11 has a plurality of recesses 11b formed on the one surface 11a on the liquid crystal layer 40 side. Each recess 11b is provided corresponding to each pixel P. The recessed part 11b is formed in the curved surface shape which tapers toward the bottom part. The substrate 11 is made of a light transmissive material such as glass or quartz.

  The lens layer 12 is formed so as to cover the one surface 11a of the substrate 11 and to bury the concave portion 11b. The lens layer 12 is made of a material having optical transparency and a refractive index different from that of the substrate 11. More specifically, the lens layer 12 is made of an inorganic material having a higher refractive index than that of the substrate. Examples of such an inorganic material include SiON and AlO.

  By embedding the concave portion 11b with the lens layer 12, a convex microlens ML is formed. Accordingly, each microlens ML is provided corresponding to each pixel P. In addition, a microlens array MLA is configured by the plurality of microlenses ML. It is preferable that the lens layer 12 is not provided outside the region where the microlens array MLA is formed. That is, it is preferable that the lens layer 12 is provided only in a region where the concave portion 11b is formed in the one surface 11a of the substrate 11.

  The lens layer 12 is provided with a through-hole 13 as a discontinuous portion between the microlenses ML along a predetermined direction (W direction) (see FIG. 4). Details of the microlens array substrate 10 such as the arrangement and shape of the through holes 13 will be described later.

  The pass layer 21 is provided so as to cover the microlens array substrate 10. The pass layer 21 is made of, for example, an inorganic material having substantially the same refractive index as that of the substrate 11. The pass layer 21 has a function of flattening the surface of the microlens array substrate 10 and adjusting the distance from the microlens ML to the light shielding layer 22 to a desired value. Therefore, the layer thickness of the pass layer 21 is appropriately set based on optical conditions such as the focal length of the microlens ML corresponding to the wavelength of light.

  The light shielding layer 22 is provided on the pass layer 21. The light shielding layer 22 is formed in a lattice shape so as to overlap the upper light shielding layer 26 in plan view (see FIG. 4). The light shielding layer 22 and the light shielding layer 26 are disposed so as to sandwich the TFT 24 therebetween in the thickness direction (Z direction) of the element substrate 20. The light shielding layer 22 overlaps at least the channel region of the TFT 24 in plan view. By providing the light shielding layer 22 and the light shielding layer 26, the incidence of light on the TFT 24 is suppressed. A region surrounded by the light shielding layer 22 (in the opening 22a) and a region surrounded by the light shielding layer 26 (in the opening 26a) are regions through which light is transmitted.

The insulating layer 23 is provided so as to cover the path layer 21 and the light shielding layer 22. The insulating layer 23 is made of an inorganic material such as SiO ₂ .

  The TFT 24 is provided on the insulating layer 23. The TFT 24 is a switching element that drives the pixel electrode 28. The TFT 24 includes a semiconductor layer, a gate electrode, a source electrode, and a drain electrode (not shown). A source region, a channel region, and a drain region are formed in the semiconductor layer. An LDD (Lightly Doped Drain) region may be formed at the interface between the channel region and the source region or between the channel region and the drain region.

  The gate electrode is formed on the element substrate 20 in a region overlapping with the channel region of the semiconductor layer in plan view via a part (gate insulating film) of the insulating layer 25. Although not shown, the gate electrode is electrically connected to the scanning line 2 (see FIG. 2) arranged on the lower layer side via a contact hole, and the TFT 24 is turned on / off by applying a scanning signal. Control off.

The insulating layer 25 is provided so as to cover the insulating layer 23 and the TFT 24. The insulating layer 25 is made of an inorganic material such as SiO ₂ , for example. The insulating layer 25 includes a gate insulating film that insulates between the semiconductor layer of the TFT 24 and the gate electrode. The insulating layer 25 alleviates surface irregularities caused by the TFT 24. A light shielding layer 26 is provided on the insulating layer 25. An insulating layer 27 made of an inorganic material is provided so as to cover the insulating layer 25 and the light shielding layer 26.

  The pixel electrode 28 is provided on the insulating layer 27 corresponding to the pixel P. The pixel electrode 28 is disposed in a region overlapping the opening 22 a of the light shielding layer 22 and the opening 26 a of the light shielding layer 26 in plan view. The pixel electrode 28 is made of a transparent conductive film such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). The alignment film 29 is provided so as to cover the pixel electrode 28.

  Note that the TFT 24 and electrodes and wiring (not shown) for supplying an electrical signal to the TFT 24 are provided in a region overlapping the light shielding layer 22 and the light shielding layer 26 in plan view. A configuration in which these electrodes and wirings also serve as the light shielding layer 22 and the light shielding layer 26 may be employed.

  The counter substrate 30 includes a substrate 31, a light shielding layer 32, a protective layer 33, a common electrode 34, and an alignment film 35. The substrate 31 is made of a light transmissive material such as glass or quartz. The light shielding layer 32 is formed in a lattice shape so as to overlap the light shielding layer 22 and the light shielding layer 26 of the element substrate in a plan view. A region surrounded by the light shielding layer 32 (in the opening 32a) is a region through which light is transmitted.

  The protective layer 33 is provided so as to cover the substrate 31 and the light shielding layer 32. The common electrode 34 is provided so as to cover the protective layer 33. The common electrode 34 is formed across a plurality of pixels P. The common electrode 34 is made of a transparent conductive film such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). The alignment film 35 is provided so as to cover the common electrode 34.

  The protective layer 33 covers the light shielding layer 32 so that the surface of the common electrode 34 facing the liquid crystal layer 40 is flat, and is not an essential component. For example, the conductive light shielding layer 32 is provided. You may form the common electrode 34 so that it may cover directly. The liquid crystal layer 40 is sealed between the alignment film 29 on the element substrate 20 side and the alignment film 35 on the counter substrate 30 side.

  In the liquid crystal device 1 according to the first embodiment, light enters from the element substrate 20 (substrate 11) side including the microlens ML and is collected by the microlens ML. For example, of the light incident on the convex microlens ML from the substrate 11 side, the incident light L1 incident along the optical axis passing through the planar center of the pixel P travels straight through the microlens ML as it is, and the liquid crystal It passes through the layer 40 and is emitted to the counter substrate 30 side.

  The incident light L2 that has entered the peripheral edge of the microlens ML from a region that overlaps the light shielding layer 22 in a plan view outside the incident light L1 is shielded by the light shielding layer 22 as indicated by a broken line if it travels straight as it is. However, the light is refracted toward the planar center of the pixel P due to the difference in the optical refractive index between the substrate 11 and the lens layer 12. In the liquid crystal device 1, the incident light L <b> 2 that is shielded by the light shielding layer 22 when traveling straight in this way is also incident into the opening 22 a of the light shielding layer 22 by the condensing action of the microlens ML and passes through the liquid crystal layer 40. Can be made. As a result, since the amount of light emitted from the counter substrate 30 side can be increased, the light use efficiency can be increased.

<Microlens array substrate>
Subsequently, the microlens array substrate 10 according to the first embodiment will be further described with reference to FIGS. 4 and 5. FIG. 4 is a schematic plan view showing the configuration of the microlens array substrate according to the first embodiment. FIG. 5 is a schematic cross-sectional view showing the configuration of the microlens array substrate according to the first embodiment. Specifically, FIG. 5A is a schematic cross-sectional view taken along the line AA ′ in FIG. 4, and FIG. 5B is a schematic cross-sectional view taken along the line BB ′ in FIG. Note that the cross section taken along the line AA ′ in FIG. 4 corresponds to the cross section taken along the line AA ′ in FIG. 1 (X direction).

  In FIG. 4, the light shielding layer 22 whose outline is indicated by a broken line and hatched in the region is superimposed and displayed on the microlens array substrate 10 so that the positional relationship between the microlens ML and the light shielding layer 22 in a plan view can be understood. ing. As shown in FIG. 4, the light shielding layer 22 is provided in a lattice shape along the X direction (first direction) and the Y direction (second direction), and has a substantially rectangular opening 22a. Yes. The pixels P are partitioned in a lattice shape by the light shielding layer 22 and are arranged in a matrix shape along the X direction and the Y direction.

  In FIG. 4, the A-A ′ line is a line connecting the planar center position of the region of the pixel P along the X direction. The B-B ′ line is a line that connects the intersections of the lattices of the light shielding layer 22 diagonally. The B-B ′ line is also a line connecting the planar center positions of the pixel P regions located diagonally. The direction along the line B-B ′ is the W direction as the third direction. The W direction is a direction that intersects the X direction and the Y direction.

  The concave portions 11 b of the substrate 11 are partitioned in a lattice shape corresponding to the pixels P. The recessed part 11b is formed in the curved surface shape which tapers concentrically toward the bottom part. Therefore, the position of the bottom of the recess 11b substantially coincides with the planar center position of the region of the pixel P. The microlenses ML are arranged in a matrix corresponding to the arrangement of the pixels P. The light shielding layer 22 overlaps the boundary between the microlenses ML arranged in a matrix in a plan view.

  The lens layer 12 is provided with a through-hole 13 that reaches the substrate 11 at a position that overlaps the intersection of the lattices of the light shielding layer 22 in plan view. Therefore, the through holes 13 are arranged at positions corresponding to the four corners of each microlens ML. Moreover, the through-hole 13 is provided between the microlenses ML adjacent in the W direction (between the recesses 11b). Since the light incident on the lens layer 12 is not collected and used in the through-hole 13, the through-hole 13 is provided so as to overlap with the light-shielding layer 22. Light that is not used in the entire array substrate 10 can be reduced.

  The shape of the through hole 13 in plan view is, for example, a circle. The shape of the through hole 13 in plan view may be other shapes such as a rectangle or a polygon. The size of the through hole 13 in plan view is preferably equal to or smaller than the region overlapping the light shielding layer 22 in plan view. By doing in this way, the light which is not utilized can be decreased more and the level | step difference resulting from the through-hole 13 can be prevented from being reflected in the area | region of the pixel P. FIG.

  As shown in FIG. 5A, in the AA ′ line direction, adjacent concave portions 11b are coupled to each other, and the through hole 13 is not provided in the lens layer 12, so that the microlens ML is continuous. Is formed. The thickness of the lens layer 12 at the boundary between adjacent microlenses ML in the A-A ′ line direction is D3. Although not shown, the microlenses ML are similarly formed in the direction connecting the planar center positions of the regions of the pixels P along the Y direction, and at the boundary between adjacent microlenses ML. The thickness of the lens layer 12 is D3.

  As shown in FIG. 5B, in the BB ′ line direction, a through-hole 13 reaching the substrate 11 is provided between the adjacent microlenses ML of the lens layer 12, and the adjacent microlenses ML. The lenses ML are separated from each other. Since the BB ′ line direction is a direction along the diagonal line, the distance between the planar centers of the adjacent microlenses ML is longer than the AA ′ line direction, and the lens at the boundary between the microlenses ML. The thickness of the layer 12 is thin. Accordingly, when the thickness of the lens layer 12 at the boundary between the microlenses ML before the through hole 13 is formed in the lens layer 12 is D2, the thickness D2 is thinner (smaller) than the thickness D3. The thickness D2 is thinner (smaller) than ½ of the thickness D3. Further, when the depth of the through hole 13 from the surface of the lens layer 12 is D1, the depth D1 of the through hole 13 is deeper (larger) than the thickness D2.

  In the microlens array substrate 10 according to the first embodiment, in the BB ′ line direction (W direction), a through hole 13 is provided between adjacent microlenses ML, and the lens layer 12 is divided. . Therefore, for example, even when exposed to a temperature change such as high-temperature heating or cooling in the process of forming the TFT 24 in the upper layer, the stress applied to the lens layer 12 is dispersed by the through-holes 13, so that the warp of the microlens array substrate 10 Can be reduced.

  Here, the liquid crystal display element (liquid crystal device) described in Patent Document 1 has a configuration in which the stress applied to the lens layer is dispersed and relaxed by dividing the lens layer of the microlens array substrate between the lenses. doing. However, according to the configuration of the liquid crystal display element described in Patent Document 1, the lenses that are adjacent to each other in the X direction, the Y direction, and the W direction are spaced from each other. Is not condensed by the lens, and there is a problem that the light use efficiency may decrease.

  On the other hand, in the microlens array substrate 10 according to the first embodiment, the lens layer 12 is not divided between the adjacent microlenses ML in the AA ′ line direction (X direction and Y direction). doing. For this reason, the light incident between the microlenses ML adjacent in the AA ′ line direction is collected and used by the microlenses ML, and therefore, the microlenses ML are arranged with a space therebetween. Compared with the case, the light utilization efficiency is improved. Thereby, it is possible to provide the microlens array substrate 10 in which cracks in the lens layer 12 are suppressed and the light utilization efficiency is improved.

  In addition, it is preferable that the lens layer 12 is provided only in the area | region where the microlens array MLA is arrange | positioned among the one surfaces 11a (refer FIG. 3) of the board | substrate 11, ie, the area | region in which the recessed part 11b was formed. If the lens layer 12 is not provided outside the region where the microlens array MLA is disposed, the entire volume of the lens layer 12 can be reduced, and the stress applied to the lens layer 12 can be further relaxed. In addition, if the lens layer 12 is outside the region where the microlens array MLA is disposed, cracks generated in the lens layer 12 in this portion may reach the region where the microlens array MLA is disposed. By providing the lens layer 12 only in the region where the microlens array MLA is disposed, such a crack can be avoided.

<Manufacturing method of microlens array substrate>
Next, a method for manufacturing the microlens array substrate 10 according to the first embodiment will be described with reference to FIGS. 6, 7, 8, and 9. 6, FIG. 7, FIG. 8, and FIG. 9 are schematic cross-sectional views showing a method for manufacturing a microlens array substrate according to the first embodiment. Specifically, FIGS. 6, 7, 8, and 9 are schematic cross-sectional views taken along the line BB ′ of FIG. However, only FIG.8 (c) is a schematic sectional drawing in alignment with the AA 'line of FIG.

  Although not shown, in the manufacturing process of the microlens array substrate 10, processing is performed with a large substrate (mother substrate) on which a plurality of microlens array substrates 10 can be obtained, and the mother substrate is finally cut into individual pieces. By singulation, a plurality of microlens array substrates 10 are obtained. Accordingly, in each step described below, processing is performed in the state of the mother substrate before being singulated, but here, processing on the individual microlens array substrate 10 in the mother substrate will be described.

  First, as shown in FIG. 6A, a high-temperature polysilicon film 71 is formed on one surface 11a of a light-transmitting substrate 11 made of quartz or the like. Next, as shown in FIG. 6B, a resist layer 72 is applied on the high-temperature polysilicon film 71. Next, as shown in FIG. 6C, the resist layer 72 is patterned by, for example, a photolithography method to form an opening 72a. In addition, although illustration is abbreviate | omitted, the opening part 72a is arranged in matrix form by planar view corresponding to the recessed part 11b formed at a next process.

  Next, as shown in FIG. 6D, the high-temperature polysilicon film 71 is dry-etched using the resist layer 72 as an etching mask to form openings 71 a in the high-temperature polysilicon film 71. The opening 71a is formed in the same shape as the opening 72a of the resist layer 72 in plan view. Thereafter, as shown in FIG. 7A, the resist layer 72 is peeled off.

  Next, as shown in FIG. 7B, an isotropic etching process such as wet etching using an etchant is performed on the substrate 11 from above the high-temperature polysilicon film 71. In this step, a substantially hemispherical region is removed from the one surface 11a side of the substrate 11 with the opening 71a as the center in a cross-sectional view to form the recess 11b. The recess 11b is formed concentrically with the opening 71a as the center in plan view.

  As shown in FIG. 7C, wet etching is performed until the boundary between the adjacent recesses 11b is lower than the one surface 11a of the substrate 11, and the high-temperature polysilicon film 71 is removed. In this step, the etching is temporarily stopped with a space between adjacent recesses 11b as shown in FIG. 7B, and the wet etching process is performed again after removing the high-temperature polysilicon film 71. It may be done.

  Accordingly, the concave portion 11b is curved in a cross-sectional view and concentric in a plan view. As a result, the height of the boundary between the recesses 11b with respect to the bottom of the recess 11b in the BB ′ line direction indicated by a solid line is the height of the boundary between the recesses 11b with respect to the bottom of the recess 11b in the AA ′ line direction indicated by a broken line. Higher than that.

  Next, as shown in FIG. 8A, a lens layer 12 a made of an inorganic material that is light transmissive and has a higher refractive index than that of the substrate 11 is embedded so as to fill the recess 11 b formed in the substrate 11. Form (lens layer forming step). The lens layer 12a can be formed using, for example, a CVD (Chemical Vapor Deposition) method. The surface of the lens layer 12a reflects the step between the bottom of the recess 11b and the boundary.

  Next, as shown in FIG. 8B, the surface of the lens layer 12a is planarized using, for example, CMP (Chemical Mechanical Polishing). The remaining thickness of the lens layer 12a after the planarization process, that is, the layer thickness of the lens layer 12 is appropriately set based on optical conditions such as the focal length of the microlens ML to be formed.

  Here, the thickness of the lens layer 12 at the boundary between the microlenses ML along the line B-B ′ is D2. Further, as shown in FIG. 8C, the thickness of the lens layer 12 at the boundary between the microlenses ML along the line A-A ′ is D3. Since the height of the boundary between the recesses 11b in the B-B 'line direction is higher than the height of the boundary between the recesses 11b in the A-A' line direction, D2 <D3.

  Next, as illustrated in FIG. 9A, a resist layer 73 is formed on the surface of the lens layer 12. Then, the resist layer 73 is patterned by, for example, a photolithography method to form an opening 73a. In addition, although illustration is abbreviate | omitted, the opening part 73a is circularly formed by planar view at the position of the four corners of the recessed part 11b, for example corresponding to the through-hole 13 formed at a next process.

  Next, as shown in FIG. 9B, an anisotropic etching process is performed on the lens layer 12 from above the resist layer 73 (removal step). In the removing step, etching is performed until the depth from the surface of the lens layer 12 reaches D1 reaching the substrate 11 by dry etching, for example. The depth D1 for etching the lens layer 12 is D2 <D1 as described above. Thereby, the through-hole 13 is formed and the microlens array substrate 10 is completed.

  Thereafter, when the element substrate 20 including the microlens array substrate 10 is manufactured, the path layer 21, the light shielding layer 22, the insulating layer 23, and the TFT 24 are formed on the microlens array substrate 10 in this order.

  In the removal step, it is preferable to remove the portion of the lens layer 12 outside the region where the microlens array MLA is disposed. If the lens layer 12 is continuous between the plurality of microlens array substrates 10 in the state of the mother substrate, stress may concentrate on a part of the mother substrate to cause cracks. In addition, a crack generated in a part on the mother substrate may reach a plurality of microlens array substrates 10.

  By removing the lens layer 12 outside the region where the microlens array MLA is disposed in the removal process, the lens layer 12 is divided for each microlens array substrate 10 in the mother substrate, so that stress concentration is reduced. Is done. In addition, since the lens layer 12 is divided between the microlens array substrates 10, even when a crack is generated on a part of the mother substrate, it is possible to prevent the microlens array substrates 10 from reaching the plurality of microlens array substrates 10.

  As described above, according to the first embodiment, the following effects can be obtained.

  (1) In the microlens array substrate 10, the X direction and the Y direction (AA ′ line) in the lens layer 12 formed so as to embed the concave portion 11b of the substrate 11 and cover the region where the concave portion 11b is formed, And the through-hole 13 which reaches | attains the board | substrate 11 is provided between the recessed parts 11b adjacent in the W direction among W directions (BB 'line direction). Therefore, in the W direction (BB ′ line direction), since the lens layer 12 is divided by the through-holes 13 between the adjacent concave portions 11b (microlenses ML), the stress applied to the lens layer 12 is increased. Distributed. In addition, since the volume of the entire lens layer 12 is reduced by the amount of the through hole 13 provided, the stress applied to the lens layer 12 is relieved. On the other hand, the lens layer 12 is continuous between the concave portions 11b adjacent in the X direction and the Y direction (AA ′ line), and light incident between the microlenses ML is collected by the microlens ML. Therefore, the light utilization efficiency is improved as compared with the case where the microlenses ML are arranged with a space therebetween. Thereby, it is possible to provide the microlens array substrate 10 in which cracks in the lens layer 12 are suppressed and the light utilization efficiency is improved.

  (2) Since the concave portions 11b of the substrate 11 are partitioned in a lattice shape along the X direction and the Y direction, and the through holes 13 of the lens layer 12 are provided at positions corresponding to the intersection points of the lattices, The stress applied to the lens layer 12 can be dispersed between the adjacent microlenses ML in the W direction (BB ′ line direction), which is a diagonal direction. Further, since the lens layer 12 is continuous except for the position corresponding to the intersection of the gratings, the light use efficiency can be improved.

  (3) In the element substrate 20 including the TFT 24 and the microlens array substrate 10 provided for each pixel P, a light shielding layer 22 is provided in a region overlapping the channel region of the TFT 24 that needs to be shielded from light. Since the through-hole 13 is provided in the region of the light shielding layer 22, the light that is not used can be further reduced.

  (4) Since the liquid crystal device 1 includes the microlens array substrate 10 in which cracking of the lens layer 12 is suppressed and light utilization efficiency is improved, the liquid crystal device 1 having high quality and brightness can be provided.

(Second Embodiment)
In the liquid crystal devices of the second and subsequent embodiments, the configuration of the microlens array substrate is different, but the other configurations are substantially the same, so the configuration and manufacturing method of the microlens array substrate will be described, and The description of is omitted.

<Microlens array substrate>
A configuration of the microlens array substrate according to the second embodiment will be described. FIG. 10 is a schematic plan view showing the configuration of the microlens array substrate according to the second embodiment. FIG. 11 is a schematic cross-sectional view showing the configuration of the microlens array substrate according to the second embodiment. Specifically, FIG. 11A is a schematic cross-sectional view along the line AA ′ (X direction) in FIG. 10, and FIG. 11B is along the line BB ′ (W direction) in FIG. FIG.

  The microlens array substrate 10A according to the second embodiment is different from the microlens array substrate 10 according to the first embodiment in that a groove portion 14 including a discontinuous portion is provided. The configuration of is almost the same. In addition, about the component which is common in 1st Embodiment, the same code | symbol is attached | subjected and the description is abbreviate | omitted.

  As shown in FIG. 10, in the microlens array substrate 10 </ b> A according to the second embodiment, the microlens ML has a matrix corresponding to the arrangement of the pixels P similarly to the microlens array substrate 10 according to the first embodiment. Are arranged in a shape. A groove portion 14 is provided in the lens layer 12 of the microlens array substrate 10A.

  The groove portions 14 are provided in a lattice shape along the X direction and the Y direction so as to overlap the light shielding layer 22 in plan view. That is, the groove part 14 is arrange | positioned between the microlenses ML adjacent in the X direction and the Y direction (between the recessed parts 11b).

  The intersection 15 between the X direction and the Y direction of the groove portion 14 overlaps the intersection of the lattice of the light shielding layer 22 and is positioned at the four corners of the microlens ML. Therefore, the intersection 15 of the groove 14 is disposed between the adjacent microlenses ML (between the recesses 11b) in the B-B ′ line direction.

  The width of the groove 14 in the X direction and the Y direction is preferably equal to or smaller than the width of the light shielding layer 22. By doing so, the intersection 15 where the light incident on the groove 14 is not used can be arranged in the region of the light shielding layer 22. Further, it is possible to prevent the step caused by the groove 14 from being reflected in the region of the pixel P.

  As shown in FIG. 11A, the groove 14 is provided between the adjacent microlenses ML (between the recesses 11b) in the A-A ′ line direction. When the depth of the groove 14 from the surface of the lens layer 12 is D4, the depth D4 is shallower (smaller) than the thickness D3 of the lens layer 12 at the boundary between the adjacent microlenses ML in the AA ′ line direction. ).

  Therefore, the groove 14 does not reach the substrate 11 between the microlenses ML adjacent in the A-A ′ line direction, and the lens layer 12 is not divided. Therefore, in the A-A ′ line direction, even if the lens layer 12 has the groove portion 14, incident light can be condensed and used.

  As shown in FIG. 11B, between the microlenses ML that are adjacent in the BB ′ line direction (between the recesses 11b), as described above, the intersection 15 between the X direction and the Y direction of the groove portion 14. Is located. The depth D4 of the groove 14 is the same at the intersection 15 as well. The depth D4 of the groove 14 is deeper (larger) than the thickness D2 of the lens layer 12 at the boundary between the adjacent microlenses ML in the B-B ′ line direction. That is, the depth D4 of the groove 14 is D2 <D4 <D3.

  Therefore, between the microlenses ML adjacent in the B-B ′ line direction, the groove portion 14 reaches the substrate 11 at the intersection 15, and the lens layer 12 is divided. That is, adjacent microlenses ML are coupled in the A-A ′ line direction (X direction), and adjacent microlenses ML are separated in the B-B ′ line direction (W direction). Thereby, also in the microlens array substrate 10A according to the second embodiment, the same effect as in the first embodiment can be obtained.

<Manufacturing method of microlens array substrate>
Although not shown, the groove portion 14 is formed by anisotropically etching the lens layer 12 in a lattice shape in a plan view in the removing step, compared to the manufacturing method of the microlens array substrate according to the first embodiment. it can. As described in the first embodiment, since the thickness of the lens layer 12 at the boundary between adjacent microlenses ML is different between the AA ′ line direction and the BB ′ line direction, the lens layer 12 is By making the etching depth D4 shallower (smaller) than the depth D3 shown in FIG. 11A and deeper (larger) than the depth D2 shown in FIG. Thus, the groove 14 reaching the substrate 11 can be formed. In the second embodiment, the opening 74 a (FIG. 9A) formed in the resist layer 74 has a shape corresponding to the groove 14.

  As described above, according to the second embodiment, the following effects can be obtained.

  (1) In the microlens array substrate 10 </ b> A, the groove portions 14 provided in a lattice shape along the X direction and the Y direction in the lens layer 12 reach the substrate 11 at the intersection 15. Therefore, since the lens layer 12 is divided at the intersection 15 in the W direction, the stress applied to the lens layer 12 is dispersed in the W direction (B-B ′ line direction). Further, since the volume of the entire lens layer 12 is reduced by the amount of the groove 14 provided, the stress applied to the lens layer 12 is relieved. On the other hand, the lens layer 12 is continuous between the concave portions 11b (microlenses ML) adjacent to each other in the X direction and the Y direction (AA ′ line direction), and light incident between the microlenses ML is. Since the light is condensed by the microlens ML and used, the light utilization efficiency is improved as compared with the case where the microlenses ML are arranged with a space therebetween. Thereby, similarly to the first embodiment, it is possible to provide the microlens array substrate 10A in which cracks in the lens layer 12 are suppressed and the light use efficiency is improved.

  (2) Since the groove portion 14 is provided in a lattice shape so as to overlap the light shielding layer 22 in plan view, the portion of the intersection 15 that reaches the substrate 11 and does not use the incident light also shields the incident light. It arrange | positions in the area | region which overlaps with the light shielding layer 22. FIG. Thereby, compared with the case where the groove part 14 is provided in the area | region which does not overlap with the light shielding layer 22, since the light which is not utilized in the whole microlens array board | substrate 10A can be decreased, light utilization efficiency can be improved more.

  In addition, the shape of the groove part 14 is not limited to the above-mentioned lattice shape, and may be formed along only one direction of the X direction or the Y direction, for example. In addition, the shape of the groove portion 14 is a shape that is divided between intersections in the lattice X- and Y-directions, that is, a + shape in plan view, and the four corners (in the BB ′ line direction) of each microlens ML. It may be formed between adjacent microlenses ML.

(Third embodiment)
<Microlens array substrate>
Next, the configuration of the microlens array substrate according to the third embodiment will be described. FIG. 12 is a schematic plan view showing the configuration of the microlens array substrate according to the third embodiment. FIG. 13 is a schematic cross-sectional view showing the configuration of the microlens array substrate according to the third embodiment. Specifically, FIG. 13A is a schematic cross-sectional view along the line AA ′ (X direction) of FIG. 12, and FIG. 13B is along the line BB ′ (W direction) of FIG. FIG.

  The microlens array substrate 10B according to the third embodiment is different from the microlens array substrates 10 and 10A according to the above embodiment in that discontinuous portions are provided in the lens layer 12 in the thickness direction. The other configurations are almost the same. In addition, about the component which is common in the said embodiment, the same code | symbol is attached | subjected and the description is abbreviate | omitted.

  As shown in FIG. 12, in the microlens array substrate 10B according to the third embodiment, the microlens ML corresponds to the arrangement of the pixels P in the matrix as in the microlens array substrates 10 and 10A according to the above embodiment. Are arranged in a shape. In the microlens array substrate 10B, in the lens layer 12, a concave portion 16 is provided in a region overlapping the opening 22a of the light shielding layer 22 with a lattice-shaped portion overlapping the light shielding layer 22 in a plan view as a partition. And in the corner | angular part 16a of the four corners of the recessed part 16, it is the parting part 17 from which the lens layer 12 becomes discontinuous.

  As shown in FIG. 13A, the recess 16 is provided in the lens layer 12 in the opening 22 a of the light shielding layer 22 corresponding to the recess 11 b of the substrate 11. In other words, the portion of the lens layer 12 that overlaps the light shielding layer 22 is a partition that defines the recess 16. Assuming that the depth of the concave portion 16 from the surface of the lens layer 12 is D5, the depth D5 is shallower (smaller) than the thickness D7 of the lens layer 12 at the boundary between adjacent microlenses ML in the AA ′ line direction. ). Therefore, the bottom of the recess 16 does not reach the substrate 11 in the direction of the line A-A ′.

  As shown in FIG. 13B, the depth D5 of the concave portion 16 from the surface of the lens layer 12 is larger than the thickness D6 of the lens layer 12 at the boundary between the adjacent microlenses ML in the BB ′ line direction. Deep (big). That is, the depth D5 of the recess 16 is D6 <D5 <D7. And the bottom part of the recessed part 16 reaches | attains the board | substrate 11 in the corner | angular part 16a of four corners, and is formed so that it may bite into the board | substrate 11. FIG. Therefore, the portion of the partition wall of the lens layer 12 that is located at the boundary between the adjacent microlenses ML in the B-B ′ line direction is divided from the lens layer 12 at the corner portion 16 a to become a divided portion 17.

  As described above, the lens layer 12 is continuous between the adjacent microlenses ML in the A-A ′ line direction, but is divided at the corners 16 a at the four corners in the B-B ′ line direction. That is, adjacent microlenses ML are coupled in the A-A ′ line direction (X direction), and adjacent microlenses ML are separated in the B-B ′ line direction (W direction). Therefore, also in the microlens array substrate 10B according to the third embodiment, the same effect as in the above embodiment can be obtained.

<Manufacturing method of microlens array substrate>
Next, a method for manufacturing the microlens array substrate 10B according to the third embodiment will be described with reference to FIG. FIG. 14 is a schematic cross-sectional view showing a method for manufacturing a microlens array substrate according to the third embodiment. Specifically, each drawing in FIG. 14 is a schematic cross-sectional view along the line BB ′ in FIG.

  The method for manufacturing the microlens array substrate 10B according to the third embodiment is different from the first embodiment in the process after the planarization process of the surface of the lens layer 12 shown in FIG. 8B. In the third embodiment, as shown in FIG. 14A, on the surface of the lens layer 12 after the planarization process, electrodes and wirings (not shown) for supplying an electric signal to the TFT 24, a light shielding layer 22, and the like. (Light shielding layer forming step). In the following description, the light shielding layer 22 including the electrodes and wirings and the light shielding layer 22 is referred to.

  In the microlens array substrate 10B, since the light shielding layer 22 is provided on the lens layer 12, the lens layer 12 also functions as the pass layer 21 (see FIG. 3). Therefore, the positional relationship in the thickness direction (Z direction) between the microlens ML and the light shielding layer 22 is determined by the layer thickness of the lens layer 12 after the surface of the lens layer 12 is planarized.

  Following the light shielding layer forming step, the light shielding layer 22 is patterned by a resist layer 75 formed on the light shielding layer 22, as shown in FIG. The resist layer 75 has a lattice shape in plan view, and has a rectangular opening 75a. A portion overlapping the opening 75 a of the resist layer 75 becomes the opening 22 a of the light shielding layer 22. Next, as shown in FIG. 14B, the resist layer 75 is removed.

  Next, as shown in FIG. 14C, the lens layer 12 is anisotropically etched using the light shielding layer 22 as a mask (removal step). Since the light shielding layer 22 is used as a mask in the removing process, an etching mask for etching the lens layer 12 can be eliminated, and the photolithography process for forming the etching mask can be reduced. Further, by etching the lens layer 12 using the light shielding layer 22 as a mask, the planar positional deviation between the microlens array and the light shielding layer 22 can be suppressed, so that the decrease in the light utilization rate due to the mutual positional deviation is suppressed. It is done.

  In the removing step shown in FIG. 14C, a portion of the lens layer 12 that is not covered by the light shielding layer 22, that is, a portion in the opening 22a is removed in the thickness direction from the light shielding layer 22 side to form the concave portion 16. Form. At this time, etching is performed to the depth D5 at which the substrate 11 is exposed at the boundary between the portion (partitioned portion) 17 covered with the light shielding layer 22 in the lens layer 12 and the portion in the opening 22a, that is, at the corner 16a of the recess 16. Do. Thereby, the recess 16 is formed, and the microlens array substrate 10B is completed.

  Thereafter, when the element substrate 20 including the microlens array substrate 10B is manufactured, the insulating layer 23 is formed on the microlens array substrate 10B and the light shielding layer to reduce the surface step, and the TFT 24 is formed on the insulating layer 23. Form. Note that, after the removing step, for example, an embedded layer for embedding the recess 16 may be provided to alleviate a step on the surface of the microlens array substrate 10B (lens layer 12) due to the recess 16 or the light shielding layer 22.

  According to the third embodiment, the following effects can be obtained.

  (1) In the microlens array substrate 10B, the lens layer 12 is divided in the W direction (BB ′ line direction) at the four corners 16a of the recess 16 provided in the lens layer 12, so that the W direction The stress applied to the lens layer 12 is dispersed. Further, since the volume of the entire lens layer 12 is reduced by the amount of the concave portion 16, the stress applied to the lens layer 12 is relieved. On the other hand, the lens layer 12 is continuous between the concave portions 11b (microlenses ML) adjacent to each other in the X direction and the Y direction (AA ′ line direction), and light incident between the microlenses ML is. Since the light is condensed by the microlens ML and used, the light utilization efficiency is improved as compared with the case where the microlenses ML are arranged with a space therebetween. Thereby, similarly to the above-described embodiment, it is possible to provide the microlens array substrate 10B in which cracking of the lens layer 12 is suppressed and the light use efficiency is improved.

  (2) After the lens layer 12 is formed and the light shielding layer 22 is formed on the lens layer 12, the portion not covered by the light shielding layer 22 is removed in the thickness direction from the light shielding layer 22 side. The lens layer 12 can be etched by using it as an etching mask. Therefore, the etching mask for the lens layer 12 can be made unnecessary, so that the photolithography process for forming the etching mask can be reduced. Further, by etching the lens layer 12 using the light shielding layer 22 as an etching mask, the positional deviation of the corner 16a of the concave portion 16 where the substrate 11 is exposed and the microlens ML with respect to the light shielding layer 22 can be suppressed. Therefore, it is possible to suppress a decrease in the light utilization rate due to the mutual positional deviation between the microlens ML and the light shielding layer 22.

  (3) Since the positional relationship in the thickness direction (Z direction) between the microlens ML and the light shielding layer 22 is determined by the layer thickness of the lens layer 12 after the flattening process, the layer thickness of the lens layer 12 during the flattening process By controlling the above, it becomes possible to adjust optical conditions such as the focal length of the microlens ML.

(Fourth embodiment)
<Microlens array substrate>
Next, the configuration of the microlens array substrate according to the fourth embodiment will be described. FIG. 15 is a schematic plan view showing the configuration of the microlens array substrate according to the fourth embodiment. Specifically, FIG. 15A is a schematic cross-sectional view along the line AA ′ (X direction) in FIG. 5, and FIG. 15B is along the line BB ′ (W direction) in FIG. 5. FIG.

  The microlens array substrate 10C according to the fourth embodiment is different from the microlens array substrate 10 according to the first embodiment in that a transparent layer 18 is provided on the lens layer 12. Other configurations are almost the same. In addition, about the component which is common in 1st Embodiment, the same code | symbol is attached | subjected and the description is abbreviate | omitted.

  As shown in FIGS. 15A and 15B, in the microlens array substrate 10 </ b> C according to the fourth embodiment, a transparent layer 18 formed so as to bury at least the through holes 13 is provided on the lens layer 12. It has been. The transparent layer 18 is provided, for example, so as to cover a region where the microlenses ML of the lens layer 12 are arranged. By providing the transparent layer 18, the level difference due to the through hole 13 provided in the lens layer 12 is reduced.

  The transparent layer 18 is light transmissive and has approximately the same refractive index as the lens layer 12. The transparent layer 18 has higher heat resistance than the lens layer 12. As a material of the transparent layer 18, for example, an inorganic material such as SiON or SiN can be used.

<Manufacturing method of microlens array substrate>
The manufacturing method of the microlens array substrate 10C according to the fourth embodiment includes a step of forming the transparent layer 18 after the removing step in the first embodiment. Although not shown, in the step of forming the transparent layer 18, the transparent layer 18 is formed so as to embed the through holes 13 provided in the lens layer 12 by using, for example, a CVD method. In the step of forming the transparent layer 18, the transparent layer 18 is formed on the lens layer 12 at a higher temperature than in the step of forming the lens layer 12.

  According to the fourth embodiment, the following effects can be obtained.

  (1) Since the transparent layer 18 is formed so as to embed the through hole 13 of the lens layer 12, the step on the surface of the lens layer 12 due to the through hole 13 is reduced. Accordingly, when the light shielding layer 22 and the wiring are formed on the upper layer of the microlens array substrate 10C, the light shielding layer 22 and the wiring can be formed in a stable state.

  (2) Since the transparent layer 18 is light transmissive and has substantially the same refractive index as the lens layer 12, unnecessary reflection and scattering of light at the interface of the through hole 13 can be suppressed. Further, it is possible to suppress a decrease in the transmittance of light incident on the microlens array substrate 10C.

  (3) Since the transparent layer 18 has higher heat resistance than the lens layer 12, even when the microlens array substrate 10C is exposed to temperature changes such as high temperature heating and cooling, cracks in the lens layer 12 are prevented. It can be suppressed more.

(Fifth embodiment)
<Electronic equipment>
Next, an electronic apparatus according to a fifth embodiment will be described with reference to FIG. FIG. 16 is a schematic diagram illustrating a configuration of a projector as an electronic apparatus according to the fifth embodiment.

  As shown in FIG. 16, a projector (projection display device) 100 as an electronic apparatus according to the fifth embodiment includes a polarization illumination device 110, two dichroic mirrors 104 and 105 as light separation elements, and three Reflective mirrors 106, 107, 108, five relay lenses 111, 112, 113, 114, 115, three liquid crystal light valves 121, 122, 123, a cross dichroic prism 116 as a light combining element, and a projection lens 117 It has.

  The polarization illumination device 110 includes a lamp unit 101 as a light source composed of a white light source such as an ultra-high pressure mercury lamp or a halogen lamp, an integrator lens 102, and a polarization conversion element 103. The lamp unit 101, the integrator lens 102, and the polarization conversion element 103 are arranged along the system optical axis L.

  The dichroic mirror 104 reflects red light (R) and transmits green light (G) and blue light (B) among the polarized light beams emitted from the polarization illumination device 110. Another dichroic mirror 105 reflects the green light (G) transmitted through the dichroic mirror 104 and transmits the blue light (B).

  The red light (R) reflected by the dichroic mirror 104 is reflected by the reflection mirror 106 and then enters the liquid crystal light valve 121 via the relay lens 115. The green light (G) reflected by the dichroic mirror 105 enters the liquid crystal light valve 122 via the relay lens 114. The blue light (B) transmitted through the dichroic mirror 105 is incident on the liquid crystal light valve 123 via a light guide system composed of three relay lenses 111, 112, 113 and two reflection mirrors 107, 108.

  The transmissive liquid crystal light valves 121, 122, and 123 as light modulation elements are disposed to face the incident surfaces of the cross dichroic prism 116 for each color light. The color light incident on the liquid crystal light valves 121, 122, 123 is modulated based on video information (video signal) and emitted toward the cross dichroic prism 116.

  The cross dichroic prism 116 is configured by bonding four right-angle prisms, and a dielectric multilayer film that reflects red light and a dielectric multilayer film that reflects blue light are formed in a cross shape on the inner surface thereof. Yes. The three color lights are synthesized by these dielectric multilayer films, and the light representing the color image is synthesized. The synthesized light is projected onto the screen 130 by the projection lens 117 which is a projection optical system, and the image is enlarged and displayed.

  The liquid crystal light valve 121 uses the liquid crystal device 1 having the microlens array substrates 10, 10 </ b> A, 10 </ b> B, and 10 </ b> C of the above-described embodiments. The liquid crystal light valve 121 is arranged with a gap between a pair of polarizing elements arranged in crossed Nicols on the incident side and emission side of colored light. The same applies to the other liquid crystal light valves 122 and 123.

  According to the configuration of the projector 100 according to the fifth embodiment, the microlens array substrates 10, 10 </ b> A, 10 </ b> B, and 10 </ b> C that can efficiently use the incident color light even when the plurality of pixels P are arranged with high definition. Since the liquid crystal device 1 is provided, the projector 100 can be provided with high quality and brightness.

  The above-described embodiments merely show one aspect of the present invention, and can be arbitrarily modified and applied within the scope of the present invention. As modifications, for example, the following can be considered.

(Modification 1)
The microlens array substrate 10C according to the fourth embodiment has a configuration in which the transparent layer 18 is provided so as to embed the through holes 13 of the lens layer 12 of the microlens array substrate 10 according to the first embodiment. The present invention is not limited to such a form. A configuration in which a transparent layer 18 is provided so as to bury the grooves 14 and the recesses 16 of the lens layer 12 of the microlens array substrates 10A and 10B according to the second embodiment and the third embodiment may be adopted. Even in such a configuration, the same effect as in the fourth embodiment can be obtained.

(Modification 2)
In each of the embodiments described above, in the liquid crystal device 1, the microlens array substrates 10, 10A, 10B, and 10C are provided in the element substrate 20, but the present invention is not limited to such a form. For example, the microlens array substrate 10, 10 </ b> A, 10 </ b> B, 10 </ b> C may be provided on the counter substrate 30. The microlens array substrates 10, 10A, 10B, and 10C may be provided on both the element substrate 20 and the counter substrate 30. When the counter lens 30 includes the microlens array substrates 10, 10A, 10B, and 10C, the discontinuous portion that reaches the substrate 11 such as the through hole 13 overlaps the light shielding layer 32 (see FIG. 3) in a plane. Placed in position.

(Modification 3)
In the embodiment described above, the discontinuous portion that reaches the substrate 11 such as the through hole 13 provided in the lens layer 12 of the microlens array substrate 10, 10A, 10B, 10C is in the W direction (BB ′ line direction). However, the present invention is not limited to such a form. For example, the discontinuous portions such as the through holes 13 may be provided every other or every two microlenses ML adjacent to each other in the W direction (BB ′ line direction).

(Modification 4)
In the embodiment described above, the microlens ML (the concave portion 11b of the substrate 11) has a curved surface shape such as a substantially hemispherical shape in a cross-sectional view, but the present invention is not limited to such a form. The microlens ML (the concave portion 11b of the substrate 11) may have another shape such as a V shape in a cross-sectional view.

(Modification 5)
In the above-described embodiment, the microlens array substrates 10, 10 </ b> A, 10 </ b> B, and 10 </ b> C have a configuration in which one microlens ML is provided corresponding to one pixel P. However, the present invention has such a configuration. It is not limited. For example, when three pixels P of red (R), green (G), and blue (B) are used as one unit when forming an image, one microlens ML is red (R), green ( G) and blue (B) may be provided corresponding to the three pixels P.

(Modification 6)
In the above-described embodiment, the microlens array substrates 10, 10A, 10B, and 10C have the configuration in which the microlens array ML (the concave portions 11b of the substrate 11) is arranged in a matrix. It is not limited to. The arrangement of the microlens array ML may be a different arrangement such as a honeycomb arrangement, for example, corresponding to the arrangement of the pixels P.

(Modification 7)
The electronic apparatus to which the liquid crystal device 1 of the above-described embodiment can be applied is not limited to the projector 100. The liquid crystal device 1 is, for example, a projection type HUD (head-up display), a direct-view type HMD (head-mounted display), an electronic book, a personal computer, a digital still camera, a liquid crystal television, a viewfinder type, or a monitor direct-view type video. It can be suitably used as a display unit for information terminal devices such as recorders, car navigation systems, electronic notebooks, and POS.

  DESCRIPTION OF SYMBOLS 1 ... Liquid crystal device (electro-optical device) 10, 10A, 10B, 10C ... Micro lens array substrate, 11 ... Substrate, 11a ... One side, 11b ... Recess, 12 ... Lens layer, 13 ... Through-hole, 14 ... Groove, 16 DESCRIPTION OF SYMBOLS ... Recessed part, 18 ... Transparent layer, 22 ... Light shielding layer, 24 ... TFT (transistor), 100 ... Projector (electronic device), ML ... Micro lens, P ... Pixel.

Claims (6)

A first direction, a second direction intersecting with the first direction, a concave portion arranged in a third direction intersecting with the first direction and the second direction, and having a light transmitting property;
A lens layer that is disposed so as to embed the concave portion of the substrate and cover the concave portion, has a light transmittance, and has a refractive index different from that of the substrate,
The lens layer has a lens layer concave portion corresponding to the concave portion in plan view, and has a partition that partitions the adjacent lens layer concave portions in plan view,
The bottom of the concave portion of the lens layer is not continuous by dividing the lens layer in the third direction, and has reached the substrate shallower than the lens layer in one of the first direction and the second direction. A microlens array substrate, wherein the lens layer is bonded . The microlens array substrate according to claim 1,
The recess is partitioned in a lattice shape along the first direction and the second direction,
The microlens array substrate according to claim 3, wherein the third direction is a direction that diagonally connects the intersections of the lattices. The microlens array substrate according to claim 1 or 2,
A transistor provided for each pixel on the opposite side of the lens layer from the substrate and having a channel region;
A light shielding layer provided between the lens layer and the transistor so as to overlap at least the channel region of the transistor in plan view ,
The microlens array substrate, wherein the partition wall and the light shielding layer are provided to overlap each other in a plan view . An electro-optical device comprising the microlens array substrate according to any one of claims 1 to 3 . An electronic apparatus comprising the electro-optical device according to claim 4 . Forming a recess partitioned in a lattice shape along a first direction and a second direction intersecting the first direction on a substrate having optical transparency;
A lens layer forming step of forming a lens layer having a light transmittance and a refractive index different from that of the substrate so as to embed the concave portion and cover the region where the concave portion is formed;
Patterning a light shielding layer in a lattice pattern on the surface of the lens layer;
A step of removing the lens layer by etching the lens layer using the light shielding layer as a mask ,
In the removing step, the substrate is exposed by the lens layer recess in the first direction and in a third direction intersecting the second direction, and to a depth at which the substrate is not exposed in one of the first direction and the second direction. The method for producing a microlens array substrate, wherein the lens layer is removed .

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