JP6408394B2 - Semiconductor device, semiconductor device manufacturing method, and manufacturing apparatus - Google Patents

Description

  One embodiment of the disclosed invention relates to a semiconductor device in which a plurality of semiconductor chips are stacked in a semiconductor package, a manufacturing method thereof, and a manufacturing apparatus therefor.

  A semiconductor package is formed by separating a plurality of semiconductor chips arranged in a matrix on a single silicon wafer by dicing and sealing by packaging.

  According to a method for manufacturing a semiconductor package, a die attach position of a semiconductor chip is detected by detecting an alignment mark provided on the package substrate with a camera in a step of placing the semiconductor chip at a predetermined position on the package substrate (die attach). A method for determining the value is known. The alignment mark on the package substrate is formed by attaching a plating material such as gold (Au).

  However, in order to reduce the size and increase the functionality of a semiconductor package, the number of semiconductor chips stacked and sealed in one semiconductor package increases, and alignment when stacking them becomes difficult. To go.

  When determining the die attach position of the semiconductor chip and performing die attach, a positional deviation always occurs. As the number of semiconductor packages used increases, misalignment accumulates, increasing the risk of product quality degradation and yield reduction. In the conventional method of detecting an alignment mark with a camera, it is expected that such a limit of accuracy becomes apparent at an early stage.

  In view of such a problem, an embodiment of the present invention has an object to provide a method for manufacturing a semiconductor package in which the alignment accuracy of a semiconductor chip is improved. Another object of one embodiment of the present invention is to provide a semiconductor package with improved reliability obtained by the manufacturing method. Furthermore, it is an object of an embodiment of the present invention to provide a manufacturing apparatus for the manufacturing method.

  According to one embodiment of the present invention, the position of a tray jig having a proximity sensor and a chip tray is detected based on the proximity sensor, and a plurality of semiconductor chips are placed on the chip tray based on the detected position of the tray jig. There is provided a method of manufacturing a semiconductor device including transferring and stacking, and transferring and mounting a plurality of stacked semiconductor chips on a package substrate.

  According to one embodiment of the present invention, a package substrate and a plurality of stacked semiconductor chips stacked on the package substrate are provided, each of the plurality of stacked semiconductor chips being disposed in the lowermost layer, and a support There is provided a semiconductor device including a plurality of semiconductor chips stacked on a substrate.

  According to one embodiment of the present invention, a detection unit that receives an optical signal from a tray jig and detects the position of the tray jig, and a position of the tray jig detected from the detection unit is received and detected. There is provided a semiconductor package manufacturing apparatus including a chip mounter for transferring and die attaching a semiconductor chip on the tray jig based on the position of the tray jig.

  According to one embodiment of the present invention, by adopting a method using a proximity sensor instead of the conventional method as an alignment method when stacking semiconductor chips, the alignment accuracy is improved. Accordingly, a semiconductor package with improved reliability can be provided.

It is a perspective view showing a tray jig concerning one embodiment of the present invention. It is the top view and sectional drawing which show the tray jig | tool which concerns on one Embodiment of this invention. It is sectional drawing explaining the semiconductor device manufacturing method which concerns on one Embodiment of this invention. It is sectional drawing explaining the semiconductor device manufacturing method which concerns on one Embodiment of this invention. It is sectional drawing explaining the semiconductor device manufacturing method which concerns on one Embodiment of this invention. It is a perspective view showing a tray jig concerning one embodiment of the present invention. It is a perspective view which shows the package board | substrate which concerns on one Embodiment of this invention. It is a perspective view which shows the package board | substrate which concerns on one Embodiment of this invention.

  Embodiments of the present invention will be described below with reference to the drawings. However, the present invention can be implemented in many different modes and should not be construed as being limited to the description of the embodiments exemplified below. In addition, the drawings may be schematically represented with respect to the width, thickness, shape, and the like of each part in comparison with actual aspects for the sake of clarity of explanation, but are merely examples, and the interpretation of the present invention is not limited. It is not limited. Further, in the present specification and each drawing, the same elements as those described above with reference to the previous drawings are denoted by the same reference numerals, and detailed description may be omitted as appropriate.

  In this specification, when a member or region is “on (or below)” another member or region, this is directly above (or directly below) the other member or region unless otherwise specified. ) As well as the case above (or below) other members or regions, i.e., another component is included above (or below) other members or regions. Including cases.

<Embodiment>
A method for manufacturing a semiconductor device according to the present embodiment will be described with reference to FIGS. The semiconductor device manufacturing method according to the present embodiment includes a step of stacking a plurality of semiconductor chips 14 on the tray jig 100, and transferring the plurality of semiconductor chips 114 stacked on the tray jig 100 to the package substrate 118. Mounting process.

  FIG. 1 is a perspective view of a tray jig 100 used in the method for manufacturing a semiconductor device according to the present embodiment. The tray jig 100 has a plurality of chip trays 102 and a plurality of proximity sensors 104 corresponding to each of the plurality of chip trays 102.

  2A and 2B are a plan view of the tray jig 100 according to the present embodiment and a cross-sectional view taken along line AB in FIG. 2A, respectively. FIG. 2 shows a view focusing on one chip tray 102 in the tray jig 100. The chip tray 102 may have a recess for fixing the position of the semiconductor chip disposed in the lowermost layer. Further, in the step of stacking the substrates, the suction holes 106 for fixing the stacked semiconductor chips may be provided.

  1 and 2 show a mode in which two proximity sensors 104 are provided for one chip tray 102, the number is not limited to two. As a minimum, two proximity sensors 104 arranged at different positions are necessary, and three or more proximity sensors 104 may be provided.

  For example, an optical sensor is used as the proximity sensor 104. As the optical sensor, for example, a vertical cavity surface emitting laser (VCSEL) is preferably used because the positional deviation can be suppressed within a range of 25 μm or less.

  Although it does not specifically limit as a raw material of the tray jig | tool 100, Metals, such as aluminum and stainless steel, plastics, ceramics, etc. can be used in addition.

  The method for manufacturing the semiconductor device according to the present embodiment will be described in detail with reference to FIGS.

  As shown in FIG. 3A, the position of the tray jig 100 is detected by the detector 108. The detector 108 receives a signal from the proximity sensor 104 to detect the position of the tray jig 100, and based on the detected position, a plurality of semiconductor chips 114 stacked on the tray jig 100. The coordinates on each plane are determined.

  When the coordinates on the plane where the semiconductor chip 114 is to be arranged are determined, the semiconductor chip 114 sucked by the chip mounter 110 is transferred onto the tray jig 100 and die-attached.

  In the present embodiment, it is preferable to provide the support substrate 112 in the lowermost layer on the tray jig 100. As the support substrate 112, for example, a silicon substrate may be used. The support substrate 112 may or may not have a semiconductor integrated circuit formed on the surface. Furthermore, it is not limited to a silicon substrate, and other semiconductor substrates or metal substrates may be used. The support substrate 112 preferably has a higher mechanical strength than the plurality of semiconductor chips 114 that are stacked on the upper layer. For example, a substrate that is thicker than those is used.

  As shown in FIG. 3B, when the support substrate 112 is placed on the tray jig 100, an adhesive layer is not yet formed on the back surface of the support substrate 112. The support substrate 112 transferred onto the tray jig 100 may be fixed with a vacuum chuck or the like through the suction holes 106 provided in the tray jig 100, for example.

  Next, as shown in FIGS. 3C, 3 D, and 4 A, a plurality of semiconductor chips are sequentially stacked on the support substrate 112.

  The plurality of semiconductor chips 114 may be separated from the silicon wafer. At this time, the silicon wafer may be a bulk silicon wafer or an SOI (Silicon on Insulator) wafer. Alternatively, it may be separated from other semiconductor wafers. Each of the plurality of semiconductor chips 114 has a semiconductor integrated circuit formed on the surface although not shown. Furthermore, an electrical connection terminal is provided near the end of the surface.

  At this time, an adhesive layer is formed on the surface opposite to the surface on which the integrated circuits on the plurality of semiconductor chips 114 are formed. As the customer service layer, a sheet-like adhesive is used, and for example, a die attach film is preferably used.

  When laminating a plurality of semiconductor chips 114, as shown in FIG. 3D, they can be laminated with a deviation of a certain width or more. As a result, an electrical connection terminal can be provided in the region where the surface of the semiconductor chip 114 is exposed, and the package substrate 118 can be connected by wire bonding in a later process.

  The width of the shift is preferably as small as possible if the electrical connection terminal can be arranged in the exposed region. According to the manufacturing method of the semiconductor device according to the present embodiment, the die attach position accuracy of the semiconductor chip can be improved, so that the design margin at the time of stacking can be suppressed as compared with the conventional case. Accordingly, the width of the shift can be suppressed to be smaller than that in the conventional case, and an increase in the exclusive area on the plane due to an increase in the stacked semiconductor chips can be suppressed.

  FIG. 6 is a perspective view of the support substrate 112 and the plurality of semiconductor chips 114 stacked on the tray jig.

  When the stacking of the predetermined number of semiconductor chips 114 is completed, as shown in FIG. 4B, the support substrate 112 fixed by a vacuum chuck or the like is released, and the stacked semiconductor chips 114 and the support substrate 112 (stacked) The semiconductor chip) is transferred and mounted on the package substrate 118 by the chip mounter 110. FIG. 7 is a perspective view of the laminated semiconductor chip mounted on the package substrate 118.

  Regarding the alignment when the stacked semiconductor chips 114 are mounted on the package substrate 118, the accuracy as high as the process of stacking the semiconductor chips 114 on the tray jig 100 is not required. Therefore, heretofore known methods can be used. That is, a method of detecting an alignment mark provided on the package substrate 118 with a camera can be used.

  At this time, by providing the support substrate 112, the plurality of stacked semiconductor chips 114 are arranged on the package substrate 118 through the support substrate 112. For this reason, it is possible to suppress the risk of cracking or damage of the semiconductor chip 114, which is a concern in the process of mounting the stacked semiconductor chips 114 on the package substrate 118.

  As a result, quality degradation of the semiconductor device can be suppressed, and reliability and yield can be improved.

  An adhesive layer 116 needs to be formed on the adhesive surface between the package substrate 118 and the support substrate 112. As the adhesive layer 116, a sheet-like adhesive or a paste-like adhesive can be used. As the sheet-like adhesive, the above-mentioned die attach film can be used, and as the paste-like adhesive, a die attach paste can be used. For example, a silver-based or resin-based adhesive can be used. There is no limit. In particular, a die attach paste is preferably used because of excellent adhesion between the support substrate 112 and the package substrate 118.

  Next, as shown in FIG. 4C, an electrical connection terminal (not shown) exposed on the surface of the semiconductor chip 114 and the package substrate 118 are connected by a bonding wire 120. The material of the bonding wire 120 is preferably a material having excellent conductivity, for example, a gold wire or a copper wire, but may be any material having necessary conductivity and connectivity.

  According to the manufacturing method of the present embodiment, a plurality of semiconductor chips 114 can be further stacked on the semiconductor chip 114 stacked on the package substrate 118.

  As shown in FIG. 5A, a plurality of semiconductor chips are stacked on the support substrate 113 arranged on the tray jig 100 by the same process as that of the first stacked semiconductor chip described above. A laminated semiconductor chip is produced.

  Next, as shown in FIG. 5B, the manufactured second laminated semiconductor chip is transferred using the chip mounter 110 and mounted on the first laminated semiconductor chip arranged on the package substrate 118. Here, in the second laminated semiconductor chip, the direction in which the plurality of semiconductor chips 114 are shifted is opposite to that of the first laminated semiconductor chip. FIG. 8 is a perspective view of the laminated semiconductor chip mounted on the package substrate 118.

  By stacking in this way, an increase in the area occupied on the plane of the entire semiconductor package can be avoided as much as possible.

  Next, as shown in FIG. 5C, wire bonding is performed on the second laminated semiconductor chip. Each of the plurality of semiconductor chips 114 is preferably made as thin as possible in order to reduce the size of the product, but there is a risk of chip cracking during wire bonding.

  In the semiconductor package manufacturing method according to the present modification and the semiconductor package manufactured thereby, the support substrate 113 is present immediately below the semiconductor chip 114 disposed in the lowermost layer of the second stacked semiconductor chip. Not.

  When the semiconductor chip 114 arranged in the lowermost layer of the second stacked semiconductor chip is hollow, it is possible to ensure the strength that can withstand the process of connecting the semiconductor chip 114 and the package substrate 118 with the bonding wire 120. There are cases where it is not possible. In the semiconductor package manufacturing method according to the present modification, the support substrate 113 is provided, whereby the strength for that purpose can be ensured, and the risk of chip cracking can be avoided.

  Although not shown, a laminated semiconductor chip may be further produced and laminated on the package substrate. At this time, in the stacked semiconductor chip, the shift direction of the plurality of semiconductor chips may be reversed with respect to the shift direction of the adjacent lower layer stacked semiconductor chips. In this way, by stacking the semiconductor chips while turning the direction of deviation, the increase in the area occupied on the plane of the semiconductor package can be suppressed.

  The method for manufacturing the semiconductor package according to the present embodiment has been described above. According to the manufacturing method of the semiconductor package according to the present embodiment, it is possible to improve the positional accuracy when the plurality of semiconductor chips 114 are stacked and die-attached, thereby improving the yield and providing a highly reliable semiconductor package. Can be provided.

  The method for manufacturing a semiconductor package according to the preferred embodiment of the present invention has been described above. However, these are merely examples, and the technical scope of the present invention is not limited thereto. Indeed, various modifications will be apparent to those skilled in the art without departing from the spirit of the invention as claimed in the claims. Therefore, it should be understood that these changes also belong to the technical scope of the present invention.

Tray jig: 100
Chip tray: 102
Proximity sensor: 104
Adsorption hole: 106
Detector: 108
Chip mounter: 110
Support board: 112, 113
Semiconductor chip: 114
Adhesive layer: 116
Package substrate: 118
Bonding wire: 120

Claims (9)

Detecting a position of a tray jig having a proximity sensor and a chip tray based on the proximity sensor;
Based on the detected position of the tray jig, a plurality of semiconductor chips are transferred to the chip tray and stacked,
A method of manufacturing a semiconductor device, comprising transferring and mounting the plurality of stacked semiconductor chips on a package substrate. The method of manufacturing a semiconductor device according to claim 1, wherein the proximity sensor is an optical sensor. The method of manufacturing a semiconductor device according to claim 2, wherein the optical sensor uses a vertical cavity surface emitting laser.   The method of manufacturing a semiconductor device according to claim 3, further comprising disposing a support substrate thicker than the plurality of semiconductor chips immediately above the chip tray. Transferring and stacking the plurality of semiconductor chips to the chip tray,
The method of manufacturing a semiconductor device according to claim 4, wherein each of the plurality of semiconductor chips is stacked while being shifted from each other. Transferring and mounting the plurality of stacked semiconductor chips on a package substrate,
6. The method of manufacturing a semiconductor device according to claim 5, wherein bonding is performed using a paste-like adhesive.   The method of manufacturing a semiconductor device according to claim 6, wherein the paste-like adhesive is a die attach paste. A second support substrate is disposed immediately above the chip tray;
A plurality of semiconductor chips are stacked on the second support substrate based on the detected position of the tray jig,
The method for manufacturing a semiconductor device according to claim 7, further comprising stacking the plurality of stacked semiconductor chips and the second support substrate on the package substrate. A detector that receives an optical signal from the tray jig and detects the position of the tray jig;
A chip mounter that receives the detected position of the tray jig from the detector, transfers a semiconductor chip onto the tray jig based on the detected position of the tray jig, and is die-attached. Semiconductor package manufacturing equipment.

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