JP6368572B2 - Constant current circuit - Google Patents

Description

  The present invention relates to a constant current circuit using a depletion type MOS (Metal Oxide Semiconductor) transistor used in a semiconductor integrated circuit.

  In a semiconductor integrated circuit, a constant current circuit using a depletion type MOS transistor is used as a constant current circuit having a simple configuration.

  As an example of such a constant current circuit using a depletion type MOS transistor, a load L1 is applied to a low withstand voltage and small current depletion type MOS transistor Q1 and a high withstand voltage and large current depletion type MOS transistor Q2 connected in series with each other. There is known a constant current circuit that realizes constant current characteristics by connecting the devices in series. (See Patent Document 1)

  As another example of a constant current circuit using a depletion type MOS transistor, a constant current characteristic is realized by limiting the drain current in the saturation region by short-circuiting the gate and the source of the depletion type N channel MOS transistor. Current circuits are known. In order to increase the breakdown voltage of a constant current circuit using a depletion type N-channel MOS transistor, a high voltage is applied between the drain and the source. Therefore, a DMOS (Double Diffused MOS) or DEMOS (Drain) having a structure suitable for a high breakdown voltage is applied. (Extended MOS) transistor is used with a depletion type whose threshold voltage is lower than 0V.

FIG. 10 is a circuit diagram of a constant current circuit using a conventional depletion type N-channel DMOS transistor. FIG. 11 shows the gate voltage-drain current (Vgs-Ids) characteristics of a constant current circuit using a conventional depletion type N-channel DMOS transistor. 12 is a plan view showing an example of a surface arrangement of a constant current circuit using a conventional depletion type N-channel DMOS transistor, and FIG. 13 is a cross-sectional view showing a CC ′ cross section of FIG. It is.
The conventional constant current circuit 71 using the depletion type N-channel DMOS transistor shown in FIGS. 12 and 13 includes a source diffusion region 80 separated by a field oxide film 87 provided to ensure the breakdown voltage of the drain 88. On the side, the threshold voltage adjusting diffusion region 84 starts from the source diffusion region 80, penetrates the body diffusion region 82 inside the body diffusion region 82, and further exceeds the body diffusion region 82 to surround the body diffusion region 82. Is extended to the end of the field oxide film 87 adjacent thereto, and the width of the threshold voltage adjusting diffusion region 84 is increased each time the field oxide film 87 is extended. Since the threshold voltage adjustment diffusion region 84 has the same conductivity type as the source diffusion region 80, the single threshold voltage of the DMOS transistor 73 is set to 0 V or less, and the DMOS transistor 73 has a gate voltage-drain current (Vgs-Ids) in FIG. Show properties.

  At present, for electronic devices equipped with a semiconductor integrated circuit having a constant current circuit using a depletion type MOS transistor as described above, product discrimination by reducing power consumption in order to save electricity and save electricity charges. Is required. In particular, in recent years, there is a strict demand for realizing low power consumption even when the electronic device is in a non-use state or a standby state. For example, even when the electronic device is in a standby state and the minimum necessary circuit is operated to monitor the state of the electronic device itself or the surrounding environment, it is necessary to reduce the power consumption as much as possible. For this reason, reduction of the set current is also demanded for the constant current circuit using the above-described depletion type MOS transistor used in the semiconductor integrated circuit.

2005-222301

  In the constant current circuit described in Patent Document 1, the gate length dimension and the gate width dimension of the depletion type MOS transistor Q1 with a low breakdown voltage and a small current and the depletion type MOS transistor Q2 with a high breakdown voltage and a large current are optimized. Combined to achieve constant current characteristics. However, if the combination of the gate length dimension and the gate width dimension is inappropriate, current may not flow. In addition, the MOS transistors Q1 and Q2 cannot be manufactured to the required dimensions due to restrictions on the design rule, and the set current value of the constant current circuit cannot be set to a desired value.

In the constant current circuit described in Patent Document 1, the depletion type MOS transistor generally has a threshold voltage of −1 V <Vth <0 V, and Vds1 is also set to several hundred mV. However, this region corresponds to a region where the MOS transistor changes from the linear region to the saturation region, and since the change in Ids with respect to the change in Vds is large, there is a possibility that a constant current circuit having a large variation in electrical characteristics with respect to manufacturing variation can be obtained. is there.
As described above, the constant current circuit described in Patent Document 1 is manufactured by controlling the dimensions of the MOS transistors Q1 and Q2, and it is difficult to reduce the set current of the constant current circuit to a desired value. is there.

On the other hand, in a general low-voltage depletion type N-channel MOS transistor used in a constant current circuit, the channel width of the drain region and the source region is equal, and the minimum channel width is the contact size provided in the drain and source diffusion regions and the surrounding area. Is determined by the size of the diffusion region surrounding the.
However, when a constant current circuit using a depletion type N channel MOS transistor is applied to a high voltage circuit, the depletion type N channel DMOS transistor used in the high voltage circuit is a depletion type N used in the low voltage circuit. Compared with the channel MOS transistor, it is necessary to widen the distance between the diffusion regions or between the diffusion regions and the metal contact layer to relax the electric field so that a high electric field does not occur. Therefore, in a depletion type DMOS transistor used in a high voltage circuit, the drain region is wider than the source region, and the channel width on the drain side is wider than the channel width on the source side. Even if manufactured by the rule, the effective channel width is affected by the drain side rather than the source side, and the saturation current becomes larger. That is, even if the depletion type DMOS transistor used in the high voltage circuit is designed and manufactured with the minimum dimensions, the size is increased and the set current is reduced as compared with the depletion type MOS transistor used in the low voltage circuit. Also grows.
Thus, in the constant current circuit using the depletion type N-channel DMOS transistor, it is difficult to reduce the set current while satisfying the high withstand voltage condition.

  An object of the present invention is to provide a constant current circuit that uses a depletion type DMOS transistor, has a high withstand voltage, does not require strict dimensional accuracy management, and can reduce a set current.

  In order to solve the above problems, a constant current circuit of the present invention is a constant current circuit having a depletion type DMOS transistor on a main surface of a semiconductor layer, wherein the depletion type DMOS transistor is provided on the main surface. A region, a body diffusion region provided outside the source diffusion region and having a conductivity type opposite to that of the source diffusion region, a field oxide film provided outside the body diffusion region, and the field oxide film A drain diffusion region provided by insulation with the source diffusion region and a part of the body diffusion region extending from the source diffusion region to the vicinity of the end portion of the field oxide film through the body diffusion region. A threshold voltage adjusting diffusion region having the same conductivity type as that of the source diffusion region, Serial characterized in that it comprises a gate electrode provided on the gate oxide film formed in the body diffusion region and the surface of the threshold voltage adjustment diffusion region.

  In the constant current circuit of the present invention, the threshold voltage adjusting diffusion region is provided to extend in a strip shape from the source diffusion region to the vicinity of both ends of the drain field oxide film, beyond the body diffusion region. It is good as a feature.

In the constant current circuit of the present invention, the depletion type DMOS transistor using the source diffusion region , both the threshold voltage adjustment diffusion region and the body diffusion region, and the drain diffusion region as a conduction path includes the source diffusion region, Partial conduction path depletion type with the source diffusion area , the threshold voltage adjustment diffusion area having the same conductivity type as that of the source diffusion area, and the drain diffusion area as a conduction path between the drain diffusion area and the drain diffusion area and DMOS transistors, the source diffusion region, opposite the body diffusion region having a conductivity type electrically, and the drain diffusion region a partial current path enhancement instrument type DMOS transistor to conduction paths electrically conductive type of the source diffusion region the Rukoto connected in parallel, the partial current path Depuressho -Type DMOS transistor and the partial current path enhancement type DMOS transistor is being formed integrally.

  The constant current circuit of the present invention is a constant current circuit having a depletion type DMOS transistor on a main surface of a semiconductor layer, wherein the depletion type DMOS transistor includes a source diffusion region provided on the main surface, and the source diffusion A body diffusion region provided outside the region and having a conductivity type opposite to that of the source diffusion region; a drain diffusion region provided outside the body diffusion region; and the body starting from the source diffusion region A threshold voltage that extends through the body diffusion region in a part of the diffusion region and extends in a strip shape to the vicinity of the end of the drain diffusion region and has the same conductivity type as that of the source diffusion region Provided on the adjustment diffusion region and the gate oxide film formed on the surface of the body diffusion region and the threshold voltage adjustment diffusion region Characterized in that it comprises a gate electrode.

  In the constant current circuit having the depletion type DMOS transistor of the present invention, the threshold voltage adjustment diffusion region having the same conductivity type as the source diffusion region is formed in a strip shape (through the body diffusion region directly under the gate electrode). (Strip shape), the channel width and saturation current directly under the gate electrode can be reduced even if the dimension between each element is increased to ensure withstand voltage, or the dimension of each element fluctuates due to problems in manufacturing accuracy. It is possible to provide a constant current circuit that can be controlled to accurately reduce the set constant current value.

It is a top view which shows arrangement | positioning of the surface of the constant current circuit which concerns on the 1st Embodiment of this invention. It is sectional drawing which shows the A-A 'cross section of the constant current circuit which concerns on 1st Embodiment illustrated by FIG. It is a figure which shows the gate voltage-drain current (Vgs-Ids) characteristic of the depletion type DMOS transistor which concerns on 1st Embodiment. It is the figure which compared the drain current about the depletion type DMOS transistor which concerns on 1st Embodiment, and the conventional depletion type DMOS transistor in the gate-source voltage Vgs = 0. It is a top view which shows arrangement | positioning of the surface of the constant current circuit which concerns on the 2nd Embodiment of this invention. It is sectional drawing which shows the B-B 'cross section of the constant current circuit which concerns on 2nd Embodiment illustrated by FIG. The circuit diagram of the constant current circuit which concerns on the 3rd Embodiment of this invention is shown. The circuit diagram of the constant current circuit which concerns on the 4th Embodiment of this invention is shown. The circuit diagram of the constant current circuit which concerns on the 5th Embodiment of this invention is shown. The circuit diagram of the conventional constant current circuit is shown. It is a figure which shows the gate voltage-drain current (Vgs-Ids) characteristic of the conventional depletion type DMOS transistor. It is a top view which shows one example of arrangement | positioning of the surface of the conventional constant current circuit. FIG. 13 is a sectional view showing a C-C ′ section of an example of the conventional constant current circuit shown in FIG. 12.

The constant current circuit of the present invention will be described below with reference to the drawings.
[First Embodiment]
FIG. 1 is a plan view showing the arrangement of the surface of the constant current circuit according to the first embodiment of the present invention, and FIG. 2 is a cross-sectional view showing the AA ′ cross section of FIG.
In the constant current circuit 1 according to the first embodiment, as shown in FIG. 2, the buried layer 7 is provided on the semiconductor substrate 6, the epitaxial layer 8 is provided on the buried layer, and the semiconductor layers are stacked. The depletion type DMOS transistor 3 is formed on the main surface of the semiconductor layer 8 disposed on the surface of the stacked semiconductor layers.

  The depletion type DMOS transistor 3 according to the first embodiment includes a source diffusion region 10, a body contact diffusion region 11, a body diffusion region 12, a threshold voltage adjustment diffusion region 14, a gate oxide film 15, a gate electrode 16, and a field oxide film 17. And a drain diffusion region 18.

The source diffusion region 10 is provided on the main surface of the semiconductor layer 8 described above.
Body contact diffusion region 11 has a conductivity type opposite to that of source diffusion region 10 and is provided adjacent to source diffusion region 10 on the main surface of the semiconductor layer.
A source terminal (not shown) is provided on the source diffusion region 10 in electrical connection with the source diffusion region 10. The source diffusion region 10 and the body contact diffusion region 11 are short-circuited by this source terminal. The source terminal is formed of, for example, a metal such as aluminum used for the wiring layer of the semiconductor integrated circuit.

Body diffusion region 12 is provided on the main surface of the semiconductor layer and has a conductivity type opposite to that of source diffusion region 10. The body diffusion region 12 induces an inversion layer having the same conductivity type as that of the source diffusion region 10 on the surface immediately below the gate electrode 16 by applying a voltage to the gate electrode 16. As a result, the body diffusion region 12 becomes a part of the enhancement type DMOS transistor together with the source diffusion region 10 and the drain diffusion region 18.
A threshold voltage adjustment diffusion region 14 having the same conductivity type as that of the source diffusion region 10 is provided in a part of the body diffusion region 12. The threshold voltage adjustment diffusion region 14 becomes a part of the depletion type DMOS transistor together with the source diffusion region 10 and the drain diffusion region 18.
The body diffusion region 12 and the threshold voltage adjustment diffusion region 14 will be described in detail later.

  Field oxide film 17 is provided outside body diffusion region 12 in order to ensure the breakdown voltage of the drain. The drain diffusion region 18 is provided outside the field oxide film 17.

  The threshold voltage adjustment diffusion region 14 is formed on the main surface of the semiconductor layer 8 disposed on the surface, and has the same conductivity type as that of the source diffusion region 10. The threshold voltage adjustment diffusion region 14 starts from the source diffusion region 10, penetrates the body diffusion region 12 at a part inside the body diffusion region 12, and further passes through the body diffusion region 12 to reach the end of the drain field oxide film 17. It is formed to extend in the form of a strip (strip shape) up to the vicinity of.

  The gate electrode 16 is provided on the gate oxide film 15 formed on the surfaces of the body diffusion region 12 and the threshold voltage adjustment diffusion region 14. By changing the voltage applied to the gate electrode 16, the gate electrode 16 induces or extinguishes a channel in one or both of the body diffusion region 12 and the threshold voltage adjustment diffusion region 14 immediately below the gate electrode 16.

  The region where the threshold voltage adjustment diffusion region 14 is formed in a part of the body diffusion region 12 immediately below the gate electrode 16 and the region where only the body diffusion region 12 is formed immediately below the gate electrode 16 are the source diffusion region 10, the gate Together with the electrode 16 and the drain diffusion region 18, each operates as a DMOS transistor having a different threshold voltage.

That is, the region where the threshold voltage adjustment diffusion region 14 is formed in a part of the body diffusion region 12 immediately below the gate electrode 16 is the threshold voltage (VTA) together with the source diffusion region 10, the gate electrode 16, and the drain diffusion region 18. It operates as a part of the depletion type DMOS transistor.
A region where only the body diffusion region 12 is formed immediately below the gate electrode 16 is a part of the enhancement type DMOS transistor having a threshold voltage (VTB) together with the source diffusion region 10, the gate electrode 16, and the drain diffusion region 18. Works as.

  In the depletion type DMOS transistor of the present invention, a strip-shaped threshold voltage adjustment diffusion region 14 is formed in a part of the body diffusion region 12 immediately below the gate electrode 16. Since the threshold voltage adjustment diffusion region 14 is formed in a strip shape, the width is narrow. On the other hand, the region where only the body diffusion region 12 is formed without the threshold voltage adjustment diffusion region 14 being wide is wide.

  As a result, the depletion type DMOS transistor of the present invention has a wide channel width and a wide threshold voltage using only the depletion type MOS transistor having the threshold voltage adjustment diffusion region as the conductive path and the channel width being narrow and the threshold voltage being VTA and the body diffusion region as the conductive path. A VTB enhancement-type MOS transistor is connected substantially in parallel.

When the DMOS transistor according to the first embodiment is a depletion type N-channel DMOS transistor, the threshold voltage (VTA) of the depletion type DMOS transistor connected in parallel is 0 V or less and the enhancement type is connected in parallel. The threshold voltage (VTB) of the DMOS transistor is 0 V or more, and the threshold voltage (VTA) <the threshold voltage (VTB).
On the other hand, when the DMOS transistor according to the first embodiment is a depletion type P-channel DMOS transistor, the threshold voltage (VTA) of the depletion type DMOS transistor connected in parallel is 0 V or more and the enhancement type is connected in parallel. The threshold voltage (VTB) of the DMOS transistor is 0 V or less, and the threshold voltage (VTA)> the threshold voltage (VTB).
In the present specification, when one of the N channel and the P channel is not specified, the N channel is described as an example.

  FIG. 3 shows the gate voltage-drain current (Vgs-Ids) characteristics of the depletion type DMOS transistor according to the first embodiment of the present invention. As shown in FIG. 3, the gate voltage-drain current (Vgs-Ids) characteristic of the depletion type DMOS transistor of the present invention has two inflection points at the threshold voltages VTA and VTB.

The depletion type DMOS transistor of the present invention configured as described above includes a case where a gate-source voltage lower than the threshold voltage (VTB) of the enhancement type MOS transistor is applied and a gate higher than the threshold voltage (VTB).・ Effective channel width varies greatly when source-to-source voltage is applied, and saturation current in each case also varies greatly.
When the voltage between the gate and the source is equal to or lower than the threshold voltage (VTB), the effective channel width is almost equal to the width of the threshold voltage adjusting diffusion region 14, and therefore, the saturation current is small, and the voltage between the gate and the source is the threshold voltage ( When VTB) is exceeded, the effective channel width is expanded to a region where only the body diffusion region 12 where the threshold voltage adjustment diffusion region does not exist is formed, so that the saturation current increases.

  Therefore, the voltage between the gate and the source of the DMOS transistor according to the first embodiment is made higher than the threshold voltage (VTA) of the depletion type DMOS transistor and lower than the threshold voltage (VTB), thereby reducing the conventional depletion. A constant current circuit capable of setting a constant current value lower than that of a constant current circuit including a type DMOS transistor can be realized.

  The first embodiment of the present invention will be described from another viewpoint. In the constant current circuit including the depletion type DMOS transistor according to the first embodiment of the present invention, the body diffusion region is provided inside the body diffusion region immediately below the gate electrode. Since the threshold voltage adjustment diffusion region having the same conductivity type as the source diffusion region is provided in a strip shape (strip shape) to the vicinity of the end portion of the field oxide film through the gate electrode, the depletion type DMOS transistor used as a constant current source is provided. In the range where the gate-source voltage is higher than the threshold voltage of the depletion type DMOS transistor connected in parallel and lower than the threshold voltage of the enhancement type DMOS transistor connected in parallel, the channel width on the drain side is the channel on the source side. Substantially equal to the width, the channel width on the drain side is the source side Being not spread than the channel width, it is possible to set a lower than conventional constant current value.

  FIG. 4 shows the voltage between the gate and the source of the depletion type DMOS transistor according to the first embodiment of the present invention and the conventional depletion type DMOS transistor prepared with the same dimensions except for the threshold voltage adjustment diffusion region. It is a figure which shows the result of having measured the drain current, changing the voltage between a drain and a source. The measurement result of FIG. 4 shows that the drain current is reduced to 1/10 or less in the depletion type DMOS transistor according to the first embodiment of the present invention as compared with the conventional depletion type DMOS transistor.

  In the constant current circuit according to the first embodiment of the present invention, it is possible to provide a constant current circuit capable of reducing the set current with a high breakdown voltage using a depletion type DMOS transistor. In the first embodiment of the present invention, the constant current value can be set to be reduced to 10 μA or less.

  As described above, in the constant current circuit including the depletion type DMOS transistor according to the first embodiment of the present invention, the vicinity of the end portion of the field oxide film penetrates the body diffusion region inside the body diffusion region directly under the gate electrode. Until now, the threshold voltage adjustment diffusion region having the same conductivity type as the source diffusion region is provided in a strip shape (strip shape). Therefore, even if the dimensions of each element fluctuate, it is possible to control the channel width and saturation current immediately below the gate electrode, and to accurately reduce the set constant current value of the constant current circuit.

[Second Embodiment]
A constant current circuit including a depletion type DMOS transistor according to the second embodiment will be described.
FIG. 5 is a plan view showing the arrangement of the surface of the constant current circuit according to the second embodiment.
FIG. 6 is a sectional view showing a BB ′ section of the constant current circuit according to the second embodiment shown in FIG.
As shown in FIGS. 5 and 6, in the depletion type DMOS transistor according to the second embodiment, the threshold voltage adjustment diffusion region 34 has the same conductivity type as that of the source diffusion region 10, and the source diffusion Starting from the region 10, it extends to both sides of the body diffusion region 12, extends beyond the body diffusion region 12, and extends in a strip shape (strip shape) to the vicinity of the end of the field oxide film 17.

  The depletion type DMOS transistor 33 according to the second embodiment of the present invention also uses only the depletion type MOS transistor having a narrow channel width and a threshold voltage of VTA and the body diffusion region 12 as a conduction path using the threshold voltage adjustment diffusion region 34 as a conduction path. An enhancement type MOS transistor having a wide channel width and a threshold voltage of VTB is connected substantially in parallel. In the voltage region between the threshold voltage VTA and the threshold voltage VTB, a conductive path is formed in a depletion type MOS transistor having a narrow channel width and a threshold voltage VTA connected in parallel.

  Further, in the constant current circuit 31 including the depletion type DMOS transistor 33 according to the second embodiment of the present invention, the body diffusion region 12 is penetrated into the body diffusion region immediately below the gate electrode, and the both end portions of the field oxide film 17 are formed. Since the threshold voltage adjusting diffusion region 34 having the same conductivity type as that of the source diffusion region 10 is provided in the strip shape (strip shape), the size between the elements is increased to ensure the withstand voltage, or the manufacturing accuracy is increased. Even if the size of each element varies due to the above problem, the channel width and the saturation current immediately below the gate electrode 16 are controlled in the voltage region between the threshold voltage VTA and the threshold voltage VTB. The set constant current value can be accurately reduced.

[Third Embodiment]
FIG. 7 shows a circuit diagram of a constant current circuit according to the third embodiment of the present invention. As shown in FIG. 7, in the constant current circuit according to the fourth embodiment, the source terminal and the gate terminal of any of the depletion type DMOS transistors according to the first to third embodiments are short-circuited, and the drain terminal A constant current circuit is realized by connecting a load in series on the side or the source terminal side.

[Fourth Embodiment]
FIG. 8 shows a circuit diagram of a constant current circuit according to the fourth embodiment of the present invention. As shown in FIG. 8, in the constant current circuit according to the fifth embodiment, a resistor is connected between one of the source terminal and the gate terminal of the depletion type DMOS transistor according to the first to third embodiments. A constant current circuit is realized by connecting a load in series to the drain terminal side or the source terminal side.

[Fifth Embodiment]
FIG. 9 shows a circuit diagram of a constant current circuit according to the fifth embodiment of the present invention. As shown in FIG. 9, in the constant current circuit according to the sixth embodiment, the anode of the diode is connected to one of the source terminals of the depletion type DMOS transistors according to the first to third embodiments, and the gate terminal The constant current circuit is realized by connecting the cathode of the diode to the drain terminal and connecting the load in series to the drain terminal side or the source terminal side.

DESCRIPTION OF SYMBOLS 1, 31, 71: Constant current circuit 3, 33, 73: Depletion type DMOS transistor 6, 76: Semiconductor substrate 7, 77: Buried layer 8, 78: Epitaxial layer 10, 80: Source diffusion region 11, 81: Body contact Diffusion regions 12, 82: Body diffusion regions 14, 34, 84: Threshold voltage adjustment diffusion regions 15, 85: Gate oxide films 16, 86; Gate electrodes 17, 87: Field oxide films 18, 88: Drain diffusion regions 20, 40 , 90: channel region

Claims (4)

A constant current circuit having a depletion type DMOS transistor on a main surface of a semiconductor layer,
The depletion type DMOS transistor is
A source diffusion region provided on the main surface;
A body diffusion region provided outside the source diffusion region and having a conductivity type opposite to that of the source diffusion region;
A field oxide film provided outside the body diffusion region;
A drain diffusion region provided by being insulated by the field oxide film;
Starting from the source diffusion region, a part of the body diffusion region extends through the body diffusion region and extends in the form of a strip to the vicinity of the end of the field oxide film. A threshold voltage adjustment diffusion region having the same conductivity type as the mold;
A constant current circuit comprising a gate electrode provided on a gate oxide film formed on surfaces of the body diffusion region and the threshold voltage adjustment diffusion region.   2. The threshold voltage adjusting diffusion region is provided to extend in a strip shape from the source diffusion region to the vicinity of both end portions of the drain field oxide film beyond the body diffusion region. Constant current circuit. The depletion type DMOS transistor using the source diffusion region, both the threshold voltage adjustment diffusion region and the body diffusion region, and the drain diffusion region as a conduction path,
Between the source diffusion region and the drain diffusion region,
A partial conduction path depletion type DMOS transistor having the source diffusion region , the threshold voltage adjustment diffusion region having the same conductivity type as that of the source diffusion region, and the drain diffusion region as a conduction path ;
The source diffusion region, the body diffusion region having a conductivity type opposite to the conductivity type of the source diffusion region, and a partial current path enhancement instrument type DMOS transistor to the current path of the drain diffusion region is electrically connected in parallel 3. The constant current circuit according to claim 1 , wherein the partial energization path depletion type DMOS transistor and the partial energization path enhancement type DMOS transistor are integrally formed . A constant current circuit having a depletion type DMOS transistor on a main surface of a semiconductor layer,
The depletion type DMOS transistor is
A source diffusion region provided on the main surface;
A body diffusion region provided outside the source diffusion region and having a conductivity type opposite to that of the source diffusion region;
A drain diffusion region provided outside the body diffusion region;
Starting from the source diffusion region, a part of the body diffusion region extends through the body diffusion region and extends in the form of a strip to the vicinity of the end of the drain diffusion region. A threshold voltage adjustment diffusion region having the same conductivity type as the mold;
A constant current circuit comprising a gate electrode provided on a gate oxide film formed on surfaces of the body diffusion region and the threshold voltage adjustment diffusion region.

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