JP6344605B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device manufacturing method and a semiconductor manufacturing apparatus formed by joining a plurality of semiconductor device members.

2. Description of the Related Art Recent semiconductor devices, particularly semiconductor devices called high power modules having a large current density, are required to be usable even in a high temperature environment.
Therefore, in a semiconductor device mounting structure, it is strongly desired to have a joint having excellent high-temperature durability even when held at a high temperature or subjected to a high-temperature thermal cycle. From the viewpoint of environmental protection, a Pb (lead) -free joining technique is essential.

In order to mount such a semiconductor device, Sn (tin) -Ag (silver) -Cu (copper) based solder is widely used for bonding at present. However, when joining with such solder, the operating temperature of the semiconductor device is limited to the melting point of the solder (for example, about 200 ° C.) or less.
Further, for example, in a joint portion where the electrode is Cu, a Cu-Sn brittle intermetallic compound layer is formed at the joint interface, resulting in poor high-temperature durability.
Therefore, various attempts have been made to ensure the high temperature durability of the joint.

For example, a low temperature bonding method has been proposed in which active surface energy of metal nanoparticles is used to agglomerate and bond metal nanoparticles at a low temperature. If this joining method is used, the joining interface after the metal nanoparticles are agglomerated becomes a bulk metal and thus has excellent high-temperature durability.
However, a noble metal such as Au (gold) is used as the metal nanoparticle, and in addition to high cost, the metal nanoparticle has a high surface energy and has a structure in which an organic substance is modified on the surface. Even when the metal nanoparticles are agglomerated, the organic substance is gasified and remains during the joining process, so that voids are generated in the joint portion, resulting in large variations in joint strength.

  In addition, examples of solder having high temperature durability include Au-Ge (germanium) based solder. However, since these solders also use Au, which is a noble metal, not only is there a problem of cost, but an intermetallic compound layer is formed at the joint interface, and atomic vacancies generated due to imbalance in mutual diffusion are accumulated. However, there is a problem in long-term reliability because it produces Kirkendall void.

  On the other hand, from the viewpoint of eliminating the obstacle caused by the oxide film formed on the joint surface and forming a sound joint, it is necessary to use an insert material containing a metal that forms a eutectic with the base metal, for example, zinc (Zn). Are known. In this method, pressurization and heating are performed in a state where an insert material is interposed between the joining surfaces, thereby performing a eutectic reaction and joining. That is, by performing a eutectic reaction between the base metal and the insert material, the oxide film is removed from the surface of the base material, and discharged together with the resulting eutectic reaction melt from the joining surface and joined.

  At this time, the direct contact between the base metal and the insert material is promoted, the starting point of the eutectic reaction is formed at an early stage, and the oxide film is destroyed on the joining surface in order to make the joining process smoother. It has been proposed to form a concavo-convex structure for this purpose (see Patent Document 1).

JP 2013-78793 A

The above-mentioned patent document 1 relates to the application of the applicant of the present application, and is capable of directly joining the materials to be joined without causing damage to the materials to be joined due to pressurization during joining.
However, when the above bonding method is applied to a semiconductor device held at a high temperature, it was subsequently found that the electrical conductivity and thermal conductivity, which are good in the initial stage, decrease with the passage of time.
As a result of investigating the cause of the decrease in electrical conductivity and thermal conductivity, depending on the shape of the concavo-convex structure of the joint surface, the eutectic reaction product derived from the insert material remains in the portion corresponding to the concave portion of the joint portion. There are things to do. Depending on the use environment or use state of the semiconductor device, the metal in the eutectic reaction product diffuses into the base metal. Then, it turned out that a fine space | gap arises in the metal part in a eutectic reaction substance, and causes electrical conductivity and a heat conductivity fall.

  Therefore, the present invention improves the bonding method described in Patent Document 1 and can prevent a decrease in electrical conductivity and thermal conductivity due to diffusion even when applied to a semiconductor device held at a high temperature. An object is to provide a method for manufacturing a semiconductor device and a semiconductor device.

  As a result of intensive investigations to achieve the above object, the present inventors have formed diffusion preventing layers on both joint surfaces of the semiconductor device member, so that the metal derived from the insert material diffuses into the base metal. It has been found that the above object can be achieved and the present invention has been completed.

That is, the present invention is based on the above knowledge, and the method for manufacturing a semiconductor device according to the present invention forms unevenness on at least one of the bonding surfaces of the semiconductor device members to be bonded, A diffusion prevention layer is formed on the semiconductor device, and an insert material is interposed between the semiconductor device members and heated under pressure to break the diffusion prevention layer, so that the semiconductor device members are joined at least at a part of the joining interface. The base metal A and the base metal B in the part are directly joined,
The base metal A constituting the metal joint of one semiconductor device member and the base metal B constituting the metal joint of the other semiconductor device member are independently made of aluminum (Al), copper (Cu ), The main component is at least one selected from the group consisting of silver (Ag) and gold (Au),
Each of the insert materials is a material that undergoes a eutectic reaction with one or more metals contained in the base metal A and the base metal B, respectively.

The semiconductor device of the present invention is a semiconductor device bonded by the above bonding method.

Furthermore, in the semiconductor device of the present invention, the base metal A of the metal joint portion of one semiconductor device member and the base metal B of the metal joint portion of the other semiconductor device member are at least part of the joint interface. And a eutectic reaction product surrounded by a diffusion prevention layer around the direct joint.

According to the present invention, the diffusion preventing layers are formed at both joints of the semiconductor device members to be joined, and the eutectic reaction product is surrounded by the diffusion preventing layer after joining. Decrease can be prevented.
That is, even if the eutectic reactant remains in the joint, the remaining eutectic reactant is surrounded by the diffusion prevention layer, so that the metal in the eutectic reactant is prevented from diffusing into the base metal. , It is possible to prevent a decrease in electrical conductivity and thermal conductivity due to voids generated by the diffusion.

It is a perspective view which shows the example of a shape of the uneven structure formed in a junction part in the manufacturing method of the semiconductor device of this invention. It is a schematic sectional drawing which shows an example of the semiconductor chip used by this invention. It is process drawing which shows roughly an example of the joining method of the member for semiconductor devices by the manufacturing method of the semiconductor device of this invention. It is sectional drawing which shows an example of the junction part joined by the manufacturing method of the semiconductor device of this invention. It is a schematic sectional drawing which shows the embodiment example of the semiconductor device by the manufacturing method of this invention. It is a schematic sectional drawing explaining the structure of the semiconductor device used for the Example of this invention.

  The semiconductor device manufacturing method of the present invention will be described in further detail and specifically below. In the present specification, “%” means mass percentage unless otherwise specified.

The method for manufacturing a semiconductor device according to the present invention forms irregularities on both or one of the bonding surfaces of the semiconductor device members to be bonded, and forms a diffusion prevention layer on the surface or inside of both the bonding portions. The insert material is interposed between and pressurizing and heating. Then, the base metal A and the base metal B of both joints are directly joined at at least a part of the joint interface.

<Members for semiconductor devices>
The member for a semiconductor device in the present invention has a metal joint portion in which a diffusion prevention layer is formed on a base metal, the base metal of one semiconductor device member is composed of the base metal A, and the other semiconductor The base metal of the device member is composed of the base metal B.
Further, the semiconductor forming member to be bonded has irregularities on both or one side of the surface of the metal bonding portion.

As the base metal A and the base metal B forming the metal joint part, those having excellent electrical conductivity can be used, and are independently aluminum (Al), copper (Cu), silver (Ag). And at least one selected from the group consisting of gold (Au), and these may be the same or different. As the base metal A and the base metal B, various combinations such as pure metals of the metals and alloys containing these metals can be adopted.

The base metal A and the base metal B are preferably formed of the same kind of material. By joining the same kind of materials, the starting point of the degradation reaction at the interface is eliminated, so that joining with higher durability and reliability is possible.
Here, “the same kind of material” means that the metal structure and the component system are the same, and the contents of the alloy components do not necessarily have to coincide with each other.

Moreover, it is preferable that the said base metal contains at least 1 sort (s) of the metal which comprises the insert material mentioned later, and it is preferable that zinc (Zn) is included.
By containing the metal that constitutes the insert material, the amount of metal that constitutes the insert material in the base metal becomes close to saturation, and the metal in the eutectic reaction residue is prevented from diffusing into the base metal. it can.

As the diffusion preventing layer, the base metal A, the base metal B, and an insert material which will not be mutually diffused or those which are difficult to mutually diffuse can be used. For example, nickel (Ni), titanium nitride ( TiN), tungsten nitride (WN), titanium tungsten nitride (TiWN), and platinum iridium (PtIr) may be used, and one or more of them may be mixed and used.

The film thickness of the diffusion preventing layer is preferably 1 μm or more and 10 μm or less. If it is less than 1 μm, the eutectic reaction product cannot be sufficiently surrounded, and the eutectic reaction product may diffuse into the base metal. If it exceeds 10 μm, the base metal A and the base metal B are directly bonded. May be difficult.

The diffusion preventing layer can be formed by a known film forming method such as CVD, sputtering, powder deposition, plating or the like.
Since the surface of metal is oxidized at the moment when it is placed in the air, it is difficult to make the joint surface pure metal. When the surface of the diffusion prevention layer is oxidized, it prevents diffusion inside the joint. Will have a layer.

The surface unevenness of the joint surface promotes direct contact between the base metal of the metal joint and the insert material, and becomes the starting point of the eutectic reaction, and an oxide film is formed on the surface of the diffusion prevention layer. Also, the oxide film is destroyed, and eutectic reaction between the base metal A and the base metal B and the insert material occurs.
The melt of the eutectic reaction product and the broken oxide film are discharged into the recess by pressurization and heating, and at least part of the joint interface, the base metal A and base metal B of the metal joint Are directly joined to improve electrical conductivity and thermal conductivity.

  The shape of the unevenness is not limited as long as it has a function of concentrating stress and promoting the destruction of the insert material and the oxide film. For example, as shown in FIGS. In addition to the above, the tip of the convex portion such as a corrugated shape, a kamaboko shape, or a hemispherical shape can be a curved surface. Needless to say, the smaller the curvature radius of the curved surface, the more concentrated the stress becomes, and the insert material and the oxide film are more likely to be destroyed.

  FIG. 1A shows a concavo-convex structure with a trapezoidal cross section. If the tip of the convex portion is made substantially flat, the stress concentration means can be easily formed even if the stress concentration degree is slightly reduced, and the processing cost is reduced. Can be reduced.

  In addition, as shown in FIG. 1B, it is possible to adopt a concavo-convex structure in which triangular prisms are arranged in parallel, and thereby, the tip of the convex part of the concavo-convex structure becomes linear, and the stress concentration degree is increased. This can enhance the effect of breaking the oxide film.

  Furthermore, as shown in FIG. 1 (c), it is possible to adopt a concavo-convex structure in which quadrangular pyramids are arranged in parallel in the vertical and horizontal directions, and the tip of the convex part of the concavo-convex structure becomes dotted, further increasing the degree of stress concentration. Thus, the breaking performance of the insert material and oxide film can be improved.

As the size and shape of the unevenness of the metal joint, the aspect ratio (height / width) is 0.001 or more, the pitch is 1 μm or more, and preferably the aspect ratio is 0.1 or more and the pitch is 10 μm or more.

  Such irregularities can be formed by, for example, cutting, grinding, plastic processing (roller processing), laser processing, electric discharge processing, etching processing, lithography, etc., and the formation method is particularly limited. is not. Of these processing methods, plastic processing enables formation at a very low cost.

  Examples of the semiconductor device member include members used in conventionally known semiconductor devices, and examples include a semiconductor chip, an insulating ceramic substrate, a base plate (cooling body), and the like.

In the case where the semiconductor device member is a semiconductor chip, as described above, the bonding surface side has the metal bonding portion having the diffusion prevention layer 3f on the base metal 3c, but as shown in FIG. Between a semiconductor chip 3 made of silicon carbide (SiC), silicon (Si), gallium nitride (GaN), and the base metal 3c, Ti (titanium), Cr (chromium), nickel (Ni), silver (Ag) An adhesion layer 3a and a barrier layer 3b made of, for example, can be provided.
The barrier layer 3b has a function of preventing the components of the metal layer 3c from diffusing into the chip body, and Ni (nickel), Pt—Ir (platinum-iridium), or the like can be applied.
On the other hand, the adhesion layer 3a has a function of improving the adhesion between the barrier layer 3b and the semiconductor chip 3, and for example, Ti (titanium), Cr (chromium), or the like can be used.

<Insert material>
In the method for manufacturing a semiconductor device of the present invention, an insert material is interposed between the metal joint portions of the semiconductor device member.
As the insert material, a material that undergoes a eutectic reaction with the base metal A and the base metal B can be used. For example, a metal mainly containing Zn (pure zinc, zinc alloy) is preferably used.
An alloy of Zn and at least one metal selected from the group consisting of Al, Mg, Cu, Ag, and Sn can be used in addition to a metal containing Zn as a main component.

Examples of the alloy containing Zn include an alloy having a total content of Zn and Al of 80% by mass or more, an alloy having a total content of Zn, Al, and Mg of 80% by mass or more, and Zn, Al, and Cu. An alloy having a total content of 80% by mass or more can be preferably used.
That is, the eutectic temperature of an alloy system containing Zn and Al is low (382 ° C. for a Zn—Al alloy, 330 ° C. for a Zn—Al—Mg alloy, and 379 ° C. for a Zn—Al—Cu alloy). By joining at a low temperature, both members can be joined by removing the oxide film that hinders the joining from the joining interface without causing softening or deformation of the base material.
In the present invention, the “main component” refers to a component contained in an amount of 80% by mass or more.

The insert material 4 is used by being sandwiched between both materials in the form of foil, or by covering the diffusion prevention layer of the metal joint portion of the semiconductor device member by plating or a powder deposition method. Since the degree of freedom of selection regarding the composition and shape (thickness) is high, it is preferably used in the form of a foil. Further, surface irregularities may be formed on the foil as in the case of a semiconductor device member.

The thickness of the insert material is preferably 20 μm to 200 μm, although it depends on the metal to be used and the surface roughness of the joint.
When the thickness is less than 20 μm, the oxide film may not be discharged sufficiently, the sealing performance of the joint portion may be deteriorated, and oxidation may progress during joining to deteriorate the strength characteristics of the joint portion. On the other hand, if it exceeds 200 μm, a high pressurizing force may be required for discharging the surplus portion, or the residual pressure at the interface may be increased, thereby reducing the joint performance.

<Join method>
Next, a method for joining the semiconductor device members will be described.
In the present invention, the insert material is interposed between the metal joint portions of the semiconductor device member, and the members are joined by pressure heating.

The semiconductor forming members to be joined have irregularities on both or one side of the metal joint surface. By having irregularities in the joint, it promoted direct contact between the base metal of the metal joint and the insert material, and became the starting point of the eutectic reaction, and an oxide film was formed on the surface of the diffusion prevention layer However, the oxide film is destroyed, and a eutectic reaction between the base metal A and the base metal B and the insert material occurs.
Then, the eutectic reaction product and the broken oxide film are discharged into the recess, and the base metal A and the base metal B of the metal joint are directly joined at least at a part of the joint interface, and the electric conductivity And thermal conductivity is improved.

In addition, in the present invention, since the diffusion prevention layer is formed on both of the bonding surfaces, even if eutectic reactants or oxide film fragments or the like that have been rejected in the recesses remain in the bonding portion, Surrounded by a diffusion barrier and isolated from the base metal. Therefore, they do not diffuse into the base metal A and the base metal B, and a decrease in electrical conductivity and a decrease in thermal conductivity due to the formation of voids at the joint are prevented.
Note that the diffusion prevention layer does not need to surround all directions of the residue, and it is only necessary to prevent mutual diffusion between the residue and the base metal.

In the above eutectic reaction, the composition of the interdiffusion zone formed by the mutual diffusion of two or more metals becomes the eutectic composition, and when the temperature is equal to or higher than the eutectic temperature, it melts by the eutectic reaction to form a liquid phase. To do.
For example, in the case of a Zn—Al based alloy, the melting point of Al is 660 ° C., and the melting point of Zn is 419.5 ° C., but these eutectic metals melt at 382 ° C., which is lower than the respective melting points.
Accordingly, the oxide layer and the like are removed, the two metals are brought into contact with each other, and eutectic melting occurs by heating and holding at 382 ° C. or higher, resulting in an alloy having a eutectic composition of 5% Al-95% Zn.

The eutectic reaction itself is a change unrelated to the alloy components, and the composition of the insert material only increases or decreases the amount of the eutectic reaction product. That is, since the eutectic composition is spontaneously achieved by interdiffusion, there is no need to control the composition, and a low melting eutectic reaction occurs between the base metals A and B and the metal contained in the insert material. It only has to occur.
Therefore, in order to cause eutectic reaction between both the base metal A and the insert material and between the base metal B and the insert material, it is necessary to heat to a higher temperature of both eutectic temperatures. is there.

  Moreover, an oxide film exists on the surface of a general metal material. However, in the present invention, since the unevenness is formed on the joining surface, stress is concentrated on the tip of the unevenness due to the pressurization of the joining process, and the oxide film is destroyed by the relatively low pressure, and the insert material Can break through. Therefore, the semiconductor device member such as a semiconductor chip is not damaged.

In addition, when a liquid phase is generated by the eutectic reaction, the oxide film is taken into the nearby liquid phase, and further, destruction and decomposition of the oxide film are promoted. Then, by the eutectic melting is gradually spread, destruction of the oxide film is expanded and promote, the oxide film of the bonding surface is removed at a low temperature (eutectic temperature), without using the brazing material layer, the base Direct joining of the base metal A and the base metal B is possible.
Therefore, without using a solder containing Pb having a low melting point, the base metal A and the base metal B are directly bonded, the strength is ensured, and a semiconductor device having an excellent Pb-free bonded portion is manufactured. Can do.

Further, the diffusion preventing layer of the uneven tip by pressure, sinking into the insert material, pushed into the recess with breaking the diffusion preventing layer of the counterpart, uneven tip appears base metal, base metal A and the base The material metal B and the insert material come into contact with each other. And when these metals are heated to a temperature at which eutectic reaction occurs, they melt and form a liquid phase. Further, the diffusion preventing layer at the bottom of the unevenness remains as it is, and together with the remaining diffusion preventing layer on the other side, surrounds the eutectic reaction product to prevent diffusion into the base metal.
Therefore, according to the method for manufacturing a semiconductor device of the present invention, the direct bonding portion between the base metals and the indirect bonding portion made of a residue containing a eutectic reaction material surrounded by the diffusion preventing layer are bonded to the bonding interface. The joint surface which exists intermittently is formed. A semiconductor device having such a junction does not generate a brittle intermetallic compound layer or a Kirkendall void even when held at a high temperature, and has high-temperature durability.

The method for manufacturing a semiconductor device of the present invention will be described in more detail by taking as an example the case where the semiconductor device member is a semiconductor chip and an insulating ceramic substrate.
First, as shown in FIG. 3, the insert material 4 is disposed between the wiring metal 2 c of the insulating ceramic substrate 2 and the metal joint portion 3 c of the semiconductor chip 3.
At this time, fine irregularities R are formed in advance on the surface of the wiring metal 2c, and diffusion preventing layers 2f and 3f are formed on the surfaces of the wiring metal 2c and the metal joint 3c.

Then, the semiconductor chip 3 and the insulating ceramic substrate 2 are relatively pressurized, brought into close contact via the insert material 4, and heating is started while further pressing.
Then, local stress is applied to the tip of the concave and convex portions in contact with the insert material, and the stress is generated on the tip of the diffusion prevention layer 2f of the insulating ceramic substrate and the surface of the diffusion prevention layer without increasing the applied pressure so much. The oxide film is mechanically destroyed, and the new surface of the base metal B of the metal joint 2c is exposed.

Further, when heated under pressure, the tip of the concavo-convex breaks through the insert material, reaches the diffusion preventing layer 3f of the semiconductor chip 3, and the diffusion preventing layer 3f of the semiconductor chip 3 and the oxide film generated on the surface of the diffusion preventing layer are destroyed, The new surface of the base metal A is exposed.

Then, diffusion occurs between the base metal A of the metal joint 3c and the insert material 4 and between the base metal B and the insert material 4 of the metal joint 2c from the vicinity of the tip of the unevenness. And by reaching | attaining the temperature which a eutectic reaction generate | occur | produces, a eutectic reaction will arise between the metal in insert material, the base metal A, and the base metal B, respectively, and a eutectic melt phase will generate | occur | produce.
Furthermore, when this eutectic melting range extends to the bonding interface, when an oxide film is formed on the diffusion preventing layer, the oxide film fragments are dispersed in the eutectic melt phase.

Subsequent pressurization causes the eutectic reaction melt to be discharged from the bonding interface along the irregularities formed on the bonding surface, and most of the oxide film fragments dispersed in this liquid phase are also eutectic melt. At the same time, it is pushed out from the bonding interface, the new surfaces of the base metal A and the base metal B come into contact with each other, a diffusion reaction occurs, and the base metal A and the base metal B are directly joined.

At this time, a residue such as a small amount of a mixture including a eutectic reaction product, an oxide film, a metal derived from an insert material, and the like is present at the surrounding joint interface where the base metal A and the base metal B are directly joined. May remain. That is, as shown in FIG. 4, the base metal A and the base metal B are directly bonded at at least a part of the bonding interface, and the eutectic reaction surrounded by the diffusion prevention layer around the direct bonding portion. A joint having a residue including an object is formed.
However, in the present invention, since the residue is surrounded by the diffusion preventing layer, it is prevented from diffusing into the base metal A and the base metal B. Such a residue contributes to electric conduction and heat conduction.
Further, as long as the base metal A and the base metal B are in direct contact, there is no problem in strength.

  Although FIG. 3 shows an example in which the unevenness R is formed on the wiring metal 2c side of the insulating ceramic substrate 2, the present invention is not limited to this. In addition to forming on the joint surface, it can also be provided on both joint surfaces. By forming the unevenness R on both surfaces, the new surface of the base metal is easily exposed and the residue including the eutectic melt is easily surrounded by the diffusion preventing layer.

The joining of the semiconductor device members in the production method of the present invention can be performed in an inert gas atmosphere, but can be performed in the air without any trouble.
Of course, it is possible to carry out in vacuum, but not only vacuum equipment is required, but also the vacuum gauge and gate valve may be damaged by melting of the insert material. Therefore, it is advantageous in terms of cost.

  In addition, the means for heating or maintaining the joint within a predetermined temperature range is not particularly limited, and for example, high-frequency heating, infrared heating, heater heating, or a combination of these is employed. be able to. Moreover, it is also possible to use a method of fixing in a pressurized state with a jig and holding it in a brazing furnace together with the jig.

  As for the rate of temperature rise to the bonding temperature, if it is slow, the interface is oxidized and the melt discharge property is lowered, which may cause the strength to be lowered. This tendency occurs particularly in the case of bonding in the atmosphere.

Moreover, in the manufacturing method of the present invention, since the unevenness R is formed in the joint portion and the applied pressure at the time of joining can be reduced, the applied pressure at the time of joining is preferably 1 MPa or more and 30 MPa or less. .
If the pressure is less than 1 MPa, the oxide film may be destroyed or the eutectic reaction product and oxide film fragments may not be sufficiently discharged from the joint surface. If the pressure exceeds 30 MPa, the semiconductor device member may be damaged.

  In addition, by adjusting the joining conditions, that is, pressure, joining temperature, fine concavo-convex shape, insert material composition, amount, etc., the residue remaining on the bottom of the concavo-convex structure can be reduced as much as possible, and intermittently. It is also possible to bring the bonding closer to full direct bonding.

<Semiconductor device>
The semiconductor device of the present invention is obtained by bonding a plurality of semiconductor device members by the above bonding method, and FIG. 5 shows a schematic cross-sectional view of an example of the semiconductor device manufactured by the manufacturing method of the present invention.

  As a first embodiment, a semiconductor device 1 shown in FIG. 5A includes a bus bar in which a metal joint (wiring metal 2c) is arranged on one side of an insulating ceramic substrate 2 on a cooling body (heat sink) 6. The semiconductor chip 3 is bonded to the wiring metal 2c. The semiconductor chip 3 includes a metal joint 3c on the joint surface, and has a structure in which the base metal of the metal joint 3c and the base metal of the wiring metal 2c are directly joined by the method described above. ing.

A semiconductor device 1 shown in FIG. 5B includes a semiconductor chip 3 on the upper side of the insulating ceramic substrate 2 in the figure and a cooling body 6 on the lower side in the figure.
On the upper side of the insulating ceramic substrate 2, the base metal of the metal joint (wiring metal 2 c) disposed on the insulating ceramic substrate 2 and the base metal of the metal joint 3 c of the semiconductor chip 3 are described above. The structure is directly joined by the above method.
Further, on the lower side of the insulating ceramic substrate 2, the base metal of the metal joint portion (back surface metal 5) arranged on the back surface of the insulating ceramic substrate 2 and the base metal of the cooling body 6 are obtained by the method described above. It has a directly joined structure.

A semiconductor device 1 shown in FIG. 5C shows an example of a double-sided mounting type semiconductor device, whereas FIGS. 5A and 5B show single-side mounting.
A bus bar provided with a metal bonding part (wiring metal 2) on one side of the insulating ceramic substrate 2 is disposed together with the cooling body 6 above and below the semiconductor chip 3 provided with the metal bonding parts 3c on both sides.
The base metal of the metal joint portion 3c provided on the upper and lower surfaces of the semiconductor chip 3 and the base metal of the metal joint portion (wiring metal 2) made of the bus bar are directly joined by the method described above.

As a fourth embodiment, the semiconductor device 1 shown in FIG. 5D is of a double-sided mounting type using a ceramic substrate 2 having a wiring metal 2 and a back metal 5 on both sides of an insulating ceramic substrate 2. is there.
That is, the embodiment shown in FIG. 5C is substantially the same as that shown in FIG. 5C except that the metal joint (back metal 5) and the cooling body 6 arranged on the back side of the ceramic substrate 2 are joined by the method of the present invention. It has the same structure.

FIG. 6 is a schematic cross-sectional view showing a state before bonding of the semiconductor device of the present invention (however, the insert material 4 is omitted), and the semiconductor chip 3 shown in the drawing is a metal layer made of a base metal A on the bonding surface. 3c. Note that, as shown in FIG. 2, the metal joint 3c can also be formed via an adhesion layer 3a or a barrier layer 3b.
On the other hand, the insulating ceramic substrate 2 includes a wiring metal 2c made of a base metal B on the upper surface side in the drawing, and a back metal 5 on the lower surface side in the drawing. The surface of the wiring metal 2c and the back metal 5 ( Concavities and convexities R are formed on a bonding surface between the semiconductor chip 3 and a base plate 6 described later.

The base plate (cooling body) 6 is made of a base metal, and unevenness R is similarly formed on the joint surface with the back surface metal 5. At this time, the unevenness R may be formed by only one of the back metal 5 and the base plate 6.
The base metal constituting the upper metal joint portion 3c, the wiring metal 2c, the back surface metal 5 and the base plate 6 is saturated with at least one kind of metal contained in the insert material 4 interposed therebetween, for example, Zn. It is preferable to add until it does.

An insert material (not shown) containing Zn is interposed between the semiconductor chip 3 and the wiring metal 2c of the insulating ceramic substrate 2 and between the back metal 5 and the base plate 6 of the insulating ceramic substrate 2. In a state where they are pressed, they are pressurized and heated to join them.
Even if a residue such as a eutectic reactant remains on the bonding surface in the semiconductor device bonded in this way, even if it is exposed to a high temperature environment, the residue is surrounded by a diffusion prevention layer. When the metal contained in the residue is diffused into the base metal and voids are generated, it is possible to avoid a problem that electrical conductivity and thermal conductivity are impaired.

  Hereinafter, the present invention will be specifically described based on examples. In addition, about the code | symbol in a sentence, it respond | corresponds to a figure.

[Example 1]
<Semiconductor chip>
On the back surface of a 1.66 × 1.52 × 0.36 mm SiC diode (semiconductor chip 3), Ti (adhesion layer) with a thickness of 100 nm, Ni (barrier layer) with a thickness of 600 nm, Ag with a thickness of 400 nm After the (adhesion layer) was formed by vapor deposition, aluminum (Al) was sputtered on the film formation surface to form a metal bonding portion 3c having a thickness of 6 μm.
Further, a nickel (Ni) layer having a thickness of 5 μm was formed by sputtering to form a diffusion preventing layer 3f.

<Insulating ceramic substrate>
A metal joint (wiring metal 2c) having a thickness of 0.5 mm made of high-purity aluminum (Al) having a purity of 99.99% on both surfaces of a ceramic substrate 2 made of AlN and having a thickness of 0.64 mm;
Similarly, 0.5 mm-thick metal joints (back metal 5) made of high-purity aluminum (Al) were formed.
Using diamond tools, cutting was performed on the surfaces of the wiring metal and the back surface metal to form unidirectional grooves with a pitch of 0.1 mm and a depth of 0.1 mm.
Further, a nickel (Ni) layer having a thickness of 5 μm was formed by sputtering, and a diffusion preventing layer was formed on the surfaces of the wiring metal and the back surface metal.

<Base plate>
A plate material (base plate 6) made of industrial pure aluminum (A1070) was cut using a diamond tool to form unidirectional grooves with a pitch of 0.1 mm and a depth of 0.1 mm.
Furthermore, a nickel (Ni) layer having a thickness of 5 μm was formed by sputtering to form a diffusion preventing layer.

<Joint>
Next, Zn—Al— produced by a quenching single roll method as an insert material between the bonding surfaces of the semiconductor chip 3 and the insulating ceramic substrate 2 and between the bonding surfaces of the insulating ceramic substrate 2 and the base plate 6. Foil strips each having a thickness of 0.1 mm made of Mg alloy (Zn—Al (4.1%)-Mg (2.5%), melting point: 352 ° C.) were sandwiched.
The wiring metal 2 and the metal junction 3c of the semiconductor chip 3 and the back metal 5 and the base plate 6 are respectively held at 400 ° C. under a pressure of 5 MPa by a diffusion bonding apparatus of infrared heating type. The semiconductor device of Example 1 was obtained by bonding.

[Example 2]
Zn-Al-Cu alloy (Zn-Al (4%)-Cu () in which the wiring metal of the insulating ceramic substrate was replaced with oxygen-free copper (Cu) having a thickness of 0.5 mm and the insert material was produced by a rapid cooling single roll method. 2%), melting point: 389 ° C.), and a semiconductor device of Example 2 was obtained in the same manner as in Example 1 except that the heating strip was changed to 420 ° C. .

[Example 3]
The semiconductor device of Example 3 was obtained in the same manner as in Example 1 except that the insulating ceramic substrate was changed to the following and the heating temperature was changed to 460 ° C.

<Insulating ceramic substrate>
On one surface of a ceramic substrate 2 made of SiN and having a thickness of 0.64 mm, a wiring metal 2 made of oxygen-free copper (Cu) having a thickness of 0.5 mm;
Similarly, a back metal 5 having a thickness of 0.5 mm and oxygen-free copper (Cu) having a thickness of 0.5 mm was formed on the other surface.
Cutting was performed using a diamond tool, and unidirectional grooves with a pitch of 0.1 mm and a depth of 0.1 mm were formed on the surfaces of the wiring metal and the back surface metal.

[Example 4]
A semiconductor device of Example 4 was obtained in the same manner as Example 1 except that the diffusion prevention layer was changed to tungsten nitride (WN).

[Comparative Example 1]
A semiconductor device of Comparative Example 1 was obtained in the same manner as in Example except that the diffusion prevention layer was not formed.

〔Evaluation test〕
After holding the semiconductor devices of Examples 1 to 4 and Comparative Example 1 in a thermostat kept at 300 ° C. for 3000 hours, respectively, the bonding strength, electrical resistivity and thermal conductivity were measured by the following methods, The high temperature retention characteristics were evaluated.

<Joint strength>
The bonding strength was evaluated by a die shear test. The test method was performed in accordance with the JEITA standard (EIAJ ED-4703), and the target strength was set to a bonding strength (1) of 30 MPa or more based on the IEC standard (IEC 60749-19).

<Electric resistivity>
A test piece was cut out locally from the bonding interface, and the electrical resistivity between the upper and lower surfaces of the bonding interface was measured by a four-terminal method. One of the measuring needles was dropped on the bonding metal on the chip side and the other was dropped on the wiring metal side where the bonding was performed, and the electric resistance between them was measured.

<Thermal conductivity>
A specimen was cut out locally from the bonding interface, and the thermal conductivity was measured by a laser flash method.

（ａ）電気抵抗率
比較例の場合、バリヤ層がないため恒温槽中での保持によりＺｎが配線金属のＡｌ中に拡散し、その結果、凹部に空隙が増加するため、電気抵抗率は大きく増加しているが、実施例の場合は拡散が防止されるため、初期状態が保たれ、高純度アルミの高い電気伝導率が維持された。
（ｂ）熱伝導率
比較例の場合、バリヤ層がないため恒温槽中での保持によりＺｎが配線金属のＡｌ中に拡散し、その結果、凹部に空隙が増加するため、熱伝導率は大幅に低下しているが、実施例の場合は拡散が抑制されるため、初期状態が保たれ、高純度アルミの高い熱伝導率が維持された。

(A) In the case of the electrical resistivity comparison example, since there is no barrier layer, Zn is diffused into Al of the wiring metal by holding in the thermostat, and as a result, voids increase in the recesses, resulting in a large electrical resistivity. Although increasing, in the case of Example, since diffusion was prevented, the initial state was maintained and the high electrical conductivity of high purity aluminum was maintained.
(B) Thermal conductivity In the case of the comparative example, since there is no barrier layer, Zn diffuses into the Al of the wiring metal by holding in the thermostat, and as a result, voids increase in the recesses, resulting in a significant increase in thermal conductivity. However, in the case of the example, since diffusion was suppressed, the initial state was maintained and the high thermal conductivity of high-purity aluminum was maintained.

DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Insulating ceramic base material 2c Metal junction part (wiring metal)
2f Diffusion prevention layer R Concavity and convexity 3 Semiconductor chip 3a Adhesion layer 3b Barrier layer 3c Metal junction 3f Diffusion prevention layer 4 Insert material 5 Back surface metal 6 Base plate (cooling body)

Claims (17)

A method of manufacturing a semiconductor device comprising a plurality of semiconductor device members joined together,
The semiconductor device member has a metal joint, the metal joint to be joined has irregularities on both or one of its joint surfaces, and a diffusion prevention layer is formed on both surfaces or inside,
Insert metal is interposed between the metal joints, pressurizes and heats, breaks the diffusion prevention layer, and forms the metal joint A of the semiconductor device member and the metal of the other semiconductor device member The base metal B constituting the joint is directly joined at at least a part of the joint interface,
At least the base metal A and the base metal B constituting the metal joint are independently selected from the group consisting of aluminum (Al), copper (Cu), silver (Ag), and gold (Au). One type is the main component,
A method of manufacturing a semiconductor device, wherein the insert material is one that undergoes a eutectic reaction with at least one metal contained in the base metal A and the base metal B, respectively.   The method of manufacturing a semiconductor device according to claim 1, wherein the insert material is a metal containing Zn as a main component.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the insert material is an alloy of Zn and at least one metal selected from the group consisting of Al, Mg, Cu, Ag, and Sn. .   4. The method of manufacturing a semiconductor device according to claim 3, wherein the insert material is an alloy having a total content of Zn and Al of 80% by mass or more.   4. The method of manufacturing a semiconductor device according to claim 3, wherein the insert material is an alloy having a total content of Zn, Al, and Mg of 80% by mass or more.   4. The method of manufacturing a semiconductor device according to claim 3, wherein the insert material is an alloy having a total content of Zn, Al, and Cu of 80% by mass or more.   The diffusion prevention layer is at least one selected from nickel (Ni), titanium nitride (TiN), tungsten nitride (WN), titanium tungsten nitride (TiWN), and platinum iridium (PtIr). The method for manufacturing a semiconductor device according to any one of 1 to 6.   The thickness of the said insert material is 20-200 micrometers, The manufacturing method of the semiconductor device as described in any one of Claims 1-7 characterized by the above-mentioned. 9. The method of manufacturing a semiconductor device according to claim 1, wherein the base metal A and the base metal B are the same kind of material.   The method for manufacturing a semiconductor device according to claim 1, wherein the member for a semiconductor device is a semiconductor chip and a wiring metal.   11. The method of manufacturing a semiconductor device according to claim 10, wherein the wiring metal is disposed on an insulating ceramic substrate.   The method for manufacturing a semiconductor device according to claim 1, wherein the member for a semiconductor device is an insulating ceramic substrate on which a wiring metal is disposed and a cooling body. A semiconductor device formed by joining a plurality of semiconductor device members,
The semiconductor device member has a metal joint, the metal joint to be joined has irregularities on both or one of its joint surfaces, and a diffusion prevention layer is formed on both surfaces or inside,
The insert metal is interposed between the metal joints and heated under pressure, the diffusion preventing layer is broken, and the base metal A constituting the metal joint of one semiconductor device member and the other semiconductor device member The base metal B that constitutes the metal joint part is directly joined at at least a part of the joint interface,
At least the base metal A and the base metal B constituting the metal joint are independently selected from the group consisting of aluminum (Al), copper (Cu), silver (Ag), and gold (Au). One type is the main component,
The semiconductor device according to claim 1, wherein the insert material reacts with one or more kinds of metals contained in the base metal A and the base metal B, respectively. A semiconductor device formed by joining a plurality of semiconductor device members,
The base metal A of the metal joint portion of one semiconductor device member and the base metal B of the metal joint portion of the other semiconductor device member are directly joined at least at a part of the joint interface, and the direct joint portion And having a eutectic reaction product surrounded by a diffusion preventing layer,
The base metal A and the base metal B are each independently composed mainly of at least one selected from the group consisting of aluminum (Al), copper (Cu), silver (Ag), and gold (Au). And
A semiconductor device, wherein the eutectic reaction product is one obtained by eutectic reaction with one or more metals contained in the base metal A and the base metal B, respectively.   15. The semiconductor device according to claim 13, wherein the member for a semiconductor device is a semiconductor chip and a wiring metal.   The semiconductor device according to claim 15, wherein the wiring metal is disposed on an insulating ceramic substrate.   The semiconductor device according to any one of claims 13 to 16, wherein the member for a semiconductor device is an insulating ceramic substrate on which a wiring metal is disposed and a cooling body.

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