JP6328632B2 - 実行可能コード・データのロック・フリー・ストリーミング - Google Patents

実行可能コード・データのロック・フリー・ストリーミング Download PDF

Info

Publication number
JP6328632B2
JP6328632B2 JP2015524457A JP2015524457A JP6328632B2 JP 6328632 B2 JP6328632 B2 JP 6328632B2 JP 2015524457 A JP2015524457 A JP 2015524457A JP 2015524457 A JP2015524457 A JP 2015524457A JP 6328632 B2 JP6328632 B2 JP 6328632B2
Authority
JP
Japan
Prior art keywords
opcode
memory
computer
writing
long
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2015524457A
Other languages
English (en)
Japanese (ja)
Other versions
JP2015524591A5 (enExample
JP2015524591A (ja
Inventor
レイアソン，クリストファー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microsoft Corp
Microsoft Technology Licensing LLC
Original Assignee
Microsoft Corp
Microsoft Technology Licensing LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microsoft Corp, Microsoft Technology Licensing LLC filed Critical Microsoft Corp
Publication of JP2015524591A publication Critical patent/JP2015524591A/ja
Publication of JP2015524591A5 publication Critical patent/JP2015524591A5/ja
Application granted granted Critical
Publication of JP6328632B2 publication Critical patent/JP6328632B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3816—Instruction alignment, e.g. cache line crossing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3818—Decoding for concurrent execution
    • G06F9/382—Pipelined decoding, e.g. using predecoding

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
JP2015524457A 2012-07-27 2013-07-26 実行可能コード・データのロック・フリー・ストリーミング Active JP6328632B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/560,216 US9436474B2 (en) 2012-07-27 2012-07-27 Lock free streaming of executable code data
US13/560,216 2012-07-27
PCT/US2013/052153 WO2014018812A1 (en) 2012-07-27 2013-07-26 Lock free streaming of executable code data

Publications (3)

Publication Number Publication Date
JP2015524591A JP2015524591A (ja) 2015-08-24
JP2015524591A5 JP2015524591A5 (enExample) 2016-08-18
JP6328632B2 true JP6328632B2 (ja) 2018-05-23

Family

ID=48985821

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015524457A Active JP6328632B2 (ja) 2012-07-27 2013-07-26 実行可能コード・データのロック・フリー・ストリーミング

Country Status (11)

Country Link
US (2) US9436474B2 (enExample)
EP (1) EP2877918B1 (enExample)
JP (1) JP6328632B2 (enExample)
KR (1) KR102042304B1 (enExample)
CN (1) CN104508626B (enExample)
AU (2) AU2013295686B2 (enExample)
BR (1) BR112015001476B1 (enExample)
CA (1) CA2878558C (enExample)
MX (2) MX347111B (enExample)
RU (1) RU2639235C2 (enExample)
WO (1) WO2014018812A1 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9747189B2 (en) 2015-11-12 2017-08-29 International Business Machines Corporation Breakpoint for predicted tuple processing time in a streaming environment
CN107797821B (zh) * 2016-09-05 2021-10-08 上海宝存信息科技有限公司 重试读取方法以及使用该方法的装置

Family Cites Families (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5768575A (en) * 1989-02-24 1998-06-16 Advanced Micro Devices, Inc. Semi-Autonomous RISC pipelines for overlapped execution of RISC-like instructions within the multiple superscalar execution units of a processor having distributed pipeline control for sepculative and out-of-order execution of complex instructions
JPH0395629A (ja) 1989-09-08 1991-04-22 Fujitsu Ltd データ処理装置
JPH03216734A (ja) * 1990-01-22 1991-09-24 Hitachi Micro Comput Eng Ltd データ処理方法及び中央処理装置
JPH05312838A (ja) * 1992-05-12 1993-11-26 Iwatsu Electric Co Ltd ロジック・アナライザ
GB9412434D0 (en) * 1994-06-21 1994-08-10 Inmos Ltd Computer instruction compression
US6009508A (en) * 1994-06-21 1999-12-28 Sgs-Thomson Microelectronics Limited System and method for addressing plurality of data values with a single address in a multi-value store on FIFO basis
BR9509845A (pt) * 1994-12-02 1997-12-30 Intel Corp Microprocessador com operação de compactação de elementos de operação compósitos
US6212574B1 (en) 1997-04-04 2001-04-03 Microsoft Corporation User mode proxy of kernel mode operations in a computer operating system
US5946484A (en) * 1997-05-08 1999-08-31 The Source Recovery Company, Llc Method of recovering source code from object code
US6061772A (en) * 1997-06-30 2000-05-09 Sun Microsystems, Inc. Split write data processing mechanism for memory controllers utilizing inactive periods during write data processing for other transactions
US6282698B1 (en) * 1998-02-09 2001-08-28 Lucent Technologies Inc. Detecting similarities in Java sources from bytecodes
US6119115A (en) 1998-03-12 2000-09-12 Microsoft Corporation Method and computer program product for reducing lock contention in a multiple instruction execution stream processing environment
EP0955578A1 (en) * 1998-05-04 1999-11-10 International Business Machines Corporation Method and device for carrying out a function assigned to an instruction code
US6077312A (en) * 1998-05-06 2000-06-20 International Business Machines Corporation Apparatus, program product and method of debugging utilizing a context sensitive breakpoint
US6253309B1 (en) 1998-09-21 2001-06-26 Advanced Micro Devices, Inc. Forcing regularity into a CISC instruction set by padding instructions
US6397273B2 (en) 1998-12-18 2002-05-28 Emc Corporation System having an enhanced parity mechanism in a data assembler/disassembler for use in a pipeline of a host-storage system interface to global memory
US6408382B1 (en) * 1999-10-21 2002-06-18 Bops, Inc. Methods and apparatus for abbreviated instruction sets adaptable to configurable processor architecture
US20030023960A1 (en) * 2001-07-25 2003-01-30 Shoab Khan Microprocessor instruction format using combination opcodes and destination prefixes
US7444500B1 (en) 2000-08-14 2008-10-28 General Software, Inc. Method for executing a 32-bit flat address program during a system management mode interrupt
US6708326B1 (en) * 2000-11-10 2004-03-16 International Business Machines Corporation Method, system and program product comprising breakpoint handling mechanism for debugging and/or monitoring a computer instruction sequence
US20040059641A1 (en) * 2002-06-25 2004-03-25 Lucas Brown System and method for creating user selected customized digital data compilations
US7917734B2 (en) 2003-06-30 2011-03-29 Intel Corporation Determining length of instruction with multiple byte escape code based on information from other than opcode byte
US7581082B2 (en) 2005-05-13 2009-08-25 Texas Instruments Incorporated Software source transfer selects instruction word sizes
US7506206B2 (en) 2005-06-07 2009-03-17 Atmel Corporation Mechanism for providing program breakpoints in a microcontroller with flash program memory
US20070006189A1 (en) * 2005-06-30 2007-01-04 Intel Corporation Apparatus, system, and method of detecting modification in a self modifying code
US7761864B2 (en) * 2005-08-09 2010-07-20 Intermec Ip Corp. Method, apparatus and article to load new instructions on processor based devices, for example, automatic data collection devices
US7703088B2 (en) * 2005-09-30 2010-04-20 Intel Corporation Compressing “warm” code in a dynamic binary translation environment
US20070079177A1 (en) * 2005-09-30 2007-04-05 Charles Spirakis Process monitoring and diagnosis apparatus, systems, and methods
US20070168736A1 (en) * 2005-12-19 2007-07-19 Ottavi Robert P Breakpoint groups
US8584109B2 (en) * 2006-10-27 2013-11-12 Microsoft Corporation Virtualization for diversified tamper resistance
US8037459B2 (en) * 2007-07-31 2011-10-11 International Business Machines Corporation Recovery from nested exceptions in an instrumentation routine
US8185783B2 (en) 2007-11-22 2012-05-22 Microsoft Corporation Split user-mode/kernel-mode device driver architecture
US20090282220A1 (en) * 2008-05-08 2009-11-12 Mips Technologies, Inc. Microprocessor with Compact Instruction Set Architecture
US8423961B2 (en) 2008-06-06 2013-04-16 Microsoft Corporation Simulating operations through out-of-process execution
US8370537B2 (en) * 2008-09-07 2013-02-05 EADS North America, Inc. Trigger router and test system including the trigger router
KR101581001B1 (ko) * 2009-03-30 2015-12-30 삼성전자주식회사 프로그램의 동적 분석 방법 및 그 장치
US9274796B2 (en) * 2009-05-11 2016-03-01 Arm Finance Overseas Limited Variable register and immediate field encoding in an instruction set architecture
CN101853148B (zh) 2009-05-19 2014-04-23 威盛电子股份有限公司 适用于微处理器的装置及方法
US20120079459A1 (en) * 2010-09-29 2012-03-29 International Business Machines Corporation Tracing multiple threads via breakpoints
US9176738B2 (en) * 2011-01-12 2015-11-03 Advanced Micro Devices, Inc. Method and apparatus for fast decoding and enhancing execution speed of an instruction
US9053233B2 (en) * 2011-08-15 2015-06-09 Freescale Semiconductor, Inc. Method and device for controlling debug event resources
GB2501299A (en) * 2012-04-19 2013-10-23 Ibm Analysing computer program instructions to determine if an instruction can be replaced with a trap or break point.
US8990627B2 (en) * 2012-05-23 2015-03-24 Red Hat, Inc. Leveraging page fault and page reclaim capabilities in debugging
US9342284B2 (en) * 2013-09-27 2016-05-17 Intel Corporation Optimization of instructions to reduce memory access violations
US9619346B2 (en) * 2013-10-31 2017-04-11 Assured Information Security, Inc. Virtual machine introspection facilities

Also Published As

Publication number Publication date
KR20150040277A (ko) 2015-04-14
RU2015102341A (ru) 2016-08-10
MX373064B (es) 2020-05-20
CA2878558A1 (en) 2014-01-30
US9841976B2 (en) 2017-12-12
CN104508626B (zh) 2017-06-13
EP2877918A1 (en) 2015-06-03
MX2015001127A (es) 2015-04-08
BR112015001476A2 (pt) 2017-07-04
MX347111B (es) 2017-04-12
EP2877918B1 (en) 2022-02-16
WO2014018812A1 (en) 2014-01-30
CN104508626A (zh) 2015-04-08
US20140032883A1 (en) 2014-01-30
AU2018205196B2 (en) 2019-07-25
AU2013295686A1 (en) 2015-01-29
US20160371083A1 (en) 2016-12-22
AU2013295686B2 (en) 2018-04-19
JP2015524591A (ja) 2015-08-24
US9436474B2 (en) 2016-09-06
RU2639235C2 (ru) 2017-12-20
CA2878558C (en) 2020-11-03
BR112015001476B1 (pt) 2022-06-28
AU2018205196A1 (en) 2018-08-02
KR102042304B1 (ko) 2019-11-07

Similar Documents

Publication Publication Date Title
CN102279790B (zh) 分布式调试方法和系统
RU2646329C2 (ru) Генерирование и кэширование кода программного обеспечения
US9530006B2 (en) Method and system for performing a memory safety check of a program written in an unmanaged programming language
JP2011118901A (ja) 外来情報を区分けすることにより仮想マシン・コードをメモリ最適化する方法、コンピュータ・プログラム、およびシステム
CN104541244A (zh) 用于进行重放执行的方法和系统
CN107003894A (zh) 用于硬件事务内存程序的剖析器的装置和方法
CN103377131A (zh) 数据处理装置和方法
WO2021036173A1 (zh) 解释执行字节码指令流的方法及装置
JP6328632B2 (ja) 実行可能コード・データのロック・フリー・ストリーミング
CN115705294A (zh) 用于获取函数调用信息的方法、装置、电子设备和介质
US10083125B2 (en) Method to efficiently implement synchronization using software managed address translation
US10891214B2 (en) Transferring a debug configuration amongst carrier threads for debugging a carried thread
CN119806544B (zh) 二进制翻译方法、装置、电子设备及可读存储介质
US8452948B2 (en) Hybrid compare and swap/perform locked operation queue algorithm
CN101782860A (zh) 一种程序链接方法及装置
US7631302B2 (en) System and method for validation of arguments provided to an application
US12182585B2 (en) Computer system executing multiple operating systems
US10891213B2 (en) Converting between a carried thread and a carrier thread for debugging the carried thread
US20130132061A1 (en) Just-in-time static translation system for emulated computing environments
WO2018214482A1 (zh) 一种虚拟机的监控方法和装置
WO2023148561A1 (en) In-memory trace with overlapping processing and logout
CN113342347A (zh) 信息处理方法、装置、计算设备以及介质
JP2013175076A (ja) 情報処理装置および情報処理装置における異常分析方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20160629

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20160629

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20170524

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20170606

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20170905

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20171102

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20171106

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20180320

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20180418

R150 Certificate of patent or registration of utility model

Ref document number: 6328632

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250