JP6308159B2 - Epitaxial wafer manufacturing method - Google Patents

Description

  The present invention relates to a method of manufacturing an epitaxial wafer by forming an epitaxial layer on the surface layer of a silicon wafer.

  As a substrate for manufacturing a semiconductor integrated circuit, a silicon wafer manufactured by a CZ (czochra1ski) method is mainly used. In recent state-of-the-art imaging devices, in particular, an epitaxial wafer in which, for example, a silicon epitaxial layer is grown on a silicon wafer is often used. In such a state-of-the-art imaging device, white scratches (dark current defects) that are estimated to be caused by metal impurities may occur. In order to reduce this white scratch, a gettering technique for removing metal impurities from the device active layer during the device process is important.

  This gettering technology is roughly classified into IG (internal gettering) and EG (external gettering) depending on the position of the gettering site. IG refers to a case where there is a gettering site inside the wafer, and specifically includes a substrate having BMD (Bulk micro defects) and a low resistivity substrate in an epitaxial wafer. On the other hand, EG refers to a case where there is a gettering site on the back surface of the wafer, and specifically includes PBS (Si-poly back seal) and SB (sand blast). In EG, it is necessary to diffuse metal impurities by heat treatment from the wafer surface layer, which is the device active layer, to the back surface where the gettering site is present. Therefore, for EG with relatively fast diffusion such as nickel (Ni) and copper (Cu) Is effective. On the other hand, for IG, a gettering site can be formed in a region relatively close to the device active layer, so that it is more effective for elements such as iron (Fe) and chromium (Cr) that are more slowly diffused than Ni and Cu. Is also effective.

  Further, the gettering technique can be classified by a mechanism in addition to the position where the gettering site is added. Specifically, it can be classified into relaxation type and segregation type. In the relaxed type, gettering proceeds only when the metal impurity concentration in the wafer is higher than the solid solubility during a certain heat treatment (supersaturation). In this case, the ultimate concentration of the metal impurity element is the solid solubility. On the other hand, in the segregation type, gettering proceeds by redistribution of metal impurities so as to follow the segregation coefficients of the device active layer and gettering layer at a certain temperature. In this case, the ultimate concentration of the metal impurity element is the segregation equilibrium concentration. is there. Therefore, the relaxation type is more effective for high concentration contamination than the segregation type, while the segregation type gettering is more effective for low concentration contamination.

  In the manufacture of epitaxial wafers, ion implantation is a technique for creating a gettering site near the device active region on the surface of the epitaxial wafer. Specifically, first, ion implantation is performed on a silicon substrate, and then a recovery heat treatment for recovering the crystallinity of the surface layer of the silicon substrate is performed to deposit an epitaxial layer directly on the surface layer (for example, Patent Document 1). reference). In this case, damage, defects, or implanted elements themselves generated by ion implantation become gettering sites.

JP 2011-44590 A

  In recent years, with low temperature and short time of device processes, particularly in an image pickup device, contamination at a very low concentration may deteriorate device characteristics and cause white defects. As described above, many epitaxial wafers are used as substrates for high-sensitivity imaging devices in which white scratches are a problem. Further, as a cause of white scratches, elements of metal impurities such as tungsten (W) and molybdenum (Mo) that are extremely slow are cited. Furthermore, since the concentration of these elements in the silicon wafer is very low, the effect of relaxation gettering such as BMD cannot be expected so much. Therefore, the required wafer conditions include gettering sites in the region near the device active layer in order to getter even the slow diffusion elements such as W and Mo, and gettering even for low concentration contamination. It is desired to be a segregation type gettering site having a high effect.

  The conventional EG technology such as PBS or SB has a problem that it is difficult to reach slowly gettering impurity ions to the gettering site (back surface) and a sufficient gettering effect cannot be obtained. Further, BMD, which is an IG gettering site, is close to the device active layer, but BMD is a relaxed gettering site, and there is a problem that a sufficient gettering effect cannot be obtained for low-concentration impurity contamination. there were.

  Further, as in the gettering technique described in the above-mentioned Patent Document 1, a gettering site is formed at a position close to the surface layer of the silicon substrate by ion implantation, and an epitaxial layer is formed on the surface layer of the silicon substrate. In order to reduce the generation of defects in the epitaxial layer, it is necessary to perform a recovery heat treatment after ion implantation. This recovery heat treatment has a problem that the damage layer functioning as a gettering site is reduced more than necessary, and sufficient gettering ability cannot be obtained.

  As described above, when manufacturing an epitaxial wafer used for an image sensor or the like by a conventional method, it is possible to achieve both suppression of defects in the epitaxial layer and high gettering ability for low concentration metal impurities with slow diffusion. I could not.

  The present invention has been made in view of the problems described above, and achieves both suppression of defect generation in the epitaxial layer and high gettering capability so that gettering is possible even with low concentration metal impurities with a low diffusion rate. An object of the present invention is to provide a method for manufacturing an epitaxial wafer.

  In order to achieve the above object, the present invention provides an epitaxial wafer manufacturing method for forming an epitaxial layer on a surface layer of a silicon wafer, the step of performing ion implantation on the silicon wafer, the ion-implanted silicon wafer, A step of recovering the crystallinity of the surface layer of the ion-implanted silicon wafer by performing a flash lamp annealing (FLA) process, and forming an epitaxial layer on the surface layer of the crystallinity of the silicon wafer recovered The manufacturing method of the epitaxial wafer characterized by having a process is provided.

  In the present invention, by performing FLA treatment as a recovery heat treatment after ion implantation, the crystallinity of the extreme surface of the silicon wafer can be mainly recovered, and an appropriately damaged layer can be left in the vicinity of the surface layer of the silicon wafer. As described above, the present invention can reduce defects in the epitaxial layer while maintaining a high gettering capability with respect to metal impurities having a low diffusion rate and a low concentration.

At this time, in the ion implantation step, an element to be implanted into the silicon wafer is any one of carbon, boron, phosphorus, and silicon, and the implantation amount of the element is 1 × 10 ¹⁴ cm ⁻² or more and 5 × 10 ¹⁵ cm. ⁻² or less, the implantation energy is preferably 50 to 1000 keV.

As the types of elements to be implanted into the silicon wafer, the above are particularly preferable. Moreover, if the amount of implanted elements is 1 × 10 ¹⁴ cm ⁻² or more, sufficient gettering ability can be ensured more reliably. If the implantation amount of the element is 5 × 10 ¹⁵ cm ⁻² or less, the damage of the silicon wafer surface layer becomes appropriate, and the crystallinity of the surface layer can be more reliably recovered by the FLA treatment. Further, when the element implantation energy is within the above range, the gettering site can be more reliably formed at a position near the surface layer of the silicon wafer.

  At this time, it is preferable that in the crystallinity recovery step, the flash lamp annealing treatment time is 0.01 msec to 100 msec, and the maximum temperature is 1100 ° C. to 1300 ° C.

  Thus, if the FLA processing time and maximum temperature are within the above ranges, the crystallinity of the extreme surface of the wafer can be recovered more reliably and sufficiently, and a more moderately damaged layer can be left near the surface layer of the wafer. Can do.

  If it is the manufacturing method of the epitaxial wafer of this invention, the defect generation | occurrence | production of an epitaxial layer can be suppressed, maintaining a high gettering capability.

It is the flowchart which showed an example of the manufacturing method of the epitaxial wafer of this invention. It is the schematic which shows an example of the heat processing apparatus which can be used for the FLA process of this invention.

  Hereinafter, although an embodiment is described about the present invention, the present invention is not limited to this.

  As described above, the gettering technique using ion implantation can form a gettering site at a position where an element with slow diffusion can be gettered. This is because the depth of the ion implantation layer from the surface of the silicon wafer can be designed freely by adjusting the ion implantation energy (ion acceleration voltage). However, the recovery heat treatment according to the conventional technique recovers a damaged layer serving as a gettering site more than necessary, and a sufficient gettering ability cannot be obtained.

  Therefore, the present inventors formed a damaged layer on the surface layer of the silicon wafer under ion implantation conditions to the extent that a segregation-type gettering effect is obtained, while leaving the damaged layer in the vicinity of the surface layer of the wafer, while the extreme surface of the wafer is In order to recover the crystallinity and suppress the occurrence of defects in the epitaxial layer, the idea was to perform flash lamp annealing (FLA) treatment. Then, the present invention was completed by examining ion implantation conditions and crystallinity recovery conditions that can achieve both suppression of defects in the epitaxial layer and high gettering ability.

  For example, JP 2004-320041 A and JP 2009-94301 A disclose that FLA treatment is performed after ion implantation to recover the crystallinity of the extreme surface of the wafer. However, there is no suggestion that the FLA process is applied to an epitaxial wafer manufacturing method, or that excellent effects such as suppression of defect generation in an epitaxial layer and high gettering capability can be obtained at the same time. Such a configuration and effect were first found by the present inventors.

  As shown in FIG. 1, in the epitaxial wafer manufacturing method of the present invention, ion implantation is first performed on a silicon wafer (S101 in FIG. 1). Next, FLA treatment is performed to recover the crystallinity of the silicon wafer after ion implantation (S102 in FIG. 1). Next, an epitaxial layer is formed on the surface layer of the FLA-treated silicon wafer (S103 in FIG. 1).

  Hereinafter, each process in the manufacturing method of the epitaxial wafer of this invention shown in FIG. 1 is demonstrated.

(Ion implantation process)
In this step, ion implantation is performed on the silicon wafer (S101 in FIG. 1). At this time, ion implantation can be performed under ion implantation conditions that can provide a segregation-type gettering effect.

Specifically, the element to be implanted is preferably any of carbon, boron, phosphorus, and silicon. Moreover, it is preferable that the implantation amount of the element is 1 × 10 ¹⁴ cm ⁻² or more and 5 × 10 ¹⁵ cm ⁻² or less, and the implantation energy is 50 to 1000 keV. Basically, the gettering ability imparted by ion implantation increases as the ion implantation amount (dose amount) increases, but in the present invention, the element implantation amount is preferably within the above range.

If the amount of implanted elements is 5 × 10 ¹⁵ cm ⁻² or less, the amount of damage caused by ion implantation becomes an appropriate amount, and the crystallinity can be sufficiently recovered by FLA treatment. As a result, since the density of defects in the epitaxial layer is lowered, an epitaxial wafer suitable for device fabrication can be manufactured. Moreover, if the amount of implanted elements is 1 × 10 ¹⁴ cm ⁻² or more, a sufficiently high gettering capability can be obtained. If the implantation energy is in the above range, a damage layer can be formed on the surface layer of the silicon wafer, and a gettering site can be formed at a position close to the device active layer. The lower the implantation energy, the closer the damaged layer is to the silicon wafer surface.

(Crystalline recovery process)
Subsequently, heat treatment is performed to recover the crystallinity of the surface layer of the silicon wafer after the ion implantation process (S102 in FIG. 1). In the present invention, flash lamp annealing (FLA) is performed as this heat treatment. By performing FLA treatment as a recovery heat treatment after ion implantation as in the present invention, it is possible to recover mainly the crystallinity of the extreme surface of the silicon wafer and leave a moderately damaged layer near the surface layer of the silicon wafer. . As a result, it is possible to reduce defects in the epitaxial layer while maintaining high gettering ability for low-concentration metal impurities with slow diffusion.

  Here, a heat treatment apparatus capable of performing flash lamp annealing will be described. FIG. 2 is a schematic view showing an example of a heat treatment apparatus that can be used for flash lamp annealing in the present invention. A heat treatment apparatus 11 (hereinafter also referred to as FLA apparatus 11) shown in FIG. 2 has a chamber 12 made of quartz, and the silicon wafer 19 can be heat-treated in the chamber 12.

  Further, in the FLA apparatus 11 shown in FIG. 2, extremely short flash lamp annealing (FLA) can be performed by the Xe flash lamp (xenon lamp) 13 disposed on the upper portion of the chamber 12. Further, the halogen lamp 14 disposed under the chamber 12 can perform preheating until the inside of the chamber 12 reaches a predetermined preheating temperature (assist temperature) that is equal to or lower than the temperature at the time of flash lamp annealing.

  The auto shutter 15 is provided with a wafer insertion port (not shown) that can be opened and closed by a gate valve. The silicon wafer 19 is disposed on the support portion 17 formed on the quartz tray 16. The chamber 12 is provided with a temperature measurement special window (not shown). The pyrometer 18 installed outside the chamber 12 can measure the temperature of the silicon wafer 19 through the special window.

  In the present invention, FLA processing can be performed using the FLA apparatus 11 as described above. At this time, it is preferable that the FLA treatment time is 0.01 msec or more and 100 msec or less, and the maximum temperature is 1100 ° C. or more and 1300 ° C. or less. Thus, if the FLA processing time is 0.01 msec or more, the crystallinity of the extreme surface of the silicon wafer 19 can be recovered more reliably and sufficiently, and if the FLA processing time is 100 msec or less, the vicinity of the surface layer of the wafer In addition, the damage layer can be left more moderately. Similarly, if the maximum temperature of the FLA is 1100 ° C. or higher, the crystallinity of the extreme surface of the silicon wafer 19 can be recovered more reliably and sufficiently, and if the maximum temperature of the FLA is 1300 ° C. or lower, the surface layer of the wafer A damaged layer can be left in the vicinity in an appropriate manner.

(Epitaxial layer formation process)
Subsequently, an epitaxial layer is formed on the surface layer of the silicon wafer whose crystallinity has been recovered by the FLA process (S103 in FIG. 1). At this time, since the crystallinity of the extreme surface of the surface layer of the silicon wafer has been sufficiently recovered, the occurrence of defects in the epitaxial layer to be grown can be suppressed. In addition, the crystallinity is restored by FLA treatment mainly on the surface of the surface layer of the silicon wafer, and the damage layer that becomes the gettering site remains sufficiently close to the surface of the silicon wafer. Thus, an epitaxial wafer can be obtained which can be gettered even with a metal impurity element having a high concentration, that is, a low concentration and a slow diffusion.

  EXAMPLES Hereinafter, the present invention will be described more specifically with reference to examples and comparative examples of the present invention, but the present invention is not limited to these examples.

Example 1
An epitaxial wafer was manufactured according to the method for manufacturing an epitaxial wafer of the present invention as shown in FIG.

First, carbon ions were implanted into a substrate made of a p ^- silicon single crystal wafer having a resistivity of 10 Ω · cm and a plane orientation (100) under the conditions of an implantation amount of 1 × 10 ¹⁴ cm ⁻² and an implantation energy of 50 keV. Thereafter, FLA treatment was performed in order to recover damage caused by carbon ion implantation. In the FLA treatment, the maximum temperature was 1200 ° C. (assist temperature 800 ° C.), the treatment time was 10 msec, and the atmosphere was nitrogen. Next, a silicon epitaxial layer was formed on the surface layer whose crystallinity was recovered by FLA.

  In the epitaxial wafer manufactured as described above, the surface defect density (EP defect density) and gettering ability of the epitaxial layer were evaluated. The density of surface defects was measured using SP-1 (manufactured by KLA-Tencor). Further, the gettering ability was evaluated by the following procedure using Fe element having a relatively low diffusion rate. First, the surface of the epitaxial wafer was intentionally contaminated with Fe. Next, heat treatment for diffusing the Fe element on the surface of the epitaxial wafer into the epitaxial wafer was performed. Next, gettering heat treatment for gettering Fe element was performed. Thereafter, the Fe concentration in the epitaxial wafer was measured by DLTS (Deep Level Transient Spectroscopy). And it evaluated that gettering ability was so high that Fe concentration measured in this way was low.

Moreover, the epitaxial wafer was produced according to the manufacturing method of the epitaxial wafer of this invention on the conditions similar to the above except having changed the ion implantation quantity into 1 * 10 ^{< 15} > cm ^<-2> , 5 * 10 ^{< 15} > cm ^<-2> . And also about the epitaxial wafer produced on these conditions, the density of the surface defect of the epitaxial layer and the gettering ability were evaluated similarly to the above.

(Comparative Example 1)
In Comparative Example 1, basically in the same manner as in Example 1, the ion implantation amount was 1 × 10 ¹⁴ cm ⁻² , 1 × 10 ¹⁵ cm ⁻² , and 5 × 10 ¹⁵ cm ⁻² under three conditions. An epitaxial wafer was produced, but in the recovery heat treatment process, heat treatment using a vertical furnace was performed instead of FLA treatment. In the heat treatment in the vertical furnace, the treatment temperature was 1000 ° C., the treatment time was 10 minutes, and the atmosphere was nitrogen. And about each epitaxial wafer produced on these conditions, it carried out similarly to Example 1, and evaluated the density of the surface defect of the epitaxial layer, and the gettering capability.

(Comparative Example 2)
In Comparative Example 1, basically in the same manner as in Example 1, the ion implantation amount was 1 × 10 ¹⁴ cm ⁻² , 1 × 10 ¹⁵ cm ⁻² , and 5 × 10 ¹⁵ cm ⁻² under three conditions. Although an epitaxial wafer was produced, RTA (Rapid Thermal Annealing) processing was performed instead of FLA processing in the recovery heat treatment step. In RTA, the processing temperature was 1000 ° C., the processing time was 10 sec, and the atmosphere was nitrogen. And about each epitaxial wafer produced on these conditions, it carried out similarly to Example 1, and evaluated the density of the surface defect of the epitaxial layer, and the gettering capability.

  The evaluation results in Example 1 and Comparative Examples 1 and 2 are shown in Table 1. In Table 1, the surface defect density and gettering ability are relative values based on the surface defect density and gettering ability when heat-treated at 1000 ° C. for 10 minutes using a vertical furnace (Comparative Example 1). It showed in. The “defect density” in the table indicates that the lower the numerical value, the fewer defects on the surface of the epitaxial layer, and the “gettering ability” indicates that the higher the numerical value, the higher the gettering ability of the epitaxial wafer.

  As shown in Table 1, the gettering ability when the recovery heat treatment is FLA at any ion implantation amount is 10 than that of the other recovery heat treatments (heat treatment and RTA by the vertical furnace in Comparative Examples 1 and 2). It was found to be ~ 20% higher. Furthermore, it has been found that the defect density of the epitaxial layer is also reduced by 10 to 20%.

  This is because in FLA, only the surface layer of the silicon wafer is heated to a high temperature, so that the crystallinity of only the important surface layer is recovered during the epitaxial growth, and the damage in the implantation range region responsible for the gettering capability is not recovered. It is done. In other words, from the results of Example 1, with the manufacturing method of the present invention, it is possible to obtain an epitaxial wafer having the ability to getter impurity elements with few defects in the epitaxial layer and with a relatively slow diffusion rate without any problem. I understood.

(Example 2)
The amount of ion implantation in the ion implantation process was set to 5 × 10 ¹⁵ cm ^−2, and an epitaxial wafer was manufactured under basically the same conditions as in Example 1. The processing time in FLA was as shown in Table 2 below. changed. The epitaxial layer defects and gettering ability of each of these epitaxial wafers were investigated. The evaluation results in Example 2 are shown in Table 2. In Table 2, the density of surface defects and the gettering ability are the values when the ion implantation amount is 5 × 10 ¹⁵ cm ⁻² and heat treatment is performed at 1000 ° C. for 10 minutes using a vertical furnace (Comparative Example 1). Relative values based on surface defect density and gettering ability are shown.

  As shown in Table 2, it was found that when the FLA time was 0.01 msec or more and 100 msec or less, the defect density of the epitaxial layer was particularly reduced and excellent gettering ability was obtained. Further, it was found that even when the FLA time was 110 msec, that is, when the FLA time was larger than 100 msec, the defect density was not inferior to that of the comparative example, and excellent gettering ability was obtained.

(Example 3)
The ion implantation amount in the ion implantation step was set to 5 × 10 ¹⁵ cm ^−2, and an epitaxial wafer was manufactured under basically the same conditions as in Example 1. The maximum temperatures in FLA were as shown in Table 3 below, respectively. changed. The epitaxial layer defects and gettering ability of each of these epitaxial wafers were investigated. The evaluation results in Example 3 are shown in Table 3. In Table 3, the density of surface defects and the gettering capability are the surfaces when the ion implantation amount is 5 × 10 ¹⁵ cm ⁻² and heat-treated at 1000 ° C. for 10 minutes using a vertical furnace (Comparative Example 1). The relative values are based on the defect density and the gettering ability.

  As shown in Table 3, it was found that when the maximum temperature was 1100 ° C. or higher and 1300 ° C. or lower, the defect density on the surface of the epitaxial layer was further reduced and a better gettering ability was obtained. It was also found that even when the maximum temperature was 1000 ° C., that is, less than 1100 ° C., the defect density was not inferior to that of the comparative example, and excellent gettering ability was obtained.

Example 4
An epitaxial wafer was manufactured according to the method for manufacturing an epitaxial wafer of the present invention as shown in FIG.

First, boron was implanted into a substrate made of a p ^- silicon wafer having a resistivity of 10 Ω · cm under the conditions of an implantation amount of 3 × 10 ¹⁵ cm ⁻² and an implantation energy of 50 keV. Thereafter, FLA treatment was performed to recover damage caused by boron ion implantation. In the FLA treatment, the maximum temperature was 1200 ° C. (assist temperature 800 ° C.), the treatment time was 10 msec, and the atmosphere was nitrogen. Next, a silicon epitaxial layer was formed on the substrate subjected to recovery heat treatment by FLA treatment. The epitaxial wafer produced as described above was evaluated for the surface defect density and gettering ability of the epitaxial layer in the same manner as in Example 1.

  Moreover, the epitaxial wafer was produced according to the manufacturing method of the epitaxial wafer of this invention on the conditions similar to the above except having changed the kind of element to implant into phosphorus and silicon. And about the epitaxial wafer produced on these conditions, it carried out similarly to Example 1, and evaluated the density of the surface defect of the epitaxial layer, and the gettering ability.

(Comparative Example 3)
In Comparative Example 3, basically, as in Example 4, epitaxial wafers were produced under three conditions where the types of elements to be ion-implanted were boron, phosphorus, and silicon. Heat treatment was performed using a vertical furnace. In the heat treatment in the vertical furnace, the treatment temperature was 1000 ° C., the treatment time was 10 minutes, and the atmosphere was nitrogen. And about each epitaxial wafer produced on these conditions, it carried out similarly to Example 1, and evaluated the density of the surface defect of the epitaxial layer, and the gettering capability.

(Comparative Example 4)
In Comparative Example 4, basically as in Example 4, epitaxial wafers were produced under three conditions where the types of elements to be ion-implanted were boron, phosphorus, and silicon. RTA treatment was performed. In RTA, the processing temperature was 1000 ° C., the processing time was 10 sec, and the atmosphere was nitrogen. And about each epitaxial wafer produced on these conditions, it carried out similarly to Example 1, and evaluated the density of the surface defect of the epitaxial layer, and the gettering capability.

  Table 4 shows the evaluation results in Example 4 and Comparative Examples 3 and 4. In Table 4, the surface defect density and gettering ability are relative values based on the surface defect density and gettering ability when heat-treated at 1000 ° C. for 10 minutes using a vertical furnace (Comparative Example 3). It showed in.

  As shown in Table 4, even when ions other than carbon such as boron, phosphorus, and silicon are implanted, if the recovery heat treatment is FLA, the gettering ability and EP defect density are higher than those obtained when other heat treatments are performed. Was also found to be good.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

11 ... Heat treatment apparatus (FLA apparatus), 12 ... Chamber,
13 ... Xe flash lamp, 14 ... Halogen lamp,
15 ... Auto shutter, 16 ... Quartz tray, 17 ... Support part,
18 ... pyrometer, 19 ... silicon wafer.

Claims (2)

An epitaxial wafer manufacturing method for forming an epitaxial layer on a surface layer of a silicon wafer,
There line ion implantation into the silicon wafer to form a gettering site,
Recovering the crystallinity of the surface layer of the ion-implanted silicon wafer by flash lamp annealing the ion-implanted silicon wafer;
Have a step of forming an epitaxial layer on a surface layer were allowed to recover the crystallinity of the silicon wafer,
In the crystallinity recovery step, the flash lamp annealing treatment time is 0.01 msec or more and 100 msec or less, and the maximum temperature is 1100 ° C. or more and 1300 ° C. or less . In the ion implantation step, an element to be implanted into the silicon wafer is any one of carbon, boron, phosphorus, and silicon, and an implantation amount of the element is 1 × 10 ¹⁴ cm ⁻² or more and 5 × 10 ¹⁵ cm ⁻² or less. The method for producing an epitaxial wafer according to claim 1, wherein the implantation energy is 50 to 1000 keV.

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