JP6271970B2 - Power conditioner and storage method - Google Patents

Description

  The present invention relates to a power conditioner having a function of storing information such as a detection result by a sensor, and a storage method.

  There is a solar power generation system that converts DC power generated by a solar cell into AC power by a power conditioner and supplies the AC power to a power system. In the photovoltaic power generation system, electrical information such as input / output current and voltage of the power conditioner is detected in order to manage the power generation status and perform various controls. Each detected electrical information is used inside the inverter for control, and is transmitted periodically (for example, every minute) to a management computer to be used for management of power generation status. .

  When an abnormality such as a failure of a power conditioner or occurrence of an abnormality in the power system is detected, the cause of the abnormality can be investigated by analyzing the waveform of each current and voltage. For this reason, each detected electrical information is stored in the power conditioner for a predetermined time, and is read and analyzed when an abnormality is detected. For example, Patent Literature 1 describes that electrical information is cyclically written in a RAM and information before and after the failure is read out and used for failure analysis. Moreover, the power converter device of patent document 1 is made to be able to memorize | store both the electrical information before and after the time of a major fault and the electrical information before and after a major fault when a major fault occurs immediately after a minor fault. .

Japanese Patent No. 4599969

  In the case of the power conversion device disclosed in Patent Literature 1, after a predetermined amount of data is written after a major failure, writing to the RAM is stopped to prevent overwriting of data at the time of a minor failure. Therefore, when minor failures that do not stop writing to the RAM continue, the data at the previous minor failure may be overwritten.

  The present invention has been conceived under the circumstances described above, and when an abnormality is detected, each information stored immediately before the abnormality detection can be read out, and even when abnormality detection continues. It is an object of the present invention to provide a power conditioner that is not overwritten with information stored at the time of previous abnormality detection.

  In order to solve the above problems, the present invention takes the following technical means.

  The power conditioner provided by the first aspect of the present invention is a power conditioner that converts DC power into AC power by an inverter circuit and outputs the AC power, and includes a storage unit having a plurality of storage areas, and the storage area A writing means for sequentially writing acquired information in one of the storage areas, an abnormality detecting means for detecting an abnormality, and a storage area for writing information when an abnormality is detected by the abnormality detecting means Storage area changing means for changing the storage area to another storage area.

  Note that “cyclically write” means writing sequentially from the storage location of the first address in the storage area, and after writing to the storage location of the last address, return to the storage location of the first address and continue writing. It is.

  In a preferred embodiment of the present invention, the storage area changing unit changes the storage area in which the information is written to another storage area after a predetermined time has elapsed since the abnormality was detected by the abnormality detection unit.

  In a preferred embodiment of the present invention, the predetermined time is a time for writing information less than half of a storage capacity of a storage area in which the information is written.

  In a preferred embodiment of the present invention, when the storage area is changed by the storage area changing means, the reading means for reading the information stored in the storage area before being changed, and the read information And a communication means for transmitting.

  In a preferred embodiment of the present invention, when the storage area is changed by the storage area changing means, the reading means for reading the information stored in the storage area before being changed, and the read information And analyzing means for analyzing.

  In a preferred embodiment of the present invention, the abnormality detection means detects any one of a short circuit, ground fault, lightning strike, isolated operation, instantaneous voltage drop, frequency abnormality, overvoltage, overcurrent, and temperature abnormality as an abnormality.

  In a preferred embodiment of the present invention, the writing means includes information detected every first sampling time and information detected every second sampling time longer than the first sampling time. , Each write cyclically.

  In a preferred embodiment of the present invention, the information detected at each first sampling time is electrical information about input / output of the inverter circuit.

  In a preferred embodiment of the present invention, the information detected every second sampling time is an output power value of the inverter circuit.

  In a preferred embodiment of the present invention, the storage means has four storage areas.

  In preferable embodiment of this invention, the said power conditioner converts the direct-current power which a solar cell outputs, and outputs it to an electric power grid | system.

  A storage method provided by the second aspect of the present invention is a storage method for storing electrical information about input / output of an inverter circuit in a storage means, and the storage means has a plurality of storage areas. A first step of cyclically writing the acquired information in order in one of the storage regions, a second step of detecting an abnormality, and a memory for writing information when an abnormality is detected And a third step of changing the area to another storage area.

  According to the present invention, while no abnormality is detected, information is cyclically written in one of the plurality of storage areas. When an abnormality is detected, the storage area in which information is written is changed to another storage area. Therefore, it is possible to prevent information written immediately before an abnormality is detected from being overwritten.

  Other features and advantages of the present invention will become more apparent from the detailed description given below with reference to the accompanying drawings.

It is a figure for demonstrating the power conditioner which concerns on 1st Embodiment. 3 is a functional block diagram for explaining an internal configuration of the memory circuit according to the first embodiment. FIG. It is a flowchart for demonstrating the process sequence of a memory | storage process. It is a figure for demonstrating a writing process. It is a figure for demonstrating a writing process. It is a figure for demonstrating another Example of the power conditioner which concerns on 1st Embodiment. It is a figure for demonstrating another Example of the power conditioner which concerns on 1st Embodiment.

  Embodiments of the present invention will be specifically described below with reference to the drawings.

  Drawing 1 is a figure for explaining the power conditioner concerning a 1st embodiment, and has shown a photovoltaic power generation system.

  The power conditioner A includes an inverter circuit 1, various sensors 21 to 27, a control circuit 3, a storage circuit 4, a communication circuit 5, and an abnormality detection circuit 6. The power conditioner A converts the DC power output from the solar battery B into AC power by the inverter circuit 1 and supplies it to a load (not shown). The load is also supplied with power from the power system C. Further, the power conditioner A is a system with a reverse power flow, and supplies AC power to the power system C. Although not shown, a transformer for boosting (or stepping down) the AC voltage is provided on the output side of the inverter circuit 1.

  The inverter circuit 1 converts DC power input from the solar battery B into AC power and outputs the AC power. The inverter circuit 1 includes a PWM control inverter and a filter (not shown). The PWM control inverter is a three-phase inverter provided with three sets of six switching elements (not shown). Based on the PWM signal input from the control circuit 3, each switching element is switched on and off to generate DC power. Convert to AC power. The filter removes high frequency components due to switching. The inverter circuit 1 is not limited to this. For example, the PWM control inverter may be a single-phase inverter or a multi-level inverter. Further, the present invention is not limited to PWM control, and other methods such as phase shift control may be used.

  The DC current sensor 21 detects an instantaneous value of the input current of the inverter circuit 1. The DC voltage sensor 22 detects an instantaneous value of the input voltage of the inverter circuit 1. The current sensor 23 detects an instantaneous value of the output current of the inverter circuit 1. The voltage sensor 24 detects an instantaneous value of the output voltage of the inverter circuit 1. Each sensor 21 to 24 outputs a detection value to the control circuit 3 and the storage circuit 4.

  The solar radiation sensor 25 detects the amount of solar radiation and is disposed near the solar battery B. The air temperature sensor 26 detects the air temperature, and is disposed near the solar battery B. The temperature sensor 27 detects the temperature and is arranged inside the power conditioner A. Each sensor 25, 26, 27 outputs a detection value to the storage circuit 4. The sensors to be arranged are not limited to those described above. For example, a wind speed sensor, a wind direction sensor, a rainfall sensor, etc. are arranged near the solar battery B, and the wind speed, wind direction, and rainfall in the vicinity of the solar battery B are set. The detected value may be detected and the detected value may be output to the storage circuit 4.

  The control circuit 3 controls the inverter circuit 1 and is realized by, for example, a microcomputer. The control circuit 3 generates a PWM signal based on detection values input from the DC current sensor 21, DC voltage sensor 22, current sensor 23, and voltage sensor 24, and outputs the PWM signal to the inverter circuit 1. The control circuit 3 controls the input voltage, reactive power, and output current, but the description and explanation of the configuration for each control are omitted.

  The control circuit 3 outputs various parameter values to the storage circuit 4. The output parameters include, for example, control parameters set by the user, target values for each control, limit values that change depending on the state of the power conditioner A, and the like. Further, the control circuit 3 also outputs information indicating the operation state of the power conditioner A (stop state, soft start state, interconnection state, suppression operation state, etc.) to the storage circuit 4.

  The storage circuit 4 centrally stores and manages the internal information of the power conditioner A. Information (internal information) regarding the state of the power conditioner A is input to the storage circuit 4 from the sensors 21 to 27 and the control circuit 3. The storage circuit 4 stores the internal information for a predetermined time. The storage circuit 4 also stores information such as output power values calculated based on information input from the sensors 21 to 27 as internal information. The storage circuit 4 sends predetermined internal information (for example, the amount of solar radiation near the solar battery B and the output power value) to the management computer D via the communication circuit 5 at a predetermined timing (for example, every minute). Send. The management computer D accumulates information sent at every predetermined timing and uses it for managing the power generation status. Further, when an abnormality is detected, the storage circuit 4 transmits internal information before and after the abnormality to the management computer D. The management computer D analyzes the internal information before and after detecting the abnormality to determine the cause of the abnormality. Details of the memory circuit 4 will be described later.

  The communication circuit 5 communicates with the management computer D. The communication circuit 5 periodically transmits predetermined internal information to the management computer D. When an abnormality is detected, internal information before and after the abnormality is transmitted to the management computer D. The internal information is also transmitted when a request for providing information is received from the management computer D.

  The abnormality detection circuit 6 detects the occurrence of abnormality. Abnormalities detected by the abnormality detection circuit 6 include power system abnormalities (instantaneous voltage drop, system frequency change, ground fault, short circuit, lightning strike, etc.), solar battery B Abnormal (solar panel damage, ground fault, short circuit, lightning strike, etc.). Further, not only a large abnormality that immediately stops the inverter circuit 1 but also a small abnormality that allows the operation of the inverter circuit 1 to be continued. The abnormality detection circuit 6 detects an abnormality by, for example, a short-circuit detection device, a ground fault detection device, an isolated operation detection device, a voltage drop detection device, a frequency abnormality detection device, an overvoltage detection device, an overcurrent detection device, a temperature abnormality detection device, or the like. If detected, the detection signal is output to the storage circuit 4.

  The storage circuit 4 stores the detection values input from the sensors 21 to 24 for each predetermined first sampling time. In this embodiment, the instantaneous values of the input current, input voltage, output current, and output voltage of the inverter circuit 1 are stored. The first sampling time is set to about several milliseconds so that the current and voltage waveforms at the commercial frequency (60 Hz or 50 Hz) can be reproduced. The storage circuit 4 is calculated from the system frequency calculated from the instantaneous value of the voltage detected by the voltage sensor 24, the instantaneous value of the current detected by the current sensor 23, and the instantaneous value of the voltage detected by the voltage sensor 24. The output power value of the inverter circuit 1 is also stored. The system frequency and the output power value do not need to be stored at the same first sampling time as the instantaneous values of current and voltage, and information of a certain length of time is required, so that the first sampling time is about 100 times the first sampling time. Stored every two sampling times.

  The storage circuit 4 also includes an amount of solar radiation input from the solar radiation sensor 25, an air temperature input from the air temperature sensor 26, a temperature input from the temperature sensor 27, values of various parameters input from the control circuit 3, and a power conditioner. The operation state of A is also stored. Such internal information is stored for each second sampling time. That is, the storage circuit 4 stores the instantaneous values of the input current, the input voltage, the output current, and the output voltage at each first sampling time so that the waveform can be reproduced, and can store information for a long time to some extent. The system frequency, the output power value, the amount of solar radiation, the temperature, the temperature, the values of various parameters, and the operation state are stored for each second sampling time. The internal information stored in the storage circuit 4 is not limited to the above.

  FIG. 2 is a functional block diagram for explaining the internal configuration of the memory circuit 4. The storage circuit 4 includes a storage unit 41, a writing unit 42, a bank changing unit 43, and a reading unit 44.

  The storage unit 41 stores internal information, and is realized by, for example, a RAM or a flash memory that is a non-volatile semiconductor memory. The storage area in the storage unit 41 is divided into four storage areas from the first bank to the fourth bank. The first to fourth banks are divided into two areas: a first area for internal information stored at the first sampling time and a second area for internal information stored at the second sampling time. It has been. Since the first area and the second area have the same storage capacity, the second area can store information about 100 times as long as the first area due to the difference in sampling time. For example, the first area stores information for several seconds, while the second area can store information in minutes. The first area and the second area are divided into a plurality of storage locations, and an address is assigned to each storage location. In FIG. 2, x storage locations are provided, and addresses from “0” to “x−1” are given in order.

  The writing unit 42 writes each information input from the sensors 21 to 27 and the control circuit 3 and the calculated information (internal information) in the storage area of the storage unit 41. The writing unit 42 writes the internal information cyclically in any one of the first to fourth banks until a change command is input from the bank changing unit 43. After writing to the storage location of the last address (address “x-1” in FIG. 2), the write operation is continued after returning to the storage location of the start address (address “0” in FIG. 2). The internal information stored in is overwritten. When a change command is input from the bank changing unit 43, the writing unit 42 changes the writing destination of the internal information to another bank, and performs writing sequentially from the storage location of the start address of the bank. Therefore, the internal information written immediately before the change remains in the bank before the change.

  The first to fourth banks are divided into a first area and a second area, and each area performs writing at different sampling times. Therefore, the writing unit 42 uses the address of the writing destination for the first area. And the address for the second area are managed separately.

  The bank changing unit 43 instructs to change the writing destination of the internal information to another bank. When the detection signal is input from the abnormality detection circuit 6, the bank changing unit 43 outputs a change command to the writing unit 42 and the reading unit 44 after a predetermined time has elapsed since the detection signal was received. The reason why there is a predetermined time between the detection signal reception and the change command output is to store the internal information immediately after the abnormality detection input during this time in the same bank as the internal information immediately before the abnormality detection. Thereby, not only the internal information immediately before the abnormality detection but also the internal information immediately after the abnormality detection can be left. In this embodiment, the internal information for t1 seconds immediately before the abnormality detection and the internal information for t2 seconds immediately after the abnormality detection are left. Generally, in order to analyze the cause of an abnormality, the internal information immediately before the abnormality detection is more important than the internal information immediately after the abnormality detection, and therefore t1 seconds is set longer than t2 seconds. In this embodiment, t1 seconds are set to be several times t2 seconds. It should be noted that t1 seconds and t2 seconds may be set as appropriate depending on how much internal information is left before and after the abnormality detection. For example, if it is sufficient to leave only the internal information immediately before the abnormality detection, a change command may be output immediately upon reception of the detection signal (that is, t2 = 0).

  The first area of each bank has a storage capacity capable of storing internal information for (t1 + t2) seconds. Since the second area of each bank has the same storage capacity as the first area and the sampling time is about 100 times longer, the internal information immediately before the abnormality detection is left in the second area for about 100 times t1 seconds. . However, since the bank change timing is the same as that in the first area, only t2 seconds of internal information is left immediately after the abnormality is detected.

  The reading unit 44 reads internal information from the storage unit 41. The reading unit 44 periodically reads predetermined internal information and outputs it to the communication circuit 5. The communication circuit 5 transmits the input internal information to the management computer D. Also, when there is a request for information provision from the management computer D, the internal information is read and output to the communication circuit 5. Further, when a change command is input from the bank changing unit 43, the reading unit 44 reads the internal information stored in the bank before the change and outputs it to the communication circuit 5. The communication circuit 5 transmits the input internal information to the management computer D as internal information before and after detecting the abnormality. The management computer D performs analysis based on the received internal information to find out the cause of the abnormality.

  The management computer D performs a corresponding process according to the cause of the abnormality. For example, if the cause of the abnormality is due to an instantaneous occurrence of an abnormality in the power system C and is recovered immediately (for example, instantaneous drop or instantaneous change in system frequency), the power conditioner Since no failure has occurred in A, the management computer D restarts the inverter circuit 1. When the cause of the abnormality is damage to the solar battery B, the management computer D informs the administrator to repair the solar battery B. Further, the management computer D associates and accumulates internal information before and after the abnormality detection and the cause of the abnormality, and constructs a database for investigating the cause of the abnormality.

  FIG. 3 is a flowchart for explaining a processing procedure of processing (hereinafter referred to as “write processing”) for writing internal information in the storage unit 41 performed by the storage circuit 4. The writing process is started when the power conditioner A is activated, and is always executed even while the inverter circuit 1 is stopped. In addition, since the writing timing is different between the first area and the second area, the respective writing processes are executed in parallel. Hereinafter, the writing process in the first area will be described (the same applies to FIGS. 4 and 5).

  First, the internal information acquired by the writing unit 42 is written to the storage location of the designated address of the bank currently designated in the storage unit 41 (S1). The writing unit 42 acquires internal information for each sampling time. Further, the bank number and designated address of the designated bank are stored in a RAM or the like. Next, it is determined whether or not an abnormality has been detected, that is, whether or not a detection signal has been input from the abnormality detection circuit 6 (S2). If no abnormality is detected (S2: NO), the process returns to step S1, and the internal information is written at the storage location of the next address. Steps S1 and S2 are repeated until an abnormality is detected.

  If an abnormality is detected (S2: YES), a variable t for measuring time is initialized to “0” (S3). Next, the internal information acquired by the writing unit 42 is written into the currently designated bank of the storage unit 41 (S4), and it is determined whether or not the variable t is equal to or longer than a predetermined time t2 (S5). ). If the variable t is less than t2 (S5: NO), the process returns to step S4. That is, steps S4 and S5 are repeated until t2. As a result, the internal information from immediately after the abnormality detection to t2 is written in the same bank as the internal information immediately before the abnormality detection.

  When the variable t is equal to or greater than t2 (S5: YES), the designated bank is changed (S6), the bank reading process before change (described later) is started, and the process returns to step S1. Note that the writing process performed by the memory circuit 4 is not limited to the one described above.

  FIG. 4 is a diagram for explaining the writing process.

  FIG. 4A shows a state where the currently designated bank is the first bank and internal information is cyclically written in the first bank. The white arrow indicates the currently specified address. In FIG. 9A, an address “y” is designated.

  FIG. 4B shows a state in which an abnormality is detected after the internal information is stored at the storage location of the address “y” and the internal information has been written z times until t2. Internal information after abnormality detection is written up to the storage location of the address “y + z”.

  FIG. 4C shows a state in which the bank immediately after FIG. The designated bank becomes the second bank, and the address “0” of the second bank is designated. Thereafter, the internal information is cyclically written to the second bank. In the first bank, the internal information before and after the abnormality detection remains stored.

  Next, a process performed by the storage circuit 4 to read internal information before and after the abnormality detection from the storage unit 41 (“read process”) will be described. The reading process is started when an abnormality is detected during the writing process and the bank is changed (see step S6 in FIG. 3).

  In the reading process, the stored internal information is sequentially read from the storage position of the address next to the address written at the end of the bank before the change. In the case of FIG. 4, internal information from the storage location of the address “y + z + 1” in the first bank to the storage location of the address “x−1” is read in order, and then the storage location of the address “0” starts to the address “y + z”. The internal information up to the storage position is read out. Among these, the internal information of the storage positions of the addresses “y + z + 1” to “x−1” and “0” to “y” corresponds to the internal information written during the time t1 immediately before the abnormality detection, and the address “y + 1”. ”To“ y + z ”storage information (see the stippled area in FIG. 4) corresponds to the internal information written during the time t2 immediately after the abnormality detection. In the case of the second area, the internal information of the storage locations of the addresses “y + z + 1” to “x−1” and “0” to “y” is written immediately before the abnormality detection (a time about 100 times the time t1). The internal information read out as information and written during time t2 immediately after the abnormality detection is read out from the storage position after the address “y + 1”.

  The number of cycles of cyclic writing in the changed bank since the bank was changed is counted and stored in the RAM or the like. For example, the variable C is initialized to “1” when the bank is changed, and “1” is added to the variable C after the internal information is written in the storage location of the last address. When the bank is changed while the variable C is “2” or more, all the internal information written during the time t1 immediately before the abnormality detection is stored in the bank before the change. Can be read. However, when the bank is changed while the variable C is “1”, part of the internal information written during the time t1 immediately before the abnormality detection is stored in the previous bank. For example, when an abnormality is detected when writing from the fourth bank to the first bank and writing in the first cycle (C = 1) of the first bank, a part of the internal information immediately before the abnormality is detected is transferred to the fourth bank. It is also necessary to read from.

  Next, processing when an abnormality is detected again during the writing of internal information during time t2 immediately after the abnormality detection (in the loop of steps S4 and S5 in FIG. 3) will be described with reference to FIG. To do.

  FIG. 5A shows a state in which an abnormality is detected after the internal information is stored at the storage location of the address “y”, and the abnormality is detected again after the internal information is stored at the storage location of the address “y ′”. Is shown. In this case, separately from the variable t, a variable t ′ for measuring time is initialized to “0” and time measurement is started. The writing to the first bank is continued from the first abnormality detection to the storage location of the address “y + z” from t2.

  FIG. 6B shows a state in which the internal information is written z times from the second abnormality detection (t ′ = 0) to t2 after FIG. Internal information after the second abnormality detection is written up to the storage position of the address “y′-y−1” in the second bank. Since the internal information after the second abnormality detection has already been written (y + z−y ′) times in the storage locations from the addresses “y ′ + 1” to “y + z” in the first bank, The remaining (y′−y) {= z− (y + z−y ′)} times are written.

  FIG. 4C shows a state in which the bank immediately after FIG. The designated bank is the third bank, and the address “0” of the third bank is designated. Thereafter, the internal information is cyclically written to the third bank. Internal information before and after the first abnormality detection is left in the first bank, and internal information before and after the second abnormality detection is left in the first bank and the second bank.

  The internal information read process before and after the first abnormality detection stored in the first bank is the same as the above read process. The internal information reading process before and after the second abnormality detection (hereinafter referred to as “second reading process”) will be described below. The second reading process is started when there is a second abnormality detection and the bank is changed.

  In the second reading process, internal information from the storage location of the address “y ′ + z + 1” in the bank before change (the first bank in FIG. 5) to the storage location of the address “x−1” is read in order. Note that the read start position of the first bank is the address “y ′ + z + 1” next to the last address “y ′ + z” that should have been written to the first bank when the first abnormality was not detected. Become. Subsequently, internal information from the storage location of the address “0” of the first bank to the storage location of the address “y + z” is read. Then, internal information from the storage position of the address “0” in the bank before the change (second bank in FIG. 5) to the storage position of the address “y′−y−1” is read in order. Among these, the internal information of the storage positions of the addresses “y ′ + z + 1” to “x−1” and “0” to “y ′” of the first bank is written during the time t1 immediately before the second abnormality detection. The storage locations of the addresses “y ′ + 1” to “y + z” of the first bank and the addresses “0” to “y′−y−1” of the second bank (see the hatched area in FIG. 6) ) Corresponds to the internal information written during the time t2 immediately after the second abnormality detection.

  According to the present embodiment, internal information is cyclically written in one bank while no abnormality is detected. When an abnormality is detected, the bank into which the internal information is written is changed to another bank. Therefore, it is possible to prevent the internal information written immediately before the abnormality is detected from being overwritten.

  In addition, since the bank change timing is set to be after a predetermined time from the time when the abnormality is detected, the internal information immediately after the abnormality is detected can be left in the same bank. Thereby, the internal information before and after the abnormality detection can be left without being overwritten, and can be used for investigating the cause of the abnormality.

  In this embodiment, the instantaneous values of the input current, input voltage, output current, and output voltage are sampled at the first sampling time and written to the first area, and the system frequency, output power value, solar radiation amount, temperature, The temperature, the values of various parameters, and the operating state are written in the second area for each second sampling time that is about 100 times longer than the first sampling time. Therefore, while storing the instantaneous values of the input current, input voltage, output current, and output voltage so that the waveform can be reproduced, other internal information can be stored for a long time. Thereby, each waveform before and after the abnormality detection can be referred to, and a long-time change state can be referred to regarding the system frequency and the amount of solar radiation before the abnormality detection.

  In the first embodiment, the case where four banks are provided in the storage unit 41 has been described. However, the present invention is not limited to this. Instead of providing four banks, one storage area may be divided into four storage areas, and an area in which writing is circulated may be distinguished by an address. For example, FIG. 6 shows that one storage area has addresses “0” to “x−1”, addresses “x” to “2x−1”, addresses “2x” to “3x−1”, and addresses “3x” to “3x”. An example divided into “4x−1” areas is shown. In this case, for example, the writing is cyclically performed to the storage positions of the addresses “0” to “x−1”, the next writing address is set to “x” after the elapse of time t2 after the abnormality is detected, and then the address You may make it write in the memory position of "x"-"2x-1" cyclically. Also, a plurality of storage units 41 having one storage area are provided, and writing is performed cyclically in the storage area of one storage unit 41. When an abnormality is detected, the write destination is stored in another storage unit 41. You may make it switch to a storage area. In short, if writing is performed cyclically in one storage area, old internal information is overwritten by new internal information, so if an abnormality is detected, the write destination is changed from the previous circular write area. By switching to another circular writing area, the internal information written before the switching may be prevented from being overwritten.

  In the first embodiment, since four banks are provided in the storage unit 41, internal information before and after the abnormality detection can be left until the abnormality is detected three times. The number of banks to be provided is not limited to four and may be two or more. However, if there are only two banks, the internal information before and after the first abnormality detection is overwritten if the next abnormality is detected and the bank is changed before the internal information before and after the first abnormality detection is read. There is a possibility of being. Further, when many banks are provided, a large storage capacity is required. Therefore, it is appropriate that the number of banks provided is about four.

  In the first embodiment, the case where the internal information stored in the entire bank before the change is read when an abnormality is detected and the bank is changed has been described. However, the present invention is not limited to this. When the storage capacity of each bank can store internal information for time (t1 + t2) or more, it is not necessary to read the entire bank, only internal information corresponding to time t1 immediately before abnormality detection and time t2 immediately after abnormality detection. Read it out.

  In the first embodiment, the case where the first area and the second area are provided in each bank and internal information having different sampling times is written separately has been described. However, the present invention is not limited to this. All internal information may be acquired and written at the same sampling time. Also, when storing only the instantaneous values of input current, input voltage, output current, and output voltage, or when storing only system frequency, output power value, solar radiation, temperature, temperature, various parameter values, and operating status The internal information may be acquired at the same sampling time. Also, three or more types of sampling times may be set, and internal information to be stored at each sampling time may be stored.

  In the first embodiment, the case where the management computer D analyzes the internal information read by the reading unit 44 when an abnormality is detected has been described. However, the present invention is not limited to this. As shown in FIG. 7A, the internal information read by the reading unit 44 (storage circuit 4) at the time of abnormality detection is analyzed by the analysis circuit 7 inside the power conditioner A, and the analysis result is displayed on the display circuit 8. You may do it. In addition, as shown in FIG. 7B, the communication circuit 5 may transmit the analysis result to the management computer D. In FIGS. 7A and 7B, the description of the parts common to the power conditioner A shown in FIG. 1 is omitted.

  In the said 1st Embodiment, although the case where the power conditioner which concerns on this invention was used for the solar energy power generation system was demonstrated, it is not restricted to this. For example, the power conditioner according to the present invention may be used in a power generation system or a fuel cell system that generates power using natural energy such as a wind power generation system. Also in these cases, the internal information written before and after the abnormality detection can be left without being overwritten, and can be used for investigating the cause of the abnormality.

  The power conditioner and the storage method according to the present invention are not limited to the above-described embodiments. The specific configuration of each part of the power conditioner and the storage method according to the present invention can be modified in various ways.

A power conditioner 1 inverter circuit 21 DC current sensor 22 DC voltage sensor 23 current sensor 24 voltage sensor 25 solar radiation sensor 26 temperature sensor 27 temperature sensor 3 control circuit 4 storage circuit 41 storage unit (storage means)
42 Writing section (writing means)
43 Bank changing section (storage area changing means)
44 Reading section (reading means)
5 Communication circuit (communication means)
6 Abnormality detection circuit (abnormality detection means)
7 Analysis circuit 8 Display circuit B Solar battery C Power system D Management computer

Claims (12)

A power conditioner that converts DC power into AC power by an inverter circuit and outputs the power,
Storage means having a plurality of storage areas;
Writing means for sequentially writing the acquired information in one storage area of the storage areas;
An anomaly detecting means for detecting an anomaly;
A storage area changing means for changing a storage area for writing information to another storage area when an abnormality is detected by the abnormality detection means;
Equipped with a,
The writing means cyclically writes the acquired information in order in the changed storage area.
A power conditioner characterized by that. The storage area changing means changes the storage area to which the information is written to another storage area after a predetermined time has elapsed since the abnormality was detected by the abnormality detection means.
The power conditioner according to claim 1. The predetermined time is a time for writing information less than half of a storage capacity of a storage area in which the information is written.
The power conditioner according to claim 2. When the storage area is changed by the storage area changing means, reading means for reading information stored in the storage area before being changed,
A communication means for transmitting the read information;
Further equipped with,
The power conditioner according to any one of claims 1 to 3. When the storage area is changed by the storage area changing means, reading means for reading information stored in the storage area before being changed,
Analyzing means for analyzing the read information;
Further equipped with,
The power conditioner according to any one of claims 1 to 3. The abnormality detection means detects any one of a short circuit, ground fault, isolated operation, voltage drop, frequency abnormality, overvoltage, overcurrent, and temperature abnormality as an abnormality.
The power conditioner in any one of Claim 1 thru | or 5. The writing means cyclically writes information detected every first sampling time and information detected every second sampling time longer than the first sampling time;
The power conditioner in any one of Claim 1 thru | or 6. Information detected at each first sampling time is electrical information about input and output of the inverter circuit.
The power conditioner according to claim 7. The information detected every second sampling time is an output power value of the inverter circuit.
The power conditioner according to claim 7 or 8.   The power conditioner according to claim 1, wherein the storage unit has four storage areas. Converts the DC power output by the solar cell and outputs it to the power system.
The power conditioner in any one of Claims 1 thru | or 10. A storage method for storing electrical information about input / output of an inverter circuit in a storage means,
The storage means has a plurality of storage areas,
A first step of cyclically writing the acquired information in order in one of the storage areas;
A second step of detecting an abnormality;
A third step of changing a storage area in which information is written to another storage area when an abnormality is detected;
Equipped with a,
In the storage area after the change, the acquired information is written cyclically in order.
And a storage method.