JP6255334B2 - Method for manufacturing thin film transistor having fringe field switching structure - Google Patents

Description

  The present invention relates to a method of manufacturing a thin film transistor having a fringe field switching structure.

  FIG. 3 is a cross-sectional view showing a laminated structure of a conventional thin film transistor (TFT). As shown in FIG. 3, a conventional TFT has a gate electrode 102, a gate insulating film 103, amorphous silicon (a-Si) 104, a source / drain electrode 105, a buffer layer 106, a first interlayer on a glass substrate 101. The insulating film 107a, the common electrode 108, the second interlayer insulating film 107b, and the pixel electrode 109 are sequentially stacked.

  FIG. 4 is an explanatory diagram showing a process of forming the common electrode 108, the second interlayer insulating film 107b, and the pixel electrode 109 on the first interlayer insulating film 107a in the conventional TFT. In the conventional TFT, silicon nitride is used as the second interlayer insulating film 107 b between the common electrode 108 and the pixel electrode 109.

  Details of the process shown in FIG. 4 will be described. First, in FIG. 4A, the common electrode 108 is formed on the first interlayer insulating film 107a. A photoresist is applied thereon, exposed through a photomask, dipped in a developer, and the photoresist is developed. Then, after patterning the common electrode in the etching process, the photoresist is stripped in the stripping process.

  Next, in FIG. 4B, a silicon nitride film is formed as the second interlayer insulating film 107b, a photoresist is applied thereon, then exposed through a photomask, immersed in a developer, Develop photoresist. After development, post-baking is performed to cure the photoresist, and then the silicon nitride is patterned in an etching process, and then the photoresist is peeled off.

  Further, in FIG. 4C, indium tin oxide (ITO) is formed as the pixel electrode 109. After the film formation, a photoresist is applied on the ITO, exposed through a photomask, and then immersed in a developer. Develop the photoresist. After development, the photoresist is cured in a post-bake process, and after patterning ITO in the etching process, the photoresist is stripped in a stripping process, thereby completing the TFT.

  For example, Patent Document 1 (Japanese Patent Laid-Open No. 06-061490) and Patent Document 2 (Japanese Patent Laid-Open No. 07-0666415) are cited as related technologies.

  Silicon nitride used as the second interlayer insulating film 107b needs to be formed using a vacuum apparatus. Moreover, the TFT forming process according to the prior art has a very large number of processes as described above. For these reasons, there has been a problem that initial investment and running cost are increased.

  In contrast, the applicant has proposed a laminated structure of TFTs having a fringe field switching (FPS) structure as shown in FIG. 5 includes a gate electrode 202, a gate insulating film 203, amorphous silicon 204, a source / drain electrode 205, a buffer layer 206, a first interlayer insulating film 207a, a common electrode 208, and a second interlayer on a glass substrate 201. The insulating film 207b and the pixel electrode 209 are sequentially stacked.

  FIG. 6 shows a process of manufacturing the common electrode 208, the second interlayer insulating film 207b, and the pixel electrode 209 of the TFT shown in FIG. First, in FIG. 6A, the common electrode 208 is formed on the first interlayer insulating film 207a and on the source / drain electrode 205 exposed from the openings of the buffer layer 206 and the first interlayer insulating film 207a. A layer for forming is formed. Thereafter, a photosensitive high dielectric constant organic insulating film is applied on the layer for forming the common electrode 208.

  Next, the photosensitive high dielectric constant organic insulating film is exposed and developed through a photomask to form a second interlayer insulating film 207b in a portion other than the opening. Thereafter, using the second interlayer insulating film 207b as a mask, the layer for forming the common electrode 208 is etched to remove the layer for forming the common electrode 208 in the opening, thereby forming the common electrode 208. To do.

  Further, the second interlayer insulating film 207b is subjected to a reflow process, and a post baking process is performed in which the end of the etched common electrode 208 is covered with the second interlayer insulating film 207b.

  Finally, in FIG. 6B, after the pixel electrode 209 is formed, a photoresist is applied thereon, exposed through a photomask, immersed in a developer, and the photoresist is developed. Thereafter, the pixel electrode 209 is etched and patterned, and then the photoresist is removed to complete the TFT.

  As a result, the manufacturing process is simplified, and cost reduction and productivity improvement can be realized.

  In the TFT manufacturing method as described above, after the common electrode 208 is formed by etching, the source / drain electrode 205 is exposed to the atmosphere. When heating is performed in this state and a reflow process is performed at 230 ° C. for 30 minutes, for example, the metal constituting the source / drain electrode 205 may be oxidized and an oxide may be formed. As a result, the resistance value of the metal increases.

  When the pixel electrode 209 is formed when the oxide is formed, the oxide is interposed between the pixel electrode 209 and the source / drain electrode 205. Then, the contact resistance at the interface between the pixel electrode 209 and the source / drain electrode 205 is increased, and a contact failure may occur, which may cause a display failure of the liquid crystal display device.

  Further, if an oxide is present on a pad electrode (not shown), there is a possibility that the image display itself is not normally performed in the liquid crystal display device.

  Such oxidation of the source / drain electrode 205 and the pad electrode is caused by heating and firing the metal in an air atmosphere, that is, in an atmosphere where oxygen is present. Therefore, if the reflow treatment is performed in an inert atmosphere such as nitrogen, oxides are not generated, and the above problem does not occur. However, in order to perform the reflow process in an inert atmosphere such as nitrogen, it is necessary to add or modify the manufacturing apparatus.

  Even if the manufacturing apparatus is added or modified, the oxidation of the metal cannot be prevented unless the substrate is loaded and unloaded at a certain temperature or lower. Therefore, it takes time to raise and lower the temperature to a certain temperature, and productivity is lowered.

  The present invention provides a source including a layer including a first interlayer insulating film, a second interlayer insulating film on the layer including the first interlayer insulating film, and a layer including the first interlayer insulating film. A drain electrode; a common electrode disposed between the layer including the first interlayer insulating film and the second interlayer insulating film; and a pixel electrode disposed on the second interlayer insulating film. A layer including the first interlayer insulating film and the second interlayer insulating film each having an opening communicating with each other on the source / drain electrodes, and a method of manufacturing a thin film transistor having a fringe field switching structure. A layer for forming the common electrode on the layer including the first interlayer insulating film and on the source / drain electrodes exposed from the opening of the layer including the first interlayer insulating film. Forming the co Applying the second interlayer insulating film on the layer for forming the second electrode so as to avoid the opening of the layer including the first interlayer insulating film; and masking the second interlayer insulating film Etching the layer for forming the common electrode, forming the common electrode, treating the second interlayer insulating film, and covering the end of the common electrode with the second interlayer insulating film Performing an oxide removal treatment on the source / drain electrode through each of the openings, and forming the pixel electrode to connect to the source / drain electrode through each of the openings; A method for manufacturing a thin film transistor having a fringe field switching structure is provided.

  The source / drain electrode may be copper.

  The process of the second interlayer insulating film may be a reflow process, and the reflow process may be performed in an air atmosphere.

  The oxide removal treatment of the source / drain electrodes is an etching treatment, and the etching treatment may be performed at 40 ° C. for 90 to 150 seconds using an etching solution containing 5% oxalic acid.

  The oxide removal process of the source / drain electrode may be an etching process, and the etching of the common electrode may be performed under the same conditions using the same etching solution as the etching of the source / drain electrode.

 According to the present invention, the following effects can be obtained.

  That is, the oxide can be removed without adding or modifying the device.

  In a preferred embodiment, a large increase in the manufacturing process can be prevented.

  In a preferred mode, since the chemical solution used in the existing apparatus can be used, it is not necessary to change the chemical solution or add a new chemical solution.

It is sectional drawing which shows the laminated structure of TFT shown as embodiment of this invention. The manufacturing method of TFT shown as embodiment of this invention is shown. It is sectional drawing which shows the laminated structure of the conventional TFT. A conventional TFT manufacturing method will be described. It is sectional drawing which shows the laminated structure of TFT which the applicant proposed. The TFT manufacturing method proposed by the applicant will be described.

  Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a cross-sectional view showing a laminated structure of TFT 1 shown as an embodiment of the present invention.
1 includes an insulating film 3, a titanium-molybdenum (MoTi) layer 4, a source / drain electrode 5, a buffer layer 6, a first interlayer insulating film 7a, a common electrode 8, a second interlayer insulating film 7b, and a pixel electrode. 9 are sequentially stacked.

The first interlayer insulating film 7a and the second interlayer insulating film 7b have openings on the source / drain electrode 5 that communicate with each other.
A pad electrode 11 is formed under the insulating film 3 so as to be exposed from an opening formed by a layer above the insulating film 3, and a MoTi layer 10 is formed thereunder.

  In the present invention, copper is used as the pad electrode 11 and the source / drain electrode 5, silicon nitride is used as the insulating film 3 and the buffer layer 6, and PAC (Photo Active Compound) is used as the first interlayer insulating film 7a and the second interlayer insulating film 7b. For example, indium tin oxide (ITO) is used as the common electrode 8 and the pixel electrode 9, but other materials may be used.

FIG. 2 shows a manufacturing method of the TFT 1 shown as an embodiment of the present invention.
First, in FIG. 2A, the pad electrode 11 and the source / drain electrode exposed on the first interlayer insulating film 7a and from the openings of the insulating film 3, the buffer layer 6, and the first interlayer insulating film 7a. A layer 8a for forming the common electrode 8 is formed on 5 by depositing ITO. Thereafter, a photosensitive high dielectric constant organic insulating film is applied on the layer 8 a for forming the common electrode 8. Thereafter, the photosensitive high dielectric constant organic insulating film is exposed and developed through a photomask, and the second interlayer insulating film 7b is formed so as to avoid the opening.

  Next, in FIG. 2B, using the second interlayer insulating film 7b as a mask, the layer 8a for forming the common electrode 8 is etched, and the common over the pad electrode 11 and the source / drain electrode 5 is processed. The common electrode 8 is formed by removing the layer 8 a for forming the electrode 8. Etching is performed, for example, at 40 ° C. for 90 to 150 seconds using an etchant containing 5% oxalic acid, but is not limited thereto.

  Further, in FIG. 2C, the second interlayer insulating film 7b is reflowed at 230 ° C. for 30 minutes, for example, and the etched end portion of the common electrode 8 is covered with the second interlayer insulating film 7b. Perform post-baking. In the present invention, since the reflow process is performed in an air atmosphere, the pad electrode 11 and the source / drain electrode 5 are exposed to the air. Therefore, when the reflow process is performed, the copper constituting the pad electrode 11 and the source / drain electrode 5 may be oxidized to form the copper oxide 12.

  In order to remove the copper oxide 12, as shown in FIG. 2D, an oxide removing process, that is, etching is performed on the source / drain electrode 5 and the pad electrode 11 through the opening. Process. Etching is performed, for example, at 40 ° C. for 90 to 150 seconds using an etching solution containing 5% oxalic acid. That is, the removal of the copper oxide 12 is performed under the same etching solution and the same conditions as the etching process of the common electrode 8.

  Finally, as shown in FIG. 2 (e), after the pixel electrode 9 is formed, a photoresist is applied thereon, exposed through a photomask, immersed in a developing solution, and the photoresist is developed. To do. Thereafter, the pixel electrode 9 is etched and patterned, and the pixel electrode 9 is formed so as to be connected to the source / drain electrode through the opening, and then the photoresist is peeled off to complete the TFT 1.

  In the manufacturing method of the TFT 1 described above, the copper oxide 12 is effectively removed in the step shown in FIG. The surface of the new copper exposed by removing the copper oxide 12 has low contact resistance and good conduction. Therefore, it is possible to prevent problems such as display defects of the liquid crystal display device.

  Further, in the above manufacturing method, since the step of removing the copper oxide 12 is added, it is not necessary to perform the reflow process in an inert atmosphere such as nitrogen, and it is possible to perform it in the air atmosphere. Therefore, there is no need to add or modify the manufacturing apparatus.

  Moreover, the process added in said manufacturing method is only one process. In addition, in the manufacturing method described above, since it is not necessary to prevent copper oxidation, it is not necessary to insert and remove the substrate at a certain temperature or lower, that is, it is necessary to raise or lower the temperature to a certain temperature. Disappear. Therefore, it is possible to prevent a decrease in productivity.

  Further, in the above manufacturing method, the removal of the copper oxide 12 is performed under the same etching solution and the same conditions as the etching process of the common electrode 8, that is, using the chemical solution, equipment, and settings used in the existing apparatus. Therefore, there is no need to change chemicals, equipment or settings, or add new chemicals.

  The preferred embodiments of the present invention have been described in detail above. However, those skilled in the art will understand that various modifications and equivalent embodiments are possible from this. .

  Therefore, the scope of right of the present invention is not limited to this, and various modifications and improvements of those skilled in the art using the basic concept of the present invention defined in the claims are also included in the present invention.

1 TFT
3 Insulating film 4 Titanium-molybdenum (MoTi) layer 5 Source / drain electrode 6 Buffer layer 7a First interlayer insulating film 8 Common electrode 7b Second interlayer insulating film 9 Pixel electrode 10 Titanium-molybdenum (MoTi) layer 11 Pad electrode 12 Oxidation object

Claims (5)

A layer including a first interlayer insulating film;
A second interlayer insulating film on the layer including the first interlayer insulating film;
A source / drain electrode disposed under a layer including the first interlayer insulating film;
A common electrode disposed between the layer including the first interlayer insulating film and the second interlayer insulating film;
A pixel electrode disposed on the second interlayer insulating layer;
And a layer including the first interlayer insulating film and the second interlayer insulating film each having an opening communicating with each other on the source / drain electrode. There,
A layer for forming the common electrode is formed on the layer including the first interlayer insulating film and on the source / drain electrode exposed from the opening of the layer including the first interlayer insulating film. To do,
Applying the second interlayer insulating film on the layer for forming the common electrode so as to avoid the opening of the layer including the first interlayer insulating film;
Etching the layer for forming the common electrode using the second interlayer insulating film as a mask to form the common electrode;
Treating the second interlayer insulating film and covering an end of the common electrode with the second interlayer insulating film;
Removing oxide on the source / drain electrode through each of the openings;
Forming the pixel electrode to be connected to the source / drain electrode through each of the openings;
A method for manufacturing a thin film transistor having a fringe field switching structure.   The method of manufacturing a thin film transistor according to claim 1, wherein the source / drain electrodes are copper.   3. The method of manufacturing a thin film transistor according to claim 1, wherein the process of the second interlayer insulating film is a reflow process, and the reflow process is performed in an air atmosphere.   The oxide removal treatment of the source / drain electrodes is an etching treatment, and the etching treatment is performed at 40 ° C. for 90 to 150 seconds using an etching solution containing 5% oxalic acid. The manufacturing method of the thin-film transistor as described in any one.   The oxide removal treatment of the source / drain electrode is an etching treatment, and the etching of the common electrode is performed under the same conditions using the same etching solution as the etching of the source / drain electrode. 5. The method for producing a thin film transistor according to claim 4.

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