JP6240267B2 - Solar cell module - Google Patents

Description

  The present invention relates to a solar cell module.

  Recently, there is a growing interest in alternative energy to replace existing energy resources, such as oil and coal, as predicted. Thereby, the solar cell which produces electric energy from solar energy attracts attention.

  A general solar cell includes a semiconductor part that forms a pn junction with different conductive types, such as p-type and n-type, and electrodes that are respectively connected to semiconductor parts with different conductive types. Prepare.

  When light is incident on such a solar cell, a plurality of electron-hole pairs are generated in the semiconductor portion, and the generated electron-hole pairs are separated into electrons and holes that are charges, respectively. The holes move in the direction of the p-type semiconductor part, and the holes move in the direction of the p-type semiconductor part. The moved electrons and holes are collected by different electrodes connected to the n-type semiconductor portion and the p-type semiconductor portion, respectively, and electric power is obtained by connecting these electrodes with electric wires.

  A plurality of such solar cells can be connected to each other by an interconnector and formed into a module.

  An object of the present invention is to provide a solar cell module.

  The solar cell module of the present invention includes a semiconductor substrate doped with a first conductive impurity, an emitter portion doped with a second conductive impurity opposite to the first conductivity, and a first conductive type from the semiconductor substrate. In order to connect a plurality of solar cells in series with each other, a back surface electric field portion doped with a high concentration of impurities, a first electrode connected to the emitter portion, a second electrode connected to the back surface electric field portion, Alternatively, the second electrode is connected to any one of the electrodes via a conductive adhesive, and the other one electrode includes a conductive wiring insulated by an insulating layer. The thickness of the conductive adhesive positioned between the conductive wirings is formed larger than the thickness of the insulating layer positioned between the other one electrode and the conductive wiring.

  Here, the insulating layer and the conductive wiring can be separated from each other.

  Furthermore, a filler that protects the semiconductor substrate from external impacts can be further located in the spaced space between the insulating layer and the conductive wiring.

  Here, the insulating layer may include at least one of epoxy, polyimide, or silicon. At this time, the material of the filler may be different from the material of the insulating layer.

  As an example, the filler may be EVA (EVA, ethylene vinyl acetate).

  Further, the material of the conductive adhesive may include tin (Sn), and the conductive adhesive may be a solder paste, an epoxy solder paste, or a conductive paste. Any one of them can be formed.

  In addition, each of the first and second electrodes may include a conductive adhesive and another metal material.

  As an example, each of the first and second electrodes is made of titanium (Ti), silver (Ag), aluminum (Al), nickel-vanadium alloy (NiV), nickel, nickel-aluminum alloy (NixAly), molybdenum (Mo). Of tin (Sn), at least one material may be formed of at least one layer.

  In addition, the conductive wiring is coated on a core including at least one material of copper (Cu) or aluminum (Al) and a surface of the core, and can include a coating layer including tin (Sn).

  As an example, the coating layer may include at least one of SnPb, SnAgCu, SnBiAg, SnBi, Sn, or SnAg, the thickness of the core is between 50 μm and 250 μm, and the thickness of the coating layer is It can be between 1 μm and 30 μm.

  The thickness of the conductive adhesive may be between 10 μm and 100 μm, and the thickness of the insulating layer may be between 1 μm and 50 μm.

  In the solar cell module according to the present invention, the thickness of the conductive adhesive located between any one of the electrodes and the conductive wiring is insulated from the other one electrode and the conductive wiring. By forming it thicker than the thickness of the layer, short circuit of the solar cell module can be prevented, and durability can be further improved.

It is an example of the shape which looked at the string applied to the solar cell module which concerns on this invention from the back surface. It is a partial perspective view which shows an example of the solar cell applied to FIG. FIG. 3 shows a cross section in a second direction (y) of the solar cell shown in FIG. 2. FIG. 1 is a sectional view taken along the line CSx1-CSx1. FIG. 5 is a diagram for more specifically describing the thickness (TCA) of the conductive adhesive (CA) and the thickness (TIL) of the insulating layer (IL) described in FIGS. 1 and 4. FIG. 2 is an enlarged view of a portion K1 in FIG. 1 in order to explain the planar shape of the conductive adhesive and the insulating layer. The solar cell module which concerns on this invention is sectional drawing which was encapsulated by the lamination process. The structure in which the space between the insulating layer (IL) and the conductive wiring is filled with the filler (EVA) by the laminating process is shown in detail.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the embodiments of the present invention. However, the present invention can be implemented in various forms and is not limited to the embodiments described herein. In order to clearly describe the present invention in the drawings, portions not related to the description are omitted, and similar portions are denoted by similar reference numerals throughout the specification.

  In the drawing, the thickness is shown enlarged to clearly show a plurality of layers and regions. When parts such as layers, films, regions, plates, etc. are “on top” of other parts, this includes not only the case of other parts “above”, but also cases where there are other parts in between . Conversely, when any part is “directly above” another part, it means that there is no other part in the middle. In addition, when any part is formed “overall” on another part, it should not be formed not only on the whole surface of the other part but also on a part of the end. Means.

  In the following, the front surface may be one surface of the semiconductor substrate 110 on which direct light is incident, and the back surface is the opposite of the semiconductor substrate 110 on which reflected light is not incident or direct light is not incident. It can be a surface.

  1-6 is a figure for demonstrating an example of the solar cell module which concerns on this invention.

  Here, FIG. 1 is an example of the shape of the string applied to the solar cell module according to the present invention as seen from the back.

  As shown in FIG. 1, the solar cell module according to the present invention includes a plurality of solar cells (C1, C2) and a plurality of first and second electrodes formed on the back surfaces of the plurality of solar cells (C1, C2). C141, C142) connected to a plurality of first conductive wirings (CW1), a plurality of second conductive wirings (CW2), and a plurality of first and second conductive wirings (CW1, CW2). And an inter-cell connector (IC) for connecting a plurality of solar cells (C1, C2) in series.

  Here, each of the plurality of solar cells (C1, C2) is separated from at least the semiconductor substrate 110 and the back surface of the semiconductor substrate 110, and is formed to extend long in the first direction (x). C141) and a plurality of second electrodes (C142).

  Further, the plurality of conductive wirings (CW1, CW2) include a plurality of first electrodes (C141) provided in any one of two solar cells adjacent to each other among the plurality of solar cells. The plurality of second electrodes (C142) included in the remaining one solar cell can be electrically connected in series with each other.

  Therefore, the plurality of conductive wirings (CW1, CW2) extend long in the second direction (y) intersecting the first direction (x) in the length direction of the first and second electrodes (C141, C142), It can be connected to each of a plurality of solar cells.

  As an example, the plurality of conductive wirings (CW1, CW2) may include a first conductive wiring (CW1) and a second conductive wiring (CW2). As shown in FIG. (CW1) is connected to the first electrode (C141) provided in each solar cell via a conductive adhesive (CA) and insulated from the second electrode (C142) by an insulating layer (IL) made of an insulating material. can do.

  Further, the second conductive wiring (CW2) is connected to the second electrode (C142) provided in each solar cell via a conductive adhesive (CA), and is formed by an insulating layer (IL) made of an insulating material. It can be insulated from one electrode (C141).

  At the same time, each of the first and second conductive wirings (CW1, CW2) is connected to an inter-cell connector arranged to extend in the first direction (x) between the plurality of solar cells. Can do. Thereby, the plurality of solar cells can be connected in series with each other in the second direction (y).

  The plurality of first and second conductive wirings (CW1, CW2) may have a shape of a conductive wire having a circular cross section or a ribbon shape having a line width larger than a thickness.

  As an example, when the first and second conductive wirings (CW1, CW2) have a ribbon shape, the line width of each of the first and second conductive wirings (210, 220) is the line resistance of the conductive wiring. The first and second conductive wirings (CW1 and CW2) are formed with a line width of 0.5 mm to 2.5 mm in consideration of minimizing the manufacturing cost while maintaining low enough. And the thickness may be formed between 0.05 mm and 0.5 mm.

  Further, in consideration of the total number of the first and second conductive wirings (CW1, CW2), the first conductive wiring (CW1) and the second conductive are not damaged in order not to damage the short circuit current of the solar cell module. The distance between the conductive wiring (CW2) can be formed between 4 mm and 6.5 mm.

  Further, FIG. 1 shows an example in which the number of the first and second conductive wirings (CW1, CW2) is three, but the first and second conductive wirings (substantially in this way) CW1, CW2) The number of each connected to one solar cell may be 10-20. Therefore, the total number of the first and second conductive wirings (CW1, CW2) connected to one solar cell may be 20 to 40.

  In such a solar cell module according to the present invention, the thickness of the conductive adhesive (CA) located between any one of the electrodes and the conductive wiring is between the other one electrode and the conductive wiring. It can be made thicker than the thickness of the insulating layer (IL) located at.

  By doing in this way, it is possible to prevent in advance a disconnection in which a part of the plurality of conductive wirings (CW1, CW2), the conductive wiring is not connected to an electrode to be electrically connected, and the solar cell module Defects can be further reduced. This will be described in detail later.

  Furthermore, in the solar cell module according to an example of the present invention, a case where a connector between cells is included is shown as an example, and this is described. However, the connector between cells may be omitted, and thus When the inter-cell connector is omitted, the first conductive wiring (CW1) and the second conductive wiring (CW2) are directly connected or integrally formed, and a plurality of solar cells (C1, C2) are formed. It can also be connected in series.

  Here, each of the plurality of solar cells will be described more specifically as follows.

  2 is a partial perspective view showing an example of the solar cell applied to FIG. 1, and FIG. 3 shows a cross section in the second direction (y) of the solar cell shown in FIG.

  As shown in FIGS. 2 and 3, an example of the solar cell according to the present invention includes an antireflection film 130, a semiconductor substrate 110, a tunnel layer 180, an emitter part 121, a back surface field part (172, back surface field, BSF), An intrinsic semiconductor layer 150, a passivation layer 190, a first electrode (C141), and a second electrode (C142) can be provided.

  Here, the antireflection film 130, the intrinsic semiconductor layer 150, the tunnel layer 180, and the passivation layer 190 may be omitted. However, if provided, the efficiency of the solar cell is further improved. The case will be described as an example.

  The semiconductor substrate 110 can be formed of at least one of single crystal silicon and polycrystalline silicon containing impurities of the first conductivity type. As an example, the semiconductor substrate 110 can be formed on a single crystal silicon wafer.

  Here, the first conductivity type may be either one of n-type or p-type conductivity.

  When the semiconductor substrate 110 has p-type conductivity, impurities of a trivalent element such as boron (B), gallium (Ga), and indium (In) are doped into the semiconductor substrate 110. However, when the semiconductor substrate 110 has n-type conductivity, a pentavalent element impurity such as phosphorus (P), arsenic (As), or antimony (Sb) can be doped into the semiconductor substrate 110.

  Hereinafter, a case where the first conductivity type of the semiconductor substrate 110 is n-type will be described as an example.

  Such a semiconductor substrate 110 can have a plurality of irregular surfaces on the front surface. Thereby, the emitter part 121 located on the front surface of the semiconductor substrate 110 can also have an uneven surface.

  Therefore, the amount of light reflected from the front surface of the semiconductor substrate 110 can be reduced, and the amount of light incident on the semiconductor substrate 110 can be increased.

  The antireflection film 130 is located on the front surface of the semiconductor substrate 110 in order to minimize reflection of light incident on the front surface of the semiconductor substrate 110 from the outside, and is made of aluminum oxide (AlOx), silicon nitride. It can be formed of at least one of a film (silicon nitride: SiNx), a silicon oxide film (SiOx), and a silicon oxynitride (SiOxNy).

  The tunnel layer 180 is disposed in direct contact with the entire back surface of the semiconductor substrate 110 and may include a dielectric material. Therefore, the tunnel layer 180 can pass carriers generated in the semiconductor substrate 110 as shown in FIGS.

  The tunnel layer 180 can pass a carrier generated in the semiconductor substrate 110 and perform a passivation function on the back surface of the semiconductor substrate 110.

  Furthermore, the tunnel layer 180 can be formed of a dielectric material made of SiCx or SiOx that is highly durable even at a high temperature process of 600 ° C. or higher. However, in addition to this, it can be formed of silicon nitride film (SiNx), hydrogenated silicon nitride film (SiNx), aluminum oxide film (AlOx), silicon oxynitride film (SiOxNy), or hydrogenated SiOxNy. The thickness of the tunnel layer 180 can be formed between 0.5 nm and 2.5 nm.

  The emitter unit 121 is disposed on the back surface of the semiconductor substrate 110, and as an example, the emitter unit 121 is directly in contact with a part of the back surface of the tunnel layer 180, and a plurality of the emitter units 121 are disposed long in the first direction (x). The emitter 121 can be formed of a polycrystalline silicon material having the opposite second conductivity type, and the emitter 121 can form a pn junction with the semiconductor substrate 110 with the tunnel layer 180 interposed therebetween.

  Since each emitter part 121 forms a pn junction with the semiconductor substrate 110, the emitter part 121 can have a p-type conductivity. However, unlike the example of the present invention, when the semiconductor substrate 110 has a p-type conductivity, the emitter portion 121 has an n-type conductivity. In this case, the separated electrons can move in the direction of the plurality of emitter portions 121, and the separated holes can move in the direction of the plurality of back surface electric field portions 172.

  When the plurality of emitter parts 121 have p-type conductivity, the emitter part 121 may be doped with impurities of a trivalent element, and conversely, when the plurality of emitter parts 121 have n-type conductivity type. The emitter part 121 may be doped with an impurity of a pentavalent element.

  The back surface electric field portion 172 is disposed on the back surface of the semiconductor substrate 110, and as an example, in the back surface of the tunnel layer 180, the back surface electric field portion 172 is in direct contact with a part of the region separated from each of the plurality of emitter portions 121 described above. The plurality can be formed to be long in the first direction (x) parallel to the emitter portion 121.

The back surface field portion 172 may be formed of a polycrystalline silicon material doped with a first conductivity type impurity at a higher concentration than the semiconductor substrate 110. Thus, for example, when the substrate is doped with an n-type impurity, the plurality of back surface field portions 172 can be n ⁺ impurity regions.

  The back surface field portion 172 obstructs hole movement in the direction of the back surface field portion 172, which is the direction of electron movement, by a potential barrier caused by a difference in impurity concentration between the semiconductor substrate 110 and the back surface field portion 172. On the other hand, movement of carriers (for example, electrons) in the direction of the back surface electric field portion 172 can be facilitated.

  Accordingly, the back surface field 172 and the vicinity thereof or the first and second electrodes (C141, C142) reduce the amount of charge lost due to recombination of electrons and holes, and accelerate the movement of the electrons. The amount of electron movement to the portion 172 can be increased.

  In FIGS. 2 and 3, the case where the emitter portion and the back surface electric field portion are formed of a polycrystalline silicon material on the back surface of the tunnel layer has been described as an example, but unlike this case, the tunnel layer is omitted. The emitter portion and the back surface electric field portion may be doped by diffusing impurities in the back surface of the semiconductor substrate 110. In such a case, the emitter portion and the back surface electric field portion can be formed of the same single crystal silicon material as that of the semiconductor substrate 110.

  The intrinsic semiconductor layer 150 may be formed on the back surface of the tunnel layer exposed between the emitter portion and the back surface electric field portion. The intrinsic semiconductor layer 150 may be different from the emitter portion 121 and the back surface electric field portion 172. In addition, an intrinsic polycrystalline silicon layer which is not doped with the first conductivity type impurity or the second conductivity type impurity can be formed.

  Further, as shown in FIGS. 2 and 3, each of the both side surfaces of the intrinsic semiconductor layer 150 may have a structure in direct contact with the side surface of the emitter portion 121 and the side surface of the back surface electric field portion 172.

  The passivation layer 190 removes defects due to dangling bonds formed on the back surface of the polycrystalline silicon material layer formed on the back surface electric field portion 172, the intrinsic semiconductor layer 150 and the emitter portion 121, and the semiconductor substrate 110. It is possible to prevent the carriers generated from the recombination due to dangling bonds from disappearing.

  For this purpose, the passivation layer 190 completely covers the back surface of the intrinsic semiconductor layer 150 and covers the remaining portion of the back surface of the emitter portion 121 except the portion to which the first electrode (C141) is connected, Of the back surface of the back surface electric field part 172, it can form so that the remaining part except the part to which the 2nd electrode (C142) was connected may be covered.

  Such a passivation layer 190 may be formed on a dielectric layer, for example, a hydrogenated silicon nitride film (SiNx: H), a hydrogenated silicon oxide film (SiOx: H), or a hydrogenated silicon nitride film (SiNx: H). At least one of a silicon oxynitride film (SiNxOy: H), a hydrogenated silicon oxynitride film (SiOxNy: H), and a hydrogenated amorphous silicon film (a-Si: H) Can be formed.

  The first electrode (C141) is connected to the emitter portion and can be formed to extend long in the first direction (x). Such a 1st electrode (C141) can collect the carriers which moved in the direction of the emitter part 121, for example, a hole.

  The second electrode (C142) is connected to the back surface electric field portion and can be formed to extend in the first direction (x) so as to be parallel to the first electrode (C141). Such a second electrode (C142) can collect carriers that have moved in the direction of the back surface field portion 172, for example, electrons.

  As shown in FIG. 1, each of the first and second electrodes (C141, C142) can be formed to extend in the first direction (x), and the first electrode (C141) and the first electrode (C141) Two electrodes (C142) can be alternately arranged in the second direction (y).

  Further, the thickness (TE1) of the first electrode (C141) may be the same as the thickness (TE2) of the second electrode (C142), and the back surface of the first electrode (C141) from the back surface of the semiconductor substrate 110. The height (HE1) up to (HE1) may be the same as the height (HE2) from the back surface of the semiconductor substrate 110 to the back surface of the second electrode (C142).

  The plurality of first and second electrodes (C141, C142) can be formed by including conductive wiring, conductive adhesive (CA), and other metal materials. As an example, each of the first and second electrodes (C141, C142) includes titanium (Ti), silver (Ag), aluminum (Al), nickel-vanadium alloy (NiV), nickel, nickel-aluminum alloy (NixAly). In addition, at least one material of molybdenum (Mo) and tin (Sn) can be formed of at least one layer.

  The first and second electrodes (C141 and C142) are formed by using any one of a sputtering method, an electron beam evaporator, and an electroless / electrolytic plating method. can do.

  In the solar cell according to the present invention manufactured with such a structure, the holes collected through the first electrode (C141) and the electrons collected through the second electrode (C142) are external circuit devices. Can be used as power for an external device.

  The solar cell applied to the solar cell module according to the present invention is not necessarily limited to FIGS. 2 and 3, and the first and second electrodes (C 141, C 142) provided in the solar cell are only on the back surface of the semiconductor substrate 110. Except for the point formed, other components can be modified in any number.

  For example, in the solar cell module of the present invention, a part of the first electrode (C141) and the emitter 121 are located on the front surface of the semiconductor substrate 110, and a part of the first electrode (C141) is formed on the semiconductor substrate 110. An MWT type solar cell connected to the remaining part of the first electrode (C141) formed on the back surface of the semiconductor substrate 110 through the holes is also applicable.

  As shown in FIG. 1, such a solar cell is connected in series using a conductive wiring and a connector between cells, and the cross-sectional structure is the same as in FIG.

  FIG. 4 is a sectional view taken along the line CSx1-CSx1 in FIG.

  As shown in FIG. 4, a plurality of solar cells including the first solar cell (C1) and the second solar cell (C2) can be arranged in the second direction (y).

  At this time, the first and second solar cells (C1, C2) may be arranged such that the length directions of the plurality of first and second electrodes (C141, C142) are directed to the first direction (x). it can.

  As described above, the first and second solar cells (C1, C2) are arranged in the second direction (y) with the first and second solar cells (C1, C2) arranged in the second direction (y). One string that extends in the second direction (y) and is connected in series can be formed by the conductive wiring (CW1, CW2) and the inter-cell connector (IC).

  Here, the first and second conductive wirings (CW1, CW2) and the inter-cell connector (IC) are formed of a conductive metal material, and the first and second conductive wirings (CW1, CW2) The first and second conductive wirings (CW1, CW2) connected to the back surface of the semiconductor substrate 110 of the battery and connected to each semiconductor substrate 110 for series connection of solar cells are connected to the inter-cell connector (IC). Can be connected.

  In addition, the plurality of first and second conductive wirings (CW1, CW2) may be in the form of a conductive wire having a circular cross section, or in the form of a ribbon having a width greater than the thickness.

  Specifically, the plurality of first conductive wirings (CW1) are superimposed on the plurality of first electrodes (C141) provided in each of the plurality of solar cells (C1, C2) to form a conductive adhesive ( CA) and can be insulated from the plurality of second electrodes (C142) by an insulating layer (IL) made of an insulating material.

  At this time, as shown in FIGS. 1 and 4, each of the plurality of first conductive wirings (CW1) is formed on the semiconductor substrate 110 in the connector direction between the cells arranged between the first and second solar cells. It can be arranged to protrude outward.

  In addition, the plurality of second conductive wirings (CW2) are superposed on the plurality of second electrodes (C142) provided in each of the plurality of solar cells (C1, C2) to form a conductive adhesive (CA). And the plurality of first electrodes (C141) can be insulated by an insulating layer (IL) made of an insulating material.

  At this time, as shown in FIGS. 1 and 4, each of the plurality of second conductive wirings (CW2) is a semiconductor on the side facing the connector between the cells disposed between the first and second solar cells. The substrate 110 can be disposed so as to protrude outside.

  Here, the conductive adhesive (CA) can be formed of a metal material including tin (Sn) or an alloy containing tin (Sn). In addition, such conductive adhesives (CA) include tin (Sn) or alloys containing tin (Sn), solder paste, epoxy containing tin (Sn) or tin (Sn). It can be formed in any one of an epoxy solder paste containing an alloy or a conductive paste.

  For example, when the conductive adhesive (CA) is applied in the form of a solder paste, the solder paste includes at least one of Sn, SnBi, SnIn, SnAgCu, SnPb, SnBiCuCo, SnBiAg, SnPbAg, or SnAg. When the conductive adhesive (CA) is applied in the form of an epoxy solder paste, Sn, SnBi, SnIn, SnAgCu, SnPb, SnBiCuCo, SnBiAg, SnPbAg or SnAg in the epoxy resin, It can be formed from including at least one metallic material.

  Further, when the conductive adhesive (CA) is applied in the form of a conductive paste, it is formed by including at least one metal material of Sn, SnBi, Ag, AgIn, or AgCu in a resin such as epoxy. be able to.

  Here, the insulating layer (IL) may be any insulating material. For example, any of epoxy resin, polyimide, polyethylene, acrylic resin, and silicon resin may be used. One insulating material can be used.

  As described above, portions of the plurality of first conductive wirings (CW1) and the plurality of second conductive wirings (CW2) connected to the back surface of each solar cell protrude outside the semiconductor substrate 110 as shown in FIG. And as shown in FIG. 4, it can connect to the back surface of the inter-cell connector (IC) arrange | positioned between the 1st, 2nd solar cells (C1, C2), thereby, a plurality of solar cells ( C1, C2) can be formed in one string connected in series in the second direction (y).

  The solar cell module having such a structure is connected between the first and second conductive wirings (CW1, CW2) and the first and second electrodes (C141, C142) among the plurality of solar cells. When there is a defective solar battery, the connection between the inter-cell connector (IC) and the plurality of first and second conductive wirings (CW1, CW2) is released, and only the solar battery is further facilitated. Can be replaced.

  Hereinafter, the thicknesses of the conductive adhesive (CA) and the insulating layer (IL) will be described in more detail.

  FIG. 5 is a diagram for more specifically explaining the thickness (TCA) of the conductive adhesive (CA) and the thickness (TIL) of the insulating layer (IL) described in FIGS. 1 and 4. FIG. 6 is an enlarged view of the portion K1 in FIG. 1 in order to explain the planar shapes of the conductive adhesive and the insulating layer.

  In the solar cell module according to the present invention, the thickness (TCA) of the conductive adhesive (CA) positioned between the electrode and the conductive wiring is the insulating layer (IL) positioned between the electrode and the conductive wiring. ) Thickness (TIL).

  Furthermore, the height (HCA) from the back surface of the electrodes (C141, C142) to the back surface of the conductive adhesive (CA) is the height (HIL) from the back surface of the electrodes (C141, C142) to the back surface of the insulating layer (IL). ) May be larger.

  Therefore, when the thicknesses of the first and second electrodes (C141, C142) are the same, from the back surface of the semiconductor substrate 110 to the back surface of the conductive adhesive (CA) located on the electrodes (C141, C142). The height (HCA) can be higher than the height (HIL) from the back surface of the semiconductor substrate 110 to the back surface of the insulating layer (IL) located on the electrodes (C141, C142).

  Here, when the back surface of the conductive adhesive (CA) and the back surface of the insulating layer (IL) are different as shown in FIG. 5 and are not uniform, the height (HCA) of the conductive adhesive (CA) is the electrode. It may be the highest height from the back surface of (C141, C142) to the back surface of the conductive adhesive (CA), and the height of the insulating layer (HIL) is the electrode (C141, C142). The height from the back surface of the insulating layer (IL) to the back surface of the insulating layer (IL) may be the highest.

  For example, in the solar cell, the conductive adhesive (CA) is used between the first electrode (C141) and the first conductive wiring (CW1), or between the second electrode (C142) and the second conductive wiring (CW2). The insulating layer (IL) may be located between the first electrode (C141) and the second conductive wiring (CW2) or between the second electrode (C142) and the first conductive wiring (CW1). ).

  At this time, as an example, the thickness (TCA) of the conductive adhesive (CA) applied between the first electrode (C141) and the first conductive wiring (CW1) is the same as that of the second electrode (C142). It may be larger than the thickness (TIL) of the insulating layer (IL) applied between the first conductive wiring (CW1) and conversely, the second electrode (C142) and the second conductive wiring (CW2). The thickness (TCA) of the conductive adhesive (CA) applied between the first electrode (C141) and the second conductive wiring (CW2) is between the insulating layer (IL) applied between the first electrode (C141) and the second conductive wiring (CW2). It can be greater than the thickness (TIL).

  In addition, as shown in FIG. 5, the distance between each electrode (C141, C142) and each conductive wiring (CW1, CW2) is the same as the thickness (TCA) of the conductive adhesive (CA). Therefore, the insulating layer (IL) and the conductive wiring can be separated from each other by a predetermined distance (DP).

  Here, as shown in FIG. 6, the conductive adhesive (CA) is not located in a region where the first and second electrodes (C141, C142) are not located in the back surface of the semiconductor substrate 110, and is not conductive. It can be located only on any one electrode so as to cover only a part of the electrode overlapped with the conductive wiring.

  That is, the conductive adhesive (CA) is located only on a part of the first electrode (C141) connected to the first conductive wiring (CW1) or connected to the second conductive wiring (CW2). It can be located only on a part of the two electrodes (C142).

  However, the insulating layer (IL) intersects with the first conductive wiring (CW1) in the second electrode (C142), and not only on a part of the second electrode (C142) that is overlapped. In addition to being located on the back surface of the surrounding semiconductor substrate 110, not only on the part of the first electrode (C 141) that intersects and overlaps the second conductive wiring (CW 2). In addition, the semiconductor substrate 110 may be positioned on the back surface around a portion of the first electrode C141.

  Here, as an example, the average thickness (TCA) of the conductive adhesive (CA) located on the electrodes (C141, C142) is equal to that of the insulating layer (IL) located on the electrodes (C141, C142). It can be formed in the range of 2 to 10 times the average thickness (TIL).

  Here, the thickness (TIL) of the insulating layer (IL) is located on a part of the first and second electrodes (C141, C142) intersecting with the first and second conductive wirings (CW1, CW2). It means the thickness (TIL) of the insulating layer (IL).

  As an example, the average thickness (TIL) of the insulating layer (IL) may be formed between 1 μm and 50 μm, and the average thickness (TCA) of the conductive adhesive (CA) is the insulating layer (IL). It can be formed between 10 μm and 100 μm within the range of 2 to 10 times the average thickness (TIL).

  Furthermore, the area of the insulating layer (IL) can be formed larger than the area of the conductive adhesive (CA).

  More specifically, as shown in FIG. 6, the conductive adhesive (CA) is formed at the point where the first and second electrodes (C141 and C142) intersect with the first and second conductive wirings. The first and second electrodes (C141 and C142) may be positioned on the second electrodes (C141 and C142) along the length direction.

  At this time, the width (CAx) of the conductive adhesive (CA) in the first direction (x) is equal to or larger than the line width of the first and second conductive wirings (CW1, CW2). It may be 1.2 times or less of each line width of the two conductive wirings (CW1, CW2).

  Further, the width (CAy) of the conductive adhesive (CA) in the second direction (y) may be narrower or the same as the line width of the first and second electrodes (C141, C142).

  However, the insulating layer (IL) includes the first, second electrodes (C141, C142) and the first, second conductive wires (CW1, CW2) to further ensure insulation between the first, second electrodes (C141, C142). Semiconductor substrate around a portion of the first and second electrodes (C141, C142) as well as on a portion of the first and second electrodes (C141, C142) intersecting the second conductive wiring (CW1, CW2) 110 can also be located on the back.

  At this time, the width (ILx) of the insulating layer (IL) in the first direction (x) is larger than the width (CAx) of the conductive adhesive (CA) in the first direction (x). It may be smaller than three times the line width of each of the two conductive wirings (CW1, CW2).

  Furthermore, the width (ILy) in the second direction (y) of the insulating layer (IL) is larger than the line width of the first and second electrodes (C141, C142), and the two first electrodes (C141, C141, C142) and a distance between two second electrodes (C141, C142) separated from each other.

  Thereby, the short circuit between the electrodes (C141, C142) and the conductive wirings (CW1, CW2) that need insulation in the solar cell module may be prevented, and the durability of the solar cell module may be further improved.

  At this time, each of the first and second conductive wirings (CW1, CW2) may include a core (CR) and a coating layer (CT).

  Here, the core (CR) may be formed including at least one material of copper (Cu) or aluminum (Al), and the coating layer (CT) is formed including tin (Sn). be able to. As an example, the coating layer (CT) may be formed including at least one of SnPb, SnAgCu, SnBiAg, SnBi, Sn, or SnAg.

  Here, the thickness of the core (CR) may be between 50 μm and 250 μm, and the thickness of the coating layer (CT) may be between 1 μm and 30 μm.

  In such a solar cell module, during the laminating process for encapsulating a plurality of solar cells, the space between the insulating layer (IL) and the conductive wiring can be filled with the filler. Hereinafter, this will be described more specifically.

  FIG. 7 shows a cross-sectional view in which the solar cell module according to the present invention is encapsulated by a laminating process, and FIG. 8 shows a separation between the insulating layer (IL) and the conductive wiring by the laminating process. The structure in which the filled space is filled with the filler (EVA) is shown in detail.

  As shown in FIG. 7, the solar cell is integrated and encapsulated by a laminating process in which heat and pressure are simultaneously applied while being arranged between the front transparent substrate (FG) and the back sheet (BS). Can do.

  Here, the front transparent substrate (FG) can be formed of tempered glass having a high transmittance and an excellent breakage prevention function.

  The back sheet (BS) can protect the solar cell from the external environment by preventing moisture from penetrating the back surface of the solar cell. Such a back sheet (BS) may have a multilayer structure such as a layer that prevents penetration of moisture and oxygen and a layer that prevents chemical corrosion.

  The back sheet (BS) is formed of a thin sheet made of an insulating material such as FP (fluoropolymer) / PE (polyeaster) / FP (fluoropolymer), but may be an insulating sheet made of another insulating material.

  Such a lamination process is performed in a state where a sheet-like filler (EVA) is disposed between the front transparent substrate (FG) and the solar cell and between the solar cell and the rear sheet (BS). Can do.

  Here, the material of the filler (EVA) can be formed differently from the material of the insulating layer (IL), prevents corrosion due to moisture penetration, and protects the solar cell 10 from impact. It can be formed of a material such as ethylene vinyl acetate (EVA) that can absorb impact.

  Therefore, the sheet-like filler (EVA) disposed between the front transparent substrate (FG) and the solar cell and between the solar cell and the rear substrate is melted by heat and pressure during the lamination process, As shown in FIG. 8, the empty space between the first and second electrodes (C141, C142), the empty space between the first and second conductive wirings (CW1, CW2), and the insulating layer (IL ) And the first and second conductive wirings (CW1, CW2).

  Thereby, the durability of the solar cell module can be further improved.

  The preferred embodiment of the present invention has been described in detail above, but the scope of the present invention is not limited to this, and the basic concept of the present invention defined in the following claims is described. Various modifications and improvements made by those skilled in the art are also within the scope of the present invention.

Claims (14)

A semiconductor substrate doped with a first conductive impurity;
An emitter portion doped with an impurity of a second conductivity opposite to the first conductivity;
A back surface field portion doped with the first conductive impurity at a higher concentration than the semiconductor substrate;
A first electrode connected to the emitter section;
A second electrode connected to the back surface field portion;
Each of the plurality of electrodes is formed long in a direction intersecting with the first and second electrodes, connected to the plurality of first electrodes through a conductive adhesive, and insulated from the plurality of second electrodes by an insulating layer. A plurality of second conductive wirings connected to the first conductive wiring, the plurality of second electrodes via the conductive adhesive, and insulated by the plurality of first electrodes and the insulating layer ;
The thickness of the conductive adhesive located between the first conductive wiring and the first electrode and between the second conductive wiring and the second electrode is determined between the first conductive wiring and the first electrode. A solar cell module, which is thicker than a thickness of the insulating layer located between the second electrode and between the second conductive wiring and the first electrode . The solar cell module according to claim 1 , wherein the insulating layer and the first and second conductive wirings are separated from each other. 3. The solar cell according to claim 2, wherein a filler that protects the semiconductor substrate from an external impact is further located in a spaced space between the insulating layer and the first and second conductive wirings. module.   The solar cell module according to claim 3, wherein the insulating layer includes at least one of epoxy, polyimide, and silicon.   The solar cell module according to claim 4, wherein a material of the filler is different from a material of the insulating layer.   The solar cell module according to claim 4, wherein the filler is EVA (EVA, ethylene vinyl acetate).   The solar cell module according to claim 1, wherein a material of the conductive adhesive includes tin (Sn).   The solar cell module according to claim 7, wherein the conductive adhesive is formed of any one of a solder paste, an epoxy solder paste, and a conductive paste. .   2. The solar cell module according to claim 1, wherein each of the first and second electrodes includes the conductive adhesive and another metal material.   Each of the first and second electrodes includes titanium (Ti), silver (Ag), aluminum (Al), nickel-vanadium alloy (NiV), nickel, nickel-aluminum alloy (NixAly), molybdenum (Mo), and tin. The solar cell module according to claim 9, wherein at least one material of (Sn) is formed of at least one layer. The first and second conductive wirings are
A core including at least one material of copper (Cu) or aluminum (Al);
The solar cell module according to claim 1, wherein the solar cell module is coated on a surface of the core and includes a coating layer containing tin (Sn).   The solar cell module according to claim 11, wherein the coating layer includes at least one of SnPb, SnAgCu, SnBiAg, SnBi, Sn, or SnAg.   12. The solar cell module according to claim 11, wherein a thickness of the core is between 50 μm and 250 μm, and a thickness of the coating layer is between 1 μm and 30 μm.   2. The solar cell module according to claim 1, wherein a thickness of the conductive adhesive is between 10 μm and 100 μm, and a thickness of the insulating layer is between 1 μm and 50 μm.

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