JP6237803B2 - Optical sensor and spectroscopic sensor - Google Patents

Description

  The present invention relates to a light receiving element, an optical sensor, and a spectroscopic sensor.

  A first semiconductor region of a first conductivity type (for example, N type) is formed on a substrate, and a second semiconductor region of a second conductivity type (for example, P type) is formed on the first semiconductor region, and photo A light receiving element that constitutes a diode is known.

  Patent Document 1 below includes (1) a first semiconductor region of a first conductivity type, (2) a second semiconductor region of a second conductivity type disposed on the first semiconductor region, 3) a third semiconductor region of the first conductivity type disposed on the surface of the second semiconductor region; and (4) a second conductivity disposed on the surface of the second semiconductor region and connected to the anode or cathode electrode. In the light receiving element having the type electrode region, the third semiconductor region is formed so as to surround the electrode region, and the electrode region has an impurity concentration higher than that of the second semiconductor region. Is described. In Patent Document 1, the light receiving section capacitance is further reduced by making the impurity concentration of the third semiconductor region higher than the impurity concentration of the second semiconductor region.

Japanese Patent No. 3584196 (Claim 1, FIG. 1, FIG. 5, FIG. 11, paragraph 0062)

  However, in the light receiving element of Patent Document 1, the impurity concentration of the electrode region is made higher than the impurity concentration of the second semiconductor region, and the impurity concentration of the third semiconductor region is made higher than the impurity concentration of the second semiconductor region. Therefore, the impurity concentration of the second semiconductor region has to be relatively lowered. On the other hand, carriers (electrons or holes) generated by the photoelectric effect in the second conductive type second semiconductor region constituting the PN junction with the first conductive type first semiconductor region are converted into the second conductive type. In order to move to the electrode region, the carrier needs to move inside the second conductivity type second semiconductor region. When the impurity concentration of the second semiconductor region is lowered as in Patent Document 1, the electrical resistance of the second semiconductor region is increased.

  The present invention has been made in view of the above technical problems. Some aspects of the present invention relate to enabling carriers (electrons or holes) generated in the second semiconductor region to be efficiently transferred to a high concentration semiconductor region connected to the external electrode. doing.

In some aspects of the present invention, the light receiving element includes a first semiconductor region of a first conductivity type electrically connected to the first external electrode, and a first semiconductor region formed on the first semiconductor region. A second conductivity type second semiconductor region; a first conductivity type third semiconductor region formed on the second semiconductor region; and a plurality of second conductivity regions surrounded by the third semiconductor region on the second semiconductor region And a fourth semiconductor region of a second conductivity type that is formed and contains a second conductivity type impurity at a higher concentration than the second semiconductor region and is electrically connected to the second external electrode.
According to this aspect, since the plurality of fourth semiconductor regions connected to the second external electrode are formed on the second semiconductor region, the carrier moving distance in the second semiconductor region can be small. The carriers can be efficiently moved with respect to the fourth semiconductor region.

In the above-described aspect, it is desirable that the third semiconductor region is electrically connected to the third external electrode.
According to this, a sufficient depletion layer can be formed in the second semiconductor region formed below the third semiconductor region by applying a predetermined voltage to the third semiconductor region.

In another aspect of the present invention, the light receiving element includes a first conductivity type first semiconductor region electrically connected to the first external electrode, and a second semiconductor region formed on the first semiconductor region. A conductive type second semiconductor region and a second conductive region formed on the second semiconductor region, the second conductive type impurity being higher in concentration than the second semiconductor region, and electrically connected to the second external electrode. A third semiconductor region of the second conductivity type, and a plurality of fourth semiconductor regions of the first conductivity type formed on the second semiconductor region so as to be surrounded by the third semiconductor region.
According to this aspect, since the third semiconductor region connected to the second external electrode is formed surrounding the fourth semiconductor region on the second semiconductor region, carriers in the second semiconductor region are formed. Therefore, the carrier can be efficiently moved with respect to the third semiconductor region.

In the above-described aspect, it is desirable that the plurality of fourth semiconductor regions are electrically connected to the third external electrode, respectively.
According to this, a sufficient depletion layer can be formed in the second semiconductor region formed under the fourth semiconductor region by applying a predetermined voltage to the plurality of fourth semiconductor regions.

In the above-described aspect, it is desirable that the third external electrode is a common electrode with the first external electrode.
According to this, since the first external electrode connected to the first semiconductor region and the third external electrode connected to the third or fourth semiconductor region can be shared, the circuit configuration can be simplified. can do.

In another aspect of the present invention, an optical sensor includes the above-described light receiving element and an angle limiting filter that limits an incident angle of light that passes toward the light receiving element, and at least a part of the angle limiting filter includes A plurality of fourth semiconductor regions of the light receiving element formed of a conductive material are connected to the second external electrode via the part of the angle limiting filter, respectively.
According to this aspect, since the electrical connection between the fourth semiconductor region surrounded by the third semiconductor region and the second external electrode is performed by the angle limiting filter, another configuration for wiring is provided. Can be eliminated, and a decrease in the amount of light received by the wiring can be suppressed.

In another aspect of the present invention, an optical sensor includes the above-described light receiving element and an angle limiting filter that limits an incident angle of light that passes toward the light receiving element, and at least a part of the angle limiting filter includes A plurality of fourth semiconductor regions of the light receiving element formed of a conductive material are connected to the third external electrode through the part of the angle limiting filter, respectively.
According to this aspect, since the electrical connection between the fourth semiconductor region surrounded by the third semiconductor region and the third external electrode is performed by the angle limiting filter, another configuration for wiring is provided. Can be eliminated, and a decrease in the amount of light received by the wiring can be suppressed.

In another aspect of the present invention, the spectroscopic sensor includes the above-described light receiving element, an angle limiting filter that limits an incident angle of light passing toward the light receiving element, and a wavelength that limits a wavelength of light that can pass through the angle limiting filter. A limiting filter.
According to this aspect, since the above-described light receiving element is used, the moving distance of carriers in the second semiconductor region can be small, and the carriers can be moved efficiently.

FIG. 3 is a perspective plan view showing the light receiving element and the spectroscopic sensor according to the first embodiment. II-II sectional view taken on the line of FIG. The figure which shows the formation process of a light receiving element. FIG. 6 is a plan perspective view showing a light receiving element and a spectroscopic sensor according to a second embodiment. VV sectional view taken on the line of FIG.

  Hereinafter, embodiments of the present invention will be described in detail. In addition, this embodiment demonstrated below does not unduly limit the content of this invention described in the claim. Further, not all of the configurations described in the present embodiment are essential as a solution means of the present invention. The same constituent elements are denoted by the same reference numerals, and description thereof is omitted.

<1. First Embodiment>
FIG. 1 is a plan perspective view showing a light receiving element and a spectroscopic sensor according to the first embodiment of the present invention. 2 is a cross-sectional view taken along line II-II in FIG.
The spectroscopic sensor 1 includes an angle limiting filter 10, a wavelength limiting filter 20, and a light receiving element 30 (see FIG. 2). In FIG. 1, the wavelength limiting filter 20 is omitted.

  A predetermined reverse bias voltage is applied to the light receiving element 30 on the silicon substrate 3 as a semiconductor substrate on which the spectroscopic sensor 1 is formed, or a current based on the photovoltaic power generated in the light receiving element 30 is detected. An electronic circuit (not shown) for amplifying an analog signal corresponding to the size and converting it into a digital signal is formed. By connecting a plurality of aluminum (Al) alloy layers for wiring (not shown) to the semiconductor elements constituting the electronic circuit, electrical connection between the semiconductor elements constituting the electronic circuit and electricity to the outside of the electronic circuit are performed. Connection is made.

  A conductive plug (not shown) is connected between the plurality of aluminum alloy layers. This conductive plug electrically connects the upper and lower aluminum alloy layers at the place where the conductive plug is disposed.

<1-1. Angle limit filter>
As shown in FIG. 2, the angle limiting filter 10 is formed on the silicon substrate 3 on which the light receiving element 30 is formed. In the angle limiting filter 10 of the present embodiment, an optical path wall is formed by a light shielding body 13 made of a conductive plug formed by the same process as the conductive plug on the electronic circuit described above. The light shield 13 is made of tungsten (W).

Further, on the silicon substrate 3, a plurality of aluminum alloy layers 11 formed by the same multilayer wiring process as the aluminum alloy layer on the electronic circuit described above are translucent (light having a wavelength to be received by the light receiving element 30). The following is the same), and is laminated via a silicon oxide (SiO ₂ ) layer 12 as an insulating layer. The plurality of aluminum alloy layers 11 are not limited to aluminum alloy layers, and may be formed of copper (Cu) alloy layers.

  The light shielding body 13 is made of a material that does not substantially transmit light having a wavelength to be received by the light receiving element 30, and is continuously formed over a plurality of layers on the silicon substrate 3, for example, in a lattice-like predetermined pattern (see FIG. 1). Thus, an optical path in the stacking direction of the light shields 13 is formed.

  The incident angle of the light passing through the optical path is limited by the optical path wall portion formed by the light shield 13. That is, when the light incident on the optical path is inclined at a predetermined limit angle or more with respect to the direction of the optical path, the light hits the light shield 13, a part is absorbed by the light shield 13, and the rest is reflected. The Since the reflected light is weakened by repeated reflection until it passes through the optical path, the light that can pass through the angle limiting filter 10 is substantially limited to light whose inclination with respect to the optical path is less than a predetermined limiting angle. .

  Since the region surrounded by the light shielding body 13 is constituted by the above-described silicon oxide layer 12 having translucency, it functions as a light transmitting portion that transmits incident light.

  In the above-described aspect, since the light path wall portion is formed on the silicon substrate 3 by forming the light-shielding body 13 over a plurality of layers in a lattice-like predetermined pattern, a fine pattern can be formed, and a small size can be formed. The angle limiting filter 10 can be manufactured. In addition, the manufacturing process can be simplified and a decrease in transmitted light due to the adhesive can be suppressed as compared with the case where the spectroscopic sensor is configured by bonding the members.

  In a preferred embodiment, the light shield 13 is made of the same material (tungsten or the like) as the above-described conductive plug. Thereby, the angle limiting filter 10 can be formed by a semiconductor process at the same time as forming an aluminum alloy layer or a conductive plug for wiring for an electronic circuit formed on the same silicon substrate 3.

  In a preferred embodiment, a titanium nitride (TiN) film 14 that is an adhesion layer of tungsten and silicon oxide is formed on the surface of the light shield 13.

  In a preferred embodiment, the light shield 13 is electrically connected to the aluminum alloy layer 11 through the side surface of the aluminum alloy layer 11. Then, a later-described fourth semiconductor region 34 formed on the silicon substrate 3 and a lower end of the light shield 13 are electrically connected, thereby enabling electrical connection between the light receiving element 30 and the aluminum alloy layer 11. Yes.

<1-2. Wavelength limiting filter>
The wavelength limiting filter 20 has a low refractive index thin film 21 such as silicon oxide (SiO ₂ ) and a high refractive index thin film 22 such as titanium oxide (TiO ₂ ) on the silicon substrate 3 on the angle limiting filter 10. On the other hand, a large number of layers are inclined slightly.
The low-refractive index thin film 21 and the high-refractive index thin film 22 each have a predetermined thickness of, for example, a submicron order, and are laminated over a total of, for example, about 60 layers, for example, to have a total thickness of about 6 μm.

The inclination angles θ ₁ and θ ₂ of the low-refractive index thin film 21 and the high-refractive index thin film 22 with respect to the silicon substrate 3 are, for example, 0 [deg] or more depending on the set wavelength of light to be received by the light receiving element 30. [Deg] Set below.

  In order to incline the low refractive index thin film 21 and the high refractive index thin film 22 with respect to the silicon substrate 3, for example, an inclined structure body 23 having translucency is formed on the angle limiting filter 10, and the inclined structure body 23 is formed. A thin film 21 having a low refractive index and a thin film 22 having a high refractive index are formed thereon. The inclined structure 23 is formed, for example, by processing silicon oxide formed on the angle limiting filter 10 by a CMP (chemical mechanical polishing) method.

In this way, by forming in advance the inclined structure 23 having different inclination angles θ ₁ and θ ₂ according to the set wavelength of the light to be received by the light receiving element 30, the low refractive index thin film 21 and the high The refractive index thin film 22 can be formed by a common process with the same film thickness regardless of the set wavelength of light to be received by the light receiving element 30.

With the above configuration, the wavelength limiting filter 20 limits the wavelength of light that enters the angle limiting filter 10 within a predetermined limiting angle range (light that can pass through the angle limiting filter 10).
That is, the incident light incident on the wavelength limiting filter 20 is partially reflected light and partially transmitted light at the boundary surface between the low refractive index thin film 21 and the high refractive index thin film 22. A part of the reflected light is reflected again at the interface between the other thin film 21 having a low refractive index and the thin film 22 having a high refractive index, and is combined with the above-described transmitted light. At this time, the light of the wavelength that matches the optical path length of the reflected light strengthens the reflected light and the transmitted light in phase, and the light of the wavelength that does not match the optical path length of the reflected light intensifies the phase of the reflected light and transmitted light. Weaken (interfer) without matching.

  Here, the optical path length of the reflected light is determined by the inclination angles of the low refractive index thin film 21 and the high refractive index thin film 22 with respect to the direction of the incident light. Therefore, when the above-described interference action is repeated in, for example, the low-refractive index thin film 21 and the high-refractive index thin film 22 covering a total of 60 layers, only light of a specific wavelength is wavelength-limited according to the incident angle of incident light. The light passes through the filter 20 and is emitted from the wavelength limiting filter 20 at a predetermined emission angle (for example, the same angle as the incident angle to the wavelength limiting filter 20).

The angle limiting filter 10 allows only light incident on the angle limiting filter 10 to pass within a predetermined limit angle range. Accordingly, the wavelengths of the light passing through the wavelength limiting filter 20 and the angle limiting filter 10 are inclined angles θ ₁ and θ ₂ with respect to the silicon substrate 3 of the low refractive index thin film 21 and the high refractive index thin film 22, and the angle limiting filter. The wavelength is limited to a predetermined range determined by the limit angle range of incident light that 10 passes.

<1-3. Light receiving element>
The light receiving element 30 is an element that receives light that has passed through the wavelength limiting filter 20 and the angle limiting filter 10 and converts it into photovoltaic power.
FIG. 2 shows a light receiving element 30 for receiving light having a wavelength determined by the inclination angle θ ₁ of the wavelength limiting filter 20 and a part of the light receiving element 30 for receiving light having a wavelength determined by the inclination angle θ ₂ . Is shown.

  The light receiving element 30 includes various semiconductor regions formed in the silicon substrate 3 by ion implantation or the like. In the present embodiment, as a semiconductor region formed in the silicon substrate 3, (1) a first semiconductor region 31 of a first conductivity type electrically connected to a first external electrode, and (2) A second conductivity type second semiconductor region 32 formed on the first semiconductor region 31; and (3) a first conductivity type third semiconductor region (pinning) formed on the second semiconductor region 32. Layer) 33, and (4) a plurality of second semiconductor regions 32 are formed on the second semiconductor region 32 so as to be surrounded by the third semiconductor region 33 and contain a second conductivity type impurity having a higher concentration than the second semiconductor region 32. And a fourth semiconductor region 34 of the second conductivity type electrically connected to the two external electrodes.

  Here, the first conductivity type is, for example, N type, and the second conductivity type and the conductivity type of the silicon substrate 3 are, for example, P type. In that case, the first external electrode is a cathode electrode, and the second external electrode is an anode electrode.

  The first semiconductor region 31 is connected to the connection portion 37 to the first external electrode through the first conductive type fifth semiconductor region 35. On the other hand, the second semiconductor region 32 is connected to a connection portion 38 to the second external electrode through a plurality of fourth semiconductor regions 34. Therefore, a reverse bias voltage can be applied to the PN junction formed between the first semiconductor region 31 and the second semiconductor region 32 via the first external electrode and the second external electrode. It has become.

  When the light passing through the angle limiting filter 10 is received by the light receiving element 30, a photovoltaic force is generated at the PN junction formed between the first semiconductor region 31 and the second semiconductor region 32. Current is generated. By detecting this current by the above-described electronic circuit connected to the first external electrode or the second external electrode, the light received by the light receiving element 30 can be detected.

  In the first embodiment, the fourth semiconductor region 34 of the second conductivity type is formed surrounded by the third semiconductor region (pinning layer) 33 of the first conductivity type (see FIG. 1). A large area of the third semiconductor region 33 can be ensured on the second semiconductor region 32. Therefore, generation of thermally excited carriers at the interface between the silicon substrate 3 and the silicon oxide layer 12 and generation of dark current noise due to this can be suppressed.

  Furthermore, in the first embodiment, a plurality of fourth semiconductor regions 34 connected to the second external electrode are formed surrounded by the third semiconductor regions 33 (see FIG. 1). Thus, the distance that carriers generated in the second semiconductor region 32 located under the third semiconductor region 33 move to the fourth semiconductor region 34 can be shortened, and efficient carrier movement can be achieved.

In the first embodiment, the third semiconductor region 33 is connected to the connection portion 39 to the third external electrode through the fifth semiconductor region 35. In the present embodiment, as shown in FIG. 2, the connection portion 37 to the first external electrode and the connection portion 39 to the third external electrode are common, so the first external electrode and the third external electrode These external electrodes are common electrodes. With this configuration, since the same voltage as the above-described reverse bias voltage applied to the first external electrode can be applied to the third semiconductor region 33, a sufficient depletion layer can be formed in the second semiconductor region 32.
Here, the first semiconductor region 31 and the third semiconductor region 33 are connected in the fifth semiconductor region 35. However, the present invention is not limited to this, and the first semiconductor region 31 is connected to the third semiconductor region. The first external electrode may be connected to the first external electrode by a conductive layer (not shown) that is not connected to 33, and the first external electrode and the third external electrode may be set to different potentials having the same polarity.

  Moreover, in the above-described aspect, the angle limiting filter 10 is formed of a conductive material. The plurality of fourth semiconductor regions 34 are each connected to a connection portion 38 positioned at the lower end of the angle limiting filter 10, and are connected to the second external electrode through the angle limiting filter 10. Therefore, it is not necessary to provide a conductor for wiring other than the angle limiting filter 10 on the light receiving element 30, and a decrease in the amount of received light due to the wiring can be avoided.

<1-4. Manufacturing Method of First Embodiment>
Here, a method for manufacturing the spectroscopic sensor 1 according to the first embodiment will be briefly described. The spectroscopic sensor 1 first forms the light receiving element 30 on the silicon substrate 3, then forms the angle limiting filter 10 on the light receiving element 30, and then forms the wavelength limiting filter 20 on the angle limiting filter 10. Manufacture by forming.

First, the light receiving element 30 is formed on the silicon substrate 3.
FIG. 3 is a diagram illustrating a process of forming a light receiving element.
(1) First, as shown in FIG. 3A, a patterned resist (not shown) is formed, and by using this resist as a mask, ion implantation or the like is performed on a P-type silicon substrate 3 to thereby form an N-type. The first semiconductor region 31 is formed. The ion to be implanted is, for example, phosphorus (P ⁺ ), the ion implantation energy is, for example, 1 MeV to 3 MeV, and the dose is, for example, 1.0 × 10 ¹² atoms / cm ^{2 to} 1.0 × 10 ¹⁴ atoms / cm ² . After the ion implantation, the resist is removed.

(2) Next, as shown in FIG. 3B, a patterned resist R2 is formed, and by using this resist R2 as a mask, further ion implantation or the like is performed on the first semiconductor region 31, thereby forming an N-type resist. A fifth semiconductor region 35 is formed. The ions to be implanted are, for example, phosphorus (P ⁺ ), the ion implantation energy is, for example, 100 KeV to 1000 KeV, and the dose is, for example, 1.0 × 10 ¹³ atoms / cm ^{2 to} 1.0 × 10 ¹⁵ atoms / cm ² . After the ion implantation, the resist R2 is removed.

(3) Next, as shown in FIG. 3C, a patterned resist R3 is formed, and ion implantation or the like is further performed on the first semiconductor region 31 using the resist R3 as a mask. A second semiconductor region 32 is formed. The ions to be implanted are, for example, boron (B ⁺ ), the ion implantation energy is, for example, 50 KeV to 300 KeV, and the dose amount is, for example, 1.0 × 10 ¹¹ atoms / cm ^{2 to} 1.0 × 10 ¹³ atoms / cm ² . After the ion implantation, the resist R3 is removed.

(4) Next, as shown in FIG. 3D, a patterned resist R4 is formed, and by using this resist R4 as a mask, further ion implantation or the like is performed on the second semiconductor region 32, thereby forming a P-type resist. A fourth semiconductor region 34 is formed. The ion to be implanted is, for example, boron (B ⁺ ), the ion implantation energy is, for example, 5 KeV to 50 KeV, and the dose is, for example, 1.0 × 10 ¹³ atoms / cm ^{2 to} 1.0 × 10 ¹⁵ atoms / cm ² . After the ion implantation, the resist R4 is removed.

(5) Finally, as shown in FIG. 3E, a patterned resist R5 is formed, and by using this resist R5 as a mask, further ion implantation or the like is performed on the second semiconductor region 32, so that the N-type A third semiconductor region 33 is formed. The ions to be implanted are, for example, arsenic (As ⁺ ), the ion implantation energy is, for example, 10 KeV to 100 KeV, and the dose is, for example, 1.0 × 10 ¹² atoms / cm ^{2 to} 1.0 × 10 ¹⁴ atoms / cm ² . After the ion implantation, the resist R5 is removed.
The above steps (1) to (5) can be performed simultaneously with the formation of the electronic circuit formed on the same silicon substrate 3.

Next, the angle limiting filter 10 is formed on the light receiving element 30 (see FIG. 2).
For example, the tungsten light-shielding body 13 can be formed simultaneously with the formation of the conductive plug connecting the aluminum alloy layer for wiring for the electronic circuit described above. Moreover, the aluminum alloy layer 11 can be formed simultaneously with the formation of the aluminum alloy layer for wiring for the electronic circuit described above. The silicon oxide layer 12 can also be formed simultaneously with the formation of the insulating film between the plurality of aluminum alloy layers for wiring for the electronic circuit described above.
By combining the light receiving element 30 and the angle limiting filter 10, it is possible to obtain an optical sensor (directional optical sensor) that detects incident light within a predetermined limiting angle range.

Next, the wavelength limiting filter 20 is formed on the angle limiting filter 10 (see FIG. 2). For example, first, a silicon oxide layer is formed on the angle limiting filter 10, and this silicon oxide layer is processed into a tilted structure 23 having a predetermined angle by a CMP method or the like. Next, a large number of low refractive index thin films 21 and high refractive index thin films 22 are alternately stacked.
The spectroscopic sensor 1 is manufactured through the above steps.

<2. Second Embodiment>
FIG. 4 is a plan perspective view showing a light receiving element and a spectroscopic sensor according to the second embodiment of the present invention. 5 is a cross-sectional view taken along line VV in FIG.
The spectroscopic sensor according to the second embodiment is different from the spectroscopic sensor according to the first embodiment mainly with respect to the light receiving element 40.

  The light receiving element 40 according to the second embodiment includes (1) a first conductive type first semiconductor region 41 electrically connected to a first external electrode, and (2) a first semiconductor region. The second semiconductor region 42 of the second conductivity type formed on 41 is the same as the first embodiment. The light receiving element 40 according to the second embodiment includes (3) a second conductivity type impurity having a concentration higher than that of the second semiconductor region 42 on the second semiconductor region 42, and the second external electrode A third semiconductor region 43 of the second conductivity type electrically connected is formed. (4) A plurality of second semiconductor regions 43 are formed on the second semiconductor region 42 so as to be surrounded by the third semiconductor region 43. The fourth embodiment is different from the first embodiment in that a fourth semiconductor region (pinning layer) 44 of one conductivity type is provided.

  That is, in the first embodiment, a plurality of second conductive type fourth semiconductor regions 34 are surrounded by the first conductive type third semiconductor region (pinning layer) 33, whereas In the second embodiment, a plurality of first conductive type fourth semiconductor regions (pinning layers) 44 are surrounded by a second conductive type third semiconductor region 43.

  The first semiconductor region 41 is connected to the connection portion 47 to the first external electrode through the fifth semiconductor region 45 of the first conductivity type. On the other hand, the second semiconductor region 42 is located outside the light receiving region of the light receiving element 40 via a third semiconductor region 43 (see FIG. 4) formed in a lattice shape along the light shield 13 of the angle limiting filter 10. The portion 43a is connected to the connection portion 48 to the second external electrode. Therefore, a reverse bias voltage can be applied to the PN junction formed between the first semiconductor region 41 and the second semiconductor region 42 via the first external electrode and the second external electrode. It has become.

  In the second embodiment, since a plurality of first conductive type fourth semiconductor regions (pinning layers) 44 are formed surrounded by the second conductive type third semiconductor region 43, A plurality of fourth semiconductor regions 44 can be secured on the semiconductor region 42. Therefore, generation of thermally excited carriers at the interface between the silicon substrate 3 and the silicon oxide layer 12 and generation of dark current noise due to this can be suppressed.

  Furthermore, in the second embodiment, the fourth semiconductor region 44 is formed so as to be surrounded by the third semiconductor region 43 connected to the second external electrode (see FIG. 4). The distance that carriers generated in the second semiconductor region 42 located below the semiconductor region 44 move to the third semiconductor region 43 can be shortened, and the carriers can be moved efficiently.

In the second embodiment, the plurality of fourth semiconductor regions 44 are connected to the connection portions 49 to the third external electrodes, respectively. In the present embodiment, as shown in FIG. 5, the connection part 47 to the first external electrode and the connection part 49 to the third external electrode are connected via the angle limiting filter 10, The first external electrode and the third external electrode are common electrodes. With this configuration, the same voltage as the above-described reverse bias voltage applied to the first external electrode can be applied to the plurality of fourth semiconductor regions 44, so that a sufficient depletion layer can be formed in the second semiconductor region 42. it can. The pinning layer 44 a having the same impurity concentration as that of the fourth semiconductor region 44 is connected to the first external electrode through the fifth semiconductor region 45.
Here, the first external electrode and the third external electrode are common electrodes. However, the present invention is not limited to this, and the first external electrode and the third external electrode may have different potentials having the same polarity. .

  In the first embodiment and the second embodiment described above, the first conductivity type is N type, the second conductivity type, and the conductivity type of the silicon substrate 3 is P type. The type may be P type, the second conductivity type, and the conductivity type of the silicon substrate 3 may be N type. In that case, the first external electrode is an anode electrode, and the second external electrode is a cathode electrode.

  DESCRIPTION OF SYMBOLS 1 ... Spectral sensor, 3 ... Silicon substrate, 10 ... Angle limiting filter, 11 ... Aluminum alloy layer, 12 ... Silicon oxide layer, 13 ... Shading body, 14 ... Titanium nitride film, 20 ... Wavelength limiting filter, 21 ... Low refractive index 22 ... High refractive index thin film, 23 ... Inclined structure, 30 ... Light receiving element, 31 ... First semiconductor region, 32 ... Second semiconductor region, 33 ... Third semiconductor region, 34 ... Fourth 35 ... fifth semiconductor region, 37 ... connection portion to first external electrode, 38 ... connection portion to second external electrode, 39 ... connection portion to third external electrode, 40 ... Light receiving element 41... First semiconductor region 42... Second semiconductor region 42 a. Outer portion of second semiconductor region 43. Third semiconductor region 44. Fourth semiconductor region 44 a. Pinning layers connected to the semiconductor regions of Fifth semiconductor region, 47 ... connection to the first external electrode, 48 ... connection to the second external electrode, 49 ... connection to the third outer electrode, R2 to R5 ... resist.

Claims (4)

A first semiconductor region of a first conductivity type;
A second semiconductor region of a second conductivity type located on the first semiconductor region;
A light receiving element including:
An angle limiting filter that is located on the light receiving element and limits an incident angle of light passing through the light receiving element;
Comprising
The angle limiting filter includes an optical path wall formed in a lattice shape ,
A plurality of optical path defined by the front Symbol light passage wall,
Including
It said plurality of optical paths, Ri Do heavy to said second semiconductor region in a plan view,
The optical path wall of the angle limiting filter is made of a conductive material,
The optical path wall is a directional optical sensor that is directly connected to the second semiconductor region at a connection portion located at a part of the lower end . In claim 1 ,
The connection portion of the optical path wall includes a first optical path wall extending in a first direction so as to form the lattice shape and a second direction extending in a second direction different from the first direction. A directional optical sensor that overlaps the area where the optical path walls intersect in plan view . In claim 1 or 2 ,
The light receiving element includes a third semiconductor region of a first conductivity type located on the first semiconductor region and adjacent to the second semiconductor region, and the third semiconductor region includes the first semiconductor region A directional optical sensor including a first conductivity type impurity having a higher concentration than a semiconductor region. A directional light sensor according to any one of claims 1 to 3 ,
A wavelength limiting filter that limits the wavelength of light that can pass through the angle limiting filter;
A spectroscopic sensor comprising:

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