JP5723135B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a light receiving element, a method for manufacturing the light receiving element, and a semiconductor device.

As this type of prior art, for example, there is one disclosed in Patent Document 1, which discloses three types of configurations as an electromagnetic shield in a light receiving element having a PN junction. Specifically, the first configuration disclosed in Patent Document 1 (hereinafter referred to as Conventional Example 1) is a metal mesh disposed above the light receiving element.
The second configuration disclosed in Patent Document 1 (hereinafter referred to as Conventional Example 2) is a structure in which a semiconductor layer having a conductivity type opposite to the surface is disposed on the entire surface of the light receiving element. For example, as shown in FIG. 9, when the surface of the light receiving element is an N− region 103, a P + region 105 is entirely disposed on the N− region 103 as an electromagnetic shield.

  Furthermore, a third configuration disclosed in Patent Document 1 (hereinafter referred to as Conventional Example 3) is a structure in which a semiconductor layer having a conductivity type opposite to the surface is partially disposed on the surface of the light receiving element. For example, as shown in FIG. 9, when the surface of the light receiving element is an N− region 103, P− regions 105 are arranged on the N− region 103 as an electromagnetic shield in a lattice shape or a stripe shape.

Japanese Patent Laid-Open No. 9-23023

  By the way, in the prior art example 1, when light hits a metal mesh, the shadow is reflected on the surface of the light receiving element. Then, there is a problem that the amount of light received by the light receiving element is reduced by the amount of the shadow. Further, the conventional example 2 has a problem that the S / N ratio of a signal output by photoelectric conversion is lowered because the junction capacitance (that is, parasitic capacitance) between the P + region 105 and the N− region 103 is large. It was.

On the other hand, in the conventional example 3, the junction area between the P + region 105 and the N− region 103 can be reduced and the junction capacitance can be reduced as compared with the conventional example 2, so that the S / N ratio is reduced. Can be suppressed. However, in the conventional example 3, since the electromagnetic wave is incident on a region where the P + region 105 does not exist (that is, a region where the N− region 103 is exposed in a plan view), the electromagnetic wave incident on the region is not affected. Has a problem that it cannot exert a shielding effect.
Therefore, the present invention has been made in view of such circumstances, and a light receiving element capable of sufficiently exhibiting a shielding effect against electromagnetic waves while suppressing parasitic capacitance, a method for manufacturing the light receiving element, and a semiconductor device For the purpose of provision.

  In order to solve the above problems, a light-receiving element according to one embodiment of the present invention includes a first conductive type first semiconductor layer, a second conductive type second semiconductor layer bonded to the first semiconductor layer, A light-transmitting dielectric formed on a second surface of the second semiconductor layer opposite to the first surface bonded to the first semiconductor layer, and light formed on the dielectric And an electromagnetic shield having transparency. The electromagnetic shield is made of a semiconductor. Here, the “first conductivity type” is one of P type and N type, and the “second conductivity type” is the other of P type and N type. Examples of the “semiconductor” formed on the dielectric include an amorphous or polycrystalline semiconductor film.

  With such a configuration, light incident on the light receiving element passes through the electromagnetic shield and the dielectric, and the first surface of the second semiconductor layer (that is, the junction between the first semiconductor layer and the second semiconductor layer). Reach the surface). For this reason, arrival of electromagnetic waves can be suppressed on the first surface of the second semiconductor layer while suppressing a decrease in the amount of received light. In addition, since a dielectric is interposed between the electromagnetic shield and the second semiconductor layer, parasitic capacitance (that is, an unintended capacitance component) between the electromagnetic shield and the second semiconductor layer can be reduced. For this reason, the S / N ratio of the signal output by photoelectric conversion can be improved. The “first semiconductor layer” corresponds to, for example, a P− region (P-type silicon substrate) 1 described later. As the “second semiconductor layer”, for example, an N− region 3 described later corresponds.

In the light receiving element, the second surface of the second semiconductor layer may be entirely covered with the dielectric and the electromagnetic shield. With such a configuration, the electromagnetic wave shielding effect can be further enhanced.
The light receiving element further includes a silicon substrate in which the first semiconductor layer and the second semiconductor layer are formed, and the dielectric includes a silicon oxide film formed on the silicon substrate. The electromagnetic shield may be made of a polysilicon film formed on the silicon oxide film. With such a configuration, for example, the silicon oxide film can be formed by thermally oxidizing a silicon substrate. The polysilicon film can be formed by a CVD method. Therefore, for example, in the process of manufacturing a MOS transistor or a polysilicon resistor, it is possible to form a dielectric or an electromagnetic shield without adding a special step. Since the process can be shared, the manufacturing cost can be reduced.

  In the light receiving element, the electromagnetic shield may be connected to a ground potential. With such a configuration, in the electromagnetic shield, the charge generated by receiving the electromagnetic wave can be easily released out of the light receiving element. Further, by fixing the potential of the electromagnetic shield to the ground potential, it is possible to prevent an unintended electrical influence on the second semiconductor layer disposed below the dielectric. For example, when the potential of the electromagnetic shield fluctuates, the depletion layer expands and contracts on the second surface side of the second depletion layer. However, in this aspect, the potential of the electromagnetic shield is fixed to the ground potential. Therefore, expansion and contraction of the depletion layer due to the potential of the electromagnetic shield as described above can be prevented.

  According to another aspect of the present invention, there is provided a method for manufacturing a light receiving element, wherein a second conductive type second semiconductor layer bonded to a first conductive type first semiconductor layer is bonded to the first semiconductor layer. A step of forming a light-transmitting dielectric on a second surface opposite to the surface; and a step of forming a light-transmitting electromagnetic shield on the dielectric, the electromagnetic shield In the step of forming the semiconductor, a semiconductor is formed as the electromagnetic shield. With such a method, a light receiving element capable of sufficiently exhibiting a shielding effect against electromagnetic waves while suppressing parasitic capacitance and improving the S / N ratio of a signal output by photoelectric conversion is provided. can do.

  In the light receiving element manufacturing method, the first semiconductor layer and the second semiconductor layer are formed in a silicon substrate, and in the step of forming the dielectric, a silicon oxide film is used as the dielectric. In the step of forming the electromagnetic shield by thermally oxidizing the silicon substrate, a polysilicon film may be formed as the electromagnetic shield by a CVD method. With such a method, for example, in the process of manufacturing a MOS transistor or a polysilicon resistor, it is possible to form a dielectric or an electromagnetic shield without adding a process. Since the process can be shared, the cost can be reduced.

  A semiconductor device according to still another aspect of the present invention includes the light receiving element described above and an active element or a passive element formed on the same substrate as the light receiving element. Here, examples of the “active element” include a MOS transistor and a bipolar transistor. Examples of the “passive element” include a resistor made of a semiconductor and a capacitor using the semiconductor as a lower electrode or an upper electrode. With such a configuration, a shielding effect against electromagnetic waves can be sufficiently exhibited while suppressing parasitic capacitance as in the above light receiving element. Therefore, it is possible to realize an IC or LSI in which the S / N ratio of a signal output by photoelectric conversion is improved.

  ADVANTAGE OF THE INVENTION According to this invention, the shielding effect with respect to electromagnetic waves can fully be exhibited, suppressing parasitic capacitance. Thereby, the S / N ratio of the signal output by photoelectric conversion can be improved.

The conceptual diagram which shows typically the structural example of the light receiving element 10 which concerns on 1st Embodiment of this invention. FIG. 4 is a diagram for explaining a mechanism for shielding electromagnetic waves in the light receiving element. The figure which shows the energy band in the electromagnetic shield 7 and the PN junction surface 3a. FIG. 3 is a cross-sectional view illustrating a specific configuration example of the light receiving element 10. Sectional drawing which shows the structural example of the semiconductor device 50 which concerns on 2nd Embodiment of this invention. 10 is a process diagram showing a method for manufacturing the semiconductor device 50. FIG. Sectional drawing which shows the structural example of the semiconductor device 60 which concerns on 3rd Embodiment of this invention. FIG. 5 is a process diagram showing a method for manufacturing the semiconductor device 60. The figure which compared the structure and capacity | capacitance value in this invention and a prior art example.

Hereinafter, embodiments according to the present invention will be described with reference to the drawings. Note that, in each drawing described below, parts having the same configuration are denoted by the same reference numerals, and repeated description thereof may be omitted.
(1) 1st Embodiment FIG. 1: is a conceptual diagram which shows typically the structural example of the light receiving element 10 which concerns on 1st Embodiment of this invention. As shown in FIG. 1, the light receiving element 10 includes, for example, a P-type semiconductor (hereinafter also referred to as P-region) 1 and an N-type semiconductor (hereinafter also referred to as N-region) formed on the P-region. .) 3, a light-transmitting dielectric 5 formed on the N− region 3, and a light-transmitting electromagnetic shield 7 formed on the dielectric 5.

Here, the P− region 1 and the N− region 3 are in direct contact to constitute the photodiode 2. The P− region 1 is made of, for example, a P-type single crystal silicon (Si) layer, and the N− region 3 is made of, for example, an N-type single crystal silicon layer. The dielectric 5 is formed on the N− region 3 (that is, on the surface 3b opposite to the surface (hereinafter also referred to as PN junction surface) 3a of the N− region 3 in contact with the P− region 1). Has been. The dielectric 5 covers the entire one surface 3b of the N− region 3 so that the photodiode 2 and the electromagnetic shield 7 are electrically insulated. The dielectric 5 is made of, for example, a silicon oxide (SiO ₂ ) film.

  The electromagnetic shield 7 is a film for preventing electromagnetic waves from reaching the PN junction surface 3a of the photodiode 2 composed of the P-region 1 and the N-region 3, and is made of a semiconductor. For example, the electromagnetic shield 7 is made of, for example, a polysilicon film of P-type, N-type, or i-type (that is, an impurity concentration is almost zero or true). The electromagnetic shield 7 covers the entire dielectric 5. In this light receiving element 10, the P-region 1 and the electromagnetic shield 7 are connected to, for example, a ground potential (GND).

FIG. 2 is a diagram for explaining a mechanism for shielding electromagnetic waves in the light receiving element 10. 3A is a diagram showing the energy band in the region A of the electromagnetic shield 7 shown in FIG. 2, and FIG. 3B is the energy band in the region B of the PN junction surface 3a shown in FIG. FIG.
As shown in FIG. 2, in this light receiving element 10, light enters from the electromagnetic shield 7 side, and this incident light (hereinafter also referred to as incident light) is light having a wavelength to be received. In addition to (for example, visible light having a wavelength of about 650 nm to 850 nm), light having a shorter wavelength (for example, electromagnetic waves such as X-rays) may be included.

  In such a case, as shown in FIG. 3A, the electromagnetic shield (polysilicon film) 7 receives energy of electromagnetic waves and excites electrons from its valence band to the conductor. Thereby, since electromagnetic waves lose energy, propagation of electromagnetic waves forward from the electromagnetic shield 7 can be suppressed. On the other hand, since visible light has a shorter wavelength and lower energy than electromagnetic waves, it does not contribute much to the excitation of electrons in the electromagnetic shield 7. For this reason, the energy of visible light is preserved compared with electromagnetic waves. Further, in the polysilicon film constituting the electromagnetic shield 7 and in the silicon oxide film constituting the dielectric 5, light having a longer wavelength tends to be propagated farther. For this reason, electromagnetic waves are shielded by the electromagnetic shield 7, whereas visible light can pass through the electromagnetic shield 7 and the dielectric 5 and reach the PN junction surface 3 a.

  As shown in FIG. 3A, some of the electrons excited by the conductor lose energy, for example, due to heat generation, return to the valence band, and recombine with holes. Further, since the electromagnetic shield 7 is connected to the ground potential, some of the electrons excited by the conductor may flow to the ground potential side. Further, since the potential of the electromagnetic shield 7 is fixed to the ground potential, even when a large number of electrons are excited in the electromagnetic shield 7, unintended electricity is applied to the N− region 3 disposed below the dielectric 5. It is possible to prevent a negative influence (for example, an influence such as expansion and contraction of a depletion layer on one surface 3b of the N− region 3 and its vicinity).

  Returning to FIG. 2, when visible light is incident on the PN junction surface 3a, the visible light generates electron-hole pairs in the depletion layer and in the minority carrier diffusion length, as shown in FIG. 3B. These electron-hole pairs are separated by an electric field in the depletion layer, electrons move from the P-region 1 to the N-region 3, and holes move from the N-region 3 to the P-region 1. As a result, the photocurrent I flows from the N− region 3 to the P− region 1 (that is, in the reverse bias direction). Next, a more specific configuration example of the light receiving element 10 will be described.

FIG. 4 is a cross-sectional view illustrating a specific configuration example of the light receiving element 10. As shown in FIG. 4, in the light receiving element 10, the P− region 1 is made of, for example, a P-type silicon substrate (Psub), and the N− region 3 is made of, for example, an N-type well layer (Nwell). The dielectric 5 is made of, for example, a silicon oxide film, and the electromagnetic shield 7 is made of, for example, a polysilicon film.
The light receiving element 10 is formed above the P− region 1 and a high concentration N-type impurity layer (N + layer) 9 formed near the surface of the N− region 3 exposed from below the dielectric 5. Interlayer insulating film (not shown), contact electrode 11 formed on N + layer 9 so as to embed an opening (not shown) provided in the interlayer insulating film, and the back surface of P− region 1 And a back electrode 13 formed on the side. The contact electrode 11 is a cathode electrode of the photodiode 2, and the back electrode 13 is an anode electrode of the photodiode 2. For example, when visible light is incident on the PN junction surface 3 a, a photocurrent I is output from the back electrode 13.

  Here, the silicon oxide film as the dielectric 5 can be formed by, for example, a local oxidation (LOCOS) method, which is one method of thermal oxidation. The polysilicon film that is the electromagnetic shield 7 can be formed by, for example, a chemical vapor deposition (CVD) method. The LOCOS method and the CVD method are general-purpose processes used when manufacturing a MOS transistor or a polysilicon resistor. Since the light receiving element 10 including the electromagnetic shield 7 can be formed using a general-purpose process without using a special process, an increase in manufacturing cost can be suppressed.

  As described above, according to the first embodiment of the present invention, the light incident on the light receiving element 10 reaches the PN junction surface 3 a through the electromagnetic shield 7 and the dielectric 5. For this reason, arrival of electromagnetic waves can be suppressed on the PN junction surface 3a while suppressing a decrease in the amount of received light. Further, since the dielectric 5 is interposed between the electromagnetic shield 7 and the N− region 3, the parasitic capacitance (that is, the unintended capacitance component) between them can be reduced. For this reason, the S / N ratio of the signal output by photoelectric conversion can be improved.

(2) Second Embodiment By the way, the present invention is not limited to a light receiving element as a so-called discrete semiconductor (individual semiconductor). The present invention is also applicable to an IC (integrated circuit) and LSI (large scale integrated circuit) in which a light receiving element and an active element are mixedly mounted. In the second embodiment, such a semiconductor device will be described.
FIG. 5 is a cross-sectional view showing a configuration example of the semiconductor device 50 according to the second embodiment of the present invention. As shown in FIG. 5, the semiconductor device 50 includes a light receiving element 10 and a MOS transistor 20 as an example of an active element on the same substrate.

  Among these, the configuration of the light receiving element 10 is the same as the configuration shown in FIG. 4, for example. Although the anode electrode is not shown in FIG. 5, as in the case of FIG. 4, a back electrode may be provided on the back side of the P− region 1 and this may be used as the anode electrode. Alternatively, although not shown, a high-concentration P-type impurity may be provided near the surface of the P− region 1 and a contact electrode may be formed on the P-type impurity layer, which may be used as an anode electrode. In either case, the photocurrent I generated by photoelectric conversion can be output from the anode electrode.

  On the other hand, the MOS transistor 20 includes, for example, a gate insulating film 21 formed on the P− region 1, a gate electrode 23 formed on the gate insulating film 21, and the P− region 1 below both sides of the gate electrode 23. N + layers 25 and 26 formed, and contact electrodes 27 and 28 formed on the N + layers 25 and 26, respectively. The semiconductor device 50 includes an element isolation film 29 that separates the light receiving element 10 from the MOS transistor 20, and an interlayer insulating film (not shown) formed on the substrate so as to cover the light receiving element 10 and the MOS transistor 20. And). The N + layer 25 is a source, and the N + layer 26 is a drain. Further, the contact electrode 27 is a source electrode, and the contact electrode 28 is a drain electrode.

  Even with such a configuration, it is possible to sufficiently exhibit a shielding effect against electromagnetic waves while suppressing parasitic capacitance, similarly to the light receiving element 10 described in the first embodiment. Thereby, the S / N ratio of the signal output by photoelectric conversion can be improved. In the semiconductor device 50, the process can be shared between the process of manufacturing the light receiving element 10 and the process of manufacturing the MOS transistor 20. Next, this point will be specifically described.

  6A to 6C are process diagrams illustrating a method for manufacturing a semiconductor device 50 according to the second embodiment of the present invention. As shown in FIG. 6A, first, an N− region (N-type well layer) is formed in a P− region (Psub) 1 of a region where the light receiving element 10 is formed (hereinafter also referred to as a light receiving element region). 3 is formed. Next, as shown in FIG. 6B, the dielectric (silicon oxide film) 5 is formed in the N− region 3 by, for example, the LOCOS method, and at the same time, the region where the light receiving element region and the MOS transistor 20 are formed (hereinafter, referred to as “the dielectric layer”) An element isolation film (silicon oxide film) 29 is formed at the boundary with the transistor region. Next, the surface of the P− region 1 exposed from below the dielectric 5 and the element isolation film 29 is thermally oxidized to form the gate insulating film 21.

Next, a non-doped polysilicon film is formed by CVD on the entire upper surface of the substrate on which the gate insulating film 21 is formed, and is patterned. Thereby, as shown in FIG. 6C, the electromagnetic shield 7 is formed on the dielectric 5 in the light receiving element region, and at the same time, the gate electrode 23 is formed on the gate insulating film 21 in the transistor region.
Next, using the electromagnetic shield 7 and the gate electrode 23 as a mask, N-type impurities such as arsenic are ion-implanted into the N− region 3 to form N + layers 9, 25, and 26. By this ion implantation, the conductivity of the electromagnetic shield 7 and the gate electrode 23 becomes N-type. Then, an interlayer insulating film (not shown) is formed on the entire upper surface of the substrate so as to cover the electromagnetic shield 7 and the gate electrode 23, and a contact hole (not shown) is formed in the interlayer insulating film. Subsequently, a metal film such as aluminum is buried in the contact hole to form contact electrodes 11, 27, and 28 (see FIG. 5). In this way, the semiconductor device 50 shown in FIG. 5 is completed.

  As described above, according to the second embodiment of the present invention, the same effect as that of the first embodiment can be obtained. Further, in the production thereof, the dielectric 5 and the element isolation film 29 can be simultaneously formed by the same process. Further, the electromagnetic shield 7 and the gate electrode 23 can be formed simultaneously by the same process. Since the process can be shared, the manufacturing cost of the semiconductor device can be reduced.

(3) Third Embodiment The present invention can be applied not only to active elements but also to ICs and LSIs in which passive elements and light receiving elements are mixedly mounted. In the third embodiment, such a semiconductor device will be described.
FIG. 7 is a cross-sectional view showing a configuration example of a semiconductor device 60 according to the third embodiment of the present invention. As shown in FIG. 7, the semiconductor device 60 includes a light receiving element 10 and a polysilicon resistor 30 as an example of a passive element on the same substrate.
Among these, the configuration of the light receiving element 10 is the same as the configuration shown in FIG. 4, for example. Although the anode electrode is not shown in FIG. 7, a back electrode may be provided on the back surface side in the P− region 1 as in the case of FIG. 4, and this may be used as the anode electrode. Alternatively, although not shown, a high-concentration P-type impurity may be provided near the surface of the P− region 1 and a contact electrode may be formed on the P-type impurity layer, which may be used as an anode electrode. In either case, the photocurrent I generated by photoelectric conversion can be output from the anode electrode.

On the other hand, the polysilicon resistor 30 includes, for example, a polysilicon film 33 formed on the P− region 1 via an element isolation film 31 and contact electrodes 35 formed on both ends of the polysilicon film 33, respectively. , 36. The semiconductor device 60 includes an interlayer insulating film (not shown) formed on the substrate so as to cover the light receiving element 10 and the polysilicon resistor 30.
Even with such a configuration, it is possible to sufficiently exhibit a shielding effect against electromagnetic waves while suppressing parasitic capacitance, similarly to the light receiving element 10 described in the first embodiment. Thereby, the S / N ratio of the signal output by photoelectric conversion can be improved. Further, in this semiconductor device 60, it is possible to combine the process between the process of manufacturing the light receiving element 10 and the process of manufacturing the polysilicon resistor 30. Next, this point will be specifically described.

8A to 8C are process diagrams showing a method for manufacturing a semiconductor device 60 according to the third embodiment of the present invention. In FIG. 8A, the process up to the step of forming the N− region (N-type well layer) 3 is the same as in the second embodiment. Next, the dielectric (silicon oxide film) 5 is formed in the light receiving element region by, for example, the LOCOS method, and at the same time, the element isolation film (silicon) is formed in the region where the polysilicon resistor 30 is formed (hereinafter also referred to as the resistor region). Oxide film) 31 is formed.
Next, a non-doped polysilicon film is formed by CVD on the entire upper surface of the substrate on which the dielectric 5 and the element isolation film 31 are formed, and is patterned. As a result, as shown in FIG. 8B, the electromagnetic shield 7 is formed on the dielectric 5 in the light receiving element region, and at the same time, the non-doped polysilicon film 33 ′ is formed on the element isolation film 31 in the resistor region. .

  Next, the non-doped polysilicon film 33 ′ is covered with, for example, a resist 37, and an N-type impurity such as arsenic is ion-implanted at a high concentration into the N− region 3 using the resist 37 and the electromagnetic shield 7 as a mask. N + layer 9 is formed. By this ion implantation, N-type impurities are also introduced into the electromagnetic shield 7 at a high concentration to form N + type polysilicon. However, since the non-doped polysilicon film 33 ′ is covered with the resist 37, the N-type impurities are introduced. Not. Next, the resist 37 is removed. Thereafter, as shown in FIG. 8C, an N-type impurity such as phosphorus is ion-implanted at a low concentration into the non-doped polysilicon film. As a result, the non-doped polysilicon film becomes N-type or N-type, and the polysilicon film 33 adjusted to a desired resistance value can be obtained.

  Next, an interlayer insulating film (not shown) is formed on the entire upper surface of the substrate so as to cover the electromagnetic shield 7 and the polysilicon film 33, and a contact hole (not shown) is formed in the interlayer insulating film. Subsequently, a metal film such as aluminum is buried in the contact hole to form contact electrodes 11, 35, and 36 (see FIG. 7). In this way, the semiconductor device 60 shown in FIG. 7 is completed.

As described above, according to the third embodiment of the present invention, the same effect as that of the first embodiment can be obtained. Moreover, when manufacturing the same, the dielectric 5 and the element isolation film 31 can be simultaneously formed by the same process. In addition, the electromagnetic shield 7 and the non-doped polysilicon film 33 ′ can be simultaneously formed by the same process. Since the process can be shared, the manufacturing cost of the semiconductor device can be reduced.
(4) Others In the first to third embodiments, the case where the polysilicon film is used as the “semiconductor” constituting the electromagnetic shield 7 has been described. However, in the present invention, the semiconductor constituting the electromagnetic shield 7 is not limited to this. For example, the semiconductor constituting the electromagnetic shield 7 may be an amorphous silicon film. The material is not limited to silicon, and may be, for example, germanium (Ge) or silicon germanium (SiGe). Similarly, the materials of the “first semiconductor layer” and “second semiconductor layer” of the present invention are not limited to silicon, and may be, for example, germanium or silicon germanium. Even if it is such a structure, the effect similar to said each embodiment can be acquired.

  In the above first to third embodiments, the case where the “first conductivity type” of the present invention is the P type and the “second conductivity type” is the N type has been described, but the present invention is limited to this. There is no. The first conductivity type may be N type and the second conductivity type may be P type. That is, an electromagnetic shield may be formed via a dielectric on the P-type region of a photodiode made of a PN junction. Even if it is such a structure, the effect similar to said each embodiment can be acquired.

(5) Comparison between the Present Invention and the Conventional Example FIG. 9 is a diagram comparing the structure and the capacitance value in the present invention and the conventional example. As shown in FIG. 9, in this comparison, each of 3 × 10 ¹⁴ impurity concentration in the P- region 1,101 [cm ^-3], respectively the impurity concentration in the N- region 3,103 2 × 10 ¹⁶ [cm ^{- 3} ] and the impurity concentration in the P + region 105 were set to 3 × 10 ¹⁹ [cm ⁻³ ], respectively. The thickness of the dielectric (silicon oxide film) 5 was set to 5000 [Å], and the thickness of the electromagnetic shield (polysilicon film) 7 was set to 2500 [Å]. Further, in Conventional Example 3, the area ratio of the P + region 105 and the N− region 103 in plan view is set to 1: 1. Under such settings, the inventor calculated the capacities of the conventional examples 2 and 3 and the present invention, respectively.

The result is as shown in FIG. In Conventional Example 2, the junction capacitance C _{P + N−} between the P + region 105 and the N− region 103 is 0.420 [fF / μm ² ], and is between the N− region 103 and the P− region 101. The junction capacitance C _NP− was 0.043 [fF / μm ² ], and the total C _{total of the} junction capacitance was 0.463 [fF / μm ² ]. In Conventional Example 3, the junction capacitance C _{P + N−} between the P + region 105 and the N− region 103 is 0.210 [fF / μm ² ], and the N− region 103 and the P− region 101 The junction capacitance C _NP− between them was 0.043 [fF / μm ² ], and the total C _{total of the} junction capacitances was 0.253 [fF / μm ² ]. Compared to Conventional Example 2, Conventional Example 3 has a junction capacitance C _{P + N− that} is 50% lower.

On the other hand, in the present invention, the junction capacitance C _oxide between the electromagnetic shield 7 and the N− region 3 with the dielectric 5 interposed therebetween is 0.058 [fF / μm ² ]. The junction capacitance C _NP− between the region 1 and the region 1 was 0.043 [fF / μm ² ], and the total C _{total of the} junction capacitance was 0.101 [fF / μm ² ].
As described above, according to the structure of the present invention, the electromagnetic shielding effect can be sufficiently exerted, and the junction capacity can be reduced by 80% with respect to Conventional Example 2 and 45% with respect to Conventional Example 3.

1 P-region (P-type silicon substrate)
2 Photodiode 3 N-region (N-type well layer)
3a PN junction surface 3b (on the side opposite to the PN junction surface) 5 Dielectric 7 Electromagnetic shield 9 N + layer 10 Light receiving element 11 Contact electrode 13 Back electrode 20 Transistor 21 Gate insulating film 23 Gate electrode 25 N + layer (source)
26 N + layer (drain)
27 Contact electrode (source electrode)
28 Contact electrode (drain electrode)
29, 31 Element isolation film 30 Polysilicon resistor 33 (N-type) polysilicon film 33 ′ (non-doped) polysilicon film 35, 36 Contact electrode 37 Resist 50, 60 Semiconductor device

Claims (2)

A method of manufacturing a semiconductor device comprising: a light receiving element forming step of forming a light receiving element on a substrate; and a MOS transistor forming step of forming a MOS transistor on the substrate,
The light receiving element forming step includes:
Light transmission on a second surface of the second conductivity type second semiconductor layer bonded to the first conductivity type first semiconductor layer on the opposite side of the first surface bonded to the first semiconductor layer. Forming a dielectric having a property;
An electromagnetic shield forming step of forming an electromagnetic shield made of a semiconductor having light permeability on the dielectric, and
The MOS transistor forming step includes
Forming a gate insulating film on the substrate;
Forming a gate electrode on the gate insulating film, and
A method of manufacturing a semiconductor device, wherein the electromagnetic shield forming step and the gate electrode forming step are simultaneously performed in the same process. In the electromagnetic shield forming step and the gate electrode forming step,
2. The method of manufacturing a semiconductor device according to claim 1, wherein a polysilicon film is formed as the semiconductor, and the polysilicon film is patterned to form the electromagnetic shield and the gate electrode.

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