JP6205970B2 - Circuit design electrical check system - Google Patents

Description

  The present invention relates to a circuit design electrical check system used in circuit design of a PCB (Printed Circuit Board) and a PWB (Printed Wiring Board).

  In PCB and PWB circuit design, circuit diagram information is input, and a design rule check is performed to determine whether there is a problem as a circuit diagram based on the component (symbol) information. Proceed to layout design for wiring and wiring between parts.

  Recently, when checking the above design rules, it is possible to check whether there is a problem in connection for each pin of the component by adding electrical information to the component in the circuit diagram in advance. Yes. Specifically, for example, when the voltage of a certain pin of a certain part is set to “3.3V”, the voltage of the pin of another part connected to that pin is set to “5.0V”. If there is, the connection is violated, and the fact that it is violated is output as a check result. Note that the power supply voltage of the internal cell connected to the pin is used as the set voltage for the pin. In addition, a tolerant value (allowable value) according to the characteristics of the internal cell may be set separately.

  On the other hand, Patent Documents 1 to 4 disclose techniques for performing an electrical check when designing a printed circuit board or the like.

In addition, the applicant
・ Check the component pin electrical information using the supply voltage from the power supply pin, not a constant. ・ Check the component pin electrical information using a tolerant formula instead of a constant. ・ Energy saving mode A technology that enables checking of misuse of parts not supporting partial power down and checking using non-mounting information in a common circuit diagram for multiple models is proposed (Patent Document 5).

  According to the technique of Patent Document 5 described above, there is an advantage that the labor of changing the constant can be eliminated. For a specific event, a problem that is not originally an error is erroneously detected as an error, and the error detection accuracy cannot be increased.

  First, when the internal circuit on the output pin side of a component has an OD / OC (Open Drain / Open Collector) characteristic, the power supply voltage of the component is set to the I / F voltage, so that the I / F of the output pin is set. If the voltage exceeds the allowable voltage of the component connected to the subsequent stage, an error is detected. When there is an OD / OC characteristic, there is no output of the power supply voltage of the part from the part, so it is not an error.

  Second, when all the power supplies of a specific part are turned off by the energy saving mode, the supply voltage set directly to the output pin of the part or the power supply voltage of the power supply pin depending on the output pin is used as the I / F voltage. As a result, an error is detected when the I / F voltage of the output pin exceeds the allowable voltage of the component connected to the subsequent stage. When all the power supplies of the part are turned off, the voltage of the output pin of the part becomes indefinite, and there is no effective voltage output.

  Third, for a DDR (Double Data Rate) component that is a kind of RAM (Random Access Memory), there is a termination resistor circuit (a voltage half the supply voltage is supplied via the termination resistor) to obtain an output from the DDR. On the circuit, it cannot be distinguished from a pull-up resistor, and the current wraparound error is detected because the I / F voltage does not match. The termination resistor circuit is indispensable for normally outputting data from the DDR, and is not an error in nature.

  The present invention has been proposed in view of the above-described conventional problems, and an object of the present invention is to increase the error detection accuracy of an electrical check related to the I / F voltage.

  In order to solve the above problems, in the present invention, there is provided a circuit design electrical check system for checking electrical rules of components arranged on a PCB or PWB, wherein the components are obtained from net information indicating connection of components. Interface voltage acquisition / calculation means for acquiring or calculating an interface voltage indicating a voltage output to the output pin by referring to electrical information for each pin of the component, and obtaining the interface voltage The calculation means changes the calculation or acquisition of the interface voltage according to the component characteristics or state.

  In the present invention, it is possible to improve the error detection accuracy of the electrical check related to the I / F voltage.

It is a figure which shows the structural example of the circuit design electrical check system concerning one Embodiment of this invention. It is a figure which shows the structural example of the circuit design electrical check apparatus 4 comprised on the client 3 like software. It is FIG. (The 1) which shows the example of the check content. It is FIG. (2) which shows the example of a check content. It is FIG. (3) which shows the example of the check content. It is a flowchart which shows the process example of an I / F voltage check. It is a figure which shows the example of an I / F voltage check when an internal circuit has an OD / OC characteristic. It is a figure which shows the example of an I / F voltage check in the case of energy saving mode. It is a flowchart which shows the example of a process of a current wraparound check. It is a figure which shows the example of a current wraparound check in case there exists a terminal resistance circuit of DDR.

  Hereinafter, preferred embodiments of the present invention will be described.

<Configuration>
FIG. 1 is a diagram showing a configuration example of a circuit design electrical check system according to an embodiment of the present invention.

  In FIG. 1, a data storage server 1 for storing various data necessary for PCB and PWB circuit design and a client 3 such as a PC (Personal Computer) operated by a designer are connected on a network 2. Has been. The client 3 includes a circuit design electrical check device 4 configured by software.

  The data storage server 1 is supplied to the circuit with net information 11 indicating a connection relationship between components constituting the circuit, electrical information 12 indicating electrical information about each pin of the components constituting the circuit, and the circuit. A power supply list 13 indicating power supply and grounding information is held. Details of the individual information will be described later.

  FIG. 2 is a diagram showing a configuration example of the circuit design electrical check device 4 configured on the client 3 as software.

  In FIG. 2, the circuit design electrical check device 4 includes a power supply voltage value check unit 41, an I / F voltage check unit 42, a current wraparound check unit 43, a connection matching check unit 44, and a Hi-Z state correspondence check unit 45. An input open check unit 46, a tolerance / orientation check unit 47, and an energy saving check unit 48 are included.

  The power supply voltage value check unit 41 performs a power supply voltage value check as shown in FIG. In the example shown in the figure, the power supply pin of the component (IC) is rated 1.8V, whereas the power supply connected on the circuit is 3.3V, so an error is detected as the power supply voltage value is mismatched. To do.

  The I / F voltage check unit 42 performs an I / F voltage check as shown in FIG. In the illustrated example, the I / F voltage of the output pin of the left part is 3.3V, and the I / F voltage of the input pin of the right part is 5V. Is detected.

  The current sneak check unit 43 performs a current sneak check as shown in FIG. In the illustrated example, the I / F voltage of the component (IC) is 5V, and a 3.3V power source is connected to the component (IC) via a resistor. Therefore, an error is detected as a current sneaking to the power source occurs.

  The connection consistency check unit 44 performs a connection consistency check as shown in FIG. In the example shown in the figure, the output pin of the left part and the output pin of the right part are connected to the upper part (correctly, the input pin is connected to the output pin), so an error is detected as the connection is not consistent. . In the lower stage, since the pull-up resistor is connected despite the fact that the output pin of the left part is not in the Hi-Z state, an error is detected because the connection is not consistent.

  The Hi-Z state correspondence check unit 45 performs a Hi-Z state correspondence check as shown in FIG. In the illustrated example, since the pull-up resistor is not connected even though the output pin of the left part is in the Hi-Z state, an error is detected as not corresponding to the Hi-Z state.

  The input open check unit 46 performs an input open check as shown in FIG. In the illustrated example, an error is detected because the input pin or input / output pin of the component is open without being connected anywhere.

  The resistance / orientation checking unit 47 performs resistance / orientation checking as shown in FIG. In the illustrated example, the left capacitor is determined to be normal because the rated voltage of the capacitor is 10 V and the voltage applied on the circuit is 5 V. For the center diode, the DC reverse voltage is 30V, while the applied reverse voltage is 36V (= 24 + 12), so an error is detected. The right capacitor detects an error because the positive and negative poles and the power source are opposite in polarity. In addition, in the tolerance / orientation check, the transistor potential difference is also checked.

  The energy saving check unit 48 performs an energy saving check as shown in FIG. In the illustrated example, the power supply of the left block indicated by the dotted line is turned off by PPD (Partial Power Down) for energy saving, the power supply of the right block is turned on, and the parts belonging to the left block correspond to the PPD. Since it is not a component (a component in which the pin is in a high impedance state when the power is turned off), an error is detected.

<Operation>
FIG. 6 is a flowchart showing an example of the I / F voltage check process performed by the I / F voltage check unit 42 (FIG. 2). Hereinafter, the processing contents will be described according to a specific example.

  FIG. 7 is a diagram illustrating an example of an I / F voltage check when the internal circuit has an OD / OC characteristic. Although the net information 11 is shown as a circuit diagram for ease of understanding, the data shows the connection between component pins and signal names, and the connection with the power source, ground, etc., and the expression format is not limited.

  6 and 7, first, an O pin (Output Pin) of a component connected to the net is specified from the net information 11 (step S101). Here, it is assumed that the pin number “10” of the component “IC1” is specified.

  Next, the OC / OD of the O pin is acquired from the electrical information 12 (step S102). “Yes” is acquired as the OC / OD corresponding to the pin number “10” of the component “IC1”.

  Next, it is determined whether OC / OD is “present” (step S103). In this example, it is determined as “present”.

  When it is determined that OC / OD is “present” (Yes in step S103), the voltage value of the pull-up power supply connected to the O pin is acquired from the net information 11 (step S104). In this example, “3.3V” is acquired.

  Next, the acquired voltage value is determined as an I / F voltage value (step S105). In the above example, “3.3 V” is the I / F voltage value of the pin number “10” of the component “IC1”.

  Next, the I pin (Input Pin) of the component connected to the O pin is specified from the net information 11 (step S109). In this example, the pin number “6” of the component “IC2” and the pin number “6” of the component “IC3” are specified as the I pins connected to the O pin of the pin number “10” of the component “IC1”.

  Next, the tolerant value of the I pin is acquired / calculated from the electrical information 12 (step S110). For the pin number “6” of the component “IC2”, the supply voltage pin number is “4”, and the power supply voltage plus “0.7 V” is the tolerant value, so the tolerant value “4 V”. Get. For the pin number “6” of the component “IC3”, the supply voltage pin number is “4”, and the power supply voltage plus “0.7 V” is the tolerant value, so the tolerant value “5. 7V "is obtained.

  Next, the I / F voltage value and the tolerant value are compared (step S111). Since the tolerant values “4V” and “5.7V” are both higher than the I / F voltage value “3.3V” (step S111 = <), a check (OK) is output indicating that there is no problem (step). S113).

  By the above processing, an erroneous error is not detected even when the internal circuit on the output pin side of the component has an OD / OC characteristic.

  FIG. 8 is a diagram illustrating an example of the I / F voltage check in the energy saving mode.

  6 and 8, first, an O pin (Output Pin) of a component connected to the net is specified from the net information 11 (step S101). Here, it is assumed that the pin number “10” of the component “IC1” is specified.

  Next, the OC / OD of the O pin is acquired from the electrical information 12 (step S102). Since OC / OD is not set to the pin number “10” of the component “IC1”, acquisition is not performed (cannot be performed).

  Next, it is determined whether OC / OD is “present” (step S103). In this example, it is determined that “None”.

  When it is determined that the OC / OD is “none” (No in step S103), the state of all the power supplies of the component of the O pin is acquired from the power supply list 13 (step S106). Although there are two P pins (Power Pin) of the component “IC1”, both are connected to the power supply VDD, and the state is acquired as “OFF”.

  Next, it is determined whether or not all power supplies are OFF (step S107). In the present example, it is determined that all the power supplies are OFF.

  If it is determined that all power supplies are OFF (Yes in step S107), the O pin is determined to be indefinite that is not at any of L level, H level, or NC (Non Connection), and the O pin is retrieved from the net information 11. The voltage value of the pull-up power supply connected to is acquired (step S104). In this example, “3.3V” is acquired.

  Next, the acquired voltage value is determined as an I / F voltage value (step S105). In the above example, “3.3 V” is the I / F voltage value of the pin number “10” of the component “IC1”.

  Next, the I pin (Input Pin) of the component connected to the O pin is specified from the net information 11 (step S109). In this example, the pin number “40” of the component “IC2” is specified as the I pin connected to the O pin of the pin number “10” of the component “IC1”.

  Next, the tolerant value of the I pin is acquired / calculated from the electrical information 12 (step S110). For the pin number “40” of the component “IC2”, the supply voltage pin number is “22”, and the power supply voltage plus “0.7 V” is the tolerant value, so the tolerant value “4 V”. Get.

  Next, the I / F voltage value and the tolerant value are compared (step S111). Since the tolerant value “4V” is higher than the I / F voltage value “3.3V” (= <in step S111), the fact that there is no problem in checking (OK) is output (step S113).

  With the above processing, an erroneous error is not detected even when all power supplies of a specific part are turned off by the energy saving mode.

  FIG. 9 is a flowchart showing a processing example of current sneak check by the current sneak check unit 43 (FIG. 2). Hereinafter, the processing content will be described along a specific example.

  FIG. 10 is a diagram illustrating an example of a current wraparound check when there is a DDR termination resistor circuit.

  9 and 10, first, the O pin (Output Pin) of the component connected to the net is specified from the net information 11 (step S201). Here, it is assumed that the pin number “10” of the component “IC1” is specified.

  Next, the OC / OD of the O pin is acquired from the electrical information 12 (step S202). Since OC / OD is not set to the pin number “10” of the component “IC1”, acquisition is not performed (cannot be performed).

  Next, it is determined whether OC / OD is “present” (step S203). In this example, it is determined that “None”.

  If it is determined that the OC / OD is “none” (No in step S203), the status of all power supplies of the component of the O pin is acquired from the power supply list 13 (step S206). The P pin (Power Pin) of the component “IC1” is connected to the power supply VCC, and the status is “ON”.

  Next, it is determined whether or not all power supplies are OFF (step S207). In the present example, it is determined that all the power supplies are not OFF.

  When it is determined that all the power supplies are not OFF (No in step S207), the voltage value of the O pin is acquired directly or via the supply voltage pin (step S208). In the present example, “2.5 V” is directly acquired.

  Next, the acquired voltage value is determined as an I / F voltage value (step S205). In the above example, “2.5 V” is the I / F voltage value of the pin number “10” of the component “IC1”.

  Next, the operation mode of the O pin and other pins connected to the O pin is acquired from the electrical information 12 (step S209). In this example, “DDR / DDR2” is acquired from the O pins of the components “IC2” and “IC3”.

  Next, the voltage value of the pull-up power supply connected to the O pin is acquired from the net information 11 (step S210). In this example, “1.25V” of the power supply VTT is acquired.

  Next, it is determined whether or not the operation mode is “DDR...” (Step S211). In the present example, it is determined that “DDR.

  When it is determined that the operation mode is “DDR...” (Yes in step S211), the value obtained by dividing the I / F voltage value by 2 is compared with the pull-up voltage value (step S212). Instead of dividing the I / F voltage value by 2, the pull-up voltage value may be doubled for comparison. In this example, since “1.25V” obtained by dividing the I / F voltage value “2.5V” by 2 is equal to the pull-up voltage value “1.25V”, the check outputs that there is no problem (OK). (Step S215).

  By the above processing, an erroneous error is not detected even when there is a DDR termination resistor circuit.

<Summary>
As described above, according to the present embodiment, it is possible to improve the error detection accuracy of the electrical check related to the I / F voltage.

  The present invention has been described above by the preferred embodiments of the present invention. While the invention has been described with reference to specific embodiments, various modifications and changes may be made to these embodiments without departing from the broad spirit and scope of the invention as defined in the claims. Obviously you can. In other words, the present invention should not be construed as being limited by the details of the specific examples and the accompanying drawings.

DESCRIPTION OF SYMBOLS 1 Data storage server 11 Net information 12 Electrical information 13 Power supply list 2 Network 3 Client 4 Circuit design electrical check apparatus 41 Power supply voltage value check part 42 I / F voltage check part 43 Current wraparound check part 44 Connection matching check part 45 Hi -Z state check section 46 Input open check section 47 Resistance / orientation check section 48 Energy saving check section

JP 2001-67390 A Japanese Patent Laid-Open No. 11-53426 JP-A-10-198708 Japanese Patent No. 3499673 Japanese Patent No. 4589207

Claims (4)

A circuit design electrical check system for checking electrical rules of components arranged on a PCB or PWB,
Identify the component output pin from the net information indicating the connection of the component, and refer to the electrical information for each component pin to acquire or calculate the interface voltage indicating the voltage output to the output pin. A calculation means,
The circuit design electrical check system, wherein the interface voltage acquisition / calculation means changes the calculation or acquisition of the interface voltage in accordance with a characteristic or state of a component. The circuit design electrical check system according to claim 1,
The interface voltage acquisition / calculation means acquires the voltage of the pull-up power source connected to the output pin as the interface voltage instead of the supply voltage of the output pin when the component output pin has OC / OD characteristics. -Circuit design electrical check system characterized by calculating. The circuit design electrical check system according to claim 1,
The interface voltage acquisition / calculation means replaces the supply voltage of the output pin with the voltage of the pull-up power supply connected to the output pin when all of the power supplied to the component to which the output pin belongs is OFF. A circuit design electrical check system characterized by acquiring and calculating as an interface voltage. The circuit design electrical check system according to claim 1,
Comparing the interface voltage of the component output pin with the voltage of the other power supply, the current wraparound check means for checking the occurrence of current wraparound between the component output pin and the other power supply,
The current sneak check means compares the value obtained by dividing the interface voltage of the output pin by 2 with the voltage of another power source when the other component connected to the output pin of the component is a DDR, or the interface voltage A circuit design electrical check system characterized by comparing the value obtained by doubling the voltage of the other power supply.