JP6178835B2 - Solid-state imaging device and camera - Google Patents

Description

  The present invention relates to a solid-state imaging device and a camera.

  In Patent Document 1, as a solid-state imaging device to which a focus detection function of a phase difference detection method is added, N adjacent pixels are set as one set, and one microlens is provided on N pixels belonging to the same set. A solid-state imaging device having an arranged configuration is disclosed.

JP 2001-250931 A

  In the solid-state imaging device described in Patent Document 1, since the transistors constituting the pixels are arranged on the light receiving surface side, the area of the light receiving unit is limited by the transistors and the wiring pattern. Therefore, it becomes difficult to obtain sufficient sensitivity when the pixel size is reduced.

  The present invention has been made in light of the above problem recognition, and an object thereof is to provide a technique advantageous in improving sensitivity in a solid-state imaging device having a configuration in which a plurality of pixels are assigned to each microlens. And

  One aspect of the present invention relates to a solid-state imaging device including a semiconductor substrate having first and second surfaces opposite to each other, the solid-state imaging device including a first photoelectric conversion unit disposed on the semiconductor substrate, and A plurality of pixel sets each including a second photoelectric conversion unit, a wiring layer disposed on the first surface side of the semiconductor substrate, and a plurality of layers disposed on the second surface side of the semiconductor substrate Each of the plurality of microlenses is formed on the second surface of the first photoelectric conversion unit and the second photoelectric conversion unit of the corresponding one of the plurality of pixel sets. Each of the first photoelectric conversion unit and the second photoelectric conversion unit includes a first semiconductor region of a first conductivity type including a region for accumulating charges, and the first photoelectric conversion unit The first semiconductor region of the conversion unit is parallel to the first surface. A first portion whose width in the direction is a first width; and a second portion which is disposed between the first portion and the second surface and whose second width is larger than the first width in the direction. A second semiconductor region is disposed in a region between the second portions closest to each other, the second portions belonging to different pixel sets, and a second conductivity type impurity in the second semiconductor region The concentration is higher than the impurity concentration of the second conductivity type in the region between the second portions of the first photoelectric conversion unit and the second photoelectric conversion unit belonging to the same pixel set.

  ADVANTAGE OF THE INVENTION According to this invention, the technique advantageous for the improvement of the sensitivity in the solid-state imaging device which has the structure by which the some pixel was allocated with respect to each micro lens is provided.

FIG. 3 is a plan view illustrating a configuration example of a pixel set according to the first embodiment. The figure which illustrates the circuit structure (equivalent circuit) of a pixel. Sectional drawing along the AB line of Fig.1 (a). The figure which shows the structural example of the pixel set seen from the wiring layer side. The top view which shows the structural example of the pixel set of 2nd Embodiment. Sectional drawing along AB line of FIG.5 (c). The figure which shows the structural example of the pixel set seen from the wiring layer side. Sectional drawing which shows the structural example of the pixel set of 4th Embodiment. Sectional drawing which shows the structural example of the pixel set of 4th Embodiment. The figure which illustrates the circuit structure (equivalent circuit) of the pixel of 5th Embodiment. Sectional drawing which shows the structural example of the pixel set of 6th Embodiment. The figure which shows typically the structure of the solid-state imaging device of embodiment.

  A solid-state imaging device according to a first embodiment of the present invention will be described with reference to FIGS. 12A and 12B are a cross-sectional view and a plan view, respectively, schematically showing the configuration of the solid-state imaging device 1 according to a representative embodiment of the present invention. The solid-state imaging device 1 includes a semiconductor substrate 10 having a first surface 11 and a second surface 12 that are opposite surfaces. FIG. 12B is a diagram of the solid-state imaging device 1 viewed from the second surface 12 side. The solid-state imaging device 1 includes a pixel array 20 in which a plurality of pixel sets 50 are arranged, and a plurality of microlenses 30 arranged so that one microlens 30 is assigned to each pixel set 50. . Each pixel set 50 includes a plurality of pixels 51, 52, 53, and 54, and each pixel includes a photoelectric conversion unit PD and a wiring pattern 60 that constitutes a part of a circuit in the pixel. The photoelectric conversion unit PD is formed on the semiconductor substrate 10, the wiring pattern 60 is arranged on the first surface 11 side of the semiconductor substrate 10, and the plurality of microlenses 30 are on the second surface 12 side of the semiconductor substrate 10. Has been placed. The solid-state imaging device 1 may be implemented as a MOS type image sensor, may be implemented as a CCD image sensor, or may be implemented as another image sensor.

  FIG. 1 shows two configuration examples of the pixel set 50. The dotted line indicates the area of each pixel 51, 52, 53, 54. The configuration example illustrated in FIG. 1A is an example in which two pixels 51 and 52 are assigned to one microlens 30, that is, an example in which the pixel set 50 is configured by two pixels 51 and 52. . The configuration example shown in FIG. 1B is an example in which four pixels 51, 52, 53, 54 are assigned to one microlens 30, that is, the pixel set 50 includes four pixels 51, 52, 53, 54 is an example. Note that the number and arrangement of the pixels constituting the pixel set 50 are not limited to the configuration examples illustrated in FIGS.

  Due to the configuration in which one microlens 30 is assigned to one pixel set 50 including a plurality of pixels, different regions in the pupil of the photographing lens for forming an image of a subject on the imaging surface of the solid-state imaging device 1 are provided. The passed light can be detected by the plurality of pixels. For convenience of explanation, it is assumed that different areas in the pupil of the photographic lens are a first area and a second area, and a plurality of pixels in each pixel set 50 includes a first pixel and a second pixel. A first image is obtained by detecting light that has passed through the first region at each of the first pixels of the plurality of pixel sets 50, and light that has passed through the second region is detected at each second pixel of the plurality of pixel sets 50. A second image is obtained by detecting at. From the shift between the first image and the second image, the shift amount (that is, the defocus amount) between the image formed by the photographing lens and the imaging surface of the solid-state imaging device 1 or the distance to the subject can be detected. Such a method is called a phase difference detection method. In the example of FIG. 1A, for example, the first image is obtained from the signal of the pixel 51 of each pixel set 50, and the second image is obtained from the signal of the pixel 52 of each pixel set 50. In the example of FIG. 1B, for example, the first image is obtained by adding the signals of the pixels 51 and 52 (or 51 and 53) of each pixel set 50, and the pixels 53 and 54 ( Alternatively, the second image is obtained by adding the signals of 52 and 54). In the example of FIG. 1B, the phase difference can be detected in the vertical direction and the horizontal direction by changing the pixel to which the signal is added. In a normal imaging operation, signals of all pixels under one micro lens 30 can be added.

  FIG. 2 is a diagram illustrating a circuit configuration (equivalent circuit) of each pixel constituting the pixel set 50. The pixel 201 includes at least a photoelectric conversion unit (for example, a photodiode) PD and a wiring pattern. The photoelectric conversion unit PD accumulates charges generated by photoelectric conversion of incident light. When the solid-state imaging device 1 is configured as a MOS type image sensor, the wiring pattern is, for example, a wiring pattern that configures the control lines 208, 209, 210, the vertical output line 212, or the like, or a wiring pattern that connects transistors together. May be included. When the solid-state imaging device 1 is configured as a CCD image sensor, the wiring pattern can include, for example, a wiring pattern that transmits a driving pulse of a vertical CCD.

  FIG. 2 shows an example of a pixel when the solid-state imaging device 1 is configured as a MOS image sensor. The pixel 201 can include a transfer transistor 203, a floating diffusion 204, a reset transistor 206, a selection transistor 207, and an amplification transistor 205 in addition to the photoelectric conversion unit PD. The reset transistor 206 is connected between the power supply line 211 and the floating diffusion 204. The reset transistor 206 resets the potential of the floating diffusion 204 to the reset potential in response to a reset pulse being applied to the control line (reset signal line) 209. The transfer transistor 203 transfers the charge accumulated in the photoelectric conversion unit PD to the floating diffusion 204 in response to the transfer pulse being applied to the control line (transfer signal line) 208. As a result, the potential of the floating diffusion 204 changes. The amplification transistor 205 outputs a signal corresponding to the potential of the floating diffusion 204 to the vertical output line 212. The amplification transistor 205 constitutes a source follower amplifier together with a current source 213 connected in series to the vertical output line 212. The selection transistor 207 is a transistor for selecting a pixel in a reading target row, and a pixel in a reading target row is selected while the control line (row selection line) 210 is at an active level.

  One of the two diffusion regions (source and drain) of the transfer transistor 203 is shared with the photoelectric conversion unit PD, and the other is shared with the floating diffusion 204. The gate electrode of the transfer transistor 203 forms a channel for transferring the charge accumulated in the photoelectric conversion unit PD to the floating diffusion 204.

  FIG. 3 is a cross-sectional view taken along line AB in FIG. The configuration of the solid-state imaging device 1 or the pixel set 50 according to the first embodiment will be described with reference to FIG. In the example shown in FIG. 3, an n-type semiconductor substrate 10 is used. Between different pixel sets 50, the pixels are separated from each other by a deep p-well 302. Within the same pixel set 50, the pixels are separated from each other by a deep p-well 312. The photoelectric conversion unit PD is formed in a region where the p-wells 302 and 312 are not formed. The photoelectric conversion unit PD includes an n region 301 and an n + region 303 for accumulating signal charges. The photoelectric conversion unit PD is disposed on the p + region 304 disposed on the first surface side (wiring layer side) when viewed from the n + region 303 and on the second surface side (light receiving surface side) when viewed from the n region 301. The p + region 305 is configured as a buried photodiode. The p + region 305 on the light receiving surface side covers the entire area of the pixel array. The gate electrode 307 is a gate electrode of the transfer transistor 203 that transfers charges from the n + region 304 that is a charge storage region of the photoelectric conversion unit PD to the floating diffusion 204. The gate electrode 307 is disposed on the first surface via a gate insulating film (not shown). The FD 204 is an n region.

  In FIG. 3, only the transfer transistor is shown among the transistors constituting the pixel set 50 or the pixel, but other transistors may be arranged in the cross section along the line AB in FIG. A wiring layer 308 is disposed on the first surface 11 side of the semiconductor substrate 10. The wiring layer 308 has a structure in which the wiring pattern 60 is disposed in the insulating film 320. A micro lens 30 is disposed on the second surface 12 side of the semiconductor substrate 10. A color filter 310 may be disposed between the microlens 30 and the semiconductor substrate 10. An insulating layer 311 may be disposed between the color filter 310 and the semiconductor substrate 10. The insulating layer 311 defines the distance between the microlens 30 and the semiconductor substrate 10 according to the focal length of the microlens 30.

  The n + region 303, which is the charge storage region of the photoelectric conversion unit PD, is completely depleted at the time of resetting, and then stores electrons generated by photoelectric conversion in response to light incidence. For this reason, the photoelectric conversion unit PD can be as close to the adjacent photoelectric conversion unit PD as possible in a range in which the separation from the floating diffusion 204 and the photoelectric conversion unit PD of the adjacent pixel is maintained, so that an area as large as possible can be secured. In FIG. 3, the area of the photoelectric conversion part PD is larger on the second surface 12 side (light receiving surface or microlens 30 side) than on the first surface 11 side (wiring layer 308 side). Thereby, incident light can be efficiently photoelectrically converted and the generated charges can be accumulated in the photoelectric conversion unit PD. The area here is an area in a plane parallel to the first surface or the second surface.

  FIG. 4 shows four configuration examples of the pixel set 50 viewed from the wiring layer 308 side. 4A, 4C, and 4D correspond to the configuration example shown in FIG. 1A, and FIG. 4B corresponds to the configuration example shown in FIG. The dotted lines in the outer frame in FIGS. 4A to 4D indicate the boundary lines of the pixel set 50. 4A to 4D, only the photoelectric conversion unit PD, the gate electrode 307 of the transfer transistor, and the floating diffusion 204 are shown in the circuit configuration described in FIG. Other amplification transistors, reset transistors, selection transistors, and wiring patterns are not shown. 4A to 4D, reference numerals 404 and 405 denote contact holes. FIG. 4A corresponds to FIG. FIG. 4D will be described in detail later.

  According to the first embodiment, the wiring pattern 60 is disposed on the first surface 11 side of the semiconductor substrate 10, and the microlens 30 is disposed on the second surface 12 side of the semiconductor substrate 10. There is no light shielding, and the area where light can be received can be increased. Furthermore, according to the first embodiment, when the pixel set 50 includes a circuit element such as a transistor, the circuit element is disposed on the first surface 11 side of the semiconductor substrate 10, so that light shielding by the circuit element is prevented. In addition, the area where light can be received can be increased.

  A solid-state imaging device according to a second embodiment of the present invention will be described with reference to FIGS. Matters not mentioned here can follow the first embodiment. FIG. 5 shows three configuration examples of the pixel set 50 in the second embodiment. In the second embodiment, each pixel set 50 includes, as a plurality of photoelectric conversion units, a first photoelectric conversion unit and a plurality of second photoelectric conversion units arranged so as to surround the first photoelectric conversion unit.

  In the example of FIG. 5A, one pixel set 50 includes three pixels 502, 503, and 504 each including a photoelectric conversion unit, and one microlens 30 is provided for each of the three pixels 502, 503, and 504. Is formed. In the example of FIG. 5B, one pixel set 50 is configured by five pixels 505 to 509 each including a photoelectric conversion unit, and one microlens 30 is formed for the five pixels 505 to 509. . In the example of FIG. 5C, one pixel set 50 is configured by nine pixels 510 to 518 each including a photoelectric conversion unit, and one microlens 30 is formed for the nine pixels 510 to 518. .

  In the example of FIG. 5A, the pixel 504 including the first photoelectric conversion unit is surrounded by two pixels 502 and 503 including the second photoelectric conversion unit, respectively. That is, the first photoelectric conversion unit is surrounded by the two second photoelectric conversion units. In the example of FIG. 5B, the pixel 509 including the first photoelectric conversion unit is surrounded by four pixels 505 to 508 each including the second photoelectric conversion unit. That is, the first photoelectric conversion unit is surrounded by the four second photoelectric conversion units. In the example of FIG. 5C, the pixel 514 is surrounded by eight pixels 510 to 513 and 515 to 518 each including the second photoelectric conversion unit. That is, the first photoelectric conversion unit is surrounded by the eight second photoelectric conversion units.

  In such a configuration, when a pixel wiring pattern is arranged between the microlens 30 and the semiconductor substrate 10, wiring for reading the signal of the first photoelectric conversion unit surrounded by the second photoelectric conversion unit. The second photoelectric conversion unit can be shielded by the pattern. On the other hand, according to the configuration in which the wiring pattern is arranged on the first surface 11 side of the semiconductor substrate 10 and the microlens 30 is arranged on the second surface 12 side of the semiconductor substrate 10 as in the present invention, The semiconductor substrate 10 or the photoelectric conversion unit is not shielded from light. Therefore, the light receiving area (area where light can be received) can be increased, thereby improving the sensitivity.

  FIG. 6 is a cross-sectional view taken along the line AB in FIG. In the example illustrated in FIG. 6, one pixel set 50 corresponding to one microlens 30 includes three pixels 513, 514, and 515. Each of the pixels 513, 514, and 515 includes a transfer transistor gate electrode 307, a floating diffusion 204, a transistor (not shown) (for example, a reset transistor, an amplification transistor, and a selection transistor) and a wiring pattern 60. Even in a configuration in which the pixel 514 is surrounded by pixels such as the surrounding pixels 513 and 515, the photoelectric conversion unit PD is not compressed and is not shielded from light.

  FIG. 7 shows three configuration examples of the pixel set 50 as viewed from the wiring layer 308 side. 7A to 7C show only the photoelectric conversion unit PD, the transfer transistor gate electrode 307, and the floating diffusion 204 in the circuit configuration described in FIG. Other amplification transistors, reset transistors, selection transistors, and wiring patterns are not shown. FIG. 7A corresponds to FIG. 5A, FIG. 7B corresponds to FIG. 5B, and FIG. 7C corresponds to FIG.

  A solid-state imaging device according to a third embodiment of the present invention will be described with reference to FIG. 1, FIG. 3, and FIG. Matters not mentioned here can be in accordance with the first embodiment. In the third embodiment, the photoelectric conversion unit PD and the photoelectric conversion unit PD in one pixel set 50 in which at least a part of at least one circuit element (for example, active element) constituting the pixel corresponds to one microlens 30 Arranged between. In a configuration in which a circuit element (and a wiring pattern) is disposed between the microlens 30 and the semiconductor substrate 10 as in the prior art, when a circuit element is disposed between the photoelectric conversion unit PD and the photoelectric conversion unit PD, a light receiving region is obtained. Becomes smaller. On the other hand, according to the third embodiment, even in a configuration in which at least a part of at least one circuit element (for example, active element) constituting a pixel is arranged between the photoelectric conversion units PD and PD in one pixel set 50. As a result, the light receiving area is not reduced. Therefore, a decrease in sensitivity can be suppressed.

  For example, in the configuration example shown in FIGS. 1A, 3, and 4 A, the gate electrode 307 of the transfer transistor 203 of the pixel 51 is connected to the photoelectric conversion unit PD of the pixel 51 and the photoelectric of the pixel 52 adjacent thereto. It is formed in a separation region between the conversion part PD. Even in such an arrangement, the circuit element and the wiring layer 308 are on the side opposite to the light receiving surface, so that the sensitivity does not decrease. Further, when such an arrangement is allowed, a translationally symmetric layout is possible as viewed from the wiring layer 308 side, so that the charge transfer direction from the photoelectric conversion unit PD to the floating diffusion 204 is the same in all pixels. be able to.

  A translationally symmetric layout is advantageous in order to reduce variations in characteristics from pixel to pixel when misalignment between the mask and the pattern already formed on the semiconductor substrate occurs. For example, consider the case in FIG. 4 where a misalignment between the active region and the polysilicon patterning mask occurs and the gate electrode 307 of the transfer transistor is shifted to the right. In the translationally symmetric layout as shown in FIG. 4A, the shift in the same direction occurs in all the pixels, so that the characteristic variation between the pixels is small. On the other hand, in the layout that is not translationally symmetric as shown in FIG. 4C, the area of the floating diffusion 204 is enlarged and the area of the photoelectric conversion unit PD is reduced in the left pixel, and the area of the photoelectric conversion unit PD is reduced in the right pixel. The area of the floating diffusion 204 is enlarged and reduced. Therefore, there arises a problem that characteristics vary from pixel to pixel.

  In order to obtain the required transfer characteristics, generally, when forming the n + region 303 and the p + region 304, impurity ions are implanted at an angle inclined from the normal direction to the semiconductor substrate. The When the charge transfer direction is common to all the pixels, impurity implantation for forming the n + region 303 and the p + region 304 can be performed at a time. Therefore, since impurities can be implanted under the same conditions in all pixels, variation in transfer characteristics between pixels is small. On the other hand, when the charge transfer direction is not common to all the pixels, it is necessary to perform impurity implantation for forming the n + region 303 and the p + region 304 in a plurality of times and at different angles. Therefore, manufacturing variations in dose amount and implantation angle are unavoidable, and cause transfer characteristics to vary from pixel to pixel. The variation can reduce the accuracy of focus detection when the photoelectric conversion unit is used for focus detection as in the present application. Therefore, in order to suppress variations in transfer characteristics, it is desirable to unify the charge transfer direction for all pixels.

  A solid-state imaging device according to a fourth embodiment of the present invention will be described with reference to FIGS. Matters not mentioned here can follow the first and second embodiments. The fourth embodiment has a feature related to a separation method between pixels in addition to the features in the first and second embodiments. In the configuration shown in FIGS. 8 and 9, a color filter 310 of one color is provided for a plurality of pixels belonging to the pixel set 50 corresponding to one microlens 30. During normal imaging, typically, signals of a plurality of pixels belonging to the pixel set 50 corresponding to one microlens 30 are added and read out. Therefore, when importance is attached to the imaging function, it is not necessary to strictly separate signals between a plurality of pixels belonging to the pixel set 50 corresponding to one microlens 30. On the other hand, if the separation is severe, the charge generated by the light incident between the plurality of photoelectric conversion units belonging to the pixel set 50 corresponding to one microlens 30 does not reach any photoelectric conversion unit and is not accumulated. Can be reduced. On the other hand, pixels corresponding to different microlenses, that is, pixels belonging to different pixel sets are added with color filters of different colors, and are not added at the time of imaging, but are read out as different signals. Incomplete separation causes color mixing. In consideration of the above, in the fourth embodiment, the separation method between pixels belonging to the same pixel set and the separation method between pixels belonging to different pixel sets are different.

  In the configuration of FIG. 8, 801 is the minimum width between the photoelectric conversion units PD of the pixels 51 and 52 belonging to the same pixel set 50, and 802 is the photoelectric conversion unit PD between pixels belonging to different pixel sets 50. The minimum distance between. A feature is that the minimum width 801 is smaller than the minimum width 802. According to such a configuration, the charges generated in the separation regions between the photoelectric conversion units PD of the pixels corresponding to the same microlens 30, that is, the pixels belonging to the same pixel set 50 are caused by any one of the photoelectric conversion units PD. It is easy to accumulate and contributes to the improvement of sensitivity. On the other hand, the charges generated in the separation regions between the photoelectric conversion units PD of the pixels corresponding to the different microlenses 30, that is, the pixels belonging to the different pixel sets 50 are not easily accumulated in any of the photoelectric conversion units PD, thereby preventing color mixing. Contribute to.

  In the configuration of FIG. 9, p + regions 901 are arranged between the photoelectric conversion units PD of pixels corresponding to different microlenses 30, that is, pixels belonging to different pixel sets 50. By providing the p + region 901, a potential gradient is formed, and charges generated on the right side of the p + region 901 are accumulated in the right photoelectric conversion unit PD, and charges generated on the left side are accumulated in the left photoelectric conversion unit PD. Charge movement over the p + region 901 does not occur, and color mixing is reduced. The depth of the p + region 901 may reach the substrate surface on the wiring layer 308 side, that is, the first surface 11.

  More generally, the technical idea of providing the p + region 901 can be explained as follows. The p-type impurity concentration in the region R1 between the n regions 301 where the distance between the n regions 301 (first conductivity type semiconductor regions) of the photoelectric conversion unit PD between the pixels belonging to the same pixel set 50 is the smallest. The maximum value of (concentration of impurity of the second conductivity type) is C1. Further, the p-type impurity concentration (second conductivity type impurity concentration) in the region R2 between the n regions 301 where the distance between the n regions 301 of the photoelectric conversion unit PD between the pixels belonging to different pixel sets 50 is the smallest. ) Is C2. Here, the n region 301 is a semiconductor region in which signal charges can be accumulated. The region R1 is a p-well 312, and the region R2 is provided with a p + region 901 formed by implanting a P-type impurity into the p-well 302. Therefore, the maximum value C1 of the P-type impurity concentration (second conductivity type impurity concentration) in the region R1 is smaller than the maximum value C2 of the p-type impurity concentration (second conductivity type impurity concentration) in the region R2.

  A solid-state imaging device according to a fifth embodiment of the present invention will be described with reference to FIG. Matters not mentioned here can follow the first to fourth embodiments. In the fifth embodiment, two photoelectric conversion units PD share one floating diffusion 204 and amplification transistor 205. According to such a configuration, since signals from the two photoelectric conversion units PD are output via the same path, noise and the like become equal, and the accuracy of the signal is improved.

  In the circuit of FIG. 10, for example, it is possible to form one floating diffusion by connecting two diffusion regions (regions shown as floating diffusion 204) as shown in FIG. 9 with a wiring pattern. However, when such a wiring pattern is used, parasitic capacitance is added and the capacitance of the floating diffusion is increased. Accordingly, it is preferable to arrange the two diffusion regions constituting the floating diffusion at positions close to each other. With the configuration shown in FIG. 4D, the length of the wiring connecting the two diffusion regions can be shortened, so that the capacity of the floating diffusion can be further reduced.

  The electric charge accumulated in the photoelectric conversion unit PD is converted into a voltage in the floating diffusion and transmitted to the input of the amplification transistor. If the capacity of the floating diffusion is small, a small amount of charge can be converted into a large signal voltage. For this reason, it is difficult to be affected by noise riding on the readout circuit after the floating diffusion, and the S / N can be improved.

  A solid-state imaging device according to a sixth embodiment of the present invention will be described with reference to FIG. Matters not mentioned here can follow the first to fifth embodiments. FIG. 11 is a cross-sectional view showing a physical configuration example of the two photoelectric conversion units PD, the gate electrode of the transfer transistor 203, and the floating diffusion 204 in the circuit configuration shown in FIG. The floating diffusion 204 is disposed between the photoelectric conversion unit PD of the pixel 51 and the photoelectric conversion unit PD of the pixel 52 in the pixel set 50. Such a configuration does not require a wiring pattern as in the configuration in which two diffusion regions are connected, and contributes to a reduction in the capacity of the floating diffusion.

  Next, a solid-state imaging device to which functions other than imaging and focus detection are added will be described as a seventh embodiment. In a configuration in which one microlens is formed for one pixel set including a plurality of pixels, a dynamic range expansion function can be added. The ratio between the charge accumulated in the photoelectric conversion unit and the final output voltage of the solid-state imaging device is called a charge conversion coefficient. If the charges accumulated in the photoelectric conversion unit are equal, the larger the charge conversion coefficient, the larger the output voltage. Here, the charge conversion coefficient of at least one pixel of the plurality of pixels formed under the same microlens is designed to be smaller than that of the other pixels. Then, in a pixel with a small charge conversion coefficient, the output voltage is low even if the same amount of charge is received. Therefore, when the output voltage range is fixed, a pixel having a small charge conversion coefficient can read more charges than a saturation charge amount of a pixel having a large charge conversion coefficient. On the other hand, in a low luminance region, a pixel having a large charge conversion coefficient that can obtain a large output voltage even with a small signal charge is advantageous in terms of S / N. Therefore, in the low luminance region, the output of the pixel having a large charge conversion coefficient is used, and in the high luminance region where the output of these pixels is saturated, the output of the pixel having a low charge conversion coefficient is used. In this way, it is possible to expand the dynamic range by combining a plurality of pixel outputs having different charge conversion coefficient values.

  In addition, it is conceivable that some pixels have a global electronic shutter function as a strobe dimming pixel. Such a function can be realized by adding an active element including a memory to an element constituting a part of pixels.

  Hereinafter, as an application example of the solid-state imaging device according to each of the above embodiments, a camera in which the solid-state imaging device is incorporated will be exemplarily described. The concept of a camera includes not only a device mainly intended for photographing but also a device (for example, a personal computer or a portable terminal) that is supplementarily provided with a photographing function. The camera includes the solid-state imaging device according to the present invention exemplified as the above-described embodiment, and a processing unit that processes a signal output from the solid-state imaging device. The processing unit may include, for example, an A / D converter and a processor that processes digital data output from the A / D converter.

1: solid-state imaging device, 10: semiconductor substrate, 11: first surface, 12: second surface, 20: pixel array, 30: microlens, 50: pixel set, PD: photoelectric conversion unit

Claims (7)

A solid-state imaging device including a semiconductor substrate having first and second surfaces opposite to each other,
Wherein each comprises a first photoelectric conversion unit and the second photoelectric conversion unit disposed in the semiconductor substrate, a plurality of pixel group,
A wiring layer disposed on the first surface side of the semiconductor substrate;
A plurality of microlenses arranged on the second surface side of the semiconductor substrate,
Each of the plurality of microlenses is arranged above a region on the second surface side of the first photoelectric conversion unit and the second photoelectric conversion unit of a corresponding one of the plurality of pixel sets. It is,
Each of the first photoelectric conversion unit and the second photoelectric conversion unit includes a first conductivity type first semiconductor region including a region for accumulating charges, and the first semiconductor region of the first photoelectric conversion unit is The first portion having a width in the direction parallel to the first surface is disposed between the first portion and the first portion and the second surface, and the width in the direction is larger than the first width. A second portion that is two widths;
A second semiconductor region is disposed in a region between the second portions that belong to different pixel sets and are closest to each other, and the impurity concentration of the second conductivity type in the second semiconductor region is: Higher than the impurity concentration of the second conductivity type in the region between the second portions of the first photoelectric conversion unit and the second photoelectric conversion unit belonging to the same pixel set,
A solid-state imaging device. The maximum value of the impurity concentration of the second conductivity type in the second semiconductor region is the second value in the region between the second portions of the first photoelectric conversion unit and the second photoelectric conversion unit belonging to the same pixel set. Larger than the maximum value of the impurity concentration of two conductivity types,
The solid-state imaging device according to claim 1. Minimum distance between said second portion belonging respectively to the same pixel group, the minimum distance is less than between nearest the second part to each other a second portion belonging to different pixel group from each other,
The solid-state imaging device according to claim 1. Each of the plurality of pixel sets includes a first transistor and a second transistor on the first surface side, and the second portion of the first photoelectric conversion unit is in a direction perpendicular to the first surface. The second transistor includes a portion disposed between the gate of the first transistor and the second surface, wherein the second portion of the second photoelectric conversion unit is perpendicular to the first surface. A portion disposed between the gate and the second surface,
The solid-state imaging device according to any one of claims 1 to 3 . Each of the first photoelectric conversion unit and the second photoelectric conversion unit further includes a second semiconductor region of a second conductivity type disposed on the first surface side of the first semiconductor region. The solid-state imaging device according to claim 1. The first photoelectric conversion unit receives light that has passed through the first region of the pupil of the photographing lens, and the second photoelectric conversion unit receives light that has passed through the second region of the pupil of the photographing lens,
The solid-state imaging device according to any one of claims 1 to 5, characterized in that. A solid-state imaging device according to any one of claims 1 to 6 ,
A processing unit for processing a signal output from the solid-state imaging device;
A camera comprising: