JP6145005B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP6145005B2 JP6145005B2 JP2013184576A JP2013184576A JP6145005B2 JP 6145005 B2 JP6145005 B2 JP 6145005B2 JP 2013184576 A JP2013184576 A JP 2013184576A JP 2013184576 A JP2013184576 A JP 2013184576A JP 6145005 B2 JP6145005 B2 JP 6145005B2
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- transistor
- wiring
- potential
- signal
- terminal
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Images
Classifications
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
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- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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Description
本実施の形態では、本発明の一態様に係る順序回路(半導体装置ともいう)について説明する。
本実施の形態では、実施の形態1の順序回路の回路10に適用することができる回路について説明する。
本実施の形態では、本発明の一態様に係る順序回路を適用したシフトレジスタ回路について説明する。
本実施の形態では、表示素子として液晶素子を用いたパネルの構成を一例として示す。
本発明の一態様に係る半導体装置では、非晶質、微結晶、多結晶又は単結晶である、シリコン又はゲルマニウムなどの半導体膜にチャネル形成領域を有するトランジスタが用いられていても良いし、シリコンよりもバンドギャップが広く、真性キャリア密度がシリコンよりも低い半導体膜にチャネル形成領域を有するトランジスタが用いられていても良い。
液晶表示装置を例に挙げて、本発明の一態様に係る半導体装置の外観について、図14を用いて説明する。図14(A)は、基板4001と基板4006とを封止材4005によって接着させた液晶表示装置の上面図である。また、図14(B)は、図14(A)の破線A1−A2における断面図に相当し、図14(C)は、図14(A)の破線B1−B2における断面図に相当する。なお、図14では、FFS(Fringe Field Switching)モードの液晶表示装置を例示している。
本発明の一態様に係る半導体装置は、表示機器、パーソナルコンピュータ、記録媒体を備えた画像再生装置(代表的にはDVD:Digital Versatile Disc等の記録媒体を再生し、その画像を表示しうるディスプレイを有する装置)に用いることができる。その他に、本発明の一態様に係る半導体装置を用いることができる電子機器として、携帯電話、携帯型を含むゲーム機、携帯情報端末、電子書籍、ビデオカメラ、デジタルスチルカメラ、ゴーグル型ディスプレイ(ヘッドマウントディスプレイ)、ナビゲーションシステム、音響再生装置(カーオーディオ、デジタルオーディオプレイヤー等)、複写機、ファクシミリ、プリンター、プリンター複合機、現金自動預け入れ払い機(ATM)、自動販売機などが挙げられる。これら電子機器の具体例を図15に示す。
C 容量素子
CK1 信号
CK2 信号
G 走査線
G1 走査線
Gy 走査線
M1 トランジスタ
M2a トランジスタ
M2b トランジスタ
M3a トランジスタ
M3b トランジスタ
M4a トランジスタ
M4b トランジスタ
M5 トランジスタ
M6 トランジスタ
M7a トランジスタ
M7b トランジスタ
M8 トランジスタ
M9 トランジスタ
M10 トランジスタ
M11 トランジスタ
M12 トランジスタ
M13 トランジスタ
M14 トランジスタ
M15 トランジスタ
M16 トランジスタ
M17 トランジスタ
M18 トランジスタ
N1 ノード
N2a ノード
N2b ノード
N3 ノード
S 信号線
Sx 信号線
S1 信号線
S3a スイッチ
S3b スイッチ
S4a スイッチ
S4b スイッチ
SCK1 信号
SCK2 信号
Ta 期間
Tb 期間
T1a 期間
T1b 期間
T2a 期間
T2b 期間
T3a 期間
T3b 期間
T4a 期間
T4b 期間
T13 トランジスタ
T14 トランジスタ
T15 トランジスタ
V1 電位
V2 電位
Vg1 スキャン信号
VN1 電位
VN2a 電位
VN2b 電位
SP 信号
RE 信号
OUT 信号
SELa 信号
SELb 信号
SSP 信号
SOUT 信号
10 回路
11 配線
12 配線
13 配線
14 配線
15 配線
16a 配線
16b 配線
17 配線
18 配線
20 回路
30 順序回路
60 パネル
61 画素部
62 画素
63 走査線駆動回路
64 信号線駆動回路
65 液晶素子
66 トランジスタ
67 容量素子
201 トランジスタ
202 トランジスタ
203 導電膜
204 導電膜
205 絶縁膜
206 半導体膜
207 導電膜
208 導電膜
209 絶縁膜
210 絶縁膜
211 絶縁膜
212 導電膜
213 半導体膜
214 導電膜
215 導電膜
217 絶縁膜
4001 基板
4002 画素部
4003 信号線駆動回路
4004 走査線駆動回路
4005 封止材
4006 基板
4010 トランジスタ
4018 FPC
4020 絶縁膜
4021 電極
4022 トランジスタ
4023 液晶素子
4024 導電膜
4025 絶縁膜
4026 絶縁膜
4027 電極
4028 液晶層
4030 配線
5001 筐体
5002 筐体
5003 表示部
5004 表示部
5005 マイクロホン
5006 スピーカー
5007 操作キー
5008 スタイラス
5201 筐体
5202 表示部
5203 支持台
5401 筐体
5402 表示部
5403 キーボード
5404 ポインティングデバイス
5601 筐体
5602 筐体
5603 表示部
5604 表示部
5605 接続部
5606 操作キー
5801 筐体
5802 筐体
5803 表示部
5804 操作キー
5805 レンズ
5806 接続部
Claims (5)
- 第1及び第2のトランジスタと、第1乃至第4のスイッチと、を有し、
前記第1のトランジスタのソース又はドレインの一方は、第1の配線と電気的に接続され、
前記第1のトランジスタのソース又はドレインの他方は、第2の配線と電気的に接続され、
前記第2のトランジスタのソース又はドレインの一方は、前記第1の配線と電気的に接続され、
前記第2のトランジスタのソース又はドレインの他方は、前記第2の配線と電気的に接続され、
前記第1のスイッチの第1の端子は、前記第1のトランジスタのゲートと電気的に接続され、
前記第2のスイッチの第1の端子は、前記第2のトランジスタのゲートと電気的に接続され、
前記第2のスイッチの第2の端子は、前記第1のスイッチの第2の端子と電気的に接続され、
前記第3のスイッチの第1の端子は、前記第1のトランジスタのゲートと電気的に接続され、
前記第3のスイッチの第2の端子は、第3の配線と電気的に接続され、
前記第4のスイッチの第1の端子は、前記第2のトランジスタのゲートと電気的に接続され、
前記第4のスイッチの第2の端子は、前記第3の配線と電気的に接続され、
前記第3の配線は、リセット信号を伝達する機能を有することを特徴とする半導体装置。 - 請求項1において、
第3のトランジスタと、第4のトランジスタと、を有し、
前記第3のトランジスタのソース又はドレインの一方は、第4の配線と電気的に接続され、
前記第3のトランジスタのソース又はドレインの他方は、前記第1のスイッチの第2の端子と電気的に接続され、
前記第4のトランジスタのソース又はドレインの一方は、前記第2の配線と電気的に接続され、
前記第4のトランジスタのソース又はドレインの他方は、前記第1のスイッチの第2の端子と電気的に接続されることを特徴とする半導体装置。 - 請求項1において、
第3乃至第7のトランジスタと、容量素子と、を有し、
前記第3のトランジスタのソース又はドレインの一方は、第4の配線と電気的に接続され、
前記第3のトランジスタのソース又はドレインの他方は、前記第1のスイッチの第2の端子と電気的に接続され、
前記第4のトランジスタのソース又はドレインの一方は、前記第2の配線と電気的に接続され、
前記第4のトランジスタのソース又はドレインの他方は、前記第1のスイッチの第2の端子と電気的に接続され、
前記第5のトランジスタのソース又はドレインの一方は、前記第4の配線と電気的に接続され、
前記第5のトランジスタのゲートは、前記第3のトランジスタのゲートと電気的に接続され、
前記第6のトランジスタのソース又はドレインの一方は、前記第2の配線と電気的に接続され、
前記第6のトランジスタのソース又はドレインの他方は、前記第5のトランジスタのソース又はドレインの他方と電気的に接続され、
前記第6のトランジスタのゲートは、前記第4のトランジスタのゲートと電気的に接続され、
前記第7のトランジスタのソース又はドレインの一方は、前記第2の配線と電気的に接続され、
前記第7のトランジスタのソース又はドレインの他方は、前記第3のトランジスタのゲートと電気的に接続され、
前記第7のトランジスタのゲートは、前記第4のトランジスタのゲートと電気的に接続され、
前記容量素子の第1の端子は、前記第4のトランジスタのゲートと電気的に接続され、
前記容量素子の第2の端子は、前記第5のトランジスタのソース又はドレインの他方と電気的に接続されることを特徴とする半導体装置。 - 請求項1乃至請求項3のいずれか一項において、
前記第1のトランジスタのチャネル幅は、前記第2のトランジスタのチャネル幅の90%以上、110%以下であることを特徴とする半導体装置。 - 請求項1乃至請求項4のいずれか一項において、
前記第1のトランジスタ及び前記第2のトランジスタは、各々、チャネル形成領域に酸化物半導体を有することを特徴とする半導体装置。
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CN103680635A (zh) | 2014-03-26 |
US20140070880A1 (en) | 2014-03-13 |
JP2014067027A (ja) | 2014-04-17 |
JP6605689B2 (ja) | 2019-11-13 |
CN103680635B (zh) | 2018-07-03 |
JP2022161039A (ja) | 2022-10-20 |
JP2020024775A (ja) | 2020-02-13 |
JP2021107923A (ja) | 2021-07-29 |
JP7367136B2 (ja) | 2023-10-23 |
US9070546B2 (en) | 2015-06-30 |
JP6143399B2 (ja) | 2017-06-07 |
JP6441991B2 (ja) | 2018-12-19 |
CN108806632A (zh) | 2018-11-13 |
JP2019071157A (ja) | 2019-05-09 |
JP2023182758A (ja) | 2023-12-26 |
JP2017182870A (ja) | 2017-10-05 |
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CN108806632B (zh) | 2021-06-15 |
JP7105332B2 (ja) | 2022-07-22 |
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