JP6102545B2 - Communications system - Google Patents

Description

The present invention relates to a communication system .

  Patent Document 1 discloses a first transmission / reception device having first transmission means for serially transmitting information for link establishment via a plurality of first transmission paths, and second transmission of information for link establishment. Second transmission means for serially transmitting to the first transmission / reception device via a path, provided corresponding to the plurality of first transmission paths, from the first transmission means of the first transmission / reception device A plurality of link establishment means for establishing a link of the corresponding first transmission path based on the transmitted information for link establishment, and all of the plurality of first transmission paths by the plurality of link establishment means When a link is established, a second transmission / reception device having control means for causing the first transmission / reception device to establish the link of the second transmission path by transmitting the link establishment information from the second transmission unit. Transmitting and receiving system with It has been described.

Japanese Patent Application No. 2012-001220

An object of this invention is to provide the communication system which establishes a link reliably compared with the case where the power-on state of a communication apparatus is not considered.

In order to achieve the above object, a communication system according to the present invention includes a transmission unit that converts a parallel signal into a serial signal and transmits the serial signal to a link destination device, and a serial signal received from the link destination device based on a setting. Separately from the receiving means for converting to a signal and the transmitting means, the first status signal indicating the power-on state of the own apparatus is notified to the linked apparatus, and separately from the receiving means, the linked apparatus Based on the first status signal and the second status signal, the first status signal and the second status signal based on the first status signal and the second status signal. When the signal changes to a state indicating that power is turned on, a predetermined preparatory operation for a predetermined link establishment operation is started before initialization of the setting, and the first state signal Fine said second state signal, after changed from No power state to the power-on state, the setting after a predetermined time has elapsed since the initialization of the receiving means, the link establishment operation starts the link establishment operation, A first communication device and a second communication device, each of which includes control means that performs control based on a link establishment operation signal received by the reception device, and each of the first communication device and the second communication device includes the link. Align the timing of establishing operation .

Further, the preparation operation of the communication system of the present invention may include a control for transmitting a predetermined preparation signal, which is different from the link establishment operation signal, from the transmission means for a predetermined period.

Further, the second status signal notified to the notification means of the communication system of the present invention indicates that the linked device is in a power-on state, and the linked device is connected to the own device. May be expressed.

According to the first aspect of the present invention, the link is reliably established as compared with the case where the power-on state of the communication device is not taken into consideration.

According to the second aspect of the present invention, the link is more reliably established as compared with the case where the preparation operation is not performed.

According to the third aspect of the present invention, failure of the communication device on the receiving side can be avoided as compared with the case where this configuration is not provided.

It is a block diagram which shows schematic structure of an example of the communication system which concerns on this Embodiment. It is the schematic block diagram which showed the structure for link establishment operation | movement in the 1st communication apparatus and 2nd communication apparatus which concern on this Embodiment centering on the transmission function. It is explanatory drawing which shows an example of the flow of the link establishment operation | movement in the 1st communication apparatus and 2nd communication apparatus which concern on this Embodiment. It is a time chart for demonstrating link establishment operation | movement when the 1st communication apparatus of this Embodiment will be in a power-on state before a 2nd communication apparatus. It is a time chart for demonstrating link establishment operation | movement when the 2nd communication apparatus of this Embodiment will be in a power-on state before a 1st communication apparatus.

  Hereinafter, an example of an embodiment of the present invention will be described in detail with reference to the drawings.

  First, the configuration of the communication system according to the present embodiment will be described. FIG. 1 is a block diagram illustrating a schematic configuration of an example of a communication system 10 according to the present embodiment. The communication system 10 of this Embodiment is provided with the 1st communication apparatus 12 and the 2nd communication apparatus 14 as shown in FIG.

  The first communication device 12 includes a system control unit 20, a power supply 21, an input / output control unit 22, a packet control unit 24, a link control unit 26, bit conversion units 28A and 28B, a bit reverse conversion unit 30, and a parallel / serial conversion unit 32A. 32B, a serial / parallel converter 34, a resistor 36, and a transistor 37.

  The second communication device 14 includes a system control unit 40, a power supply 41, an input / output control unit 42, a packet control unit 44, a link control unit 46, bit reverse conversion units 48A and 48B, a bit conversion unit 50, and a serial / parallel conversion. Units 52A and 52B, a parallel / serial converter 54, a resistor 56, and a transistor 57 are provided.

  The first communication device 12 and the second communication device 14 are connected by a transmission path 60 including a first lane 60A, a second lane 60B, and a third lane 60C, a fourth lane 70, and a fifth lane 72. The In the present embodiment, for convenience of explanation, signal lines connected to each of the fourth lane 70 and the fifth lane 72 provided in the first communication device 12 and the second communication device 14 are also respectively described. These are referred to as the fourth lane 70 and the fifth lane 72.

  The power source 21 of the first communication device 12 is the power source of the device itself, and when the power source is turned on, each functional unit described below operates. Similarly, the power source 41 of the second communication device 14 is a power source of the own device, and each functional unit described below operates when the power source is turned on.

  The system control unit 20 of the first communication device 12 has a function of controlling the operation of the entire first communication device 12. In addition, the system control unit 20 according to the present embodiment has a function of controlling on / off of the transistor 37 based on a signal indicating a power-on state input from the power supply 21. Similarly, the system control unit 40 of the second communication device 14 has a function of controlling the operation of the entire second communication device 14. In addition, the system control unit 40 according to the present embodiment has a function of controlling on / off of the transistor 57 based on a signal indicating a power-on state input from the power supply 41.

  The input / output control unit 22 of the first communication device 12 has a function of exchanging data with a playback device (not shown), for example. In addition, the input / output control unit 42 of the second communication device 14 has a function of exchanging data with, for example, a video display device (not shown).

  The packet control unit 24 of the first communication device 12 has a function of packetizing data for serial data transfer in the data direction (downward direction) from the first communication device 12 to the second communication device 14. Have. Further, the packet control unit 24 has a function of extracting data from the packet data in the direction of data (upward direction) from the second communication device 14 toward the first communication device 12. Similarly, the packet control unit 44 of the second communication device 14 has a function of extracting data from packet data in the downlink direction. The packet control unit 44 has a function of packetizing data for serial data transfer in the upstream direction.

  The link control unit 26 of the first communication device 12 performs initial settings for the parallel / serial conversion units 32A and 32B and the serial / parallel conversion unit 34 when the power is turned on (on state), and the first communication device 12 and the second communication device. 14 has a function of performing link control including a link establishment operation and the like when serial transmission is performed. Similarly, the link control unit 46 of the second communication device 14 performs initial settings for the serial / parallel conversion units 52A and 52B and the parallel / serial conversion unit 54 when the power is turned on (on state), and the first communication device 12 and the first communication device 12 2 has a function of performing link control including link establishment operation when serial transmission is performed between the communication apparatuses 14.

  The bit converters 28A and 28B of the first communication device 12 and the bit converter 50 of the second communication device 14 are the upper 8 bits and lower bits of the 16-bit data received from the link control unit 26 and the link control unit 46, respectively. It has a function of performing 8B10B conversion that converts 8 bits into 10 bits. The bit reverse conversion unit 30 of the first communication device 12 and the bit reverse conversion units 48A and 48B of the second communication device 14 are the 20-bit received from the serial / parallel conversion unit 34 and the serial / parallel conversion units 52A and 52B, respectively. It has a function of performing 10B8B conversion that reversely converts upper 10 bits and lower 10 bits of data into 8 bits. The 8B10B conversion performs DC balance adjustment so that transmission data appropriately includes 0 and 1, and in a method known as 8B10B, a data chunk for every 8 bits is a predetermined ratio of 0 and 1 The DC balance is adjusted by converting the data into 10-bit data close to 50%.

  The parallel / serial conversion units 32A and 32B of the first communication device 12 and the parallel / serial conversion unit 54 of the second communication device 14 have a function of converting parallel data into serial data (P / S conversion). The parallel / serial conversion units 32A and 32B and the parallel / serial conversion unit 54 of the present embodiment have de-emphasis for attenuating a DC component of a signal waveform as an initial setting at power-on, and a high frequency of the signal waveform. A register (not shown) for setting pre-emphasis for emphasizing components, a differential voltage, and the like is provided. Note that P / S conversion and S / P conversion are generally referred to as SERDES (Serialize Deserialize).

  The serial / parallel converter 34 of the first communication device 12 and the serial / parallel converters 52A and 52B of the second communication device 14 have a function of converting serial data into parallel data (S / P conversion). The serial / parallel converter 34 and the serial / parallel converters 52A and 52B according to the present embodiment set an equalizer or the like that corrects the deterioration of the signal waveform generated in the transmission path 60 as an initial setting when the power is turned on. A register (both not shown) is provided.

  Each of the functional units (the system control unit 20 and the system control unit 40, etc.) provided in each of the first communication device 12 and the second communication device 14 is partially or entirely reconfigurable circuit (FPGA: Field Programmable Gate Array). ), A hardware circuit such as an application specific integrated circuit (ASIC) or a dedicated LSI (Large Scale Integration). In addition, each of the functional units (the system control unit 20 and the system control unit 40) included in each of the first communication device 12 and the second communication device 14 is a CPU in the first communication device 12 and the second communication device 14, respectively. (Central Processing Unit), a RAM (Random Access Memory), and a ROM (Read Only Memory), etc., are realized by a computer. The CPU executes a program stored in the ROM so that each function unit You may comprise so that a function may be performed.

  The base of the transistor 37 of the first communication device 12 is connected to the system control unit 20 via the link control unit 26, the emitter is connected to the ground, and the collector is connected to the fourth lane 70. . In the transistor 37 of the present embodiment, when the power supply 21 is in the power-on state, the base is turned on, and an L-level status signal (first state signal) indicating the power-on state is supplied to the fourth lane 70. Output. On the other hand, when the power supply 21 is not turned on, the output of the transistor 37 is in a high impedance state because the base is off. Therefore, the fourth lane 70 becomes an H level status signal (first state signal) indicating a power-on state by the resistor 56 provided in the second communication device 14. Similarly, the base of the transistor 57 of the second communication device 14 is connected to the system control unit 40 via the link control unit 46, the emitter is connected to the ground, and the collector is connected to the fifth lane 72. Has been. In the transistor 57 of this embodiment, when the power supply 41 is in a power-on state, the base is turned on, and an L-level status signal (second state signal) indicating the power-on state is supplied to the fifth lane 72. Output. On the other hand, when the power supply 41 is not turned on, the output of the transistor 57 is in a high impedance state because the base is off. Therefore, the fifth lane 72 becomes an H level status signal (first state signal) indicating a power-on state by the resistor 36 provided in the first communication device 12.

  The resistor 36 of the first communication device 12 has one end connected to the fifth lane 72 and the other end connected to a power source. When the second communication device 14 is not connected to the fifth lane 72 due to the resistor 36, an H level status signal flows into the link control unit 26 via the fifth lane 72. Similarly, the resistor 56 of the second communication device 14 has one end connected to the fourth lane 70 and the other end connected to a power source. When the first communication device 12 is not connected to the fourth lane 70 due to the resistor 56, an H level status signal flows into the link control unit 46 via the fourth lane 70.

  The transmission path 60 of the present embodiment includes the first lane 60A and the second lane 60B for transmission (for the downlink direction) from the first communication device 12 to the second communication device 14, and the first communication device 14 to the first lane 60B. And a third lane 60C for transmission to the communication device 12 (upward direction). For example, the first communication device 12 transmits image information reproduced by a reproduction device (not shown) to the second communication device 14 via the first lane 60A and the second lane 60B. Further, the second communication device 14 outputs the image information transmitted from the first communication device 12 to, for example, a video display device (not shown), and outputs the status information to the first communication device 12 via the third lane 60C. Send.

  In addition, the communication system 10 according to the present embodiment includes the fourth lane 70 and the fifth lane 72 for transmitting and receiving the status signal indicating the power-on state as described above. The first communication device 12 transmits a status signal indicating the power-on state of the own device to the second communication device 14 via the fourth lane 70, and also displays a status signal indicating the power-on state of the second communication device 14. Received from the second communication device 14. The second communication device 14 transmits a status signal indicating the power-on state of the own device to the first communication device 12 via the fifth lane 72, and also displays a status signal indicating the power-on state of the first communication device 12. Received from the first communication device 12.

  In the present embodiment, electrical cables that transmit electrical signals are used for the transmission path 60, the fourth lane 70, and the fifth lane 72. In the form of this paper, the first lane 60A, the second lane 60B, and the third lane 60C of the transmission path 60 are configured by two lines, and a differential line through which a differential signal is transmitted is used. However, the present invention is not limited to this. Note that the number of lanes of the transmission path 60 is not limited to the present embodiment, and the number of lanes for the uplink and the downlink may be the same, and the number of lanes for the downlink may be larger than the number of lanes for the uplink Also good. In addition to the present embodiment, an optical cable for transmitting an optical signal may be used for the transmission line 60, but an electric cable is used for the fourth lane 70 and the fifth lane 72 as in the present embodiment. Is preferably used.

  Next, the link establishment operation in the first communication device 12 and the second communication device 14 of the communication system 10 according to the present embodiment will be described. FIG. 2 is a schematic configuration diagram showing a configuration for link establishment operation in the first communication device 12 and the second communication device 14 with a focus on a transmission function.

  As shown in FIG. 2, the first communication device 12 includes a link controller 26, bit converters 28A and 28B, a bit inverse converter 30, parallel / serial converters 32A and 32B, and a serial / parallel converter 34. Functions are provided on the device 80. In the first communication device 12, the device 80 receives the status signal STATUS_2_N from the second communication device 14 via the fifth lane 72, the buffer 85, and the register 81A. The system control unit 20 receives the status signal STATUS_2_N via the register 81A of the device 80. Further, the first communication device 12 sends a status signal STATUS_1_N to the second communication device 14 via the device 80 (register 81B), the buffer 86, the transistor 37, and the fourth lane 70 based on an instruction from the system control unit 20. Send.

  Similarly, as shown in FIG. 2, the second communication device 14 includes a link control unit 46, bit reverse conversion units 48A and 48B, a bit conversion unit 50, serial / parallel conversion units 52A and 52B, and a parallel / serial conversion unit. 54 functions are provided on the device 90. In the second communication device 14, the device 90 receives the status signal STATUS_1_N from the first communication device 12 via the fourth lane 70, the buffer 95, and the register 91A. The system control unit 40 receives the status signal STATUS_1_N via the register 91A of the device 90. Further, the second communication device 14 sends a status signal STATUS_2_N to the first communication device 12 via the device 90 (register 91B), the buffer 96, the transistor 57, and the fifth lane 72 based on an instruction from the system control unit 40. Send.

  In the first communication device 12, the transmission signal output permission units (TX output enable) 82A and 82B send the signal TX_output to the transmission buffers 84A and 84B, the first lane 60A, and the second based on the signal TX_output_enable_N received from the register 81C. The data is transmitted to the second communication device 14 via the lane 60B. Similarly, in the second communication device 14, the transmission signal output enable unit (TX output Enable) 92 sends the signal TX_output to the first lane 60C via the transmission buffer 94 and the third lane 60C based on the signal TX_output_enable_N received from the register 91C. 1 is transmitted to the communication device 12.

  In FIG. 3, an example of the flow of link establishment operation | movement in the 1st communication apparatus 12 and the 2nd communication apparatus 14 is shown. In the communication system 10 according to the present embodiment, the link is reliably established regardless of the power-on timing of the first communication device 12 and the second communication device 14. FIG. 4 shows a time chart for explaining the link establishment operation when the first communication device 12 is turned on before the second communication device 14. FIG. 5 shows a time chart for explaining the link establishment operation when the second communication device 14 is turned on before the first communication device 12.

  First, a case where the first communication device 12 is turned on before the second communication device 14 will be described with reference to FIGS. 3 and 4.

  As shown in FIG. 3, status signals STATUS_1_N and STATUS_2_N are transmitted and received between the first communication device 12 and the second communication device 14.

  In the first communication device 12, when the power is turned on, the level of the status signal STATUS_1_N changes from the H level to the L level (see timing t1 in FIG. 4). At timing t1, since the second communication device 14 is not yet powered on, the status signal STATUS_2_N received by the first communication device 12 is at the H level. Therefore, the signal TX_output_enable_N remains at the H level. In the first communication device 12 of the present embodiment, as described above, when the first communication device 12 and the second communication device 14 are not connected via the fifth lane 72, the resistor 36 is used. The status signal STATUS_2_N received by the device 80 (link control unit 26) is at the H level. Therefore, even when not connected via the fifth lane 72, the signal TX_output_enable_N remains at the H level.

  On the other hand, in the second communication device 14, although the status signal STATUS_1_N received from the first communication device 12 is at the L level, the status signal STATUS_2_N is at the H level, so the signal TX_output_enable_N remains at the H level.

  When the second communication device 14 is turned on, the status signal STATUS_2_N changes from the H level to the L level (see timing t2 in FIG. 4). The first communication device 12 and the second communication device 14 detect that both the status signals STATUS_1_N and STATUS_2_N are at the L level, thereby confirming that both devices are in the power-on state. The signal level of the signal TX_output_enable_N is set within a predetermined period after the status signals STATUS_1_N and STATUS_2_N both change to L level (specifically, from the timing when STATUS_2_N changes from H level to L level). Inverted and switched to L level (see timing t3 in FIG. 4). In FIG. 4, the signal level of the signal TX_output_enable_N is inverted at the timing t3 after the lapse of the period A from the timing when the STATUS_2_N changes from the H level to the L level. However, the timing of inverting the signal may be within the period A. That's fine.

  In response to the inversion of the level of the signal TX_output_enable_N, the first communication device 12 and the second communication device 14 start transmitting a preparation signal for preparing for link establishment. Specifically, the first communication device 12 transmits a preparation signal to the second communication device 14 as the signal TX_outoput via the first lane 60A and the second lane 60B. In addition, the second communication device 14 transmits a preparation signal to the first communication device 12 as the signal TX_outoput via the third lane 60C. The preparation signal is a signal that is transmitted during a preparation period until the communication device on the receiving side enters the link establishment operation. Therefore, the serial signal is different from the link establishment signal (described later in detail). The preparation signal is not particularly limited as long as it is a signal different from the link establishment signal. For example, a serial signal encoded using a D code or a K code is used.

  In the first communication device 12 and the second communication device 14, the first communication device 12 sends the second communication signal to the serial / parallel converter 34 after the elapse of a predetermined period B from the timing t3 when the level of the signal TX_output_enable_N is inverted. The communication device 14 outputs a reset signal to each of the serial / parallel converters 52A and 52B. By the reset signal, the serial / parallel converter 34 and the serial / parallel converters 52A and 52B are initialized (reset).

  Here, the link establishment operation will be described. Depending on the SERDES to be used, some of the bit widths of the parallel part can be selected such as 10 bits, 20 bits, 36 bits and the like. For example, when the setting is made to use 16 bits, the bit converters 28A and 28B of the first communication device 12 and the bit converter 50 of the second communication device 14 convert the 16 bits into 20 bits, and then the first communication device 12 respectively. The parallel / serial converters 32A and 32B and the parallel / serial converter 54 of the second communication device 14 convert 20 bits into 1 bit. In this case, 20 bits are treated as one lump.

  When performing a link establishment operation, a link establishment signal is repeatedly transmitted as link establishment information from the transmission side, and a link establishment request is made to the reception side. When the second communication device 14 is on the receiving side, the serial / parallel converters 52A and 52B, and when the first communication device 12 is on the receiving side, the serial / parallel converter 34 divides 1 bit into 10-bit units. The bit reverse conversion units 48A and 48B and the bit reverse conversion unit 30 respectively convert the data into upper 8 bits and lower 8 bits. The serial / parallel converters 52A and 52B and the serial / parallel converter 34 collate the received data with a known link establishment signal, find the matching position (alignment adjustment), and match the position. The link is established by performing data synchronization control or the like based on the above. That is, in the first communication device 12 and the second communication device 14, a link is established by performing a predetermined adjustment based on the transmitted link establishment signal and the received link establishment signal.

  Thus, in the link establishment operation, the serial / parallel converter 34 and the serial / parallel converters 52A and 52B are set. Therefore, at the timing t4, the serial / parallel converter 34 and the serial / parallel converters 52A and 52B are initialized.

  After the elapse of the period D from the timing t4 when the serial / parallel converter 34 and the serial / parallel converters 52A and 52B are initialized, the first communication device 12 and the second communication device 14 start a link establishment operation (see FIG. 4, see timing t5). Thus, the first communication device 12 and the second communication device 14 of the present embodiment start the link establishment operation at the same timing.

  The first communication device 12 and the second communication device 14 start transmitting a predetermined link establishment signal with the start of the link establishment operation. Specifically, the first communication device 12 transmits a link establishment signal to the second communication device 14 as the signal TX_outoput via the first lane 60A and the second lane 60B. Further, the second communication device 14 transmits a link establishment signal to the first communication device 12 as the signal TX_outoput via the third lane 60C. The link establishment signal may be determined in advance and is not particularly limited. As the link establishment signal, for example, an encoded serial signal using a D code or a K code is used.

  In the first communication device 12 and the second communication device 14, as described above, a predetermined link establishment operation is performed based on the link establishment signal, and each link establishment operation is completed (FIG. 4, timing). t6). After completion of the alignment adjustment described above, it is preferable to transmit a link establishment completion signal as shown in FIG. 3, and on the receiving side, the link establishment operation is completed upon receipt of the link establishment completion signal. Is preferred. The link establishment completion signal is not particularly limited, and may be any signal different from the above-described preparation signal and link establishment signal. For example, a serial signal encoded using a D code or a K code is used. .

  In the first communication device 12 and the second communication device 14 according to the present embodiment, the link establishment operation is performed within the period C after the serial / parallel conversion unit 34 and the serial / parallel conversion units 52A and 52B are initialized, respectively. If is not completed, it is set to time out. In the case shown in FIG. 4, both the first communication device 12 and the second communication device 14 time out when the link establishment operation is not completed by the timing t7. For example, there may be a case where the link establishment operation is not completed or it takes time to complete, such as when any one of the receiving apparatuses has a problem. Therefore, when the link establishment operation is not completed within the period C as described above, the first communication device 12 and the second communication device 14 of this embodiment are timed out, and when the link establishment operation is in progress, the link establishment operation is performed. A predetermined process such as canceling the process is performed.

  When the first communication device 12 is in the power-on state before the second communication device 14, the link is established in this way.

  Note that the above-described periods A, B, C, and D may be determined in advance by experiments or the like.

  Next, a case where the second communication device 14 is turned on before the first communication device 12 is described with reference to FIGS. 3 and 5. Also in this case, since the same operation as described above is performed, detailed description of the same operation is omitted.

  In the second communication device 14, when the power is turned on, the level of the status signal STATUS_2_N changes from the H level to the L level (see timing t1 in FIG. 5). At timing t1, since the first communication device 12 is not yet powered on, the status signal STATUS_1_N received by the second communication device 14 is at the H level. Therefore, the signal TX_output_enable_N remains at the H level.

  On the other hand, in the first communication device 12, the status signal STATUS_2_N received from the second communication device 14 is at the L level, but the status signal STATUS_1_N is at the H level, so the signal TX_output_enable_N remains at the H level. As described above in the second communication device 14 of the present embodiment, when the first communication device 12 and the second communication device 14 are not connected via the fourth lane 70, the resistor 56 The status signal STATUS_1_N received by the device 90 (link control unit 46) is at the H level. Therefore, even when not connected via the fourth lane 70, the signal TX_output_enable_N remains at the H level.

  When the first communication device 12 is turned on, the status signal STATUS_1_N changes from the H level to the L level (see timing t2 in FIG. 5). The first communication device 12 and the second communication device 14 detect that both the status signals STATUS_1_N and STATUS_2_N are at the L level, thereby confirming that both devices are in the power-on state. The signal level of the signal TX_output_enable_N is set within a predetermined period after both the status signals STATUS_1_N and STATUS_2_N change to L level (specifically, from the timing when STATUS_1_N changes from H level to L level). Inverted and switched to L level (see timing t3 in FIG. 5).

  As in the case described above, the first communication device 12 and the second communication device 14 start transmitting a preparation signal for preparing for link establishment in response to the inversion of the level of the signal TX_output_enable_N.

  After the elapse of a predetermined period B from the timing t3 when the level of the signal TX_output_enable_N is inverted, the first communication device 12 is transferred to the serial / parallel converter 34, and the second communication device 14 is transferred to the serial / parallel converters 52A and 52B. , Each reset signal is output to perform initialization (reset). After a period D has elapsed from the initialized timing t4, the first communication device 12 and the second communication device 14 start a link establishment operation (see timing t5 in FIG. 5) and start transmitting a link establishment signal. . As described above, in the first communication device 12 and the second communication device 14 of the present embodiment, the link establishment operation is started at the same timing, and a predetermined link establishment operation is performed based on the link establishment signal. Thus, each link establishment operation is completed (see timing t6 in FIG. 5). Also here, if the link establishment operation is not completed within the period C after the initialization of the serial / parallel converter 34 and the serial / parallel converters 52A and 52B, a timeout occurs.

  When the second communication device 14 is in the power-on state before the first communication device 12, the link is established in this way.

  As described above, in the first communication device 12 provided in the communication system 10 according to the present embodiment, the link control unit 26 sets the power-on state of the own device according to the status signal STATUS_1_N via the fourth lane 70. 2 Notify the communication device 14. Similarly, in the second communication device 14 provided in the communication system 10, the link control unit 46 notifies the first communication device 12 of the power-on state of the own device by the status signal STATUS_2_N via the fifth lane 72. . In the first communication device 12 and the second communication device 14, when both devices are in the power-on state and are connected via the fourth lane 70 and the fifth lane 72, the signal TX_output_enable_N is transmitted within the period A. The level is reversed. When the link controllers 26 and 46 of the first communication device 12 and the second communication device 14 confirm that both devices are in the power-on state by the signal TX_output_enable_N, the link control units 26 and 46 transmit a preparation signal to the communication device on the receiving side. When the period B elapses from the timing at which the level of the signal TX_output_enable_N is inverted, the link control units 26 and 46 initialize (reset) the serial / parallel conversion units 34, 52A, and 52B. When the period D elapses from the timing at which the initialization is performed, the link control units 26 and 46 start a link establishment operation and start transmitting a link establishment signal to the communication device on the receiving side.

  Generally, when a communication device that has been turned on first starts link establishment operation first, byte alignment (alignment adjustment) is incorrect due to noise in the receiving communication device that has been turned on later. As a result, the link establishment operation may be completed. On the other hand, the first communication device 12 and the second communication device 14 of the present embodiment are when the devices are in the power-on state and are connected via the fourth lane 70 and the fifth lane 72. Then, link establishment operation is performed. The first communication device 12 and the second communication device 14 have the same timing for performing the link establishment operation. Therefore, as described above, the link establishment operation is not completed by mistake due to noise.

  Therefore, the first communication device 12 and the second communication device 14 according to the present embodiment establish a link more reliably than when the power-on state is not considered.

  In general, when the communication device on the reception side is not turned on, if the transmission side performs link establishment operation (link control), a high-speed signal (preparation signal, link establishment signal, etc.) is transmitted from the transmission side to the reception side. ) Will continue to be sent. Therefore, there is a concern of inducing a failure of the communication device on the receiving side.

  On the other hand, in the first communication device 12 and the second communication device 14 according to the present embodiment, the connection destination communication device is not turned on, or is not connected via the fourth lane 70 and the fifth lane 72. In the case of connection, since the transmission of unnecessary signals (preparation signal, link establishment signal, etc.) is suppressed, failure of the communication device on the receiving side is avoided. Moreover, in the 1st communication apparatus 12 and the 2nd communication apparatus 14, since transmission of an unnecessary signal is suppressed, power consumption is reduced. Moreover, in the 1st communication apparatus 12 and the 2nd communication apparatus 14, since reduction of radiation noise is aimed at, the influence which it has on an environment is suppressed.

  In the present embodiment, a case has been described in which the link control unit 26 of the first communication device 12 and the link control unit 46 of the second communication device 14 perform link control including the above-described link establishment operation. Instead, some operations (control) may be performed by the system control unit 20, the system control unit 40, or the like. For example, in the first communication device 12 and the second communication device 14, the system control unit can switch the signal level of the status signals STATUS_1_N and STATUS_1_N, notify the receiving communication device, etc. without using the link control unit 26. 20 or the system control unit 40.

  Moreover, although this Embodiment demonstrated the case where the communication system 10 was provided with a pair of 1st communication apparatus 12 and the 2nd communication apparatus 14, it does not restrict to this. For example, a plurality of sets of the first communication device 12 and the second communication device 14 may be provided. Further, for example, a plurality of first communication devices 12 and a single second communication device 14 may be provided, or a single first communication device 12 and a plurality of second communication devices 14 may be provided.

  Further, the transistor 37 of the first communication device 12 and the transistor 57 of the second communication device 14 according to the present embodiment are controlled to be turned on / off by the system control unit 20 and the system control unit 40, respectively, but are not limited thereto. . For example, the transistor 37 and the transistor 57 may be configured to be directly controlled on / off according to the states of the power supply 21 and the power supply 41, respectively.

  Note that this embodiment is an example of the present invention, and it is needless to say that the present embodiment can be changed according to the situation without departing from the gist of the present invention. The configurations of the communication system 10, the first communication device 12, and the second communication device 14 described in the present embodiment, communication control processing, and the like are examples, and may be changed according to the situation without departing from the gist of the present invention. It goes without saying that it is possible.

DESCRIPTION OF SYMBOLS 10 Communication system 12 1st communication apparatus 14 2nd communication apparatus 20, 40 System control part 21, 41 Power supply 26, 46 Link control part 28A, 28B, 50 bit conversion part 30, 48A, 48B Bit reverse conversion part 36 56 Resistance 60 Transmission path, 60A 1st lane, 60B 2nd lane, 60C 3rd lane 70 4th lane 72 5th lane

Claims (3)

A transmission means for converting a parallel signal into a serial signal and transmitting it to a link destination device;
Receiving means for converting a serial signal received from a linked device into a parallel signal based on the setting;
Separately from the transmission means, a first state signal indicating the power-on state of the own apparatus is notified to the link destination apparatus, and separately from the reception means, the link destination apparatus supplies power to the link destination apparatus. A notification means for notifying of a second state signal indicating the input state;
Based on the first state signal and the second state signal, the setting is initialized when the first state signal and the second state signal change to a state indicating that power is turned on. A predetermined preparatory operation for a previously established link establishment operation is started, and the first state signal and the second state signal are changed from a power-off state to a power-on state, and then received. Control means for starting the link establishment operation after a predetermined time has elapsed after initializing the setting of the means, and performing the link establishment operation based on a link establishment operation signal received by the reception means;
Comprising a first communication device and a second communication device each comprising:
A communication system in which each of the first communication device and the second communication device has the same timing for performing the link establishment operation . The communication system according to claim 1 , wherein the preparation operation includes a control for transmitting a predetermined preparation signal, which is different from the link establishment operation signal, from the transmission unit for a predetermined period. Wherein said second status signal is notified to the notification means may indicate that the destination device is in the power-on state, indicating that the own device linked device is connected, according to claim 1, wherein Item 3. The communication system according to Item 2.