JP6046277B2 - 書込み耐久性が限られたメモリのためのイントラセットウェアレベリングのための方法および装置 - Google Patents

書込み耐久性が限られたメモリのためのイントラセットウェアレベリングのための方法および装置 Download PDF

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JP6046277B2
JP6046277B2 JP2015558211A JP2015558211A JP6046277B2 JP 6046277 B2 JP6046277 B2 JP 6046277B2 JP 2015558211 A JP2015558211 A JP 2015558211A JP 2015558211 A JP2015558211 A JP 2015558211A JP 6046277 B2 JP6046277 B2 JP 6046277B2
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シアンユ・ドン
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クアルコム，インコーポレイテッド
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0891—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using clearing, invalidating or resetting means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G06F12/0895—Caches characterised by their organisation or structure of parts of caches, e.g. directory or tag array
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7211—Wear leveling

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
JP2015558211A 2013-02-19 2014-02-18 書込み耐久性が限られたメモリのためのイントラセットウェアレベリングのための方法および装置 Expired - Fee Related JP6046277B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/769,965 2013-02-19
US13/769,965 US9292451B2 (en) 2013-02-19 2013-02-19 Methods and apparatus for intra-set wear-leveling for memories with limited write endurance
PCT/US2014/016993 WO2014130483A1 (en) 2013-02-19 2014-02-18 Methods and apparatus for intra-set wear-leveling for memories with limited write endurance

Publications (3)

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JP2016510475A JP2016510475A (ja) 2016-04-07
JP2016510475A5 JP2016510475A5 (enExample) 2016-07-21
JP6046277B2 true JP6046277B2 (ja) 2016-12-14

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JP2015558211A Expired - Fee Related JP6046277B2 (ja) 2013-02-19 2014-02-18 書込み耐久性が限られたメモリのためのイントラセットウェアレベリングのための方法および装置

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US (1) US9292451B2 (enExample)
EP (1) EP2959391B1 (enExample)
JP (1) JP6046277B2 (enExample)
KR (1) KR101668054B1 (enExample)
CN (1) CN104981785B (enExample)
WO (1) WO2014130483A1 (enExample)

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WO2013162594A1 (en) * 2012-04-27 2013-10-31 Hewlett-Packard Development Company, L.P. Shielding a memory device
US9348743B2 (en) 2013-02-21 2016-05-24 Qualcomm Incorporated Inter-set wear-leveling for caches with limited write endurance
US9176856B2 (en) * 2013-07-08 2015-11-03 Arm Limited Data store and method of allocating data to the data store
US10331537B2 (en) * 2016-12-23 2019-06-25 Advanced Micro Devices, Inc. Waterfall counters and an application to architectural vulnerability factor estimation
JP2018160060A (ja) 2017-03-22 2018-10-11 東芝メモリ株式会社 メモリシステム
US11074018B2 (en) * 2017-04-06 2021-07-27 International Business Machines Corporation Network asset management
US10572286B2 (en) 2017-04-26 2020-02-25 International Business Machines Corporation Memory access optimization in a processor complex
US10592451B2 (en) 2017-04-26 2020-03-17 International Business Machines Corporation Memory access optimization for an I/O adapter in a processor complex
JP6878341B2 (ja) * 2018-03-16 2021-05-26 株式会社東芝 管理装置、情報処理装置およびメモリ制御方法
CN118645142B (zh) * 2019-07-15 2025-09-09 美光科技公司 用于存储器系统的维护操作
JP2024000843A (ja) * 2022-06-21 2024-01-09 キオクシア株式会社 メモリシステム

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GB1294489A (en) 1970-05-12 1972-10-25 Solartron Electronic Group Linearizing circuit
US3772595A (en) 1971-03-19 1973-11-13 Teradyne Inc Method and apparatus for testing a digital logic fet by monitoring currents the device develops in response to input signals
US7035967B2 (en) 2002-10-28 2006-04-25 Sandisk Corporation Maintaining an average erase count in a non-volatile storage system
US7046174B1 (en) 2003-06-03 2006-05-16 Altera Corporation Byte alignment for serial data receiver
US8112574B2 (en) 2004-02-26 2012-02-07 Super Talent Electronics, Inc. Swappable sets of partial-mapping tables in a flash-memory system with a command queue for combining flash writes
US7237067B2 (en) * 2004-04-22 2007-06-26 Hewlett-Packard Development Company, L.P. Managing a multi-way associative cache
US7568068B2 (en) * 2006-11-13 2009-07-28 Hitachi Global Storage Technologies Netherlands B. V. Disk drive with cache having volatile and nonvolatile memory
US9153337B2 (en) 2006-12-11 2015-10-06 Marvell World Trade Ltd. Fatigue management system and method for hybrid nonvolatile solid state memory system
JP4470186B2 (ja) 2006-12-12 2010-06-02 エルピーダメモリ株式会社 半導体記憶装置
US20100115175A9 (en) 2006-12-18 2010-05-06 Zhiqing Zhuang Method of managing a large array of non-volatile memories
US8543742B2 (en) 2007-02-22 2013-09-24 Super Talent Electronics, Inc. Flash-memory device with RAID-type controller
FR2913785B1 (fr) 2007-03-13 2009-06-12 St Microelectronics Sa Gestion de memoire tampon circulaire
KR100857761B1 (ko) 2007-06-14 2008-09-10 삼성전자주식회사 웨어 레벨링을 수행하는 메모리 시스템 및 그것의 쓰기방법
US8775717B2 (en) 2007-12-27 2014-07-08 Sandisk Enterprise Ip Llc Storage controller for flash memory including a crossbar switch connecting a plurality of processors with a plurality of internal memories
US8095724B2 (en) 2008-02-05 2012-01-10 Skymedi Corporation Method of wear leveling for non-volatile memory and apparatus using via shifting windows
US8275945B2 (en) 2008-02-05 2012-09-25 Spansion Llc Mitigation of flash memory latency and bandwidth limitations via a write activity log and buffer
US20100185816A1 (en) 2009-01-21 2010-07-22 Sauber William F Multiple Cache Line Size
US8255613B2 (en) 2009-04-30 2012-08-28 International Business Machines Corporation Wear-leveling and bad block management of limited lifetime memory devices
JP2012013733A (ja) 2010-06-29 2012-01-19 Renesas Electronics Corp 表示装置の駆動回路
US8356153B2 (en) 2010-11-19 2013-01-15 International Business Machines Corporation Adaptive wear leveling via monitoring the properties of memory reference stream
US20120311228A1 (en) * 2011-06-03 2012-12-06 Advanced Micro Devices, Inc. Method and apparatus for performing memory wear-leveling using passive variable resistive memory write counters
WO2012163027A1 (zh) * 2011-10-27 2012-12-06 华为技术有限公司 控制缓存映射的方法及缓存系统
JP2014530422A (ja) * 2011-10-27 2014-11-17 ▲ホア▼▲ウェイ▼技術有限公司 バッファマッピングを制御するための方法およびバッファシステム
US9665233B2 (en) * 2012-02-16 2017-05-30 The University Utah Research Foundation Visualization of software memory usage
US9348743B2 (en) 2013-02-21 2016-05-24 Qualcomm Incorporated Inter-set wear-leveling for caches with limited write endurance

Also Published As

Publication number Publication date
US20140237191A1 (en) 2014-08-21
EP2959391B1 (en) 2017-05-17
US9292451B2 (en) 2016-03-22
CN104981785B (zh) 2018-01-23
CN104981785A (zh) 2015-10-14
KR101668054B1 (ko) 2016-10-20
EP2959391A1 (en) 2015-12-30
WO2014130483A1 (en) 2014-08-28
JP2016510475A (ja) 2016-04-07
KR20150121046A (ko) 2015-10-28

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