FR2913785B1 - Gestion de memoire tampon circulaire - Google Patents

Gestion de memoire tampon circulaire

Info

Publication number
FR2913785B1
FR2913785B1 FR0701801A FR0701801A FR2913785B1 FR 2913785 B1 FR2913785 B1 FR 2913785B1 FR 0701801 A FR0701801 A FR 0701801A FR 0701801 A FR0701801 A FR 0701801A FR 2913785 B1 FR2913785 B1 FR 2913785B1
Authority
FR
France
Prior art keywords
buffer memory
memory management
circular buffer
circular
management
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0701801A
Other languages
English (en)
Other versions
FR2913785A1 (fr
Inventor
Sebastien Ferroussat
Patrice Couvert
Xavier Cauchy
Anthony Philippe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0701801A priority Critical patent/FR2913785B1/fr
Priority to US12/046,623 priority patent/US20080228991A1/en
Publication of FR2913785A1 publication Critical patent/FR2913785A1/fr
Application granted granted Critical
Publication of FR2913785B1 publication Critical patent/FR2913785B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
FR0701801A 2007-03-13 2007-03-13 Gestion de memoire tampon circulaire Expired - Fee Related FR2913785B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0701801A FR2913785B1 (fr) 2007-03-13 2007-03-13 Gestion de memoire tampon circulaire
US12/046,623 US20080228991A1 (en) 2007-03-13 2008-03-12 Ring buffer management

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0701801A FR2913785B1 (fr) 2007-03-13 2007-03-13 Gestion de memoire tampon circulaire

Publications (2)

Publication Number Publication Date
FR2913785A1 FR2913785A1 (fr) 2008-09-19
FR2913785B1 true FR2913785B1 (fr) 2009-06-12

Family

ID=38358065

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0701801A Expired - Fee Related FR2913785B1 (fr) 2007-03-13 2007-03-13 Gestion de memoire tampon circulaire

Country Status (2)

Country Link
US (1) US20080228991A1 (fr)
FR (1) FR2913785B1 (fr)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9203805B2 (en) 2011-11-23 2015-12-01 Cavium, Inc. Reverse NFA generation and processing
WO2013129031A1 (fr) * 2012-02-29 2013-09-06 三菱電機株式会社 Dispositif de transfert de données, procédé de transfert de données, et programme de transfert de données
US8958931B2 (en) * 2012-05-07 2015-02-17 Flightaware, Llc System and method for collecting remotely located positional data
US9292451B2 (en) 2013-02-19 2016-03-22 Qualcomm Incorporated Methods and apparatus for intra-set wear-leveling for memories with limited write endurance
US9348743B2 (en) * 2013-02-21 2016-05-24 Qualcomm Incorporated Inter-set wear-leveling for caches with limited write endurance
US9507563B2 (en) 2013-08-30 2016-11-29 Cavium, Inc. System and method to traverse a non-deterministic finite automata (NFA) graph generated for regular expression patterns with advanced features
US9904630B2 (en) 2014-01-31 2018-02-27 Cavium, Inc. Finite automata processing based on a top of stack (TOS) memory
US9602532B2 (en) 2014-01-31 2017-03-21 Cavium, Inc. Method and apparatus for optimizing finite automata processing
US10002326B2 (en) 2014-04-14 2018-06-19 Cavium, Inc. Compilation of finite automata based on memory hierarchy
US10110558B2 (en) 2014-04-14 2018-10-23 Cavium, Inc. Processing of finite automata based on memory hierarchy
US10101964B2 (en) 2016-09-20 2018-10-16 Advanced Micro Devices, Inc. Ring buffer including a preload buffer
KR102167167B1 (ko) * 2018-08-09 2020-10-16 넵코어스 주식회사 Ssd 장치를 관리하는 방법 및 그 ssd 장치
CN113064743A (zh) * 2021-04-15 2021-07-02 张荣晋 一种环形缓冲区读写方法和装置
CN113900974B (zh) * 2021-12-07 2022-04-19 睿思芯科(深圳)技术有限公司 一种存储装置、数据存储方法及相关设备
CN117312200B (zh) * 2023-11-27 2024-02-02 沐曦集成电路(南京)有限公司 基于环形缓冲区的多通道数据dma系统

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2250615B (en) * 1990-11-21 1995-06-14 Apple Computer Apparatus for performing direct memory access with stride
JPH064458A (ja) * 1992-06-18 1994-01-14 Fuji Xerox Co Ltd Ｄｍａ制御装置
US5708849A (en) * 1994-01-26 1998-01-13 Intel Corporation Implementing scatter/gather operations in a direct memory access device on a personal computer
GB9802097D0 (en) * 1998-01-30 1998-03-25 Sgs Thomson Microelectronics DMA controller
US6219725B1 (en) * 1998-08-28 2001-04-17 Hewlett-Packard Company Method and apparatus for performing direct memory access transfers involving non-sequentially-addressable memory locations
US7079160B2 (en) * 2001-08-01 2006-07-18 Stmicroelectronics, Inc. Method and apparatus using a two-dimensional circular data buffer for scrollable image display
JP4749657B2 (ja) * 2003-03-20 2011-08-17 パナソニック株式会社 Ｄｍａ制御装置

Also Published As

Publication number Publication date
FR2913785A1 (fr) 2008-09-19
US20080228991A1 (en) 2008-09-18

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Legal Events

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Effective date: 20131129