CN104981785B - 用于具有受限的写入承受能力的存储器的集合内耗损均衡的方法和设备 - Google Patents

用于具有受限的写入承受能力的存储器的集合内耗损均衡的方法和设备 Download PDF

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CN104981785B
CN104981785B CN201480007156.0A CN201480007156A CN104981785B CN 104981785 B CN104981785 B CN 104981785B CN 201480007156 A CN201480007156 A CN 201480007156A CN 104981785 B CN104981785 B CN 104981785B
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CN104981785A (zh
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董翔宇
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Qualcomm Inc
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Qualcomm Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0891—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using clearing, invalidating or resetting means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G06F12/0895—Caches characterised by their organisation or structure of parts of caches, e.g. directory or tag array
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7211—Wear leveling

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
CN201480007156.0A 2013-02-19 2014-02-18 用于具有受限的写入承受能力的存储器的集合内耗损均衡的方法和设备 Expired - Fee Related CN104981785B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/769,965 2013-02-19
US13/769,965 US9292451B2 (en) 2013-02-19 2013-02-19 Methods and apparatus for intra-set wear-leveling for memories with limited write endurance
PCT/US2014/016993 WO2014130483A1 (en) 2013-02-19 2014-02-18 Methods and apparatus for intra-set wear-leveling for memories with limited write endurance

Publications (2)

Publication Number Publication Date
CN104981785A CN104981785A (zh) 2015-10-14
CN104981785B true CN104981785B (zh) 2018-01-23

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CN201480007156.0A Expired - Fee Related CN104981785B (zh) 2013-02-19 2014-02-18 用于具有受限的写入承受能力的存储器的集合内耗损均衡的方法和设备

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US (1) US9292451B2 (enExample)
EP (1) EP2959391B1 (enExample)
JP (1) JP6046277B2 (enExample)
KR (1) KR101668054B1 (enExample)
CN (1) CN104981785B (enExample)
WO (1) WO2014130483A1 (enExample)

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JP6878341B2 (ja) * 2018-03-16 2021-05-26 株式会社東芝 管理装置、情報処理装置およびメモリ制御方法
CN118645142B (zh) * 2019-07-15 2025-09-09 美光科技公司 用于存储器系统的维护操作
JP2024000843A (ja) * 2022-06-21 2024-01-09 キオクシア株式会社 メモリシステム

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Also Published As

Publication number Publication date
US20140237191A1 (en) 2014-08-21
EP2959391B1 (en) 2017-05-17
US9292451B2 (en) 2016-03-22
CN104981785A (zh) 2015-10-14
KR101668054B1 (ko) 2016-10-20
EP2959391A1 (en) 2015-12-30
JP6046277B2 (ja) 2016-12-14
WO2014130483A1 (en) 2014-08-28
JP2016510475A (ja) 2016-04-07
KR20150121046A (ko) 2015-10-28

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