JP6027166B2 - Game machine - Google Patents

Description

The present invention relates to a gaming machine such as a pachinko game machine or a slot machine.

  As a gaming machine, when a game medium such as a game ball is launched into a game area by a launching device, and the game medium wins a prize area such as a prize opening provided in the game area and a start condition is satisfied, a plurality of types of identification are made. There is a pachinko gaming machine in which information (hereinafter referred to as a display symbol) is variably displayed on a variable display device, and the game interest is enhanced by a so-called variable display game that determines whether or not to give a predetermined game value based on the display result. . In such a pachinko gaming machine, a specific game state (big hit game state) advantageous to the player is obtained when the stop symbol mode when the variable display of the display symbol in the variable display game is completely stopped becomes the specific display mode. . For example, a pachinko gaming machine that has become a big hit game state has a special electric accessory called a big prize opening or an attacker opened, and a state where a player can easily win a game ball for a certain period of time continuously. provide.

  In addition, after setting a predetermined number of bets for one game using a game medium such as a medal, a coin, or a game ball similar to a pachinko gaming machine, the player operates the start lever to display on the variable display device. The variable display of the display symbol is started within the range of the maximum delay time determined in advance from the operation timing by starting the variable display of the symbol and the player operating the stop button provided corresponding to each variable display device. And a winning is generated according to the display result derived when the variable display of all the variable display devices is stopped, and a predetermined game medium predetermined according to the winning is paid out, and a specific winning is generated. In some cases, there is a slot machine configured to change the gaming state to a state in which a predetermined gaming value is given to the player.

  In such a gaming machine, there has been proposed one in which a security check for inspecting whether or not the storage content of control data used for controlling the operation of the gaming machine has been illegally changed is executed (for example, Patent Document 1).

Japanese Patent Laid-Open No. 11-300010

  In the technique described in Patent Document 1, when the execution time of the security check is constant, the execution start timing of the program that controls the operation of the gaming machine is analyzed, and a so-called “shooting” based on the analysis result or so-called “ By connecting the “hanging board” and inputting an illegal signal, there is a possibility that the process of setting the specific gaming state may be executed illegally.

This invention has been made in consideration of the above, and an object thereof is to provide a gaming machine capable of prevent illegal acts such as shooting based on the result of analysis of the program for controlling the operation of the gaming machine.

(1) In order to achieve the above object, the gaming machine according to the claims of the present application is a gaming machine (for example, pachinko gaming machine 1 or the like) that can be controlled in an advantageous state (for example, a big hit gaming state) advantageous to the player. After executing an initial setting process (for example, a security check process by the security check program 506A), a game control process (for example, a game) for controlling the progress of the game based on control data (for example, stored data in the user program area of the ROM 506). A game control microcomputer (for example, the game control microcomputer 100) having a control CPU (for example, the CPU 505) for executing a control timer interrupt process, etc., and a non-volatile memory (for example, the ROM 506) for storing the control data Etc.) and the game control my A random number circuit (for example, a random number circuit 509) that generates numerical data that becomes a random number value that is built in or externally attached to the microcomputer, and the game control microcomputer stores the non-volatile memory in the initial setting process Security check means for executing a security check process for checking whether or not the contents have been changed (for example, a portion where the CPU 505 executes the processes of steps S9 to S14), and the initial stage including the security check process by the security check means The CPU 505 is based on variable security time setting means (for example, the bit number [4-3] of the security time setting KSES) that can change the execution time of the setting process within a predetermined time range every time the initial setting process is executed. Is step S5-step A portion for executing the process of S8), a count means for updating the count value separately from the operation of the control CPU, and the count value by the count means for each system reset of the gaming machine, Initial value setting means for randomly setting the initial value of the numerical data, and determination means (for example, the CPU 505) for determining whether or not to control to the advantageous state using the random value read from the random number circuit in the game control process The non-volatile memory is built in the game control microcomputer, and the game control microcomputer is configured to execute the start winning determination process in step S101 and the like. A read limiting circuit for limiting external reading of the nonvolatile memory by a device other than the control CPU (for example, an internal memory) A first variable display executing means for executing variable display of the first identification information, a second variable display executing means for executing variable display of the second identification information, and the first identification A first variable display pattern selection process for selecting a variable display pattern of information and a second variable display pattern selection process for selecting a variable display pattern of the second identification information are executed by the same processing routine. further Ru and a variable display pattern selecting means.

According to the gaming machine described in (1) above, the execution time of the initial setting process for executing the security check process is changed within a predetermined time range each time the initial setting process is executed. This makes it difficult to identify the execution start timing of the game control process, pick off and based on the result of analysis of the game control process program, it is possible to prevent cheating by connecting the so-called "hanging board" .
Further, the game control microcomputer includes a read restriction circuit for restricting external reading of the nonvolatile memory other than the control CPU. This makes it difficult to read the game control processing program stored in the non-volatile memory from the outside of the game control microcomputer for analysis, and aiming based on the analysis result of the game control processing program, so-called `` it is possible to prevent fraud by connecting the hanging board ".

(2) Alternatively, a gaming machine (for example, pachinko gaming machine 1 or the like) that can be controlled in an advantageous state (for example, a big hit gaming state) advantageous to the player, and an initial setting process (for example, a security check process by the security check program 506A) Etc.) and then a control CPU (for example, a game control timer interrupt process) for controlling the progress of the game based on the control data (for example, stored data in the user program area of the ROM 506) Built-in or external to the game control microcomputer (eg, the game control microcomputer 100), a non-volatile memory (eg, ROM 506) that stores the control data, and the game control microcomputer. Random number A random number circuit (for example, a random number circuit 509) that generates numerical data, and the game control microcomputer checks whether the content stored in the nonvolatile memory has been changed in the initial setting process. Security check means for executing the check process (for example, the part where the CPU 505 executes the processes of steps S9 to S14) and the execution time of the initial setting process including the security check process by the security check means are added to the fixed time. Extended security time setting means that can be set to any of a plurality of extension times that can be selected in advance (for example, a portion in which the CPU 505 executes the processing of steps S1 to S4 based on the bit number [2-0] of the security time setting KSES) And the control C Count means for updating the count value separately from the operation of U, and initial value setting means for randomly setting the initial value of the numerical data by using the count value by the count means for each system reset of the gaming machine And determining means for determining whether or not to control to the advantageous state using the random number value read from the random number circuit in the game control process (for example, after the CPU 505 executes the start winning determination process in step S101, The nonvolatile memory is built in the game control microcomputer, and the game control microcomputer reads the nonvolatile memory externally by means other than the control CPU. Includes a read restriction circuit (for example, an internal resource access control circuit 501A) and the like . First variable display executing means for executing variable display of identification information, second variable display executing means for executing variable display of second identification information, and first for selecting a variable display pattern of the first identification information a variable display pattern selection process, further Ru and a variable display pattern selecting means for performing by the second identification information variable display and the second variable display pattern selection processing for selecting a pattern, the same processing routine.

According to the gaming machine described in (2) above, the execution time of the initial setting process for executing the security check process is set to one of a plurality of pre-selectable extended times in addition to the fixed time. This makes it difficult to identify the execution start timing of the game control process, pick off and based on the result of analysis of the game control process program, it is possible to prevent cheating by connecting the so-called "hanging board" .
Further, the game control microcomputer includes a read restriction circuit for restricting external reading of the nonvolatile memory other than the control CPU. This makes it difficult to read the game control processing program stored in the non-volatile memory from the outside of the game control microcomputer for analysis, and aiming based on the analysis result of the game control processing program, so-called `` it is possible to prevent fraud by connecting the hanging board ".
Alternatively, the game control microcomputer may determine a variable display pattern of a plurality of types of identification information (for example, special symbols, decorative symbols, etc.) that can be identified as one of a plurality of types. And further includes variable display executing means for executing variable display of the identification information based on the determination result by the variable display pattern determining means.

It is a front view of the pachinko gaming machine in this embodiment. It is a block diagram which shows the various control boards etc. which were mounted in the pachinko game machine. It is a block diagram which shows the structural example of a power supply board. It is a timing diagram which shows typically the state of a reset signal and a power-off signal. It is explanatory drawing which shows an example of the content of an effect control command. It is explanatory drawing which shows the structural example of the command transmitted / received between the main board | substrate and the payout control board. It is a block diagram which shows the structural example of the microcomputer for game control. It is a figure which shows an example of the address map in the microcomputer for game control. It is a figure which illustrates the main part of a program management area and a built-in register. It is a figure which shows an example of the setting content in a header and function setting. It is a figure which shows an example of the setting content in 1st random number initial setting, 2nd random number initial setting, and interruption initial setting. It is a figure which shows an example of the setting content in security time setting. It is a figure which shows the structural example etc. of an internal information register. It is explanatory drawing which illustrates the random number value counted by the side of a main board | substrate. It is a block diagram which shows the structural example of a random number circuit. It is a figure which shows the structural example etc. of a random number sequence change register. It is explanatory drawing which shows the change operation | movement of the random number update rule by a random number sequence change circuit. It is explanatory drawing which shows the change operation | movement of the random number update rule by a random number sequence change circuit. It is a figure which shows the structural example etc. of a random value acquisition register. It is a figure which shows the structural example etc. of a random number latch selection register. It is a figure which shows the structural example of a random value register. It is a figure which shows the structural example etc. of a random number latch flag register. It is a figure which shows the structural example etc. of a random number interrupt control register. It is a figure which shows the structural example etc. of an input port register. It is a block diagram which shows the structural example of a serial communication circuit. It is a figure which shows the structural example of a 1st and 2nd channel data register. It is a figure which shows the structural example etc. of a 1st and 2nd channel communication setting register. It is a figure which shows the structural example etc. of a 1st and 2nd channel communication interruption control register. It is a figure which shows the structural example etc. of the 1st and 2nd channel command register. It is a figure which shows the structural example etc. of a 1st and 2nd channel status register. It is a figure which illustrates a fluctuation pattern. It is a figure which illustrates a fluctuation pattern. It is a figure which shows the structural example of a special figure display result determination table. It is a figure which shows the structural example of a big hit classification determination table. It is a figure which shows the structural example of the variation pattern classification determination table for big hits. It is a figure which shows the structural example of the variation pattern classification determination table for big hits. It is a figure which shows the structural example of the variation pattern classification determination table for small hits. It is a figure which shows the structural example of a reach determination table. It is a figure which shows the structural example of the variation pattern classification determination table for reach. It is a figure which shows the structural example of the variation pattern classification determination table for non-reach. It is a figure which shows the structural example of a hit fluctuation pattern determination table. It is a figure which shows the structural example of a hit fluctuation pattern determination table. It is a figure which shows the structural example of a loss fluctuation pattern determination table. It is a figure which shows the structural example of a loss fluctuation pattern determination table. It is a block diagram which shows the structural example of the data holding area for game control. It is a block diagram which shows the structural example which combined the starting data storage area and the random value storage area. It is a flowchart which shows an example of a security check process. It is a flowchart which shows an example of a game control main process. It is a flowchart which shows an example of a random number circuit setting process. It is a flowchart which shows an example of a random number circuit abnormality test | inspection process. It is a flowchart which shows an example of the timer interruption process for game control. It is a flowchart which shows an example of a random number update process. It is a flowchart which shows an example of a special symbol process process. It is a flowchart which shows an example of a start winning determination process. It is a flowchart which shows an example of a start winning determination process. It is a flowchart which shows an example of a random number setting process. It is explanatory drawing which shows the random number value processing operation by software. It is a flowchart which shows an example of a special symbol normal process. It is a flowchart which shows an example of a fluctuation pattern setting process. It is a flowchart which shows an example of a special symbol stop process. It is a flowchart which shows an example of a jackpot end process. It is a flowchart which shows an example of production control main processing. It is a flowchart which shows an example of production control process processing. It is a flowchart which shows an example of payout control main processing. It is a flowchart which shows an example of the timer interruption process for payout control. It is a timing chart for demonstrating operation | movement in a random number circuit. It is a figure which shows the example of a display operation during the variable display of a decoration design. It is a figure which shows the example of a display operation during the variable display of a decoration design. It is a figure which shows the example of a display operation during the variable display of a decoration design. It is a figure which shows the example of a display operation during the variable display of a decoration design. It is a figure which shows the example of a display operation during the variable display of a decoration design. It is a figure which shows the example of a display operation during the variable display of a decoration design. It is a figure which shows the example of a display operation during the variable display of a decoration design. It is explanatory drawing for performing the process based on generation | occurrence | production of the interruption request | requirement by a start winning prize.

  Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a front view of a pachinko gaming machine according to the present embodiment and shows an arrangement layout of main members. The pachinko gaming machine (gaming machine) 1 is roughly composed of a gaming board (gauge board) 2 constituting a gaming board surface and a gaming machine frame (base frame) 3 for supporting and fixing the gaming board 2. The game board 2 is formed with a substantially circular game area surrounded by guide rails. In this game area, a game ball as a game medium is shot and shot by a ball hitting device including a shooting motor 61 shown in FIG.

  A first special symbol display device 4A and a second special symbol display device 4B are provided at predetermined positions of the game board 2 (in the example shown in FIG. 1, on the right side of the game area). Each of the first special symbol display device 4A and the second special symbol display device 4B is composed of, for example, 7-segment or dot matrix LEDs (light emitting diodes). Special symbols (also referred to as “special graphics”), which are a plurality of types of identification information (special identification information) that can be displayed, are variably displayed (variable display). For example, each of the first special symbol display device 4A and the second special symbol display device 4B variably displays a plurality of types of special symbols composed of numbers indicating "0" to "9", symbols indicating "-", and the like. To do. The special symbols displayed on the first special symbol display device 4A and the second special symbol display device 4B are composed of numbers indicating "0" to "9", symbols indicating "-", and the like. There is no limitation, and for example, a plurality of types of lighting patterns in which the combination of the LED to be turned on and the LED to be turned off in the 7-segment LED may be set in advance as a plurality of types of special symbols. A plurality of special symbols are assigned symbol numbers corresponding thereto. As an example, symbol numbers “0” to “9” are assigned to numbers indicating “0” to “9”, and symbol numbers “10” are assigned to symbols indicating “−”. Just do it. Hereinafter, the special symbol variably displayed by the first special symbol display device 4A is also referred to as "first special symbol", and the special symbol variably displayed by the second special symbol display device 4B is also referred to as "second special symbol". .

  An image display device 5 is provided near the center of the game area on the game board 2. The image display device 5 is composed of, for example, an LCD (liquid crystal display device) or the like, and forms a display area for displaying various effect images. In the display area of the image display device 5, the first special symbol variable display by the first special symbol display device 4A and the second special symbol variable display by the second special symbol display device 4B in the special symbol game respectively correspond to the variable display. For example, in a decorative symbol display unit serving as a variable display unit divided into a plurality of parts such as three, decorative symbols that are a plurality of types of identification information (decorative identification information) that can be identified are variably displayed. This variable display of decorative designs is also included in the variable display game.

  As an example, “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R are arranged in the display area of the image display device 5. Then, in the special symbol game, any one of the variable display of the first special symbol by the first special symbol display device 4A and the variable display of the second special symbol by the second special symbol display device 4B is started. In response to this, variable display of decorative symbols (for example, vertical or horizontal scroll display) is performed in all of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R. Be started. Thereafter, when the fixed special symbol is stopped and displayed as a variable display result in the special symbol game (completely stopped display), the “left”, “middle”, and “right” decorative symbol display portions 5L in the image display device 5 are displayed. At 5C and 5R, the fixed decorative symbol (final stop symbol) that is the variable display result of the decorative symbol is stopped (completely stopped). The “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R are movable within the display area of the image display device 5, and display the decorative symbols in a reduced or enlarged manner. You may be able to do that. When the special symbol or the decorative symbol is completely stopped and displayed, the display result in the variable display of each symbol is definitely displayed, and thereafter, the display state is such that the player can recognize that the current variable display does not proceed. On the other hand, during the variable display from the start of the variable display of the decorative pattern until the fixed decorative pattern that is the variable display result is displayed completely stopped, the variation speed of the decorative pattern becomes “0”. Ornamental symbols may be displayed in a stationary state, for example, in a display state that causes slight shaking or expansion / contraction. Such a display state is also called a temporary stop display, and although the display result in the variable display is not displayed deterministically, the player can recognize that the variation of the decorative pattern due to the scroll display or the update display is not progressing. It becomes. The temporary stop display may include displaying the decorative symbols completely stopped for a time shorter than a predetermined time (for example, 1 second) without causing slight shaking or expansion / contraction. Stopping and displaying the display symbol to the extent that the player can recognize that the variation of the special symbol or the decorative symbol is not progressing like the complete stop display or the temporary stop display is also referred to as a derivation display.

  The decorative symbols variably displayed on the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R include, for example, eight types of symbols (alphanumeric characters “1” to “8” or Chinese characters). Numbers “1” to “8”, English letters “A” to “H”, effect images showing eight characters related to a predetermined motif, effect images combining numbers, characters or symbols and characters, and the like. The effect image indicating the character may include, for example, a person or an animal, an object other than these, a symbol such as a character, or an image indicating any other figure. In addition to these eight types of decorative symbols, a blank symbol (a symbol that does not constitute a jackpot combination) may be included. A corresponding symbol number is assigned to each of the decorative symbols. For example, symbol numbers “1” to “8” are assigned to alphanumeric characters indicating “1” to “8”, respectively. Note that the number of types of decorative symbols that are variably displayed is not limited to eight, but may be any number of decorative symbols.

  While the decorative symbols are changing, in the decorative symbol display portions 5L, 5C, and 5R of “left”, “middle”, and “right”, for example, from the smallest to the largest symbol numbers, for example, from top to bottom. Alternatively, a scrolling display that flows from the right side to the left side is performed. Then, when the decorative symbol having the largest symbol number (for example, “8”) is displayed, the decorative symbol having the smallest symbol number (for example, “1”) is displayed. Alternatively, in at least one of the decorative symbol display portions 5L, 5C, and 5R (for example, the “left” decorative symbol display portion 5L), the symbol number is scrolled from the largest to the smallest, and the symbols are displayed. When the decorative design having the smallest number is displayed, the decorative design having the largest design number may be displayed.

  In the display area of the image display device 5, a start winning storage display 5H is also arranged. In the start winning memory display section 5H, a hold memory display for displaying the variable display hold number (special figure hold storage number) in an identifiable manner is performed. Here, the holding of the variable display occurs when a game ball enters (starts winning) the first start winning opening formed by the normal winning ball apparatus 6A and the second starting winning opening formed by the ordinary variable winning ball apparatus 6B. To do. That is, the start condition (also referred to as “execution condition”) for executing a variable display game such as a special figure game or a variable display of decorative symbols has been established, but a variable display game based on the previously established start condition is being executed. When the start condition for starting the variable display game is not satisfied due to the fact that the pachinko gaming machine 1 is controlled to the big hit gaming state, the variable display corresponding to the established start condition is suspended. Done.

  As an example, the start winning memory display section 5H is provided with a plurality of display parts whose display colors are changed from left to right in order from the variable display game in which the start condition is established based on the occurrence of the start winning. Yes. When the start condition (first start condition) of the special figure game using the first special figure in the first special symbol display device 4A is established based on the game ball entering the first start winning opening, the One of the display parts that are displayed (transparent color) (for example, the leftmost display part among the non-displayed display parts) is changed to blue display. Further, when a special ball game start condition (second start condition) using the second special figure in the second special symbol display device 4B is established based on the game ball entering the second start winning opening, it is normally not One of the displayed display parts is changed to a red display. Thereafter, when one of the start condition (first start condition) of the special figure game using the first special figure and the start condition (second start condition) of the special figure game using the second special figure is established, for example, The display at the leftmost display part is removed and the display at each display part is moved leftward one by one. At this time, one of the display parts that have changed to blue display or red display (for example, the display part at the right end of the display part whose display color has changed) returns to non-display. Here, when the hold memory display is performed, the special figure hold memory number based on the establishment of the variable display game start condition can be specified, but the start condition is the first start condition or the second start condition. If it cannot be specified, the display mode of the special figure reserved memory number may be changed to a predetermined display mode, for example, by changing the number of display parts corresponding to the special figure reserved memory number to gray display. .

  In the start winning memory display section 5H, a number indicating the special figure reserved memory number may be displayed so that the player or the like can recognize the special figure reserved memory number. A display for displaying the number of reserved special figure memories may be provided together with the start winning memory display unit 5H or instead of the start winning memory display unit 5H. In the example shown in FIG. 1, together with the start winning memory display section 5H, the first hold for displaying the number of special figure hold memories identifiable on the upper part of the first special symbol display device 4A and the second special symbol display device 4B. A display 25A and a second hold display 25B are provided. The first hold indicator 25A displays the first hold memory number as the effective start winning ball number that has entered the first start winning port formed by the normal winning ball device 6A so as to be specified. The second hold indicator 25B displays the second hold memory number as the effective start winning ball number that has entered the second start winning port formed by the normal variable winning ball device 6B in an identifiable manner. Each of the first hold indicator 25A and the second hold indicator 25B has, for example, a number (for example, four) of LEDs corresponding to an upper limit value (for example, “4”) in each of the first reserved memory number and the second reserved memory number. It is comprised including.

  The display area of the image display device 5 may be provided with a color symbol display unit that variably displays a color symbol as identification information different from the decorative symbol. As an example, when the special symbol game using the first special symbol by the first special symbol display device 4A is started in the color symbol display unit, the variation of the color symbol (for example, display color update display) is started. When the special symbol game using the second special symbol is started by the “left” color symbol display unit and the second special symbol display device 4B, the variation of the color symbol is started. The display part should just be included. Then, when the fixed special symbol that is the variable display result in the special graphic game is completely stopped and displayed, the variation of the color symbol is finished, and the fixed color symbol that is the variable display result of the color symbol is completely stopped and displayed. The color symbols variably displayed on the “left” and “right” color symbol display sections include, for example, a plurality of types such as four types of symbols (“yellow”, “green”, “red”, “blue”, etc.) As long as the color pattern is included. Each of the color symbols is assigned a corresponding symbol number. As an example, the symbol numbers “1” to “4” only need to be assigned to the “yellow”, “green”, “red”, and “blue” color symbols.

  Below the image display device 5, an ordinary winning ball device 6A and an ordinary variable winning ball device 6B are provided. The normal winning ball device 6A forms a first start winning opening that is always kept in a certain open state by a predetermined ball receiving member, for example. The normal variable winning ball apparatus 6B is an electric tulip type having a pair of movable wing pieces that are changed into a normal open state that is a vertical position and an expanded open state that is a tilt position by a solenoid 81 for a normal electric accessory shown in FIG. An accessory (ordinary electric accessory) is provided to form a second start winning opening. As an example, in the normally variable winning ball apparatus 6B, the movable wing piece is in the vertical position when the solenoid 81 for the ordinary electric accessory is in the off state, so that the game ball is unlikely to enter the second start winning opening. It becomes an open state. On the other hand, in the normal variable winning ball apparatus 6B, the movable wing piece is in the tilting position when the solenoid 81 for the normal electric accessory is in the on state, so that the game ball can easily enter the second start winning opening. Expanded open state. In the normal variable winning ball apparatus 6B, although the game ball can enter the second start winning opening even in the normal open state, there is a possibility that the game ball may enter more than in the expanded open state. You may comprise so that it may become low. Alternatively, the normally variable winning ball apparatus 6B may be configured so that the game ball does not enter the second starting winning opening in the normally open state, for example, by closing the second starting winning opening.

  A game ball that has entered the first start winning opening formed in the normal winning ball apparatus 6A is detected by, for example, a first start opening switch 22A shown in FIG. A game ball that has entered the second start winning opening formed in the normal variable winning ball apparatus 6B is detected by, for example, a second start opening switch 22B shown in FIG. Based on the detection of the game ball by the first start port switch 22A, a predetermined number (for example, three) of game balls are paid out as prize balls, and the first reserved memory number is set to a predetermined upper limit value (for example, “4”). ) If the following, the first start condition is satisfied. Based on the detection of the game ball by the second start port switch 22B, a predetermined number (for example, three) of game balls are paid out as prize balls, and if the second reserved memory number is equal to or less than a predetermined upper limit value, The second start condition is satisfied. The number of prize balls to be paid out based on the detection of the game ball by the first start port switch 22A and the number of prize balls to be paid out based on the detection of the game ball by the second start port switch 22B. May be the same number or different numbers.

  A special variable winning ball device 7 is provided below the normal winning ball device 6A and the normal variable winning ball device 6B. The special variable winning ball apparatus 7 includes a large winning opening door that is opened and closed by a solenoid 82 for the large winning opening door shown in FIG. 2, and is opened (first state) and closed (first state) by the large winning opening door. 2) to form a big prize opening. As an example, in the special variable winning ball apparatus 7, when the solenoid 82 for the special prize opening door is in the off state, the special prize opening door closes the special prize opening. On the other hand, in the special variable winning ball apparatus 7, when the solenoid 82 for the big prize opening door is in the ON state, the big prize opening door opens the big winning opening. A game ball that has entered a special winning opening formed in the special variable winning ball apparatus 7 is detected by, for example, a count switch 23 shown in FIG. Based on the detection of the game ball by the count switch 23, a predetermined number (for example, 13) of game balls are paid out as prize balls.

  A normal symbol display 20 is provided at a predetermined position of the game board 2 (on the left side of the game area in the example shown in FIG. 1). As an example, the normal symbol display 20 is composed of 7 segments, dot matrix LEDs, and the like, like the first special symbol display device 4A and the second special symbol display device 4B, and a plurality of types of identification information different from the special symbols. Is displayed (variably displayed) in a variable manner. Such variable display of normal symbols is called a general game (also referred to as “normal game”). The normal symbol display 20 variably displays, for example, a plurality of types of normal symbols composed of numbers indicating “0” to “9”, symbols indicating “−”, and the like. A plurality of types of normal symbols are assigned symbol numbers corresponding thereto. As an example, symbol numbers “0” to “9” are assigned to numbers indicating “0” to “9”, and symbol numbers “10” are assigned to symbols indicating “−”. Just do it. The normal symbol display 20 is not limited to the one that variably displays the numbers indicating “0” to “9” or the symbols indicating “−” as normal symbols. For example, “O” and “X” are displayed. Ordinary symbols are variably displayed by alternately lighting the decorative lamps (or LEDs) to be displayed, or by lighting a plurality of decorative lamps (or LEDs) such as “left”, “middle”, and “right” in a predetermined order. It may be a thing. Above the normal symbol display 20, a universal figure holding display 25 </ b> C is provided. The general-purpose hold indicator 25C includes, for example, four LEDs, and displays the general-purpose hold storage number as the number of effective passing balls that have passed through the passing gate 41.

  In addition to the above configuration, the surface of the game board 2 is provided with a windmill for changing the flow direction and speed of the game ball and a number of obstacle nails. In addition, as a winning opening different from the first starting winning opening, the second starting winning opening, and the large winning opening, for example, one or a plurality of general winning openings that are always kept open by a predetermined ball receiving member are provided. May be. In this case, a predetermined number (for example, 10) of game balls may be paid out as a prize ball based on the fact that a game ball that has entered one of the general prize openings is detected by a predetermined general prize ball switch. In the lowermost part of the game area, there is provided an out port through which game balls that have not entered any winning port are taken. Speakers 8L and 8R for reproducing and outputting sound effects and the like are provided at the left and right upper positions of the gaming machine frame 3, and a game effect lamp 9 is provided at the periphery of the game area. A decorative LED may be arranged around each structure (for example, the normal winning ball device 6A, the normal variable winning ball device 6B, the special variable winning ball device 7, etc.) in the game area of the pachinko gaming machine 1.

  At the lower right position of the gaming machine frame 3, there is provided an operation knob 30 serving as a hitting operation handle operated by a player or the like to launch a game ball as a game medium toward the game area. For example, the resilience of the game ball is adjusted according to the operation amount (rotation amount) by the player or the like. The hitting operation handle only needs to be provided with a single shot switch or a touch ring (touch sensor) for stopping the driving of a shooting motor included in the hitting ball shooting device. At a predetermined position of the gaming machine frame 3 below the gaming area, a game ball paid out as a prize ball or a game ball lent out by a predetermined ball lending machine is held (stored) so as to be supplied to a ball hitting device. ) Is provided. For example, an operation button that can be operated by the player by a pressing operation or the like may be provided at a predetermined position in the gaming machine frame 3 of the pachinko gaming machine 1 such as a central position on the front side of the upper surface of the hitting ball supply tray. Further, below the hitting ball supply tray, there is provided an extra ball receiving tray (lower plate) that holds (stores) game balls that cannot be stored in the hitting ball supply tray.

  Furthermore, a prepaid card unit (card unit) for executing processing for enabling ball lending using a prepaid card or the like may be installed at a predetermined position adjacent to the pachinko gaming machine 1. The card unit may not only execute a lending process by taking a prepaid card, but may also execute a lending process by taking a membership card or cash.

  In the normal game with the normal symbol display 20, the normal symbol display 20 shows that the game ball that has passed through the passing gate 41 provided in the game area is detected by the gate switch 21 shown in FIG. After the general chart start condition for executing variable display is established, based on the fact that the general chart start condition for starting variable display of normal symbols, such as the end of the previous general chart game, is established, Be started. In this ordinary game, when a predetermined variable display time elapses after starting the change of the normal symbol, the fixed normal symbol that becomes the variable display result of the normal symbol is completely stopped and displayed. The variable symbol display time may be determined as one of a plurality of variable display times by, for example, extracting numerical data indicating a predetermined random value at the start of each normal game. . If a specific normal symbol (symbol per symbol), such as a number indicating “7”, is stopped and displayed as a fixed normal symbol that becomes a variable display result of the normal symbol in the normal game, the variable symbol display result of the normal symbol is It becomes "per ordinary figure". On the other hand, if a normal symbol other than the symbol per symbol such as a number or symbol other than the number indicating “7” is stopped and displayed as the fixed ordinary symbol, the variable symbol display result of the normal symbol is “ordinary loss”. Become. Corresponding to the fact that the variable symbol display result of the normal symbol is “per normal symbol”, the expansion / release control is performed in which the movable wing piece of the electric tulip constituting the normal variable winning ball apparatus 6B is tilted, for a predetermined time. When elapses, normal opening control is performed to return to the vertical position.

  The special symbol game by the first special symbol display device 4A is caused by the fact that the game ball that has entered the first starting winning port formed in the normal winning ball device 6A is detected by the first starting port switch 22A shown in FIG. The process starts when the first start condition is satisfied after the first start condition is satisfied. The first start condition is satisfied when the current special figure game using the first special figure can be started, for example, when the previous special figure game, the big hit game state, or the small hit game state is finished. In the special game by the second special symbol display device 4B, a game ball that has entered the second start winning port formed in the normal variable winning ball device 6B is detected by the second start port switch 22B shown in FIG. Is started based on the fact that the second start condition is satisfied after the second start condition is satisfied. The second start condition is satisfied when the current special figure game using the second special figure can be started, for example, when the previous special figure game, the big hit gaming state, or the small hit gaming state is finished.

  In the special symbol game by the first special symbol display device 4A or the second special symbol display device 4B, after a predetermined variable display time elapses after the variable symbol special display is started, the result of the special symbol variable display is determined. The special symbol is displayed as a complete stop. The special symbol variable display time is, for example, numerical data indicating a random value MR4 for determining a variation pattern type as shown in FIG. 14 or numerical data indicating a random value MR5 for determining a variation pattern at the start of each special graphic game. Corresponding to the variation pattern determined based on the above, it is determined as one of a plurality of types of variable display times. If a specific special symbol (big hit symbol) is stopped and displayed as a fixed special symbol that will be the variable display result of the special symbol in the special symbol game, it will be a “big hit” as the specific display result, and a specific special that is different from the big bonus symbol If the symbol (small hit symbol) is stopped and displayed, it will be the “small hit” as the predetermined display result. If the special symbol (losing symbol) other than the big hit symbol or small hit symbol is stopped, the non-specific display result will be displayed. It becomes "losing". After the variable display result in the special figure game becomes “big hit”, the game is controlled to the big hit gaming state as the specific gaming state. Further, after the variable display result in the special figure game becomes “small hit”, the game is controlled to the small hit game state different from the big hit game state. In the pachinko gaming machine 1 in this embodiment, as an example, numbers indicating “1”, “3”, and “7” are jackpot symbols, numbers indicating “5” are jackpot symbols, and “−” is indicated. The symbol is a lost pattern. It should be noted that each symbol such as a big win symbol, a small bonus symbol, or a lose symbol in the special symbol game by the first special symbol display device 4A is different from each symbol in the special symbol game by the second special symbol display device 4B. Alternatively, a special symbol common to both special symbol games may be a big hit symbol, a small bonus symbol, or a lost symbol.

  In this embodiment, among the special symbols indicating the numbers “1”, “3”, and “7” that are jackpot symbols, the special symbols indicating the numbers “3” and “7” are 15 round jackpot symbols, A special symbol indicating the number “1” is a two-round jackpot symbol. In the big hit gaming state (15 round big hit state) as the first specific gaming state controlled after the 15 round big hit symbol is stopped and displayed as a confirmed special symbol in the special figure game, the open / close plate of the special variable winning ball apparatus 7 is The special variable winning ball apparatus 7 is played by opening the large winning opening in a predetermined period (for example, 29 seconds) which is the first period or until a predetermined number (for example, 9) of winning balls are generated. A round is performed that changes to a first state that is advantageous to the user. In this way, the open / close plate that opened the grand prize opening during the round receives the game ball falling on the surface of the game board 2, and then closed the grand prize opening to play the special variable prize ball device 7 as a game. Change to the second state, which is disadvantageous to the person, and finish one round. In the 15 round big hit state, the number of executions of the round, which is the open cycle of the big prize opening, is the first number (for example, “15”). A game in the 15 round big hit state in which the number of round executions is “15” is also referred to as a 15-time open game.

  In the big hit gaming state (two round big hit state) as the second specific gaming state controlled after the two round big hit symbol is stopped and displayed as the confirmed special symbol in the special figure game, the special variable winning ball apparatus 7 is played in each round. The period for changing to the first state that is advantageous to the player (the period in which the big prize opening is opened by the opening / closing plate) is a second period (for example, 0.5 seconds) shorter than the first period in the 15 round big hit state. . In the 2 round big hit state, the number of executions of the round is a second number (for example, “2”) smaller than the first number in the 15 round big hit state. In addition, in the two round big hit state, at least one of the period in which the big winning opening is opened in each round is the second period and the number of executions of the round is the second number is performed. The other control may be performed in the same manner as in the 15 round big hit state. A game in the round two big hit state in which the number of round executions is “2” is also referred to as a two-time open game. In the two-round big hit state, the predetermined winning ball device provided separately from the special variable winning ball device 7 in each round is changed from the second state which is disadvantageous to the player to the first state which is advantageous to the player. It is also possible to return to the second state after a predetermined period (first period or second period) has elapsed.

  Further, among the special symbols indicating the numbers “3” and “7” which are the 15-round jackpot symbol, the special symbol indicating the number “3” is stopped and displayed as the confirmed special symbol in the special game 15 After the round big hit state is over, as one of the special game states, the special symbol variation time (special diagram variation time) in the special figure game is controlled to be a short time state as compared with the normal state. Here, the normal state is a game state other than a special game state such as a big hit game state or a special game state such as a short-time state, and an initial setting state of the pachinko gaming machine 1 (for example, when a system reset is performed) Thus, the same control as in the state in which the initialization process is executed after power-on is performed. If the time-short state is terminated when any of the conditions of the special game is executed a predetermined number of times (for example, 100 times) and the variable display result is “big hit” is satisfied first, Good. In addition, after the 15 round big hit state based on the fact that the special symbol indicating the number “3” out of the 15 round big hit symbols is stopped and displayed as a confirmed special symbol in the special figure game, it does not become the short-time state. You may make it be in a normal state. Like the special symbol indicating the number “3”, the 15 round jackpot symbol controlled to the short-time state or the normal state after the jackpot gaming state based on being stopped and displayed as the confirmed special symbol in the special symbol game is This is usually referred to as a big hit symbol (also referred to as a “non-probable big hit symbol”). The variable display mode of special symbols and decorative symbols when the confirmed special symbol in the special figure game is a normal jackpot symbol is variable to “normal” (also referred to as “normal jackpot”) when the variable display result is “big hit”. It is referred to as a display mode (also referred to as “big hit type”).

  Out of the special symbols showing the numbers “3” and “7” that will be the 15-round jackpot symbol, the 15-round jackpot is based on the special symbol showing the number “7” being stopped and displayed as a confirmed special symbol in the special game. After the state is over, or after the two round jackpot state is over based on the fact that the special symbol indicating the number “1” that becomes the two-round jackpot symbol is stopped and displayed as the confirmed special symbol in the special figure game, As one of the special game states different from the normal game state, for example, the special figure change time is shortened compared to the normal state, and the probability change state (high probability game state) in which probability change control (probability change control) is continuously performed is controlled. Is done. In this probability change state, the variable display result of each special figure game and the decorative symbol variable display is improved so that the probability that the variable display result becomes “big hit” and is further controlled to the big hit gaming state is higher than in the normal state. Such a probability change state may be continued until the next variable display result becomes “big hit” regardless of the number of executions of the special game. On the other hand, after the certainty change state is reached, any one of the conditions that the special game is executed a predetermined number of times (for example, 100 times) or the variable display result is “big hit” is first. You may make it complete | finish when it is materialized. In addition, even if the special figure game is executed a predetermined number of times in the probability change state or before the variable display result is “big hit”, the probability change state ends at a predetermined rate when the special figure game is started. There may be.

  Like the special symbol indicating the number “7”, the 15-round jackpot symbol controlled to the probable change state after the jackpot gaming state based on being stopped and displayed as the confirmed special symbol in the special symbol game is a probabilistic big hit symbol. It is called. The variable display mode of special symbols and decorative symbols when the confirmed special symbol in the special figure game becomes a probable big hit symbol is variable "probable change" (also called "probable big hit") when the variable display result is "big hit". It is referred to as a display mode (also referred to as “big hit type”). Like the special symbol indicating the number “1”, the two-round big hit symbol controlled to the probable change state after the big hit gaming state based on being stopped and displayed as the confirmed special symbol in the special figure game is a sudden big hit symbol. It is called. The variable display mode of special symbols and decorative symbols when the confirmed special symbol in the special figure game is a sudden big hit symbol is “surprise” (“surprise big hit” or “sudden probability big hit” when the variable display result is “big hit”. ")" As a variable display mode (also referred to as "big hit type").

  In the probabilistic state and the short time state, the normal symbol display unit 20 controls the normal symbol variable display time in the normal symbol game to be shorter than that in the normal state, and the normal symbol variable display result of each time the normal symbol game is “normal”. Control for improving the probability of “per figure” than in the normal state, when the tilt time of the movable blade piece in the normal variable winning ball apparatus 6B based on the fact that the variable display result is “per normal figure” is in the normal state The player can be more likely to satisfy the second start condition by increasing the possibility that the game ball will enter the second start winning opening, such as a control for making it longer and a control for increasing the number of tilts than in the normal state. Control which is advantageous to the user is performed. It should be noted that any one of these controls may be performed in the probability variation state or the short time state, or a plurality of controls may be performed in combination. The control to be performed may be different between the probability variation state and the time-short state, or the combination of the controls to be performed (which may or may not include the same control) may be different.

  After the small hit symbol is stopped and displayed as the confirmed special symbol in the special symbol game, the small hit game state different from the big hit game state is controlled. In this small hit gaming state, a variable winning operation for changing the special variable winning device 7 to the first state advantageous to the player is performed as in the two round big hit state. That is, in the small hit game state, for example, the operation of opening the large winning opening over the second period by the opening / closing plate provided in the special variable winning ball apparatus 7 is repeatedly executed until the second number of times is reached. In the small hit gaming state, similarly to the two round big hit state, the period in which the big prize opening is in the open state is the second period, and the number of executions of the operation in which the big prize opening is in the open state is the second number. It may be controlled so that at least one of them is performed. After the small hit gaming state ends, the gaming state is not changed, and the game state before the variable display result becomes “small hit” is continuously controlled. However, if it is determined to end the short-time state corresponding to the variable display game in which the variable display result is “small hit”, the normal state is controlled after the end of the small hit gaming state. It will be. A game in the small hit gaming state in which the number of times that the big winning opening is opened by the variable winning operation is “2” is also referred to as a two-time open game, similar to the game in the two round big hit state. When the winning ball device provided separately from the special variable winning ball device 7 in each round in the two round big hit state is changed to the first state, the same as the two round big hit state in the small hit gaming state. In the aspect, the winning ball apparatus may be changed to the first state.

  On the display screen of the image display device 5, variable display of decorative symbols is performed corresponding to the variable display of special symbols by the first special symbol display device 4 </ b> A and the second special symbol display device 4 </ b> B. That is, on the display screen of the image display device 5, for example, the “left”, “middle”, or “right” decorative symbol display section 5 </ b> L based on the fact that either the first start condition or the second start condition is satisfied. In all of 5C and 5R, decorative symbols are displayed in an accelerated manner (all symbols accelerated display). When a predetermined speed is reached, the decorative symbols are displayed at a constant speed (all symbols are displayed at a constant speed). Such all symbols acceleration display and all symbols constant speed display are included in all symbol variations that variably display the ornament symbols in all of the “left”, “middle”, and “right” ornament symbol display portions 5L, 5C, and 5R. . After all the symbols change, for example, display the symbols in a decelerating display (each symbol deceleration display) in a predetermined order such as “Left” → “Right” → “Medium”. While stopping and displaying, for example, temporary stop display that causes slight shaking or expansion / contraction is performed. Then, when the elapsed time from the start of the variable display of the decorative pattern reaches the variable display time determined based on the variation pattern or the like, the fixed decorative pattern that is the variable display result is displayed in a completely stopped state. Note that the procedure for stopping and displaying the confirmed decorative symbols is not limited to displaying the decorative symbols in a predetermined order in the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R. In each of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R, a decorative symbol that is a confirmed decorative symbol at the same time may be displayed in a decelerating display (all symbol decelerating display).

  After all symbols change is started, the decorative symbols are reach-displayed on all or some of the decorative symbol display portions 5L, 5C, and 5R of “left”, “middle”, and “right”. It may be derived and displayed in the state. Here, the reach display state refers to a decorative symbol that has not yet been derived and displayed when the decorative symbol derived and displayed on the display screen of the image display device 5 constitutes a part of the jackpot combination (“reach variation symbol”). ")" Is a display state in which the variation continues, or a display state in which all or part of the decorative symbols change synchronously while constituting all or part of the jackpot combination. Specifically, some of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R (for example, “left” and “right” decorative symbol display portions 5L and 5R, etc.) The remaining decorative symbol display part (for example, “medium”) that has not yet been derived and displayed when the decorative symbol (for example, the decorative symbol indicating the alphanumeric character “7”) constituting the determined jackpot combination is derived and displayed. In the symbol display portion 5C, etc., the decorative symbols are changing, or the decorative symbols are big hits in all or part of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R. This is a display state that changes in synchronization while constituting all or part of the combination. Corresponding to the reach display state, an effect image such as an animation image or a live-action image different from the decorative design is displayed on the display screen of the image display device 5, the display mode of the background image is changed, There are times when the variation pattern of the decorative design is changed. Such an effect image display, background image display mode change, and decorative pattern change mode change are referred to as reach effect display (or simply reach effect). Some reach productions are set such that when they appear, a big hit is likely to occur (a high probability is a big win) compared to a normal reach production (normal reach). Such a special reach production is also called a super reach production (or simply “super reach”). As an example, for reach production that becomes super reach, after performing a reach production similar to normal reach until a predetermined time elapses, for example, a decorative pattern such as a background image display mode, a displayed character, a decorative pattern variation direction, etc. The change of the production mode (so-called “development”) by changing at least one of the fluctuation modes before the reach display state or at the time of the normal reach, and the reach production peculiar to the super reach It is sufficient if the introduction part in is started. In addition, in the reach production that becomes super reach, when the decorative design is derived and displayed in the reach display state, the introduction part in the reach production peculiar to super reach is started without performing the reach production similar to the normal reach. Things may be included.

  In addition, during the variable display of decorative symbols, unlike reach production, there is a possibility that the decorative symbols may be derived and displayed in the reach state, and that the variable display result may be a “hit”, There may be a case where a specific effect for informing the player is given in accordance with a variable display mode of the decorative design. In this embodiment, specific effects such as “sliding”, “pseudo-continuous”, “intro”, “development opportunity”, and “end of development opportunity” are set to be executable. In addition, the specific effect in this embodiment should just change a special figure fluctuation time according to whether a corresponding effect operation is performed. For example, when a specific effect is executed, it is only necessary that the special figure change time becomes longer than when the specific effect is not executed.

  In the specific effect of “sliding”, after performing all symbol variations that change the ornament symbols in all of the “left”, “middle”, and “right” ornament symbol display portions 5L, 5C, and 5R, two or more After the decorative symbols are temporarily stopped and displayed on the decorative symbol display portions (for example, the “left” and “right” decorative symbol display portions 5L, 5R, etc.), a predetermined number (for example, of the decorative symbol display portions that are temporarily stopped and displayed) “1” or “2”), the decorative symbol display unit (for example, one or both of the “left” decorative symbol display unit 5L and the “right” decorative symbol display unit 5R) is changed again. The effect display which changes the decorative design to be stopped and displayed by performing the stop display later is performed. In addition, in the temporary stop display of the decorative design in the specific effect, while the decorative design is stopped and displayed, for example, by performing a fluctuation change display or immediately changing the decorative design only by a short stop, etc. What is necessary is just to alert | report that the decoration symbol stopped and displayed to the player is not decided. Alternatively, in the temporary stop display, the decorative design may be re-fluctuated after the decorative design is stopped to the extent that the player recognizes that the decorative design that has been stopped is confirmed.

  In the “pseudo-ream” specific production, all symbol fluctuations are started in response to the first start condition or the second start condition for starting the variable display of special symbols and decorative symbols being established once. , “Left”, “Medium”, “Right” decorative symbols are displayed on all 5 L, 5 C, 5 R sequentially or simultaneously, and then “Left”, “Middle”, “Right” "Revariable display operation (revariation) for changing the decorative symbols again in all of the decorative symbol display portions 5L, 5C, 5R" is performed for a predetermined number of times (for example, up to three times). As an example, in the specific effect of “pseudo train”, the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R have a plurality of types of decorative symbols that are predetermined as pseudo-success chances. One of the combinations is displayed as a temporary stop. Then, it is only necessary to set so that the rate at which the variable display result becomes “big hit” increases as the number of re-variations increases. As a result, the player can recognize that one of the pseudo-continuous chances is temporarily stopped and displayed, so that the specific effect of the “pseudo-continuous” is performed, and the variable display result becomes “ The expectation of becoming a “big hit” is enhanced. In this embodiment, in the specific effect of “pseudo-continuous”, the re-variation is performed once to three times, so that the decorative design can be changed based on the fact that the first start condition or the second start condition is satisfied once. The display can appear as if it has been started 2-4 times in a row.

  During the variable display of the decorative pattern in which the specific effect of “pseudo-continuation” is executed, an effect image showing a character prepared in advance at a predetermined position on the display screen of the image display device 5 with the progress of the pseudo continuous variation, for example. , Displaying a predetermined sound (special sound) from the speakers 8L and 8R, lighting the game effect lamp 9 with a predetermined lighting pattern, for effects provided inside or outside the game area A predetermined effect operation such as operating a plurality of movable members included in the accessory may be executed. As an example, when the decorative symbols are temporarily stopped and displayed on all the decorative symbol display portions 5L, 5C, and 5R, and then the decorative symbols are displayed again on all the decorative symbol display portions 5L, 5C, and 5R, Pseudo continuous variation is performed by performing any one or a combination of a plurality of operations among the display of the displayed effect image, the output of the special sound, the lighting of the lamp, and the operation of the movable member. May be notified in a recognizable manner.

  In the specific effect of “Intro”, it is associated with the reach effect in advance, such as the introduction part of the effect display that is performed in the reach effect, for example, before the decorative symbol is derived and displayed in the reach display state after all the symbol changes are started. The predetermined production display is performed. As an example, in the specific effect of “Intro”, an effect display corresponding to the introduction part of the effect display performed in the super reach effect is performed. By executing such a specific effect of “Intro”, the player's response to the fact that the super-reach effect is executed with a higher probability of “hit” than the normal reach after the decorative symbol is derived and displayed in the reach display state. Expectation is enhanced.

  In the specific effect of “Development Opportunity”, after all the symbol changes are started, the decorative symbols constituting the predetermined development opportunity are temporarily displayed on all the decorative symbol display portions 5L, 5C, and 5R. After that, the decorative symbols are derived and displayed in the reach display state, and a predetermined reach effect is started. As an example, in the specific effect of “Development Chance”, a plurality of types of decorative symbols predetermined as development opportunities are displayed on the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R. One of the combinations is displayed as a temporary stop. As a result, the player may notice that the decorative symbol may be derived and displayed in the reach display state when any of the multiple types of development chances is temporarily stopped, and the variable display result is “big hit”. The expectation that the decorative symbol is derived and displayed in the reach display state and the expectation that the variable display result is “big hit” are enhanced.

  In the specific production of “end of development chance”, the decorative symbols are changed in all of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R, and then all decorative symbols are displayed. In the parts 5L, 5C, and 5R, an effect display is performed in which a decorative pattern having a predetermined combination as a development opportunity is stopped and displayed as a final decorative pattern (final stop display). As an example, in the specific production of “Development Chance Eye End”, one of the development chances temporarily displayed in the “Development Chance Eye” special production is stopped and displayed as a confirmed decorative symbol, and the decorative symbol variable display is displayed. finish. In this way, when one of the development opportunity eyes is derived and displayed, the decorative symbol may be derived and displayed in the reach display state by the specific effect of “Development chance eyes”, or by the specific effect of “End of development opportunity eyes” The variable display of decorative designs may end. As a result, when one of the development opportunity eyes is derived and displayed (temporary stop display), the expectation that the decoration symbol is derived and displayed in the reach display state is enhanced, and the decoration effect is displayed by the specific effect of the “development opportunity eyes”. When the symbol is derived and displayed in the reach display state, the variable display of the decorative symbol is continued, and the variable display result may be a “hit”, so that the player's joy can be enhanced.

  Furthermore, during the variable display of the decorative pattern, unlike the reach effect or the specific effect, for example, by displaying the decorative pattern in a display mode other than the variable display mode of the decorative pattern, such as displaying a predetermined character image or message image. A notice effect may be executed to notify the player that the variable display state may become a reach state and that the variable display result may be a “hit”. For example, the notice effect such as “character display”, “step-up image”, and “background change” may be set to be executable. Note that the notice effect may be any one that does not change in the special figure fluctuation time depending on whether or not the corresponding effect operation is executed. In the notice effect of “character display”, two or more decorative symbols are displayed after the decorative symbols are changed in all of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R. The character image prepared in advance in a predetermined position in the display area of the image display device 5 is displayed before the decorative symbols are derived and displayed on the display portion (for example, the “left” and “right” decorative symbol display portions 5L and 5R). An effect display is performed. In the notice effect of “step-up image”, two or more decorative symbols are displayed after changing the decorative symbols in all of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R. Before the decorative part is derived and displayed on the display unit, there may be an effect display in which a plurality of types of effect images prepared in advance are switched and displayed in a predetermined order in the display area of the image display device 5. In the notice effect of “step-up image”, after any one of a plurality of kinds of effect images prepared in advance (for example, an effect image that is displayed first in a predetermined order) is displayed, the effect image The effect display in the notice effect may be terminated without being switched. In the “background change” notice effect, an effect display that changes the display of the background image in the display area of the image display device 5 to one of a plurality of types is performed.

  If a special symbol that will be a lost symbol is stopped and displayed as a special symbol to be confirmed in the special symbol game, the decorative symbol variable display state will not reach the reach state after the variable symbol variable display starts. There are cases where a fixed decorative symbol that is a non-reach combination or a fixed decorative symbol that is one of a plurality of types of development chances is stopped and displayed. Such a decorative display variable display mode is referred to as a “non-reach” (also referred to as “normal loss”) variable display mode when the variable display result is “losing”.

  When a special symbol that becomes a losing symbol is stopped and displayed as a confirmed special symbol in the special symbol game, it corresponds to the fact that the decorative symbol variable display state has reached the reach state after the decorative symbol variable display has started. Then, after the reach effect is executed, or when the reach effect is not executed, a confirmed decorative pattern that becomes a predetermined reach-losing combination may be stopped and displayed. Such a variable display result of the decorative design is referred to as a variable display mode of “reach” (also referred to as “reach lose”) when the variable display result is “losing”.

  When the special symbol indicating the number “3”, which is a normal big hit symbol, is stopped and displayed as a special symbol to be confirmed in the special figure game as the 15 round big hit symbol, the variable symbol display state of the decorative symbol is reached. Corresponding to the state, after a predetermined reach effect is executed, a predetermined decorative symbol that is a predetermined normal jackpot combination is stopped and displayed. Here, for example, the symbol numbers that are variably displayed on the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R in the image display device 5 are the determined decorative symbols that are usually the big hit combinations. Among the decorative symbols “1” to “8”, any one of the decorative symbols whose symbol numbers are an even number “2”, “4”, “6”, “8” is “left”, “middle”, What is necessary is just to be stopped and displayed on the predetermined effective line in each of the “right” decorative symbol display portions 5L, 5C, and 5R. In this way, the decorative symbols having the even number “2”, “4”, “6”, “8” constituting the normal jackpot combination are referred to as normal symbols (also referred to as “non-probable variation symbols”). In response to the fixed special symbol in the special figure game becoming the normal jackpot symbol, after the predetermined reach effect is executed, the variable symbol display mode of the decorative symbol in which the fixed decorative symbol of the normal jackpot combination is stopped is displayed. This is referred to as a “normal” (also referred to as “normal jackpot”) variable display mode (also referred to as a jackpot type) when the variable display result is “big hit”. Thus, after the variable display result becomes “big hit” by the “normal” variable display mode, the game is controlled to the 15 round big hit gaming state, and when the 15 round big hit state is finished, it is controlled to the short-time state or the normal state. become.

  When the special symbol indicating the number “7”, which is the probability variable big hit symbol, is stopped and displayed as a special symbol to be confirmed in the special figure game as a 15-round big hit symbol, the variable display state of the decorative symbol is reached. Corresponding to the state, after the reach effect similar to the case where the big hit type is “normal” is executed, a fixed decorative symbol that becomes a predetermined probability variation big hit combination may be stopped and displayed. Here, the confirmed decorative symbols that are the probable big hit combinations are, for example, symbol numbers that are variably displayed on the decorative symbol display portions 5L, 5C, and 5R of “left”, “middle”, and “right” in the image display device 5. Among the decorative symbols “1” to “8”, any one of the decorative symbols whose symbol numbers are odd numbers “1”, “3”, “5”, “7” are “left”, “middle”, What is necessary is just to be stopped and displayed on the predetermined effective line in each of the “right” decorative symbol display portions 5L, 5C, and 5R. In this way, the decorative symbols having odd numbers “1”, “3”, “5”, and “7” constituting the probability variation big hit combination are referred to as probability variation symbols. Then, in response to the confirmed special symbol in the special figure game becoming a probable big hit symbol, after the reach effect is executed, the fixed decorative symbol of the probable big jackpot combination is stopped and displayed. This is referred to as a variable display mode (also referred to as a jackpot type) of “first probability change” when the display result is “big hit”. Thus, after the variable display result is “big hit” by the variable display mode of “first positive change”, the game is controlled to the 15th round big hit state, and when the 15th round big hit state ends, it is controlled to the positive change state. .

  When the special symbol indicating the number “7”, which is the probability variable big hit symbol, is stopped and displayed as a special symbol to be confirmed in the special figure game as a 15-round big hit symbol, the variable display state of the decorative symbol is reached. Corresponding to the state, after the reach effect different from the case where the variable display mode is “normal” is executed, the fixed decorative symbol that becomes a predetermined probability variation big hit combination may be stopped and displayed. In this way, in response to the confirmed special symbol in the special figure game becoming a probable big hit symbol, after the reach effect different from the case where the decorative symbol variable display mode is “normal” is executed, The variable display mode of the decorative pattern in which the fixed decorative pattern is stopped and displayed is referred to as a “second probability change” variable display mode (also referred to as a jackpot type) when the variable display result is “big hit”. Thus, after the variable display result is “big hit” by the variable display mode of “second positive change”, the control is made to the 15 round big hit state, and when the 15 round big hit state is finished, the variable change state is controlled to the positive change state. .

  When the special symbol indicating the number “7”, which is the probability variable big hit symbol, is stopped and displayed as a special symbol to be confirmed in the special figure game as a 15-round big hit symbol, the variable display state of the decorative symbol is reached. Corresponding to the state, after the reach effect similar to the case where the decorative symbol variable display mode is “normal” is performed, the fixed symbol combination of the normal jackpot combination may be stopped and displayed. In this way, in response to the confirmed special symbol in the special figure game becoming a probable big hit symbol, after the reach effect similar to the case where the variable display mode of the decorative symbol is “normal” is executed, The decorative display variable display mode in which the fixed decorative design is stopped and displayed is referred to as a “third probability change” variable display mode (also referred to as a jackpot type) when the variable display result is “big hit”. Thus, after the variable display result is “big hit” by the variable display mode of “third probability change”, the game is controlled to the 15 round big hit state, and when the 15 round big hit state is finished, it is controlled to the positive change state. .

  In this way, when the big hit type when the variable display result is “big hit” is “first probability variation” or “second probability variation”, the fixed decorative symbol that becomes the probability variation big hit combination by variable display of the decorative symbol Is stopped and displayed, it is determined that the probability change state is reached after being controlled to the 15 round big hit state. On the other hand, when the big hit type when the variable display result is “big hit” is “third probability variation”, the variable symbol display is normally performed in the same manner as when the big hit type is “normal”. The confirmed decorative pattern that is a jackpot combination is stopped and displayed. Therefore, when the big hit type is “third probability variation”, the player cannot recognize whether or not the probability variation state is obtained from the variable display result of the decorative symbols. That is, the confirmed decorative symbol that becomes the probability variation jackpot combination is included in the specific display result that is determined to be controlled to the jackpot gaming state, and is included in the special display result that is determined to be controlled to the probability variation state. On the other hand, a confirmed decorative pattern that is normally a big hit combination is included in a specific display result (non-special display result) other than a special display result that is not determined to be controlled in a certain variation state.

  When a special symbol indicating the number “1” that is a two-round jackpot symbol is stopped and displayed as a confirmed special symbol in the special symbol game, the decorative symbol variable display state does not reach the reach state, and a predetermined non- A fixed decorative symbol that is a reach combination is stopped and displayed, a fixed decorative symbol that is one of multiple types of development chances is stopped or displayed, or a decorative symbol that is preset as multiple types of chances of chance There is a case where a fixed decorative symbol that is one of the combinations is stopped and displayed. In addition, when the special symbol indicating the number “1”, which is a two-round jackpot symbol, is stopped and displayed as a confirmed special symbol in the special symbol game, the variable symbol display state of the decorative symbol is changed to the reach state. Then, after a predetermined reach effect is executed, a confirmed decorative pattern that becomes a predetermined reach-losing combination may be stopped and displayed. In this way, in response to the confirmed special symbol in the special symbol game becoming a special symbol indicating the number “1”, which is a two-round jackpot symbol, various decorative decorative variable display modes in which various confirmed decorative symbols are stopped and displayed. Is referred to as a variable display mode (also referred to as a jackpot type) of “surprise accuracy” (also referred to as “sudden probability big hit” or “sudden probability change big hit”) when the variable display result is “big hit”. Thus, after the variable display result is “big hit” by the variable display mode of “surprise accuracy”, it is controlled to the two round big hit state, and when the two round big hit state is finished, it is controlled to the probability changing state.

  When a special symbol indicating the number “5” as a small hit symbol is stopped and displayed as a confirmed special symbol in the special symbol game, the ornament is displayed in the same manner as when the variable display mode of the decorative symbol is “surprise”. After the variable display of the symbol is performed, the fixed decorative symbol that is a predetermined non-reach combination is stopped, the fixed decorative symbol that is one of multiple types of development opportunities is stopped, or There is a case where a fixed decorative symbol that is a predetermined reach-losing combination is stopped and displayed. In this way, in response to the confirmed special symbol in the special symbol game becoming a special symbol indicating the number “5” as the small hit symbol, the variable display mode of the decorative symbols on which various confirmed decorative symbols are stopped and displayed is as follows. , “Small hit” variable display mode (also referred to as “small hit type”). Here, the confirmed decorative pattern that is one of the multiple types of random chances is stopped only when the variable display mode of the decorative pattern is “Accuracy”, and when the variable display mode is “Small”. Is not stopped and displayed as a confirmed decorative pattern. In other words, when a fixed decorative pattern that is a chance of a chance of success is stopped and displayed in a variable display of decorative symbols, it is determined that the variable display result is “big hit” by the variable display mode of “accuracy”. After the variable display result is “small hit”, the game is controlled to the small hit gaming state in which the variable winning action similar to the two round big hit state is performed, and when the small hit gaming state ends, the gaming state is not changed. Therefore, the gaming state before the variable display result becomes “small hit” continues. If it is determined that the probability change state or the short-time state is to be ended in response to the variable display game in which the variable display result is “small hit”, the normal state is returned after the end of the small hit gaming state. Will be controlled.

  If the big hit type when the variable display result is “big hit” is any one of “normal”, “first probability variation”, or “third probability variation”, a specific variation display is made during variable display of decorative symbols. Promotional effects may be executed during the change. In the fluctuating promotion effect, a decorative symbol that is normally a big hit combination is temporarily displayed on the effective lines of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R on the image display device 5. After that, for example, the decorative pattern display portions 5L, 5C, and 5R of “left”, “middle”, and “right” are changed again in a state where the same decorative pattern is aligned, and the decorative symbol that becomes a probable big hit combination, Any of the decorative symbols that are normally a big hit combination is stopped and displayed as a finalized decorative symbol (final stop display). Here, when the changing promotion effect is executed corresponding to the fact that the decorative symbol variable display mode is “normal” or “third probability change”, the temporarily changing display is performed as the changing promotion effect. After changing the decoration symbol again, a promotion promotion failure during change is performed in which the fixed decoration symbol which is normally a big hit combination is stopped and displayed. On the other hand, when the changing promotion effect is executed in response to the variable display mode being “first probability change”, the temporarily stopped display of the decorative design is changed again as the changing promotion effect. After that, the promotion success effect during change is performed to stop and display the confirmed decorative pattern that becomes the probability variation big hit combination.

  When the big hit type when the variable display result is “big hit” is either “normal” or “third probability variation”, the variable display result is stopped and displayed, and then controlled to the 15 round big hit state. Thereafter, during the period until the 15-round big hit state is completed, a promotion effect during the big hit is executed as a notification effect as to whether or not to control to the probable change state. Here, the timing at which the jackpot promotion effect is executed may be a period before the start of the first round in the 15 round big hit state after the variable display result is stopped and displayed, or the 15 round big hit state May be a period during which any one of the rounds is being executed, or may be a period from the end of any round to the start of the next round in the 15 round big hit state, or 15 rounds. It may be a period from the end of the last round in the big hit state to the start of the next variable display game. Alternatively, an effect operation corresponding to the promotion effect during the big hit may be performed during the fluctuation of the first special symbol or decorative design after the end of the 15th round big hit state. The jackpot promotion effect executed after the final round in the 15 round jackpot state is sometimes referred to as “ending promotion effect” in particular.

  In the jackpot promotion effect, there is a jackpot promotion promotion effect that informs that there is a promotion that the gaming state becomes a probable change state even though the confirmed decorative pattern is a normal jackpot combination, and that there is no promotion that becomes a probable change state There is a promotion promotion failure during the jackpot to be notified. As an example, in the jackpot promotion effect, the decorative symbol is variably displayed in the display area of the image display device 5 and either the normal symbol or the probability variation symbol is stopped and displayed as the effect display result. At this time, the normal symbol is stopped and displayed as the effect display result in the jackpot promotion promotion effect, while the probable change symbol may be stopped and displayed as the effect display result in the jackpot promotion promotion effect. As another example, in the jackpot promotion effect, a predetermined effect image different from the decorative design may be displayed in the display area of the image display device 5. For example, an effect image indicating a roulette game is displayed as a jackpot promotion effect. At this time, the ball thrown into the rotating roulette enters the “even number” in the big hit promotion promotion effect and displays the effect image of “Sorry!”, While the successful promotion to the big hit hits the rotating roulette. The ball enters “odd number” and the effect image “probability!” Is displayed. In response to the special symbol indicating the number “7” being stopped and displayed as a special symbol in the special figure game, after the variable display result becomes “big hit” due to the big hit type of “third probability variation” By executing the success promotion effect during the big hit, it is notified that there is a promotion that is in a probable state. Corresponding to the special symbol showing the number “3” being stopped and displayed as a special symbol in the special figure game, after the variable display result becomes “big hit” due to “normal” big hit, While the promotion failure production is executed, the success promotion production during the jackpot is not executed, and notification that there is a promotion that is in a probable state is not performed.

  The pachinko gaming machine 1 includes various power supply boards 10, a main board 11, an effect control board 12, an audio control board 13, a lamp control board 14, a payout control board 15, a launch control board 17 as shown in FIG. A control board is mounted. The pachinko gaming machine 1 is also equipped with a relay board 18 for relaying various control signals transmitted between the main board 11 and the effect control board 12. Note that the audio control board 13 and the lamp control board 14 may be configured as independent boards that are separate from the effect control board 12, or may be integrated into the effect control board 12 and configured as one board. In addition, various control boards such as an information terminal board and an interface board are disposed on the back surface of the pachinko gaming machine 1. The interface board is a control board interposed between the payout control board 15 and the card unit when the card unit is installed adjacent to the pachinko gaming machine 1.

  The power supply board 10 is installed independently of each control board such as the main board 11, the effect control board 12, and the payout control board 15, and generates a voltage used by each control board and mechanism component in the pachinko gaming machine 1. For example, the power supply board 10 generates AC 24 V, VLP (DC +24 V), VSL (DC +30 V), VDD (DC +12 V), VCC (DC +5 V), and VBB (DC +5 V) as shown in FIG. For example, as shown in FIG. 3, the power supply board 10 includes a transformer circuit 301, a DC voltage generation circuit 302, a power supply monitoring circuit 303, and a clear switch 304. Further, the power supply substrate 10 may be provided with a capacitor serving as a backup power supply. For example, this capacitor may be charged from a power supply line of VBB (DC + 5V). In addition, the power supply board 10 may be provided with a power switch for executing or cutting off power supply to each control board and the mechanical components in the pachinko gaming machine 1. Alternatively, the power switch may be provided outside the power supply board 10 in the pachinko gaming machine 1.

  For example, the transformer circuit 301 may be configured to include a transformer to which commercial power is applied to the input side (primary side), a varistor as an overvoltage protection circuit provided on the input side of the transformer, and the like. Here, the transformer included in the transformer circuit 301 may be any one that electrically insulates the commercial power supply from the power supply substrate 10. The transformer circuit 301 generates AC 24V as its output voltage. The DC voltage generation circuit 302 includes, for example, a rectifying / smoothing circuit that generates VSL by rectifying and boosting AC 24V with a rectifying element. VSL is used as a power supply voltage for driving the solenoid. Further, the DC voltage generation circuit 302 includes a rectifier circuit that generates VLP by rectifying AC24V with a rectifier, for example. The VLP is used as a power supply voltage for lighting a light emitter such as the game effect lamp 9. In addition, the DC voltage generation circuit 302 includes a DC-DC converter that generates VDD and VCC based on, for example, VSL. This DC-DC converter includes, for example, one or more switching regulators and a relatively large capacity capacitor connected to the input side of the switching regulator, and power supply to the pachinko gaming machine 1 from the outside is stopped. Sometimes, it may be configured so that the direct current voltage such as VSL, VDD, VBB, etc. decreases relatively slowly. The VDD is supplied to various switches for detecting game media such as the gate switch 21, the first and second start port switches 22A and 22B, and the count switch 23 shown in FIG. 2, and is used to operate these switches. .

  As shown in FIG. 3, AC24V output from the transformer circuit 301 is transmitted to the payout control board 15 via a predetermined connector or a power supply line, for example. The VLP is transmitted to the lamp control board 14 via, for example, a predetermined connector or a power supply line. VSL, VDD, and VCC are transmitted to the main board 11, the lamp control board 14, and the payout control board 15 through, for example, predetermined connectors and power supply lines. The VBB is transmitted to the main board 11 and the payout control board 15 through, for example, a predetermined connector and a power supply line. Note that each voltage may be supplied to the effect control board 12 and the sound control board 13 via the lamp control board 14. Alternatively, each voltage may be directly supplied to the effect control board 12 and the sound control board 13 from the power supply board 10 without going through the lamp control board 14.

  The power monitoring circuit 303 is configured by using, for example, a power failure monitoring reset module IC, and is a circuit that realizes a power monitoring unit that outputs a power interruption signal. For example, the power supply monitoring circuit 303 has a predetermined period of time (56 milliseconds as an example) during which the predetermined voltage (VLP as an example) used in the pachinko gaming machine 1 is equal to or lower than a predetermined value (+20 V as an example). When the above is continued, a power-off signal is output. Alternatively, the power monitoring circuit 303 may output a power-off signal immediately when a predetermined voltage used in the pachinko gaming machine 1 becomes a predetermined value or less. The power-off signal may be an electrical signal that is turned on when it is at a low level, for example. The power cut-off signal output from the power supply monitoring circuit 303 is amplified by, for example, an output driver circuit mounted on the power supply board 10 and then transmitted to the payout control board 15 via a predetermined connector or signal line, thereby giving out payout control. The signal is transmitted from the substrate 15 to the main substrate 11. The condition for detecting the stop of the supply of power supplied to the pachinko gaming machine 1 from the outside is not limited to the fact that the predetermined voltage used in the pachinko gaming machine 1 has become a predetermined value or less. Any condition can be used as long as it is possible to detect that has stopped. For example, the AC wave such as AC 24V may be monitored to detect that the AC wave has stopped, or the signal obtained by digitizing the AC wave may be monitored and the AC signal may be generated when the digital signal becomes flat. It may be a detection condition for the interruption.

  The power supply monitoring circuit 303 may output a reset signal when, for example, a predetermined voltage (VCC as an example) becomes equal to or lower than a predetermined value (as an example, + 5V or more). The reset signal may be an electric signal that is turned on when the reset signal becomes low level, for example. The reset signal output from the power supply monitoring circuit 303 is amplified by, for example, an output driver circuit mounted on the power supply board 10 and then, via a predetermined connector or signal line, the main board 11, the lamp control board 14, and the payout control board. 15 is transmitted. It should be noted that a reset signal may be transmitted to the effect control board 12 via the lamp control board 14. Furthermore, the circuit that outputs the reset signal may be configured by using a watchdog timer built-in IC provided separately from the power supply monitoring circuit 303, a system reset IC, or the like.

  When the power supply to the pachinko gaming machine 1 is stopped, the power monitoring circuit 303 outputs a reset signal (sets to a low level) when a predetermined period elapses after the power-off circuit 303 outputs a power-off signal (sets to a low level). ) In the predetermined period, for example, the game control microcomputer 100 mounted on the main board 11 and the payout control microcomputer 150 mounted on the payout control board 15 shown in FIG. It is sufficient if the time is sufficient for execution. That is, the power monitoring circuit 303 outputs a power-off signal as a power failure signal, and after the game control microcomputer 100 and the payout control microcomputer 150 complete execution of predetermined power-off processing, The reset signal is output (set to low level). The game control microcomputer 100 and the payout control microcomputer 150 that have received the reset signal output from the power supply monitoring circuit 303 are in an operation stop state, and execution of various control processes is stopped. In addition, when the power supply to the pachinko gaming machine 1 is started, for example, when a predetermined voltage (VCC as an example) exceeds a predetermined value (+5 V as an example), the power monitoring circuit 303 stops outputting the reset signal (high Level).

  FIG. 4 is a timing diagram schematically showing the states of AC 24 V, VLP, VCC, reset signal, and power-off signal when power supply to the pachinko gaming machine 1 is started and when power supply is stopped. is there. As shown in FIG. 4, when the power supply to the pachinko gaming machine 1 is started, VLP and VCC gradually reach specified values (DC + 24V and DC + 5V). At this time, when VLP exceeds the first predetermined value, the power supply monitoring circuit 303 stops outputting the power-off signal (sets it to a high level) and turns it off. When VCC exceeds the second predetermined value, the power supply monitoring circuit 303 stops outputting the reset signal (sets it to a high level) and turns it off. On the other hand, when the power supply to the pachinko gaming machine 1 is stopped, VLP and VCC gradually decrease. At this time, when the VLP drops to the first predetermined value, the power supply monitoring circuit 303 outputs the power-off signal as an ON state (sets it to a low level). When VCC decreases to the second predetermined value, the power supply monitoring circuit 303 outputs the reset signal as an ON state (sets it to a low level).

  The clear switch 304 included in the power supply substrate 10 illustrated in FIG. 3 has a push button structure, for example, and outputs a clear signal in response to an operation such as pressing. The clear signal may be an electric signal that is turned on when the clear signal is at a low level, for example. The clear signal output from the clear switch 304 is transmitted to the main board 11 via a predetermined connector or signal line, for example, and is transmitted from the main board 11 to the payout control board 15. When the clear switch 304 is not operated, the output of the clear signal is stopped (set to a high level). Note that the clear switch 304 may have a configuration other than a push button structure (for example, a slide switch structure, a toggle switch structure, a dial switch structure, or the like).

  The main board 11 is a main-side control board on which various circuits for controlling the progress of the game in the pachinko gaming machine 1 are mounted. The main board 11 is a sub-side mainly composed of a random number setting function used in a special game, a function of inputting a signal from a switch arranged at a predetermined position, an effect control board 12, a payout control board 15, and the like. It has a function of outputting and transmitting a control command as an example of command information to the control board as a control signal, a function of outputting various information to the hall management computer, and the like. In addition, the main board 11 performs on / off control of each LED (for example, segment LED) constituting the first special symbol display device 4A and the second special symbol display device 4B, and thereby the first special diagram and the second special diagram. Variable display of a predetermined display pattern such as controlling the variable display of the normal symbol display 20 and controlling the variable symbol display of the normal symbol display 20 by controlling the lighting / extinguishing / coloring control of the normal symbol display 20. It also has a function to control. As shown in FIG. 2, for example, the main board 11 includes a game control microcomputer 100, a control clock generation circuit 111, a random number clock generation circuit 112, a switch circuit 114, and a solenoid circuit 115. . A game start switch 31 is provided on the main board 11.

  Here, the control clock generation circuit 111 generates a control clock CCLK that becomes an oscillation signal having a predetermined frequency outside the game control microcomputer 100. The control clock CCLK generated by the control clock generation circuit 111 is supplied to the clock circuit 502 via the control external clock terminal EXC of the game control microcomputer 100 as shown in FIG. 7, for example. The random number clock generation circuit 112 generates a random number clock RCLK that is an oscillation signal having a predetermined frequency different from the oscillation frequency of the control clock CCLK, outside the game control microcomputer 100. The random number clock RCLK generated by the random number clock generation circuit 112 is supplied to the random number circuit 509 via the random number external clock terminal ERC of the game control microcomputer 100 as shown in FIG. As an example, the oscillation frequency of the random number clock RCLK generated by the random number clock generation circuit 112 may be equal to or lower than the oscillation frequency of the control clock CCLK generated by the control clock generation circuit 111.

  The switch circuit 114 takes in detection signals from various switches for detecting game balls and transmits them to the game control microcomputer 100. The solenoid circuit 115 transmits a solenoid drive signal from the game control microcomputer 100 to the solenoids 81 and 82. The game start switch 31 has, for example, a push button structure, and the pachinko gaming machine 1 closes the gaming machine frame 3 so that the player can not normally touch the pachinko gaming machine 1 in a state in which the player plays a normal game. What is necessary is just to be arrange | positioned. Then, for example, when the pachinko gaming machine 1 is turned on or when the system is reset, the pachinko gaming machine 1 is operated to instruct the game start after the initial setting. Note that the game start switch 31 may have a configuration other than the push button structure (for example, a slide switch structure, a toggle switch structure, a dial switch structure, or the like).

  As shown in FIG. 2, wiring for transmitting detection signals from the gate switch 21, the first start port switch 22 </ b> A, the second start port switch 22 </ b> B, and the count switch 23 is connected to the main board 11. The gate switch 21, the first start port switch 22A, the second start port switch 22B, and the count switch 23 have an arbitrary configuration that can detect a game ball as a game medium, such as a sensor. What is necessary is just to have. The main board 11 includes a first special symbol display device 4A, a second special symbol display device 4B, a normal symbol display device 20, a first hold display device 25A, a second hold display device 25B, and a general drawing hold display device 25C. Wiring for transmitting a command signal for performing display control such as is connected. Further, the main board 11 is connected to wiring for transmitting command signals for performing drive control, such as a solenoid 81 for an ordinary electric accessory and a solenoid 82 for a prize winning door.

  Various control commands are transmitted between the main board 11 and the effect control board 12, for example, by performing serial communication only in a single direction from the main board 11 to the effect control board 12 via the relay board 18. The The effect control board 12 is a sub-side control board independent of the main board 11, receives a control command transmitted from the main board 11 via the relay board 18, and receives the image display device 5, speakers 8L, 8R. In addition, various circuits for controlling electric parts (production device) for production such as a light emitter such as a game effect lamp 9 are mounted. That is, the effect control board 12 has a function of controlling the display operation in the image display device 5, the sound output operation from the speakers 8L and 8R, the lighting operation and the extinguishing operation in the light emitter such as the game effect lamp 9 and the like. . The effect control board 12 is connected to wiring for transmitting a control signal to the sound control board 13 and the lamp control board 14, wiring for transmitting an image data signal to the image display device 5, and the like.

  The main board 11 may be provided with a main board side connector corresponding to the relay board 18, for example, and an output buffer circuit may be connected between the main board side connector and the game control microcomputer 100. . This output buffer circuit can pass a control signal only in the direction from the main board 11 to the effect control board 12 via the relay board 18, for example, and prevents the signal input from the relay board 18 to the main board 11. . Therefore, there is no room for signals to be transmitted from the production control board 12 or the relay board 18 side to the main board 11 side. Note that the relay board 18 may not be provided between the main board 11 and the effect control board 12. Thereby, the freedom degree of wiring routing between the main board | substrate 11 and the production | presentation control board 12 can be raised.

  For example, the relay board 18 may be provided with a transmission direction regulating circuit in a wiring for transmitting a control signal from the main board 11 to the effect control board 12. The transmission direction regulating circuit includes a diode having an anode connected to the main board connector corresponding to the main board 11 and a cathode connected to the presentation control board connector corresponding to the presentation control board 12, and one end connected to the cathode of the diode. And the other end of which is connected to the ground (GND). With this configuration, the transmission direction regulating circuit can prevent the signal from being input from the effect control board 12 to the relay board 18 and pass the signal only in the direction from the main board 11 to the effect control board 12. Therefore, there is no room for signals to be transmitted from the production control board 12 side to the main board 11 side. In this embodiment, a transmission direction regulating circuit is provided in the wiring for transmitting a control signal in the relay board 18, and an output buffer circuit is provided between the game control microcomputer 100 and the main board side connector on the main board 11. By providing, illegal signal input to the main board 11 from the outside can be prevented.

  Various control commands and notification signals are transmitted between the main board 11 and the payout control board 15 by, for example, bidirectional serial communication. The payout control board 15 is a sub-side control board independent of the main board 11, receives a control command and a notification signal transmitted from the main board 11, and controls the payout operation of the game ball by the payout motor 51. Various circuits are installed. That is, the payout control board 15 has a function of controlling the award ball payout operation by the payout motor 51. The payout control board 15 may have a function of controlling the ball lending operation by controlling the driving of the payout motor 51 in accordance with the communication result with the card unit via the interface board, for example. The payout control board 15 receives wiring for receiving detection signals from the full tank switch 26 and the ball break switch 27, and detection signals from the payout motor position sensor 71, the payout count switch 72, and the error release switch 73. Wiring for is connected. In addition, a wiring for transmitting a command signal for performing payout control of the game ball in the payout motor 51 and a command signal for performing display control in the error display LED 74 are transmitted to the payout control board 15. Wiring for communication with the card unit is connected via the interface board.

  Here, the full tank switch 26 is installed on the side wall of the surplus ball passage that communicates between the striking ball supply tray and the surplus ball receiving tray, for example, below the back of the game board 2, and detects the full tank of the surplus ball receiving tray. Is. A lot of game balls based on award balls or ball lending requests are paid out, the batting supply tray becomes full, and after the game balls reach the contact port, when game balls are paid out, the game balls pass through the surplus ball passage. It is led to the extra ball tray. When the game ball is further paid out, for example, a predetermined sensing lever presses the full switch 26 to turn on.

  In addition, the ball break switch 27 is installed downstream of the guide rail that guides the game ball to the payout device in which the payout motor 51 is installed, for example, on the back of the game board 2, and via a curve rod downstream of the guide rail. This is for detecting the presence or absence of game balls in two rows of ball passages communicated with each other. As an example, the ball break switch 27 is locked by a locking piece at a position where it can be detected that 27 to 28 game balls are present in the ball path, and the maximum payout number (for example, 100) It is possible to confirm that at least 25 pieces corresponding to a circle are secured. The guide rail guides a game ball from a storage tank that stores a game ball as a supply ball above the back of the game board 2 to a payout device, and a payout motor 51 is provided below the ball passage. The payout device in which is installed is fixed.

  The error release switch 73 is a switch for releasing the error state by software reset when the payout control microcomputer 150 is controlled to a predetermined error state. The error display LED 74 is composed of, for example, a 7-segment LED, and is used to display error codes corresponding to various errors based on an error flag set by the payout control microcomputer 150.

  The launch control board 17 shown in FIG. 2 is for controlling the launch operation of the game ball by a predetermined launch device in accordance with the operation amount of the operation knob 30. For example, the firing control board 17 has wiring for transmitting a drive signal from the power supply board 10 or the main board 11, wiring for transmitting a connection signal from the card unit via the payout control board 15 and the interface board, and an operation knob 30. Are connected to the firing motor 61. Note that the connection signal from the card unit may be branched at the dispensing control board 15 and transmitted to the firing control board 17, or the launch control may be performed from the card unit via the interface board and not via the dispensing control board 15. It may be transmitted to the substrate 17. The firing control board 17 adjusts the driving force of the firing motor 61 in accordance with the operation amount of the operation knob 30. For example, the launch motor 61 elastically deforms the launch spring by a driving force adjusted by the launch control board 17, and transmits the biasing force of the launch spring to the hitting hammer to hit the game ball, thereby operating the game ball on the operation knob 30. It is fired toward the game area at a speed corresponding to the operation amount.

  The control command transmitted from the main board 11 to the effect control board 12 via the relay board 18 is, for example, an effect control command transmitted as an electric signal. In this embodiment, the effect control command is set for transmission by the CPU 505 (see FIG. 7) provided in the game control microcomputer 100 mounted on the main board 11, and the game control microcomputer 100 is based on the setting. Is transmitted to the effect control board 12 by the second channel transmission circuit 571B (see FIG. 25) of the serial communication circuit 511 (see FIG. 7). In the following description, the transmission operation of the effect control command from the main board 11 to the effect control board 12 includes a series of operations by the CPU 505 and the serial communication circuit 511 provided in the game control microcomputer 100. To do. In this case, on the side of the effect control board 12, for example, the CPU of the effect control microcomputer 120 performs an interrupt process based on a reception interrupt request generated when communication data in the serial signal format transmitted from the main board 11 is received. By executing, the effect control command may be captured and stored in a predetermined buffer (for example, a reception command buffer for effect). The effect control command may be transmitted from the main board 11 to the effect control board 12 via the relay board 18 by a plurality of signal lines (for example, eight effect control signal lines). In this case, in addition to the signal line for transmitting the effect control command, a signal line for transmitting the capture signal (effect control INT signal) for requesting the capture of the effect control command may be wired.

  The effect control command includes, for example, a display control command used for controlling an image display operation in the image display device 5, a voice control command used for controlling sound output from the speakers 8L and 8R, and a game effect lamp 9. The lamp control command used for controlling the lighting operation of the light emitter is included. FIG. 5A is an explanatory diagram showing an example of the contents of a display control command used in this embodiment. The display control command has, for example, a 2-byte structure, and the first byte indicates MODE (command classification), and the second byte indicates EXT (command type). The first bit of the MODE data (bit number [7]) is always “1”, and the first bit of the EXT data is “0”. The form of the display control command shown in FIG. 5A is an example, and other command forms may be used. In this example, the display control command has a 2-byte configuration, but the number of bytes constituting the display control command may be 1 or a plurality of 3 or more.

  In the example shown in FIG. 5A, the command 8001H is a first change start command for designating the start of change of the first special figure in the special figure game by the first special symbol display device 4A. The command 8002H is a second change start command for designating the start of change of the second special figure in the special figure game by the second special symbol display device 4B. The command 81XXH is a decoration that is variably displayed on the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R in the image display device 5 in response to the variable display of the special symbol in the special graphic game. This is a variation pattern designation command for designating a variation pattern such as a symbol. Here, XXH indicates an unspecified hexadecimal number, and may be a value arbitrarily set according to the instruction content by the effect control command. In the variation pattern designation command, different EXT data is set according to the variation pattern to be designated.

  In this embodiment, the first and second change start commands and the change pattern designation command are prepared as separate effect control commands. On the other hand, the designation content indicating which of the first special figure and the second special figure is to be changed and the designated content of the fluctuation pattern are configured to be specified by one effect control command. Also good. As an example, an effect control command in which EXT data is set corresponding to a combination of a special symbol (first special figure or second special figure) that starts change and a change pattern is prepared. You may enable it to specify the special symbol and fluctuation pattern which become a fluctuation start. Here, when the special symbol and the variation pattern that start the variation can be specified by one effect control command, the special symbol (the first special feature that starts the variation) for one variation pattern. There are cases where it is necessary to prepare two types of effect control commands according to the figure or the second special figure). On the other hand, if an effect control command for designating a special symbol for starting variation and an effect control command for designating a variation pattern are prepared separately, two types of effect control commands corresponding to the special symbol for starting variation are prepared. And the number of effect control commands corresponding to the number of types of variation patterns may be prepared, and the types of commands prepared in advance, the storage capacity of the command table, and the like can be reduced.

  Command 8CXXH is a variable display result notification command for designating a variable display result such as a special symbol or a decorative symbol. In the variable display result notification command, for example, as shown in FIG. 5B, a prior determination result indicating whether the variable display result is “lost”, “big hit”, or “small hit”, and the variable display result is Different EXT data is set corresponding to the big hit type determination result of whether the big hit type is “normal”, “first probability variation” to “third probability variation”, or “surprise probability” in the case of “big hit” The More specifically, the command 8C00H is a first variable display result notification command indicating a prior determination result indicating that the variable display result is “lost”. The command 8C01H is a second variable display result notification command indicating a prior determination result and a big hit type determination result that the big hit type is “normal” when the variable display result is “big hit”. The command 8C02H is a third variable display result notification command indicating a prior determination result and a big hit type determination result that the big hit type is “first probability change” when the variable display result is “big hit”. The command 8C03H is a fourth variable display result notification command indicating a prior determination result and a big hit type determination result that the big hit type is “second probability change” when the variable display result is “big hit”. The command 8C04H is a fifth variable display result notification command indicating a prior determination result and a big hit type determination result that the big hit type is “third probability change” when the variable display result is “big hit”. The command 8C05H is a sixth variable display result notification command indicating a determination result that the big hit type is “surprise” when the variable display result is “big hit”. The command 8C06H is a seventh variable display result notification command indicating a determination result indicating that the variable display result is “small hit”.

  In this embodiment, the variation pattern designation command and the variable display result notification command are prepared as separate presentation control commands. On the other hand, the variation pattern indicated in the variation pattern designation command and the variable display result indicated in the variable display result notification command may be configured to be specified by one effect control command. As an example, an effect in which EXT data is set corresponding to a combination of a variation pattern and a variable display result (any one of “losing”, “big hit”, “small hit”, and a big hit type in the case of “big hit”). A control command may be prepared, and information that can specify the variation pattern and the variable display result may be transmitted by the effect control command. Alternatively, the variation pattern and the variable display result may be specified by three or more effect control commands. Here, when the variation pattern and the variable display result are configured to be specified by a single effect control command, a plurality of types of effects corresponding to a plurality of types of variable display results for one variation pattern. You may need to provide control commands. On the other hand, if the production control command for designating the variation pattern and the production control command for notifying the variable display result are prepared separately, the number of production control commands corresponding to the number of types of the variation pattern and the variable display result are provided. The number of effect control commands corresponding to the number of types may be prepared, and the types of commands prepared in advance, the storage capacity of the command table, and the like can be reduced.

  The command 8F00H is a decorative symbol stop command for designating stop of variable display of decorative symbols in the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R in the image display device 5. The decoration symbol stop command may not be transmitted from the main board 11 to the effect control board 12. In this case, the variable display time corresponding to the variation pattern designated by the variation pattern designation command is specified on the side of the effect control board 12, and the elapsed time from the start of variable display of the decorative design is variable display time. Even if the production control command from the main board 11 is not received, the determined decorative design may be displayed in a completely stopped state to confirm the variable display result.

  A0XXH is a hit start designation command (also referred to as a “fanfare command”) for designating display of an effect image indicating the start of a big hit gaming state or a small hit gaming state. In the hit start designation command, for example, EXT data similar to the variable display result notification command is set, so that different EXT data is set according to the prior determination result or the big hit type determination result. Alternatively, in the hit start designation command, the correspondence relationship between the preliminary determination result and the big hit type determination result and the set EXT data may be different from the correspondence relationship in the variable display result notification command.

  The command A1XXH is a command for specifying the opening of the big prize opening that designates the display of the effect image during the period in which the big prize opening is open in each round or variable winning action corresponding to the big winning game state or the small winning game state. It is. The command A2XXH is an effect image (for example, an effect in the interval between rounds) corresponding to the big hit game state or the small win game state during the period when the big prize opening is changed from the open state to the closed state by the end of each round or variable winning operation. This is a designation command after opening the big prize opening that designates display of (image). In the command for opening the big prize opening and the designation command after opening the big prize opening, for example, the number of round executions (for example, “1” to “15”) in the 15 round big hit state, the round in the big round and the small hit game state Different EXT data is set corresponding to the number of executions of the variable winning operation at (for example, “1” or “2”). Depending on whether it is a 15-round big hit state, a two-round big hit state, or a small-hit gaming state, a special command during opening of the big prize opening or a designated command after opening the big prize opening may be prepared separately. On the other hand, the number of types of effect control commands is reduced by using the common command during opening of the big prize opening and the designation command after opening the big prize opening, which are common to the 15 round big hit state, the 2 round big hit state, and the small hit game state. can do. Also, in the big hit gaming state and the small hit gaming state, it is a period in which the big winning opening is open in each round or variable winning action, or the big winning opening is released from the open state by the end of each round or variable winning action. Regardless of whether the period has changed to the closed state, a continuous presentation operation may be executed from the start point to the end point of the big hit gaming state or the small hit gaming state. Further, in the small hit gaming state, the designation command during opening of the big prize opening and the designation command after opening the big prize opening may not be transmitted.

  Command A3XXH is a hit end designation command for designating display of an effect image at the end of the big hit gaming state or the small hit gaming state. In the winning end designation command, for example, EXT data similar to the variable display result notification command and the winning start designation command is set, so that different EXT data is set according to the prior determination result and the big hit type determination result. Alternatively, in the hit end designation command, the correspondence relationship between the prior determination result and the big hit type determination result and the set EXT data may be different from the correspondence relationship in the variable display result notification command or the hit start designation command. .

  The command B001H is for executing a special game using the first special figure by the first special symbol display device 4A based on the fact that the game ball has won the first start winning opening formed by the normal winning ball apparatus 6A. This is a first start port winning designation command for notifying that the first start condition is satisfied. The command B002H is for executing a special figure game using the second special figure by the second special symbol display device 4B based on the fact that the game ball has won the second starting prize opening formed by the normally variable winning ball apparatus 6B. This is a second start opening prize designation command for notifying that the second start condition is established.

  The command C0XXH includes a first reserved memory number, a second reserved memory number, and the like so that the special figure reserved memory number can be specified on the start winning memory display unit 5H provided in the display area of the image display device 5 or the like. This is a pending storage count notification command for notifying the total pending storage count that is the total value of. In response to the fact that either the first start condition or the second start condition is satisfied, for example, either the first start opening prize designation command or the second start opening prize designation command is transmitted as the reserved storage number notification command. Following this, it is transmitted from the main board 11 to the effect control board 12. In the hold memory count notification command, for example, the total number of hold data (for example, “1” to “8”) of the hold data in the first special figure hold storage section 591A and the second special figure hold storage section 591B shown in FIG. Alternatively, different EXT data is set corresponding to the total number of start data stored in the start data storage unit 591C (for example, “1” to “8”). Thereby, on the side of the production control board 12, when either the first start condition or the second start condition is satisfied, the reserved memory number notification command transmitted from the main board 11 is received, and the first special drawing is received. The total number of stored hold data in the hold storage unit 591A and the second special figure hold storage unit 591B can be specified.

  In this embodiment, the first and second start opening winning designation commands and the reserved memory number designation command are prepared as separate presentation control commands. On the other hand, the notification content indicating which of the first start condition and the second start condition is satisfied and the notification content of the total reserved storage number are configured to be specified by one effect control command. Also good. As an example, an effect control command in which EXT data is set corresponding to the combination of the established start condition (the first start condition or the second start condition) and the total reserved memory number is prepared. The established start condition and the total number of reserved memories may be specified. Here, when it is possible to specify which one of the first start condition and the second start condition is satisfied by one effect control command together with the total reserved memory number, for example, the upper limit value of the total reserved memory number is “8”. ”, It is necessary to prepare a total of 16 types of effect control commands of 8 types corresponding to the case where the first start condition and the second start condition are satisfied. On the other hand, if an effect control command that can specify which of the first start condition and the second start condition is established and an effect control command that can specify the total number of reserved memories are prepared separately, the first It is only necessary to prepare a total of 10 types of effect control commands, that is, two types of effect control commands that can specify each of the start condition and the second start condition, and eight types of effect control commands that allow the total reserved memory number to be specified. The types of commands prepared in advance and the storage capacity of the command table can be reduced.

  The control command transmitted from the main board 11 to the payout control board 15 is, for example, a payout control command transmitted as an electrical signal. The payout control command is set for transmitting the payout control command by the CPU 505 (see FIG. 7) included in the game control microcomputer 100 mounted on the main board 11, and based on the setting, the game control is performed. It is transmitted to the payout control board 15 by the first channel transmission / reception circuit 571A (see FIG. 25) of the serial communication circuit 511 (see FIG. 7) provided in the microcomputer 100. In the following description, the transmission operation of the payout control command from the main board 11 to the payout control board 15 includes a series of operations by the CPU 505 and the serial communication circuit 511 provided in the game control microcomputer 100. To do. Also, for example, a payout notification command as an electrical signal is transmitted from the payout control board 15 to the main board 11. The payout notification command is set so that the payout notification command is transmitted by the CPU of the payout control microcomputer 150 mounted on the payout control board 15, and the payout control microcomputer 150 is set based on the setting. It is transmitted to the main board 11 by a serial communication circuit provided. In the following description, it is assumed that the transmission operation of the payout notification command from the payout control board 15 to the main board 11 includes a series of operations by the CPU and serial communication circuit provided in the payout control microcomputer 150. . In addition, in the following description, not only a command for a predetermined operation from one of the main board 11 and the payout control board 15 to the other, but also a notification signal for notifying the other of the operation state of the other is a payout control command or a payout It shall be included in the notification command.

  FIG. 6 is an explanatory diagram showing an example of a command configuration transmitted and received between the main board 11 and the payout control board 15. As shown in FIG. 6A, the payout control command transmitted from the main board 11 to the payout control board 15 and the payout notification command transmitted from the payout control board 15 to the main board 11 are both. It is configured to be 2 bytes, and is configured to be the second byte by inverting the first byte. The first bit of each byte (bit number [7]) is used as a header, and the header is made different to distinguish the first byte from the second byte. For example, the header in the first byte is set to a fixed value of “0”, while the header in the second byte is set to a fixed value of “1”.

  The payout control command transmitted from the main board 11 to the payout control board 15 includes a payout number designation command and an ACK feedback command. The payout number designation command is a command indicating the number of prize balls to be paid out, and is composed of, for example, a bit value as shown in FIG. Here, the bit number [3-0] of the first byte and the second byte in the payout number designation command may be a value set according to the number of prize balls to be paid out. FIG. 6C shows a payout number designation command used in this embodiment in hexadecimal notation. The command E31CH shown in FIG. 6C is a first payout number designation command indicating that the number of prize balls to be paid out is 13. The command ED12H is a second payout number designation command indicating that the number of prize balls to be paid out is three. In this embodiment, when a game ball is detected by one of the first start port switch 22A and the second start port switch 22B, three prize balls are paid out, and when a game ball is detected by the count switch 23, Thirteen prize balls are paid out.

  The command F00FH shown in FIG. 6C is an ACK feedback command serving as a reception confirmation acceptance signal indicating that the prize ACK command transmitted from the payout control board 15 to the main board 11 is received on the main board 11 side. It is.

  FIG. 6D is an explanatory diagram showing a configuration example of a payout notification command transmitted from the payout control board 15 to the main board 11. The payout notification command includes a prize ball ACK command, a payout error notification command, and a payout error cancel command. The command A0F5H shown in FIG. 6D is a prize ball ACK that is a reception confirmation signal indicating that the payout number specifying command transmitted from the main board 11 to the payout control board 15 is received on the payout control board 15 side. It is a command. The command B0F4H is a payout error notification command for notifying the main board 11 that an abnormality relating to the payout of game balls has occurred on the payout control board 15 side. The command B1E4H is a payout error cancel command for notifying the main board 11 that the error that has occurred on the payout control board 15 side has been cancelled.

  In addition, between the main board | substrate 11 and the payout control board 15, it is not limited to what transmits / receives a command by serial communication, You may transmit / receive a command by parallel communication using a several signal wire | line. Further, the payout control command and the payout notification command are not limited to those having a 2-byte configuration, and may have a 1-byte configuration, for example. In this case, in the payout number designation command, the bit number [3-0] is a payout number designation signal indicating the number of prize balls, as in the configuration of FIG. 6B. On the other hand, any one bit of the bit number [7-4] is used as a payout number take-in signal for instructing to take in a payout number designation signal or a prize ball REQ signal for requesting a payout of a prize ball. Instead of the payout error notification command and the payout error cancel command transmitted from the payout control board 15 to the main board 11, a payout error state signal indicating an error occurrence state in the payout control board 15 is provided in the main board 11. It may be input to one of the input ports. For example, the payout error state signal is turned on when an error occurs in the payout control board 15, and is turned off when no error occurs or when the error is released. In this case, on the main board 11 side, a payout error state signal is fetched every time a timer interrupt occurs, and the fetch result is stored. The payout error state signal has changed from the off state to the on state by taking the exclusive OR of the signal state captured by the current timer interrupt and the signal state captured and stored by the previous timer interrupt. It may be possible to detect that the error has been changed from the on state to the off state (indicating the time when the error is released). When an error occurs in the payout control board 15 or when the error is released, an error has occurred in the payout operation by transmitting an effect control command prepared for each from the main board 11 to the effect control board 12 It may be instructed to start or end the notification operation for notifying the user. The payout error state signal is not limited to one input to one of the input ports provided on the main board 11, and for example, a payout control board 15 such as a full signal, a ball out signal, a prize ball case error signal, or a door open signal. May be input to the main board 11 to detect when an error occurs or when an error is released as in the case of the payout error state signal. Then, by transmitting an effect control command corresponding to the type of the detected error from the main board 11 to the effect control board 12, the start or end of the notification operation corresponding to the detected error is instructed. It may be.

  FIG. 7 shows a configuration example of the game control microcomputer 100 mounted on the main board 11. A game control microcomputer 100 shown in FIG. 7 is, for example, a one-chip microcomputer, and includes an external bus interface 501, a clock circuit 502, a specific information storage circuit 503, a reset / interrupt controller 504, a CPU (Central Processing Unit). ) 505, ROM (Read Only Memory) 506, RAM (Random Access Memory) 507, CTC (Counter / Timer Circuit) 508, random number circuit 509, PIP (Parallel Input Port) 510, and serial communication circuit 511 And an address decoding circuit 512.

  FIG. 8 shows an example of an address map in the game control microcomputer 100. As shown in FIG. 8, the area from address 0000H to address 1FFFH is allocated to the ROM 506 and includes a user program area and a program management area. FIG. 9A shows an example of the usage and contents of the main part of the program management area in the ROM 506. The area from address 2000H to address 20FFH is a built-in register area assigned to the built-in register of the game control microcomputer 100. FIG. 9B shows an example of the usage and contents of the main part of the built-in register area. An area from address 7E00H to address 7FFFH is a work area assigned to the RAM 507, and can be assigned to an I / O map or a memory map. An area from address FDD0H to address FDFBH is an XCS decode area allocated to the address decode circuit 512.

  The program management area is a storage area for storing information necessary for the CPU 505 to execute the user program. As shown in FIG. 9A, the program management area includes a header KHDR, a function setting KFCS, a first random number initial setting KRS1, a second random number initial setting KRS2, an interrupt initial setting KIIS, a security time setting KSES, and the like. It is.

  The header KHDR stored in the program management area indicates the internal data read setting in the game control microcomputer 100. FIG. 10A illustrates the correspondence between setting data and operation in the header KHDR. Here, in the game control microcomputer 100, the ROM read prevention function and the bus output mask function can be set. The ROM read prevention function is a function for permitting or prohibiting the read operation for the data stored in the ROM 506 provided in the game control microcomputer 100, and the data stored in the ROM 506 cannot be read in a state where the read is prohibited. The bus output mask function is an address bus output, data bus output, and control signal in the external bus interface 501 when an external device connected to the external bus interface 501 makes a read request for internal data of the game control microcomputer 100. This function makes it impossible to read internal data from an external device by masking the output. As shown in FIG. 10A, the operation combination of the ROM read prevention function and the bus output mask function is set differently in accordance with the setting data of the header KHDR. Of the setting data shown in FIG. 10A, the setting data for which ROM reading is permitted and the bus output mask is valid is also referred to as bus output mask valid data. Further, the setting data (all “00H”) in which ROM reading is prohibited and the bus output mask is valid is also referred to as ROM reading prohibiting data. The setting data for which ROM reading is permitted and the bus output mask becomes invalid is also referred to as bus output mask invalid data.

  The function setting KFCS stored in the program management area indicates the operation setting of the watch dog timer (WDT) in the game control microcomputer 100 and the use setting of various function shared terminals. FIG. 10B shows an example of setting contents in the function setting KFCS.

  The bit number [7-5] of the function setting KFCS indicates, for example, the operation permission / prohibition of the watchdog timer that can be set as an interrupt factor in the reset / interrupt controller 504, and the cycle when it is permitted. The bit number [4] of the function setting KFCS indicates whether the predetermined function shared terminal (first shared terminal) in the game control microcomputer 100 is the second channel transmission terminal TXB used by the serial communication circuit 511 or the address decoding This is a TXB terminal setting that designates whether the circuit 512 uses the chip select output terminal XCS13. In the example shown in FIG. 10B, if the bit value in the bit number [4] of the function setting KFCS is “0”, the first shared terminal is used for the second channel transmission in the serial communication circuit 511. This is the setting for the 2-channel transmission terminal TXB. On the other hand, if the bit value is “1”, the first dual-purpose terminal is set to the chip select output terminal XCS13 used in the address decode circuit 512. In this embodiment, by setting the bit number [4] of the function setting KFCS to “0” and setting the first shared terminal to the second channel transmission terminal TXB, serial communication with the effect control board 12 is performed. to enable.

  The bit number [3] of the function setting KFCS indicates whether the predetermined function shared terminal (second shared terminal) in the game control microcomputer 100 is the first channel transmission terminal TXA used by the serial communication circuit 511 or the address decoding This is a TXA terminal setting that indicates whether the circuit 512 uses the chip select output terminal XCS12. In the example shown in FIG. 10B, if the bit value in the bit number [3] of the function setting KFCS is “0”, the second shared terminal is used for the first channel transmission in the serial communication circuit 511. 1 channel transmission terminal TXA is set. On the other hand, if the bit value is “1”, the second dual-purpose terminal is set to the chip select output terminal XCS12 used in the address decode circuit 512. In this embodiment, by setting the bit number [3] of the function setting KFCS to “0” and setting the second shared terminal to the first channel transmission terminal TXA, serial communication with the payout control board 15 is performed. to enable.

  The bit number [2] of the function setting KFCS indicates that the predetermined function shared terminal (third shared terminal) in the game control microcomputer 100 is the first channel reception terminal RXA used by the serial communication circuit 511, or the PIP 510 This is an RXA terminal setting indicating whether to use the input port P5. In the example shown in FIG. 10B, if the bit value in the bit number [2] of the function setting KFCS is “0”, the third shared terminal is used for the first channel reception in the serial communication circuit 511. 1 channel receiving terminal RXA is set. On the other hand, if the bit value is “1”, the third shared terminal is set to the input port P5 used in the PIP 510. In this embodiment, by setting the bit number [2] of the function setting KFCS to “0” and setting the third shared terminal to the first channel receiving terminal RXA, serial communication with the payout control board 15 is performed. to enable.

  The bit number [1] of the function setting KFCS is used by the PIP 510 as the external non-maskable interrupt terminal XNMI connected to the CPU 505 or the like as a predetermined function shared terminal (fourth shared terminal) in the game control microcomputer 100 This is an NMI connection setting indicating whether to set the input port P4. In the example shown in FIG. 10B, if the bit value in the bit number [1] of the function setting KFCS is “0”, the external non-maskable interrupt terminal XNMI connected to the CPU 505 or the like is set to the fourth shared terminal. (CPU connection). On the other hand, if the bit value is “1”, the fourth shared terminal is set for the input port P4 used in the PIP 510 (CPU disconnected).

  The bit number [0] of the function setting KFCS is a predetermined function shared terminal (fifth shared terminal) in the game control microcomputer 100 is used as an external maskable interrupt terminal XINT connected to the CPU 505 or the like, or is used by the PIP 510 The XINT connection setting indicates whether the input port is P3. In the example shown in FIG. 10B, if the bit value in the bit number [0] of the function setting KFCS is “0”, the external maskable interrupt terminal XINT connected to the CPU 505 or the like is set to the fifth shared terminal. (CPU connection). On the other hand, if the bit value is “1”, the fifth shared terminal is set for the input port P3 used in the PIP 510 (CPU disconnected).

  The first random number initial setting KRS1 and the second random number initial setting KRS2 stored in the program management area indicate the initial setting of the random number circuit 509. FIG. 11A shows an example of setting contents in the first random number initial setting KRS1. FIG. 11B shows an example of setting contents in the second random number initial setting KRS2.

  The bit number [3] of the first random number initial setting KRS1 is a random number circuit use setting indicating whether to use the random number circuit 509 or not. In the example shown in FIG. 11A, if the bit value in the bit number [3] of the first random number initial setting KRS1 is “0”, the random number circuit 509 is not used (unused), but “1”. "Is set to use the random number circuit 509 (use). In this embodiment, the bit number [3] of the first random number initial setting KRS1 is set to “1”, and the random number circuit 509 is set to be usable.

  The bit number [2] of the first random number initial setting KRS1 uses the random number update clock RGK (see FIG. 15) used for updating the numerical data that becomes the random number value in the random number circuit 509 as the internal system clock SCLK or for the random number. This is a random number update clock setting indicating whether the clock RCLK is divided by two. In the example shown in FIG. 11A, if the bit value in the bit number [2] of the first random number initial setting KRS1 is “0”, the internal system clock SCLK is set to be used as the random number update clock RGK. If it is 1 ″, the random number clock RCLK is divided by two and used as the random number update clock RGK. In this embodiment, the bit number [2] of the first random number initial setting KRS1 is set to “1”, and the random number clock RCLK is divided by two to be used as the random number update clock RGK.

  The bit number [1-0] of the first random number initial setting KRS1 is a random number update rule setting indicating whether or not to change the random number update rule in the random number circuit 509 and the change method in the case of the change. In the example shown in FIG. 11A, if the bit value in the bit number [1-0] of the first random number initial setting KRS1 is “00”, the random number update rule is not changed, and if it is “01”. The setting for changing the random number update rule by software is made after the second round, and if it is “10”, the random number update rule is automatically changed after the second round.

  The bit number [3-2] of the second random number initial setting KRS2 is set to a fixed bit value “00”. Note that “B” of “00B” in FIG. 11B indicates binary display. The bit number [1-0] of the second random number initial setting KRS2 indicates the setting relating to the start value in the numerical data that becomes the random value in the random number circuit 509. In the example shown in FIG. 11B, if the bit value in the bit number [1] of the second random number initial setting KRS2 is “0”, the start value is set to a predetermined default value 0001H, while “1”. In this case, a value based on the ID number, which is unique identification information assigned to each game control microcomputer 100, is set as the start value. In the example shown in FIG. 11B, if the bit value at the bit number [0] of the second random number initial setting KRS2 is “0”, the start value is not changed every time the system is reset. When it is 1 ″, the start value is changed every time the system is reset. In addition, when setting the start value to a value based on the ID number, a part or all of the calculation for performing a predetermined scramble process on the ID number and the calculation such as addition / subtraction / multiplication / division using the ID number are performed. It is only necessary to execute and use the calculated value as the start value. Further, when the start value is changed at every system reset, for example, the count value of the free run counter built in the game control microcomputer 100 is used as a predetermined built-in that the game control microcomputer 100 has when the system reset occurs. Store in the register (random number start value register). Then, by using the stored value of the random number start value register as it is at the time of initial setting, or by using a value obtained by substituting the stored value into a predetermined arithmetic function (for example, a hash function), the start value is It may be determined at random. The free-run counter only needs to be backed up using a backup power source common to the backup location on the main board 11, such as a backup area in the RAM 507 of the game control microcomputer 100. Alternatively, the free-run counter may be backed up by a power source provided separately from a backup power source used for a backup area in the RAM 507 or the like. In this way, the free-run counter is backed up by the backup power supply, so that the count value in the free-run counter is stored for a predetermined period even when the power supply is stopped.

  Note that in the case where two systems (corresponding to the first and second channels) for generating numerical data to be random numbers in the random number circuit 509 are provided, the first shown in FIGS. 11A and 11B. The bit number [3-0] of the random number initial setting KRS1 and the bit number [3-0] of the second random number initial setting KRS2 are used to indicate the initial setting in the first channel. On the other hand, the bit number [7-4] of the first random number initial setting KRS1 and the bit number [7-4] of the second random number initial setting KRS2 (not shown in FIGS. 11A and 11B), the second It may be used as an indication of the initial setting in the channel.

  Interrupt initial settings KIIS stored in the program management area indicate initial settings related to handling of maskable interrupts generated in the game control microcomputer 100. FIG. 11C shows an example of setting contents in the interrupt initial setting KIIS.

  In the bit number [7-4] of the interrupt initial setting KIIS, the upper 4 bits of the interrupt vector are set. In the bit number [3-0] of the interrupt initial setting KIIS, a combination of maskable interrupt factor priorities is set. In the example shown in FIG. 11C, if any of “00H” to “02H” and “06H” is specified by the bit number [3-0] of the interrupt initial setting KIIS, the maskable interrupt factor from the CTC 508 is determined. A combination of priorities that is the highest priority is set. On the other hand, if any one of “03H” and “07H” is designated, a combination of priorities with the highest priority given to the maskable interrupt factor from the random number circuit 509 is set. If either “04H” or “05H” is specified, a combination of priorities that sets the maskable interrupt factor from the serial communication circuit 511 as the highest priority is set. Note that even if the priority combination has the highest priority for maskable interrupt factors from the same circuit, if the specified value is different, the type of maskable interrupt factor that has the highest priority, the priority combination in the second or lower order, etc. will differ. ing.

  The security time setting KSES stored in the program management area is the frequency at which an abnormality is detected when the frequency of the random number clock RCLK is monitored, the time of the security mode that is shifted to when the operation of the game control microcomputer 100 starts ( Indicates settings related to (security time). Here, when the operation mode of the game control microcomputer 100 is the security mode, a predetermined security check process is executed to check whether or not the content stored in the ROM 506 has been changed. FIG. 12A shows an example of setting contents in the security time setting KSES.

  Bit number [7-6] of security time setting KSES is a random number clock abnormality detection setting indicating a frequency at which an abnormality is detected when the frequency of random number clock RCLK is monitored. FIG. 12B shows an example of setting contents in the bit number [7-6] of the security time setting KSES. The bit number [7-6] of the security time setting KSES specifies a reference value (determination value) at which the frequency of the random number clock RCLK is detected as abnormal based on the frequency of the internal system clock SCLK. The bit number “5” of the security time setting KSES is set to a fixed bit value “0”.

  The bit number [4-3] of the security time setting KSES indicates a time setting when the security time is extended by a random time every system reset. FIG. 12C shows an example of setting contents in the bit number [4-3] of the security time setting KSES. In the example shown in FIG. 12C, if the bit value in the bit number [4-3] of the security time setting KSES is “00”, the random time extension is not performed. On the other hand, if the bit value is “01”, the short mode is set. If the bit value is “10”, the long mode is set. Here, when the short mode or the long mode is designated, for example, the count value of the free-run counter incorporated in the game control microcomputer 100 is set to a predetermined value provided in the game control microcomputer 100 when a system reset occurs. Store in the built-in register (variable security time register). Then, the security time can be reduced by using the stored value of the variable security time register as it is at the time of initial setting, or by using the value obtained by substituting the stored value into a predetermined arithmetic function (for example, a hash function). What is necessary is just to determine the extension time at the time of extending at random. As an example, when the frequency of the internal system clock SCLK is 6.0 MHz, the extension time is randomly determined in the range of 0 to 680 μs (microseconds) in the short mode, and in the range of 0 to 348, 160 μs in the long mode. The extension time is determined at random. As another example, when the frequency of the internal system clock SCLK is 10.0 MHz, the extension time is randomly determined in the range of 0 to 408 μs in the short mode, and in the range of 0 to 208,896 μs in the long mode. The extension time is determined at random. The free-run counter used for randomly determining the extension time for extending the security time for each system reset randomly determines the start value of the random number generated by the random number circuit 509 for each system reset. Therefore, the counter may be the same as the free-run counter used for the purpose, or may be a counter provided separately.

Bit number [2-0] of security time setting KSES indicates time setting when the security time is set to one of a plurality of pre-selectable extended times in addition to the fixed time. FIG. 12D shows an example of setting contents in the bit number [2-0] of the security time setting KSES. In the example shown in FIG. 12D, if the bit value in the bit number [2-0] of the security time setting KSES is “000”, there is no extension time added to the fixed time, and no setting is made. On the other hand, if the bit value is a value other than “000”, it is set to one of a plurality of extension times determined using the cycle T _SCLK of the internal system clock SCLK. In this case, a different extension time is set according to the designated bit value. As an example, if the bit value [2-0] of the security time setting KSES is “001” when the frequency of the internal system clock SCLK is 6.0 MHz, about 699.1 ms in addition to the fixed time. An extension time of (milliseconds) is set. As another example, when the frequency of the internal system clock SCLK is 10.0 MHz and the bit value in the bit number [2-0] of the security time setting KSES is “001”, in addition to the fixed time An extension time of about 419.4 ms is set.

  Further, the short mode or the long mode is set by the bit value [4-3] of the security time setting KSES, and the bit value in the bit number [2-0] of the security time setting KSES is set to other than “000”. Thus, it is possible to set an extension time to be added to the fixed time. In this case, both the extension time corresponding to the bit value in the bit number [2-0] and the extension time randomly determined based on the bit value in the bit number [4-3] are fixed times. By adding, the security time during which the game control microcomputer 100 is in the security mode is determined.

  The external bus interface 501 provided in the game control microcomputer 100 shown in FIG. 7 includes an interface function between the external bus and the internal bus of the chip constituting the game control microcomputer 100, an address bus, a data bus, and each control signal. A bus interface having a direction control function and the like. For example, the external bus interface 501 is connected to an external memory, an external input / output device or the like externally attached to the game control microcomputer 100, and address signals, data signals, various control signals, etc. with these external devices As long as it transmits and receives. In this embodiment, the external bus interface 501 includes an internal resource access control circuit 501A.

  The internal resource access control circuit 501A controls access to the internal data of the game control microcomputer 100 from an external device via the external bus interface 501 so that the internal resource access control circuit 501A, for example, a game control program or fixed data stored in the ROM 506 This is a circuit for limiting improper external reading of data. Here, a circuit analysis device such as an in-circuit emulator (ICE; InCircuit Emulator) may be connected to the external bus interface 501 as an external device.

  As an example, according to the contents of the header KHDR stored in the program management area of the ROM 506, it is possible to switch between prohibiting or permitting reading of stored data in the ROM 506. For example, when the header KHDR is bus output mask invalid data, the ROM 506 can be read by an external device, and external reading of internal data is permitted. On the other hand, if the header KHDR is the bus output mask valid data, the ROM 506 can be read from the external device by masking the address bus output, data bus output and control signal output in the external bus interface 501, for example. Is disabled, and external reading of internal data is prohibited. In this case, when reading of internal data is requested from an external device connected to the external bus interface 501, a predetermined fixed value is output so that internal data cannot be read from the external device. . Further, when the header KHDR is ROM read prohibition data, the ROM 506 itself may not be read, and reading of stored data in the ROM 506 may be prevented. For example, in a ROM at the manufacturing stage, by making the header KHDR ROM read prohibition data, the ROM itself is made unreadable, and if it is a development ROM, bus output mask invalid data is written in the header KHDR, Allows verification of internal data by an external device. On the other hand, if the ROM for mass production is used, the bus output mask valid data is written in the header KHDR, so that the ROM 506 can be read by the CPU 505 and the like inside the game control microcomputer 100, while the external device It is only necessary to prevent the ROM 506 from being read.

  As another example, the internal resource access control circuit 501A is requested by an external device connected to the external bus interface 501 to read out internal data of the game control microcomputer 100 such as all or part of data stored in the ROM 506. Detect that. When this read request is detected, the internal resource access control circuit 501A determines whether or not reading of the internal data of the game control microcomputer 100 is permitted. For example, it is assumed that all or part of the stored data in the ROM 506 has been encrypted. In this case, if the read request from the external device is a read request for the encryption processing program or key data stored in the ROM 506, the internal resource access control circuit 501A rejects the read request, and the game control micro Reading of the internal data of the computer 100 is prohibited. In the external bus interface 501, a switch element is provided between the output port from which data stored in the ROM 506 is output and the internal bus. When the internal resource access control circuit 501 A prohibits reading of the internal data, the switch element May be controlled to be turned off. As described above, the internal resource access control circuit 501A reads the internal data depending on whether or not the read request from the external device requests reading of predetermined internal data (for example, a predetermined area of the ROM 506). You may make it determine whether it prohibits or permits.

  Alternatively, the internal resource access control circuit 501A may determine whether or not a predetermined authentication code has been input from an external device when detecting a read request for internal data. In this case, for example, a predetermined code pattern serving as an authentication code may be stored in advance in the internal resource access control circuit 501A or in a predetermined area of the ROM 506. When an authentication code is input from the external device, the authentication code is compared with the authentication code stored in the internal device. If they match, a read request is accepted and the internal data of the game control microcomputer 100 is read. To give permission. On the other hand, if the authentication code input from the external device does not match the authentication code stored internally, the read request is rejected and reading of the internal data of the game control microcomputer 100 is prohibited. As described above, the internal resource access control circuit 501A determines whether to prohibit or permit reading of the internal data depending on whether or not the authentication code input from the external device matches the authentication code stored internally. You may make it do. Thereby, it is possible to read out the internal data of the game control microcomputer 100 using a correct authentication code known in advance by an inspection organization or the like, and to properly inspect the validity of the internal data. become.

  As yet another example, a read prohibition flag is provided in the internal resource access control circuit 501A, and reading of the ROM 506 by an external device is prohibited if the read prohibition flag is on. On the other hand, when the reading prohibition flag is in the off state, reading of the ROM 506 by the external device is permitted. Here, the read prohibition flag is off in the initial state, but once the read prohibition flag is turned on, the read prohibition flag cannot be cleared and returned to the off state. That's fine. That is, the read prohibition flag can be irreversibly changed from the off state to the on state. For example, the internal resource access control circuit 501A does not have a function of clearing the read prohibition flag to turn it off, and is set so that the read prohibition flag cannot be cleared by any instruction. Just do it. Then, the internal resource access control circuit 501A determines whether or not the read prohibition flag is on when the external device requests to read internal data of the game control microcomputer 100 such as data stored in the ROM 506. At this time, if the reading prohibition flag is on, the reading request from the external device is rejected, and reading of the internal data of the gaming control microcomputer 100 is prohibited. On the other hand, if the read prohibition flag is OFF, a read request from an external device is accepted and reading of the internal data of the game control microcomputer 100 is permitted. With such a configuration, a provider who creates a game control program and stores it in the ROM 506 reads the program that has been debugged from the ROM 506 into an external device while the read prohibition flag is off. Can do. Then, when shipping after the debugging work is completed, by setting the read prohibition flag to the on state, external reading of the ROM 506 can be restricted thereafter, and by the user of the pachinko gaming machine 1 or the like Reading of the ROM 506 can be prevented. As described above, the internal resource access control circuit 501A may determine whether to prohibit or permit reading of internal data depending on whether an internal flag such as a read prohibition flag is off or on. .

  Note that the read prohibition flag is not set irreversibly but can be changed from the on state to the off state, while the read prohibition flag is changed from the on state to the off state to permit reading of internal data. In this case, external reading of the ROM 506 may be restricted by erasing the data stored in the ROM 506 (for example, flash erasure).

  The clock circuit 502 included in the game control microcomputer 100 is a circuit that generates the internal system clock SCLK by, for example, dividing the oscillation signal input to the control external clock terminal EXC by two. In this embodiment, the control clock CCLK generated by the control clock generation circuit 111 is input to the control external clock terminal EXC. The internal system clock SCLK generated by the clock circuit 502 is supplied to various circuits such as the CPU 505 that control the progress of the game in the game control microcomputer 100. The internal system clock SCLK is also supplied to the random number circuit 509 and used to monitor the frequency of the random number clock RCLK supplied from the random number clock generation circuit 112. Furthermore, the internal system clock SCLK may be output from the system clock output terminal CLKO connected to the clock circuit 502 to the outside of the game control microcomputer 100. It is desirable that the internal system clock SCLK is not output to the outside of the game control microcomputer 100. As described above, by limiting the external output of the internal system clock SCLK, it becomes difficult to specify the operation cycle of the internal circuit (such as the CPU 505) of the game control microcomputer 100 from the outside, and numerical data that becomes a random value Can be prevented from being specified from the outside when the software is updated by software.

  The unique information storage circuit 503 included in the game control microcomputer 100 is a circuit that stores a plurality of types of unique information that is internal information of the game control microcomputer 100, for example. As an example, the unique information storage circuit 503 stores three types of unique information such as a ROM code, a chip individual number, and an ID number. The ROM 506 code is a 4-byte numerical value generated from stored data in a predetermined area of the ROM 506, and four numerical values with different generation methods may be prepared. The chip individual number is a 4-byte number assigned when the game control microcomputer 100 is manufactured, and represents a different numerical value for each chip constituting the game control microcomputer 100. The ID number is an 8-byte number assigned when the game control microcomputer 100 is manufactured, and indicates a different numerical value for each chip constituting the game control microcomputer 100. Here, the chip individual number may be read from the user program, while the ID number may be set so as not to be read from the user program. The unique information storage circuit 503 may be included in the ROM 506 by using a predetermined area of the ROM 506, for example. Alternatively, the unique information storage circuit 503 may be included in the CPU 505 by using a built-in register of the CPU 505, for example.

  The reset / interrupt controller 504 provided in the game control microcomputer 100 is for controlling various reset and interrupt requests generated inside or outside the game control microcomputer 100. Resets controlled by the reset / interrupt controller 504 include system resets and user resets. The system reset is a reset that occurs when a low level signal is input to the external system reset terminal XSRST for a certain period. The user reset is a reset that occurs due to a predetermined factor, such as a watchdog timer (WDT) time-out signal or a non-designated area travel prohibition (IAT).

  Interrupts controlled by the reset / interrupt controller 504 include a non-maskable interrupt NMI and a maskable interrupt INT. The non-maskable interrupt NMI is an interrupt that is unconditionally accepted even when the CPU 505 is in an interrupt-disabled state, and is an interrupt that is generated when a low-level signal is input to the external non-maskable interrupt terminal XNMI (also used as the input port P4) for a certain period. is there. The maskable interrupt INT is an interrupt that can permit / prohibit acceptance of an interrupt request by a setting instruction of the CPU 505, and multiple interrupts can be executed by setting priority. The cause of the maskable interrupt INT is that a low level signal has been input to the external maskable interrupt terminal XINT (also used as the input port P3) for a certain period of time, a time-out has occurred in the timer circuit included in the CTC 508, A plurality of types of interrupt factors are determined in advance, such as the occurrence of an interrupt factor due to data reception or data transmission in the serial communication circuit 511 and the occurrence of an interrupt factor due to the acquisition of numerical data as a random value in the random number circuit 509. It only has to be done.

  The reset / interrupt controller 504 includes an interrupt mask register IMR (address 2028H), an interrupt wait monitor register IRR (address 2029H), and interrupts among the built-in registers included in the game control microcomputer 100 as shown in FIG. 9B. The monitor register ISR (address 202AH), the internal information register CIF (address 208CH), etc. are used to control interrupts and manage resets. The interrupt mask register IMR is a register that sets what is used and what is not used among maskable interrupts INT caused by a plurality of different factors. The interrupt wait monitor register IRR is a register for confirming the generation state of a maskable interrupt request signal for each maskable interrupt factor set by the interrupt initial setting KIIS. The in-interrupt monitor register ISR is a register for confirming the processing state of the maskable interrupt request signal for each maskable interrupt factor set by the interrupt initial setting KIIS. The internal information register CIF is a register for managing the reset factor generated immediately before and recording the frequency abnormality of the random number clock RCLK.

  FIG. 13A shows a configuration example of the internal information register CIF. FIG. 13B shows an example of setting contents in each bit of the internal information data stored in the internal information register CIF. The internal information data CIF4 stored in the bit number [4] of the internal information register CIF is a random number clock abnormality instruction indicating the presence or absence of a frequency abnormality in the random number clock RCLK. In the example shown in FIG. 13B, when the frequency abnormality of the random number clock RCLK is not detected, the bit value of the internal information data CIF4 is “0”, whereas when the frequency abnormality is detected, the bit value is “1”. The internal information data CIF2 stored in the bit number [2] of the internal information register CIF is a system reset instruction indicating whether or not the reset factor generated immediately before is a system reset. In the example shown in FIG. 13B, when the immediately preceding reset factor is not a system reset (system reset has not occurred), the bit value of the internal information data CIF2 is “0”, whereas when the system reset is a system reset (system When the reset occurs), the bit value becomes “1”. As a first example of the operation using the internal information data CIF2, the CPU 505 of the game control microcomputer 100 checks the bit value of the internal information data CIF2 when the power is turned on, and the bit value is “1” (set). If not, it is determined that the power is not turned on normally. At this time, for example, by transmitting a predetermined effect control command toward the effect control board 12, an illegal signal input action is performed aiming at a big hit gaming state immediately after the power is turned on in the pachinko gaming machine 1. You may notify that there exists possibility with a production | presentation apparatus etc. Further, as a second example of the operation using the internal information data CIF2, when the pachinko gaming machine 1 notifies the probability variation state only when the power is turned on and does not inform the probability variation state normally, the game control microcomputer 100 when the power is turned on. The CPU 505 or the like may check the bit value of the internal information data CIF2, and if the bit value is not “1” (set), the gaming state may not be notified.

  The internal information data CIF1 stored in the bit number [1] of the internal information register CIF is a WDT timeout instruction indicating whether or not the reset factor generated immediately before is a user reset due to a watchdog timer (WDT) timeout. . In the example shown in FIG. 13B, when the immediately preceding reset factor is not a user reset due to a watchdog timer timeout (no timeout has occurred), the bit value of the internal information data CIF1 becomes “0”, while the watchdog When a user reset is caused by a timer timeout (timeout occurs), the bit value becomes “1”. The internal information data CIF0 stored in the bit number [0] of the internal information register CIF is an IAT generation instruction indicating whether or not the reset factor generated immediately before is a user reset due to prohibition of travel outside the designated area (IAT). . In the example shown in FIG. 13B, when the reset factor immediately before is not a user reset due to the occurrence of travel outside the designated area (no IAT occurrence), the bit value of the internal information data CIF0 becomes “0”, while When the user reset is caused by the occurrence of out-of-area travel (the occurrence of IAT), the bit value becomes “1”.

  The CPU 505 provided in the game control microcomputer 100 executes a program read from the ROM 506, thereby executing a process for controlling the progress of the game in the pachinko gaming machine 1. At this time, the CPU 505 reads out fixed data from the ROM 506, the CPU 505 writes various data to the RAM 507 and temporarily stores the data, and the CPU 505 stores various data temporarily stored in the RAM 507. The CPU 505 receives the input of various signals from the outside of the game control microcomputer 100 via the external bus interface 501, PIP 510, serial communication circuit 511, etc., the CPU 505 receives the external bus interface 501 and serial A transmission operation for outputting various signals to the outside of the game control microcomputer 100 via the communication circuit 511 or the like is also performed.

  As described above, in the game control microcomputer 100, the CPU 505 executes control according to the program stored in the ROM 506. Therefore, the game control microcomputer 100 (or CPU 505) is hereinafter referred to as executing (or performing processing). Specifically, the CPU 505 executes control according to a program. The same applies to microcomputers mounted on substrates other than the main substrate 11.

  A ROM 506 provided in the game control microcomputer 100 stores a user program for game control, fixed data, and the like. The ROM 506 stores a security check program 506A. The CPU 505 reads the security check program 506A stored in the ROM 506 when the game control microcomputer 100 shifts to the security mode in response to the power-on of the pachinko gaming machine 1 or the occurrence of a system reset. A security check process is executed to check whether or not the change has been made. Note that the security check program 506A may be stored in a built-in memory different from the ROM 506. Further, the security check program 506A may correspond to a security check process for inspecting the storage content of an external memory externally attached to the game control microcomputer 100 via the external bus interface 501, for example.

  A RAM 507 provided in the game control microcomputer 100 provides a work area for game control. Here, at least a part of the RAM 507 may be a backup RAM that is backed up by a backup power source created in the power supply substrate 10. That is, even if the power supply to the pachinko gaming machine 1 is stopped, at least a part of the contents of the RAM 507 is stored for a predetermined period.

  The CTC 508 provided in the game control microcomputer 100 is configured, for example, by incorporating three channels (PTC0-PTC2) of 8-bit programmable timers, and includes a timer circuit that enables real-time interrupt generation and time measurement. Each programmable timer PTC0-PTC2 has a timer value that is updated in response to a change in the count clock signal generated based on the internal system clock SCLK (for example, a falling timing that changes from a high level to a low level). If it is. The CTC 508 may incorporate, for example, an 8-bit programmable counter with 4 channels (PCC0 to PCC3). Each of the programmable counters PCC0 to PCC3 only needs to have its count value updated in response to a signal change of the internal system clock SCLK or occurrence of a timeout in any of the programmable counters PCC0 to PCC3. The CTC 508 resets the start time of the random number generated by the free run counter used for randomly determining the extension time (variable setting time) for extending the security time for each system reset or the random number circuit 509. A free-run counter or the like used for determining each item at random may be included. Alternatively, these free-run counters may be included in an internal circuit of the game control microcomputer 100 different from the CTC 508, such as a backup area of the RAM 507, for example.

  The random number circuit 509 provided in the game control microcomputer 100 is a circuit that generates numerical data that is a random value having a predetermined update range, such as a 16-bit random number. In this embodiment, on the main board 11 side, for example, as shown in FIG. 14, a random value MR1 for determining a special figure display result, a random value MR2 for determining a jackpot type, a random value MR3 for determining reach, a fluctuation pattern Numeric data indicating each of the random number value MR4 for determining the type, the random value MR5 for determining the variation pattern, and the random value MR6 for determining the added value are controlled to be countable. In addition, in order to improve a game effect, random numbers other than these may be used. Based on the numerical data extracted from the random number circuit 509, the CPU 505 uses a random counter different from the random number circuit 509, such as a random counter provided in the game control counter setting unit 594 shown in FIG. Numerical data representing all or part of the random number values MR1 to MR6 may be counted by processing or updating the data. Alternatively, the CPU 505 counts (updates) the numerical data indicating the random number values MR1 to MR6 by software using only the random counter provided in the game control counter setting unit 594, for example, without using the random number circuit 509. May be. In the following, as an example, the numerical data indicating the random value MR1 for determining the special figure display result and the numerical data indicating the random value MR6 for determining the added value are extracted by the CPU 505 from the random number circuit 509 serving as hardware. It is assumed that the numerical data that is updated by processing the numerical data by software, and that indicates the other random number values MR2 to MR5, is updated by software by the CPU 505 using a random counter or the like. Note that the random number circuit 509 may be built in the game control microcomputer 100 or is externally attached to the game control microcomputer 100 as a random number circuit chip different from the game control microcomputer 100. It may be a thing.

  Among random number values MR1 to MR6 shown in FIG. 14, for random number values MR3 to MR5, an addition value, an addition determination value, and a maximum determination value are determined. The added value is a value to be added to each random number value in response to one timer interruption or the like, and the value can be changed every time a random number update process for updating the random number value is executed. For example, the addition value is obtained on the basis of the random value MR6 for determining the addition value, and an area for storing the addition value as a temporary variable may be provided in the RAM 507 or the like. The addition determination value is a value used for obtaining an addition value corresponding to each random value by comparison with the random value MR6 for determining the addition value. More specifically, after the random value MR6 for determining the added value is read as the initial value of the added value corresponding to each random value, it is determined that the current added value is smaller than the added determination value. The value obtained by subtracting the addition determination value from the current addition value is updated as a new addition value. The random number determination value is a value used to determine whether each updated random number value obtained by adding the finally obtained addition value is within a range of possible values. When each updated random number value exceeds the corresponding random number determination value, a value obtained by subtracting the random number determination value from the updated random number value is set as a new random number value. In this embodiment, it is assumed that the numerical data indicating the random value MR2 is updated to be incremented by one each time a timer interrupt occurs in the game control microcomputer 100.

  The random number MR1 for determining the special figure display result indicates whether or not the variable display result of the special symbol or the like in the special figure game is controlled as a big hit game state, and whether the variable display result is the “small hit” or not. It is a random value used to determine whether or not to control the gaming state. For example, the random number MR1 for determining the special figure display result takes a value in the range of “0” to “65535”. The random value MR2 for determining the big hit type is a random value used for determining the big hit type as one of a plurality of types when the variable display result is “big hit”. For example, the random value MR2 for determining the big hit type takes a value in the range of “0” to “99”.

  The random number MR3 for reach determination is used to determine whether or not to use the “reach” variable display mode in which the decorative symbol is derived and displayed in the reach display state when the variable display result is “lost”. It is a random value. For example, the random number MR3 for reach determination takes a value in the range of “0” to “239”. Corresponding to the reach determination random value MR3, the range of the addition value is set to “0” to “7”, the addition determination value is “8”, and the maximum determination value is “240”.

  The random number value MR4 for determining the variation pattern type is a random value used for determining the variation pattern type of the decorative design as one of a plurality of types prepared in advance. For example, the random value MR4 for determining the variation pattern type takes a value in the range of “0” to “241”. Here, each variation pattern type may be configured to include one or a plurality of variation patterns classified based on, for example, a rendering operation executed during variable display of decorative symbols. Note that some of the plurality of variation pattern types may be configured to include a common variation pattern, and all of the variation patterns included in one variation pattern type may be the other variation pattern. Some may be configured to be included in the type. As an example, each variation pattern type may be configured by variation patterns classified according to the presence / absence of a reach effect or the effect mode when there is a reach effect. In addition, the reach fluctuation pattern and the big hit fluctuation pattern are classified according to whether or not the “pseudo-continuous” specific effect is executed, and the number of times of execution of the pseudo continuous fluctuation (excluding the initial fluctuation). You may comprise by a fluctuation pattern. Corresponding to the random value MR4 for determining the variation pattern type, the range of the addition value is set to “0” to “7”, the addition determination value is “8”, and the maximum determination value is “242”.

  The random number value MR5 for determining the variation pattern is a random value used for determining the variation pattern of the decorative design as one of a plurality of types prepared in advance. For example, the random number MR5 for determining the variation pattern takes a value in the range of “0” to “255”. Corresponding to the random value MR5 for determining the variation pattern, the range of the added value is “0” to “7”, the added determination value is “8”, and the maximum determined value is “256”.

  The random value MR6 for determining the added value is a value used for obtaining an added value corresponding to each random value by comparing with an addition determination value corresponding to each random value. For example, the random value MR6 for determining the added value takes a value in the range of “0” to “7”.

  FIG. 15 is a block diagram illustrating a configuration example of the random number circuit 509. As shown in FIG. 15, the random number circuit 509 includes a frequency monitoring circuit 551, a clock flip-flop 552, a random number generation circuit 553, a start value setting circuit 554, a random number sequence change circuit 555, a random number sequence change setting circuit 556, and a latch flip-flop. 557A, 557B, random number latch selectors 558A, 558B, and random number value registers 559A, 559B. The random value register 559A and the random value register 559B are respectively a random value register R1D (address 2038H-2039H) and a random value register R2D included in the built-in registers of the game control microcomputer 100 as shown in FIG. 9B. (Addresses 203AH-203BH).

  The frequency monitoring circuit 551 is a circuit for monitoring the frequency of the random number clock RCLK generated by the random number clock generation circuit 112 and detecting the occurrence of an abnormality. For example, the frequency monitoring circuit 551 monitors an oscillation signal input to the random number external clock terminal ERC, and sets the contents of the bit number [7-6] of the security time setting KSES based on the internal system clock SCLK (FIG. 12B When the frequency abnormality according to the reference) is detected, the bit number [4] of the internal information register CIF is set to “1”. In this embodiment, the random number clock RCLK generated by the random number clock generation circuit 112 is input to the random number external clock terminal ERC.

  The clock flip-flop 552 is configured using, for example, a D-type flip-flop, and the random number clock RCLK from the random number external clock terminal ERC is input to the clock terminal CK. Further, in the clock flip-flop 552, the negative phase output terminal (inverted output terminal) Q bar is connected to the D input terminal. The random number update clock RGK is output from the positive phase output terminal (non-inverted output terminal) Q, while the latch clock RC0 is output from the negative phase output terminal (inverted output terminal) Q bar. In this case, when the signal state of the random number clock RCLK input to the clock terminal CK changes a predetermined state, the clock flip-flop 552 has a positive phase output terminal (non-inverted output terminal) Q and a negative phase output terminal ( Inverted output terminal) Changes the signal state in the output signal from the Q bar. For example, the clock flip-flop 552 rises when the signal state of the random number clock RCLK changes from a low level to a high level, or rises when the signal state of the random number clock RCLK changes from a high level to a low level. The input signal at the D input terminal is captured at any one of the falling timings. At this time, from the positive phase output terminal (non-inverted output terminal) Q, the input signal captured at the D input terminal is output without being inverted, while the negative phase output terminal (inverted output terminal) Q bar is output. From the input signal captured by the D input terminal is inverted and output. Thus, the random number update clock RGK having an oscillation frequency (for example, 10 MHz) that is ½ of the oscillation frequency (for example, 20 MHz) of the random number clock RCLK from the positive phase output terminal (non-inverted output terminal) Q of the clock flip-flop 552. Is output from the negative phase output terminal (inverted output terminal) Q bar, that is, the reverse phase signal (inverted signal) of the random number update clock RGK, that is, the same frequency as the random number update clock RGK and the phase of the random number update clock RGK is π. A different latch clock RC0 is output by (= 180 °).

  The random number update clock RGK output from the clock flip-flop 552 is input to the clock terminal of the random number generation circuit 553 and used for incrementing the count value in the random number generation circuit 553. The latch clock RC0 output from the clock flip-flop 552 is branched into the latch clock RC1 and the latch clock RC2 at the branch point BR1. Therefore, the latch clock RC1 and the latch clock RC2 have the same oscillation frequency, and the signal state changes with a common cycle. Here, examples of changes in the signal state in the latch clock RC1 and the latch clock RC2 include a rising edge that changes from a low level to a high level and a falling edge that changes from a high level to a low level. The latch clock RC1 is input to the clock terminal CK of the latch flip-flop 557A, and becomes a random number acquisition clock used to generate the start winning latch signal SL1. The latch clock RC2 is input to the clock terminal CK of the latch flip-flop 557B and becomes a random number acquisition clock used to generate the start winning latch signal SL2.

  Here, the oscillation frequency of the random number clock RCLK and the oscillation frequency of the control clock CCLK generated by the control clock generation circuit 111 are different from each other, and one of the oscillation frequencies is the other. It is never an integral multiple of the oscillation frequency. As an example, while the oscillation frequency of the control clock CCLK is 11.0 MHz, the oscillation frequency of the random number clock RCLK may be 9.7 MHz. Therefore, both the random number update clock RGK and the latch clocks RC1 and RC2 are oscillation signals whose signal states change at a different period from the control clock CCLK supplied to the CPU 505. In other words, the clock flip-flop 552 is based on the random number clock RCLK generated by the random number clock generation circuit 112, and the random number update clock RGK for updating the count value and the latch clock that is used as a plurality of random number acquisition clocks. As RC1 and RC2, oscillation signals whose signal states change with a period different from the control clock CCLK and the internal system clock SCLK (the control clock CCLK divided by two) are generated.

  The random number generation circuit 553 is composed of, for example, a 16-bit counter and the like, and based on an input such as a random number update clock RGK output from the clock flip-flop 552, a predetermined initial value within a predetermined range in which numerical data can be updated. It is a circuit that cyclically updates to a predetermined final value. For example, the random number generation circuit 553 responds to the rising edge in the random number update clock RGK that is an input signal to a predetermined clock terminal, and “65535” from the initial value set in the range from “0” to “65535”. The numerical data is counted up so that one is added at a time. Then, after counting up to “65535”, the numerical data is updated cyclically by counting up from “0” to a numerical value that becomes a final value that is 1 smaller than the initial value.

  The start value setting circuit 554 sets the start value in the count value generated by the random number generation circuit 553 in accordance with the bit value (see FIG. 11B) in the bit number [1-0] of the second random number initial setting KRS2. Set. For example, the start value setting circuit 554 sets the start value to the default value “0000H” if the bit number [1-0] of the second random number initial setting KRS2 is “00”, and if it is “10”. The value is set based on the ID number. If “01”, the value is changed every time the system is reset.

  The random number sequence change circuit 555 is a circuit that allows the permutation, which is the update order of the numerical data, to be changed to a permutation that conforms to a predetermined random number update rule when the numerical data generated by the random number generation circuit 553 makes a round. For example, the random number sequence change circuit 555 executes bit scramble processing such as bit replacement or transposition in numerical data output from the random number generation circuit 553. The random number sequence change circuit 555 can change the permutation, which is the update order of the numerical data, by changing the bit scramble key or the bit scramble table used for the bit scramble process, for example.

  The random number sequence change setting circuit 556 determines the update order of the numerical data in the random number sequence change circuit 555 according to the bit value (see FIG. 11A) in the bit number [1-0] of the first random number initial setting KRS1. It is a circuit for performing the setting to change. For example, if the bit number [1-0] of the first random number initial setting KRS1 is “00”, the random number sequence change setting circuit 556 sets the random number update rule not to change after the second round, while “01” If so, the random number update rule is changed in response to a change request by software after the second round, and if it is “10”, the random number update rule is automatically changed.

  When the random number update circuit 556 changes the random number update rule by software in response to the bit number [1-0] of the first random number initial setting KRS1 being “01”, FIG. Among the built-in registers included in the game control microcomputer 100 as shown, the random number update rule RDSC (address 2034H) is used to control the change of the random number update rule. FIG. 16A shows a configuration example of the random number sequence change register RDSC. FIG. 16B shows an example of setting contents in each bit of random number sequence change request data stored in the random number sequence change register RDSC. The random number sequence change request data RDSC0 stored in the bit number [0] of the random number sequence change register RDSC indicates the presence / absence of a random number sequence change request when the random number update rule is changed by software. In the example shown in FIG. 16B, when there is no random number sequence change request by software, the bit value of the random number sequence change request data RDSC0 is “0”, while when there is a random number sequence change request, The bit value is “1”.

  FIG. 17 shows an operation example when the random number update rule is changed by software. In this case, when the count value permutation RCN output from the random number generation circuit 553 is cyclically updated from a predetermined initial value to a predetermined final value, the response is that the random number sequence change request data RDSC0 is “1”. Then, change the random number update rule. In the operation example illustrated in FIG. 17, the random number sequence RSN output from the random number sequence change circuit 555 is “0 → 1 →... → 65535”. Thereafter, it is assumed that “1” is written to the bit number [0] of the random number sequence change register RDSC at a predetermined timing by the CPU 505 executing the user program stored in the ROM 506.

  In response to the bit number [1-0] of the first random number initial setting KRS1 being “01”, the random number sequence change setting circuit 556 reads the random number sequence change request data RDSC0 and the bit value is “1”. In response to "," a setting for changing the random number update rule is made. At this time, the random number sequence change setting circuit 556, according to the count value permutation RCN output from the random number generation circuit 553 reaching a predetermined final value, for example, any one of a plurality of types of random number update rules prepared in advance. The random number update rule is changed, for example, by selecting. In the operation example shown in FIG. 17, the random number sequence change circuit 555 outputs numerical data “65535” corresponding to the final value in the count value permutation RCN output from the random number generation circuit 553, and then responds to the random number sequence change request data RDSC0. Change the random number update rule. Thereafter, the random number sequence change circuit 555 outputs “65535 → 65534 →... → 0” as the random number sequence RSN according to the changed random number update rule. The random number sequence change register RDSC is initialized when the random number sequence change setting circuit 556 reads the random number sequence change request data RDSC0. Therefore, until the bit value “1” is written to the bit number [0] of the random number sequence change register RDSC again, the random number sequence RSN output from the random number sequence change circuit 555 is “65535 → 65534 →... → 0”. Become.

  When the CPU 505 executes the user program stored in the ROM 506 and the bit value “1” is written again to the bit number [0] of the random number sequence change register RDSC, the random number update rule is changed again. In the operation example shown in FIG. 17, when the random number sequence change circuit 555 outputs the numerical data “0” corresponding to the final value in the random number sequence RSN, the bit value “1” is written as the random number sequence change request data RDSC0. Change the random number update rule accordingly. Thereafter, the random number sequence changing circuit 555 outputs “0 → 2 →... → 65534 → 1 →... → 65535” as the random number sequence RSN according to the changed random number update rule.

  FIG. 18 shows an operation example when the random number update rule is automatically changed. In this case, in response to the count value permutation RCN output from the random number generation circuit 553 being cyclically updated from a predetermined initial value to a predetermined final value, the random number sequence change setting circuit 556 automatically changes the random number update rule. To change. In the operation example shown in FIG. 18, the random number sequence RSN output from the random number sequence change circuit 555 first is “0 → 1 →... → 65535”.

  When the random number sequence RSN output from the random number change circuit 555 reaches a predetermined final value, the random number sequence change setting circuit 556 follows a predetermined order from among a plurality of types of update rules prepared in advance. The update rule may be changed by selecting the update rule. Alternatively, the random number sequence change setting circuit 556 may change the update rule by selecting an arbitrary update rule from among a plurality of types of update rules. In the operation example illustrated in FIG. 18, the random number sequence RSN output from the random number sequence change circuit 555 becomes “65535 → 65534 →. Thereafter, due to the second change in the random number update rule, the random number sequence RSN output from the random number sequence change circuit 555 becomes “0 → 2 →... → 65534 → 1 →. In the operation example illustrated in FIG. 18, the random number sequence RSN output from the random number sequence change circuit 555 is “65534 → 0 →. When the fourth random number update rule change is performed, the random number sequence RSN output from the random number sequence change circuit 555 becomes “16383 → 49151 →... → 49150”. When the fifth random number update rule change is performed, the random number sequence RSN output from the random number sequence change circuit 555 becomes “4 → 3 →... → 465553”.

  Each of the latch flip-flops 557A and 557B is configured using, for example, a D-type flip-flop. In the latch flip-flop 557A, a wiring from the input port P0 included in the PIP 510 is connected to the D input terminal, and a wiring for transmitting the latch clock RC1 is connected to the clock terminal CK. In this embodiment, the first start winning signal SS1 from the first start port switch 22A is input to the input port P0. The latch flip-flop 557A takes in the first start winning signal SS1 in response to the rising edge of the latch clock RC1, and outputs it as the start winning latch signal SL1. Accordingly, in the latch flip-flop 557A, the first start winning signal SS1 is output as the start winning latch signal SL1 in synchronization with the rising edge of the latch clock RC1. In the latch flip-flop 557B, a wiring from the input port P1 included in the PIP 510 is connected to the D input terminal, and a wiring for transmitting the latch clock RC2 is connected to the clock terminal CK. In this embodiment, the second start winning signal SS2 from the second start port switch 22B is input to the input port P1. The latch flip-flop 557B receives the second start winning signal SS2 in response to the rising edge of the latch clock RC2, and outputs it as the start winning latch signal SL2. Thus, in the latch flip-flop 557B, the second start winning signal SS2 is output as the start winning latch signal SL2 in synchronization with the rising edge of the latch clock RC2.

  The first start winning signal SS1 and the second start winning signal SS2 are not limited to those directly transmitted from the first start port switch 22A and the second start port switch 22B. As an example, the time during which the output signal from the first start port switch 22A and the output signal from the second start port switch 22B are in the ON state is measured, and the measured time becomes a predetermined time (for example, 3 ms). Sometimes, a timer circuit for outputting the first start winning signal SS1 and the second starting winning signal SS2 may be provided.

  The random number latch selector 558A is a circuit that takes in the start winning latch signal SL1 transmitted from the latch flip-flop 557A and the random number latch request signal by software, and selectively outputs one as the random number latch signal LL1. The random number latch selector 558B is a circuit that takes in the start winning latch signal SL2 transmitted from the latch flip-flop 557B and the random number latch request signal by software, and selectively outputs one as the random number latch signal LL1. The random number latch selector 558A and the random number latch selector 558B are a random value fetch register RDLT (address 2032H) and a random number latch selection register RDLS among the built-in registers included in the game control microcomputer 100 as shown in FIG. (Address 2030H) is used to control the output of the random number latch signal LL1 and the random number latch signal LL2. The random value acquisition register RDLT is a register used for acquiring numerical data in the random number sequence RSN output from the random number sequence change circuit 555 into the random value register 559A or the random value register 559B by software. The random number latch selection register RDLS receives the numerical data in the random number sequence RSN output from the random number sequence change circuit 555 into the random number value register 559A or the random number value register 559B by software, or by signal input to the input ports P0 and P1. It is a register indicating a fetching method of fetching.

  FIG. 19A shows a configuration example of the random value fetch register RDLT. FIG. 19B shows an example of the setting contents in each bit of the random number acquisition specification data stored in the random value acquisition register RDLT. The random value acquisition specification data RDLT1 stored in the bit number [1] of the random value acquisition register RDLT indicates whether or not the random value acquisition specification for the random value register 559B serving as the random value register R2D is present. In the example shown in FIG. 19B, when the software does not specify the random value acquisition to the random value register R2D, the bit value of the random value acquisition specification data RDLT1 is “0”, while the random value acquisition is not performed. The bit value is “1” when an instruction is included. The random value acquisition specification data RDLT0 stored in the bit number [0] of the random value acquisition register RDLT indicates whether or not a random value acquisition specification is given to the random value register 559A serving as the random value register R1D. In the example shown in FIG. 19B, when the software does not specify the acquisition of the random number value to the random value register R1D, the bit value of the random value acquisition specification data RDLT0 is “0”, while the random value acquisition is not performed. The bit value is “1” when an instruction is included.

  FIG. 20A shows a configuration example of the random number latch selection register RDLS. FIG. 20B shows an example of setting contents in each bit of random number latch selection data stored in the random number latch selection register RDLS. The random number latch selection data RDLS1 stored in the bit number [1] of the random number latch selection register RDLS indicates a method of taking in the random number value register 559B serving as the random number value register R2D. In the example shown in FIG. 20B, when numerical data that becomes a random value in accordance with the writing of the random number acquisition specification data RDLT1 by software is acquired in the random value register R2D, the bit value of the random number latch selection data RDLS1 is set to “ 0 ”. On the other hand, when the numerical value data to be a random number value is taken into the random value register R2D in response to the signal input to the input port P1, the bit value of the random number latch selection data RDLS1 is set to “1”. The random number latch selection data RDLS0 stored in the bit number [0] of the random number latch selection register RDLS indicates a method of taking in the random number value register 559A serving as the random number value register R1D. In the example shown in FIG. 20B, when the numerical value data that becomes the random number value is loaded into the random number value register R1D in response to the writing of the random number value loading designation data RDLT0 by software, the bit value of the random number latch selection data RDLS0 is set to “ 0 ”. On the other hand, when the numerical value data to be a random number value is taken into the random value register R1D in response to the signal input to the input port P0, the bit value of the random number latch selection data RDLS0 is set to “1”.

  The random value registers 559A and 559B are registers for storing numerical data in the random number sequence RSN output from the random number sequence changing circuit 555 as random number values. FIGS. 21A and 21B show a configuration example of a random value register 559A serving as the random value register R1D. FIG. 21A shows the lower byte R1D (L) of the random value register R1D, and FIG. 21B shows the upper byte R1D (H) of the random value register R1D. FIGS. 21C and 21D show a configuration example of a random value register 559B serving as the random value register R2D. 21C shows the lower byte R2D (L) of the random value register R2D, and FIG. 21D shows the upper byte R2D (H) of the random value register R2D. Each of the random value registers 559A and 559B is a 16-bit (2-byte) register and can store a 16-bit random value.

  The random value register 559A takes in the numerical data in the random number sequence RSN output from the random number sequence change circuit 555 as a random value in response to the random number latch signal LL1 supplied from the random number latch selector 558A being turned on. Store with. When the register read signal RRS1 supplied from the CPU 505 is turned on, the random value register 559A enters a readable (enable) state and outputs stored numerical data to an internal bus or the like. On the other hand, when the register read signal RRS1 is in the off state, the same value (for example, “65535H” or the like) is always output, and the reading is disabled (disabled). Further, the random value register 559A may be in a state in which the register read signal RRS1 cannot be received when the random number latch signal LL1 is in the ON state. Further, the random number register 559A may be configured to be in a state in which the random number latch signal LL1 cannot be received when the register read signal RRS1 is in the on state before the random number latch signal LL1 is in the on state. Good.

  The random value register 559B takes in the numerical data in the random number sequence RSN output from the random number sequence change circuit 555 as a random value in response to the random number latch signal LL2 supplied from the random number latch selector 558B being turned on. Store with. When the register read signal RRS2 supplied from the CPU 505 is turned on, the random value register 559B enters a readable (enable) state and outputs stored numerical data to an internal bus or the like. On the other hand, when the register read signal RRS2 is in the OFF state, the same value (for example, “65535H” or the like) is always output, and the reading is disabled (disabled). Further, the random value register 559B may be in a state in which the register read signal RRS2 cannot be received when the random number latch signal LL2 is in the ON state. Further, the random value register 559B may be configured to be in a state in which the random number latch signal LL2 cannot be received when the register read signal RRS2 is in the on state before the random number latch signal LL2 is in the on state. Good.

  The random value register 559A and the random value register 559B are a random number latch flag register RDFM (address 2033H) and a random number interrupt control register RDIC (of the built-in registers included in the game control microcomputer 100 as shown in FIG. 9B). Address 2031H) and enable operation management and interrupt control at the time of random number latching. The random number latch flag register RDFM is a register for storing a random number latch flag indicating whether or not numerical data to be a random number value is latched corresponding to each of the random number value register 559A and the random number value register 559B. The random number interrupt control register RDIC is a register that sets permission / prohibition of an interrupt that occurs when numerical data that becomes a random value is latched in the random value register 559A or the random value register 559B.

  FIG. 22A shows a configuration example of the random number latch flag register RDFM. FIG. 22B shows an example of setting contents in each bit of the random number latch flag data stored in the random number latch flag register RDFM. The random number latch flag data RDFM1 stored in the bit number [1] of the random number latch flag register RDFM becomes a random number latch flag indicating whether or not numerical data has been taken into the random number value register 559B serving as the random number value register R2D. In the example shown in FIG. 22B, when the numerical value data is not taken into the random number value register R2D (no random number value is taken), the bit value of the random number latch flag data RDFM1 becomes “0”, while the numerical value data Is taken (with random number fetching), the bit value becomes “1”. The random number latch flag data RDFM0 stored in the bit number [0] of the random number latch flag register RDFM is a random number latch flag indicating whether or not numerical data has been taken into the random number value register 559A serving as the random number value register R1D. In the example shown in FIG. 22B, when the numerical data is not taken into the random value register R1D (no random value is taken), the bit value of the random number latch flag data RDFM0 becomes “0”, while the numerical data Is taken (with random number fetching), the bit value becomes “1”.

  FIG. 23A shows a configuration example of the random number interrupt control register RDIC. FIG. 22B shows an example of setting contents in each bit of random number interrupt control data stored in the random number interrupt control register RDIC. The random number interrupt control data RDIC1 stored in the bit number [1] of the random number interrupt control register RDIC permits or prohibits an interrupt that occurs when numerical data is taken into the random number value register 559B serving as the random number value register R2D. Indicates the interrupt control setting for In the example shown in FIG. 22 (B), when interrupting at the time of fetching into the random value register R2D is prohibited (interrupt disabled), the bit value of the random number interrupt control data RDIC1 is set to “0”, while this interrupt is When enabling (interrupt enabled), the bit value is set to “1”. The random number interrupt control data RDIC0 stored in the bit number [0] of the random number interrupt control register RDIC allows or prohibits an interrupt that occurs when numerical data is taken into the random value register 559A that becomes the random value register R1D. Indicates the interrupt control setting for In the example shown in FIG. 22 (B), when interrupting at the time of fetching into the random value register R1D is prohibited (interrupt disabled), the bit value of the random number interrupt control data RDIC0 is set to “0”, while this interrupt is When enabling (interrupt enabled), the bit value is set to “1”.

  The PIP 510 provided in the game control microcomputer 100 is, for example, an input-only port having a 6-bit width, and includes an input port P0 to input port P2 serving as a dedicated terminal, and an input port P3 to input port P5 serving as a function shared terminal. It is out. The input port P3 is also used as an external maskable interrupt terminal XINT connected to the CPU 505 or the like. The input port P4 is also used as an external non-maskable interrupt terminal XNMI connected to the CPU 505 or the like. The input port P5 is also used as the first channel reception terminal RXA used by the serial communication circuit 511. The use setting of the input port P3 to the input port P5 is instructed by the function setting KFCS stored in the program management area.

  The PIP 510 uses the input port register PI (address 2090H) among the built-in registers included in the game control microcomputer 100 as shown in FIG. 9B to manage the status of the input port P0 to the input port P5. Do. The input port register PI is a register that stores a bit value indicating the input state of the external signal corresponding to each of the input port P0 to the input port P5.

  FIG. 24A shows a configuration example of the input port register PI. FIG. 24B shows an example of setting contents in each bit of the input port data stored in the input port register PI. The input port data PI5 stored in the bit number [5] of the input port register PI indicates the terminal state (ON / OFF) at the input port P5 that is also used as the first channel receiving terminal RXA. The input port data PI4 stored in the bit number [4] of the input port register PI indicates the terminal state (ON / OFF) at the input port P4 that is also used as the external non-maskable interrupt terminal XNMI. The input port data PI3 stored in the bit number [3] of the input port register PI indicates the terminal state (ON / OFF) at the input port P3 that is also used as the external maskable interrupt terminal XINT. The input port data PI2 stored in the bit number [2] of the input port register PI indicates the terminal state (ON / OFF) at the input port P2. The input port data PI1 stored in the bit number [1] of the input port register PI indicates the terminal state (ON / OFF) at the input port P1. The input port data PI0 stored in the bit number [0] of the input port register PI indicates the terminal state (ON / OFF) at the input port P0.

  The serial communication circuit 511 provided in the game control microcomputer 100 is a circuit that handles communication data in, for example, full duplex, asynchronous, standard NRZ (Non Return to Zero) format. FIG. 25 shows a configuration example of the serial communication circuit 511. The serial communication circuit 511 shown in FIG. 25 only transmits serial data in a single direction between the first channel transmission / reception circuit 571A capable of bidirectional transmission / reception of serial data with the external circuit and the external circuit. And a second channel transmission circuit 571B capable of performing the above. In this embodiment, bidirectional serial communication is performed with the payout control microcomputer 150 mounted on the payout control board 15 using the first channel transmission / reception circuit 571A, while the second channel transmission circuit 571B is used. Thus, serial communication in a single direction (only transmission) is performed with the production control microcomputer 120 mounted on the production control board 12.

  The first channel transmission / reception circuit 571A includes a transmission shift register 581A, a transmission data register 582A, an interrupt control circuit 583A, a reception data register 584A, and a reception shift register 585A. The second channel transmission circuit 571B includes a transmission shift register 581B, a transmission data register 582B, and an interrupt control circuit 583B.

  The first channel transmission / reception circuit 571A includes a first channel data register SADT (address 201FH) and a first channel communication setting register SAFM (among the built-in registers included in the game control microcomputer 100 as shown in FIG. 9B). Operation management of serial communication using address 201AH), first channel interrupt control register SAIC (address 201BH), first channel command register SACM (address 201CH), and first channel status register SAST (address 201EH) And operation control. The second channel transmission circuit 571B includes a second channel data register SBDT (address 2027H) and a second channel communication setting register SBFM (among the built-in registers included in the game control microcomputer 100 as shown in FIG. 9B). Operation management of serial communication using the address 2022H), the second channel interrupt control register SBIC (address 2023H), the second channel command register SBCM (address 2024H), and the second channel status register SBST (address 2026H) And operation control.

  The first channel data register SADT is a register for storing communication data (transmission data or reception data) transmitted / received by serial communication by the first channel transmission / reception circuit 571A. The second channel data register SBDT is a register for storing communication data (transmission data) transmitted by serial communication by the second channel transmission circuit 571B. FIG. 26A shows a configuration example of the first channel data register SADT. FIG. 26B shows a configuration example of the second channel data register SBDT. When communication data is transmitted by the first channel transmission / reception circuit 571A, for example, data written to the first channel data register SADT by the CPU 505 or the like is read by the first channel transmission / reception circuit 571A and supplied to the transmission data register 582A. The When communication data is received by the first channel transmission / reception circuit 571A, for example, data read from the reception data register 584A by the first channel transmission / reception circuit 571A is written to the first channel data register SADT, so that the CPU 505 or the like It can be provided. When communication data is transmitted by the second channel transmission circuit 571B, for example, data written in the second channel data register SBDT by the CPU 505 or the like is read by the second channel transmission circuit 571B and supplied to the transmission data register 582B. The

  The first channel communication setting register SAFM is a register for setting the communication format and the like of the first channel transmission / reception circuit 571A. The second channel communication setting register SBFM is a register for setting a communication format and the like of the second channel transmission circuit 571B. FIG. 27A shows a configuration example of the first channel communication setting register SAFM. FIG. 27B shows a configuration example of the second channel communication setting register SBFM. FIG. 27C shows an example of setting contents in each bit of the communication setting data stored in the first channel communication setting register SAFM and the second channel communication setting register SBFM. The communication setting data SAFM7 stored in the bit number [7] of the first channel communication setting register SAFM and the communication setting data SBFM7 stored in the bit number [7] of the second channel communication setting register SBFM use the transmission function. Indicates / stop. For example, when the transmission function in the first channel transmission / reception circuit 571A is temporarily disabled, the bit value of the communication setting data SAFM7 is set to “1”. When the transmission function in the second channel transmission circuit 571B is temporarily disabled, the bit value of the communication setting data SBFM7 is set to “1”. Communication setting data SAFM6 stored in the bit number [6] of the first channel communication setting register SAFM indicates use / stop of the reception function. For example, when the reception function in the first channel transmission / reception circuit 571A is temporarily disabled, the bit value of the communication setting data SAFM6 is set to “1”.

  The communication setting data SAFM3 stored in the bit number [3] of the first channel communication setting register SAFM and the communication setting data SBFM3 stored in the bit number [3] of the second channel communication setting register SBFM are selected for the operation mode. Shows the settings. For example, when the operation mode in the first channel transmission / reception circuit 571A is set to the normal mode, the bit value of the communication setting data SAFM3 is set to “0”, while when the FIFO (First In First Out) mode is set, The bit value is set to “1”. Further, when the operation mode in the second channel transmission circuit 571B is set to the normal mode, the bit value of the communication setting data SBFM3 is set to “0”, while when the FIFO mode is set, the bit value is set to “1”. And In this embodiment, the operation mode in both the first channel transmission / reception circuit 571A and the second channel transmission circuit 571B is a normal mode. The communication setting data SAFM2 stored in the bit number [2] of the first channel communication setting register SAFM and the communication setting data SBFM2 stored in the bit number [2] of the second channel communication setting register SBFM are data length selections. Shows the settings. For example, when the data length in the transmission / reception operation in the first channel transmission / reception circuit 571A is the first data length (1 start bit, 8 data bits, 1 stop bit), the bit value of the communication setting data SAFM2 is “0”. On the other hand, when the second data length is set (1 start bit, 9 data bits, 1 stop bit), the bit value is set to “1”. Further, when the data length in the transmission operation in the second channel transmission circuit 571B is the first data length, the bit value of the communication setting data SBFM2 is set to “0”, while the second data length is used. The bit value is set to “1”.

  The communication setting data SAFM1 stored in the bit number [1] of the first channel communication setting register SAFM and the communication setting data SBFM1 stored in the bit number [1] of the second channel communication setting register SBFM use the parity function. / Indicates unused. For example, when the parity function in the first channel transmission / reception circuit 571A is not used (parity is not used), the bit value of the communication setting data SAFM1 is set to “0”, whereas when the parity function is used (parity is used). The bit value is “1”. When the parity function in the second channel transmission circuit 571B is not used (parity is not used), the bit value of the communication setting data SBFM1 is set to “0”, whereas when the parity function is used (parity is used). The bit value is set to “1”. The communication setting data SAFM0 stored in the bit number [0] of the first channel communication setting register SAFM and the communication setting data SBFM0 stored in the bit number [0] of the second channel communication setting register SBFM use the parity function. The selection setting of the parity function in the case of performing is shown. For example, when the parity function in the first channel transmission / reception circuit 571A is an even parity, the bit value of the communication setting data SAFM0 is “0”, whereas when the parity function is an odd parity, the bit value is “1”. And Further, when the parity function in the second channel transmission circuit 571B is set to even parity, the bit value of the communication setting data SBFM0 is set to “0”, whereas when the parity function is set to odd parity, the bit value is set to “1”. And

  The first channel interrupt control register SAIC is a register for setting permission / prohibition of an interrupt request in the first channel transmission / reception circuit 571A. The second channel interrupt control register SBIC is a register for setting permission / prohibition of an interrupt request in the second channel transmission circuit 571B. FIG. 28A shows a configuration example of the first channel interrupt control register SAIC. FIG. 28B shows a configuration example of the second channel control register SBIC. FIG. 28C shows an example of setting contents in each bit of the communication interrupt control data stored in the first channel interrupt control register SAIC and the second channel interrupt control register SBIC. The communication interrupt control data SAIC7 stored in the bit number [7] of the first channel interrupt control register SAIC and the communication interrupt control data SBIC7 stored in the bit number [7] of the second channel interrupt control register SBIC are transmitted interrupts. The setting of permission / prohibition is shown for an interrupt request due to transmission completion, which is one of the generation factors. For example, an interrupt request due to completion of transmission occurs when transmission of communication data stored in the transmission shift register 581A or transmission shift register 581B is completed. When the interrupt request at the completion of transmission in the first channel transmission / reception circuit 571A is prohibited (interrupt request prohibited), the bit value of the communication interrupt control data SAIC7 is set to “0”, while the interrupt request is permitted. (Interrupt request enabled), the bit value is set to “1”. Further, when the interrupt request at the completion of transmission in the second channel transmission circuit 571B is prohibited (interrupt request prohibition), the bit value of the communication interrupt control data SBIC7 is set to “0” while the interrupt request is permitted. (Interrupt request enabled), the bit value is set to “1”.

  The communication interrupt control data SAIC6 stored in the bit number [6] of the first channel interrupt control data SAIC and the communication interrupt control data SBIC6 stored in the bit number [6] of the second channel interrupt control register SBIC are transmitted interrupts. The setting of permission / prohibition is shown for an interrupt request by transmission data empty, which is one of the generation factors. For example, an interrupt request due to transmission data empty is generated when communication data is transferred from the transmission data register 582A to the transmission shift register 581A, or when communication data is transferred from the transmission data register 582B to the transmission shift register 581B. Occur. When the interrupt request at the time of transmission data empty in the first channel transmission / reception circuit 571A is prohibited (interrupt request prohibition), the bit value of the communication interrupt control data SAIC6 is set to “0” while the interrupt request is permitted. In this case (interrupt request enabled), the bit value is set to “1”. When the interrupt request at the time of transmission data empty in the second channel transmission circuit 571B is prohibited (interrupt request is prohibited), the bit value of the communication interrupt control data SBIC6 is set to “0” while the interrupt request is permitted. In this case (interrupt request enabled), the bit value is set to “1”.

  The communication interrupt control data SAIC5 stored in the bit number [5] of the first channel interrupt control register SAIC indicates permission / prohibition setting for an interrupt request due to reception data full, which is one of the reception interrupt generation factors. . For example, an interrupt request due to reception data full occurs when communication data is transferred from reception shift register 585A to reception data register 584A. When the interrupt request when the reception data is full in the first channel transmission / reception circuit 571A is prohibited (interrupt request prohibition), the bit value of the communication interrupt control data SAIC5 is set to “0”, while the interrupt request is permitted. In this case (interrupt request enabled), the bit value is set to “1”.

  The first channel command register SACM is a register used for clearing by the software of the first channel transmission / reception circuit 571A and transmitting a break code ("0" of one frame or more). The second channel command register SBCM is a register used for clearing the second channel transmission circuit 571B by software and transmitting a break code. FIG. 29A shows a configuration example of the first channel command register SACM. FIG. 29B shows a configuration example of the second channel command register SBCM. FIG. 29C shows an example of setting contents in each bit of communication command setting data stored in the first channel command register SACM and the second channel command register SBCM. The communication command setting data SACM7 stored in the bit number [7] of the first channel command register SACM and the communication command setting data SBCM7 stored in the bit number [7] of the second channel command register SBCM are transmitted data registers 582A. Whether or not to clear the transmission function such as clearing the transmission buffer included in the transmission data register 582B, clearing the transmission completion flag and transmission data empty flag included in the first channel status register SAST and the second channel status register SBST It shows. For example, when the transmission buffer, transmission completion flag, and transmission data empty flag in the first channel transmission / reception circuit 571A are not cleared (NOP), the bit value of the communication command setting data SACM7 is set to “0” while these are cleared. In this case, the bit value is set to “1”. When the transmission buffer, transmission completion flag, and transmission data empty flag in the second channel transmission circuit 571B are not cleared (NOP), the bit value of the communication command setting data SBCM7 is set to “0”, and these are cleared. In this case, the bit value is set to “1”.

  The communication command setting data SACM6 stored in the bit number [6] of the first channel command register SACM includes clearing of the reception buffer included in the reception data register 584A, and various reception flags (for example, reception) included in the first channel status register SAST. It indicates whether or not to perform clearing related to the receiving function such as clearing of a data full flag, a noise flag, an overrun flag, a break code detection flag, a framing error flag, a parity error flag, and the like. For example, when the reception buffer and various reception flags in the first channel transmission / reception circuit 571A are not cleared (NOP), the bit value of the communication command setting data SACM6 is set to “0”, while when these are cleared, The bit value is set to “1”.

  The communication command setting data SACM0 stored in the bit number [0] of the first channel command register SACM and the communication command setting data SBCM0 stored in the bit number [0] of the second channel command register SBCM are transmitted as break codes. / Indicates unsent. For example, when the break code is not transmitted by the first channel transmission / reception circuit 571A (break code not transmitted), the bit value of the communication command setting data SACM0 is set to “0”, while when the break code is transmitted (break Code transmission), the bit value is set to "1". When the second channel transmission circuit 571B does not transmit a break code (break code not transmitted), the bit value of the communication command setting data SBCM0 is set to “0”, while when the break code is transmitted (break Code transmission), the bit value is set to "1".

  The first channel status register SAST is a register for confirming the transmission state and reception state of the first channel transmission / reception circuit 571A. The second channel status register SBST is a register for confirming the transmission state of the second channel transmission circuit 571B. FIG. 30A shows a configuration example of the first channel status register SAST. FIG. 30B shows a configuration example of the second channel status register SBST. FIG. 30C shows an example of setting contents in each bit of communication status data stored in the first channel status register SAST and the second channel status register SBST.

  The communication status data SAST7 stored in the bit number [7] of the first channel status register SAST and the communication status data SBST7 stored in the bit number [7] of the second channel status register SBST are the transmission shift register 581A and It becomes a transmission completion flag indicating whether or not the data transfer from the transmission shift register 581B is completed. For example, when communication data is being transmitted by the first channel transmission / reception circuit 571A (during transmission), the bit value of the communication status data SAST7 becomes “0”, while when transmission of communication data is completed (transmission completed). The bit value is “1”. When communication data is being transmitted by the second channel transmission circuit 571B (during transmission), the bit value of the communication status data SBST7 becomes “0”, while when transmission of communication data is completed (transmission completed). The bit value is “1”. Note that the change of the transmission completion flag from the off state “0” to the on state “1” is one of the transmission interrupt generation factors.

  The communication status data SAST6 stored in the bit number [6] of the first channel status register SAST and the communication status data SBST6 stored in the bit number [6] of the second channel status register SBST are transmitted from the transmission data register 582A. This is a transmission data empty flag indicating whether data transfer to the trust shift register 581A or data transfer from the transmission data register 582B to the transmission shift register 581B is completed. For example, when the data transfer to the transmission shift register 581A is not completed in the first channel transmission / reception circuit 571A (transmission shift register not transferred), the bit value of the communication status data SAST6 becomes “0”. When the data transfer is completed (transmission shift register transfer is completed), the bit value becomes “1”. When the second channel transmission circuit 571B does not complete the data transfer to the transmission shift register 581B (transmission shift register is not transferred), the bit value of the communication status data SBST6 becomes “0”. When the data transfer is completed (transmission shift register transfer is completed), the bit value becomes “1”. Note that changing the transmission data empty flag from the off state “0” to the on state “1” is one of the transmission interrupt generation factors.

  The communication status data SAST5 stored in the bit number [5] of the first channel status register SAST is a reception data full flag indicating whether or not the data transfer from the reception shift register 585A to the reception data register 584A has been executed. . For example, if there is no data stored in the reception data register 584A because the data transfer from the reception shift register 585A to the reception data register 584A is not executed in the first channel transmission / reception circuit 571A (data in the reception data register). None), the bit value of the communication status data SAST5 becomes “0”. On the other hand, when the data transfer from the reception shift register 585A to the reception data register 584A is executed, and there is stored data in the reception data register 584A (there is data in the reception data register), the communication status data The bit value of SAST5 is “1”. Note that the change of the reception data full flag from the OFF state “0” to the ON state “1” is one of the reception interrupt generation factors.

  The communication status data SAST4 stored in the bit number [4] of the first channel status register SAST is a noise flag indicating whether or not noise is detected in the reception circuit included in the first channel transmission / reception circuit 571A. For example, when noise is not detected in the communication data received by the first channel transmission / reception circuit 571A (noise is not detected), the bit value of the communication status data SAST4 becomes “0”, while when noise is detected, The value is “1”. Further, when noise in the received data is detected, the communication status data SAST5 serving as the received data full flag becomes “1”.

  The communication status data SAST3 stored in the bit number [3] of the first channel status register SAST becomes an overrun flag indicating whether or not an overrun has been detected in the reception circuit included in the first channel transmission / reception circuit 571A. . The overrun is an error that occurs when the next communication data is received before the received communication data is read by the user program. For example, when no overrun is detected during reception of communication data by the first channel transmission / reception circuit 571A (overrun not detected), the bit value of the communication status data SAST3 becomes “0” while overrun is detected. When it is performed (overrun detection), the value becomes “1”. When overrun is detected, the communication status data SAST5 serving as the reception data full flag is “1”. If the communication interrupt control data SAIC5 stored in the bit number [5] of the first channel interrupt control register SAIC is “1”, it is received when an error (overrun error) occurs due to overrun detection. An interrupt can be generated. That is, the change of the overrun flag from the off state “0” to the on state “1” is one of the reception interrupt generation factors.

  The communication status data SAST2 stored in the bit number [2] of the first channel status register SAST includes a break code detection flag indicating whether or not a break code is detected in the reception circuit included in the first channel transmission / reception circuit 571A. Become. For example, when no break code is detected during reception of communication data by the first channel transmission / reception circuit 571A (break code not detected), the bit value of the communication status data SAST2 becomes “0”, while the break code is detected. When this is done (break code detection), the value becomes “1”. When a break code is detected, the bit value of the communication status data SAST5 serving as a reception data full flag is “1”. If the communication interrupt control data SAIC5 stored in the bit number [5] of the first channel interrupt control register SAIC is “1”, it is received when an error (break code error) occurs due to break code detection. An interrupt can be generated. That is, the change of the break code detection flag from the off state “0” to the on state “1” is one of the reception interrupt generation factors.

  The communication status data SAST1 stored in the bit number [1] of the first channel status register SAST becomes a framing error flag indicating whether or not a framing error is detected in the receiving circuit included in the first channel transmission / reception circuit 571A. . The framing error is an error that occurs when the stop bit in the received communication data is “0”. For example, when no framing error is detected in the first channel transmission / reception circuit 571A (framing error not detected), the bit value of the communication status data SAST1 becomes “0”, while when a framing error is detected (framing error) Detection), the value becomes “1”. When a framing error is detected, the bit value of the communication status data SAST5 serving as the reception data full flag becomes “1”. If the communication interrupt control data SAIC5 stored in the bit number [5] of the first channel interrupt control register SAIC is “1”, a reception interrupt can be generated when a framing error occurs. That is, changing the framing error flag from the off state “0” to the on state “1” is one of the reception interrupt generation factors.

  The communication status data SAST0 stored in the bit number [0] of the first channel status register SAST becomes a parity error flag indicating whether or not a parity error has been detected in the reception circuit included in the first channel transmission / reception circuit 571A. . The parity error is set to use the parity function by the communication setting data SAFM1 stored in the bit number [1] of the first channel communication setting register SAFM and the communication setting data SAFM0 stored in the bit number [0]. The error occurs when the parity of the received communication data does not match the parity specified by the communication setting data SAFM0. For example, when no parity error is detected during communication data reception by the first channel transmission / reception circuit 571A (parity error not detected), the bit value of the communication status data SAST0 becomes “0” while a parity error is detected. When this is done (parity error detection), the bit value becomes “1”. When a parity error is detected, the bit value of the communication status data SAST5 serving as a reception data full flag is “1”. If the communication interrupt control data SAIC5 stored in the bit number [5] of the first channel interrupt control register SAIC is “1”, a reception interrupt can be generated when a parity error occurs. That is, the change of the parity error flag from the off state “0” to the on state “1” is one of the reception interrupt generation factors.

  As described above, in the serial communication circuit 511, four types of errors such as an overrun error, break code error, framing error, and parity error may occur when communication data is received. A reception interrupt can be generated.

  A transmission shift register 581A and a transmission shift register 581B included in the serial communication circuit 511 illustrated in FIG. 26 are circuits for converting transmission data from a parallel signal format to a serial signal format. Communication data stored in transmission data register 582A is transferred to transmission shift register 581A. The communication data stored in the transmission data register 582B is transferred to the transmission data register 581B. The transmission data converted into the serial signal format by the conversion in the transmission shift register 581A is output to the outside of the game control microcomputer 100 by sequentially transmitting each bit data to the first channel transmission terminal TXA. Is done. The transmission data converted into the serial signal format by the conversion in the transmission shift register 581B is output to the outside of the game control microcomputer 100 by sequentially transmitting each bit data to the second channel transmission terminal TXB. Is done.

  The transmission data register 582A stores communication data acquired from the first channel data register SADT. The transmission data register 582B stores the communication data acquired from the second channel data register SBDT. Further, the transmission data register 582A and the transmission data register 582B may perform conversion into a transmission data format, parity generation, and the like.

  The interrupt control circuit 583A is a circuit for managing an interrupt generation factor in the first channel transmission / reception circuit 571A and controlling a communication interrupt request. Interrupts controlled by the interrupt control circuit 583A include a first channel transmission interrupt and a first channel reception interrupt. The first channel transmission interrupt includes an interruption due to transmission completion and an interruption due to transmission data empty. The first channel reception interrupt includes an interruption due to reception data full and an interruption due to the occurrence of a reception error such as a break code error, an overrun error, a framing error, and a parity error. The interrupt control circuit 583B is a circuit for managing an interrupt generation factor in the second channel transmission circuit 571B and controlling a communication interrupt request. The interrupt controlled by the interrupt control circuit 583B is a second channel transmission interrupt. The second channel transmission interrupt includes an interruption due to transmission completion and an interruption due to transmission data empty.

  The reception data register 584A included in the first channel transmission / reception circuit 571A stores the communication data acquired from the reception shift register 585A and transfers the data to the first channel data register SADT. The reception data register 584A may perform data extraction from the reception data format, parity check, and the like.

  The reception shift register 585A is a circuit for converting received data from a serial signal format to a parallel signal format. In the reception shift register 585A, reception data supplied from the outside of the game control microcomputer 100 to the first channel reception terminal RXA is sequentially stored in units of bit data. The reception data stored in reception shift register 585A is transferred to reception data register 584A.

  An address decoding circuit 512 provided in the game control microcomputer 100 shown in FIG. 7 is for decoding each functional block in the game control microcomputer 100 and a chip select signal that is a decode signal for an external device. Circuit. By the chip select signal, an internal circuit of the game control microcomputer 100 or an external device as a peripheral device is selectively operated effectively and can be accessed from the CPU 505.

  The ROM 506 provided in the game control microcomputer 100 stores various selection data and table data used for controlling the progress of the game, in addition to the game control user program and the security check program 506A. . For example, the ROM 506 stores data constituting a plurality of determination tables, determination tables, setting tables, and the like prepared for the CPU 505 to perform various determinations, determinations, and settings. The ROM 506 also has a variation pattern in which the CPU 505 stores a plurality of types of table data constituting a plurality of command tables used for transmitting control signals serving as various control commands from the main board 11 and a plurality of types of decorative pattern variation patterns. Table data constituting the table is stored.

  FIG. 31 shows the variation of the decorative symbols prepared in advance corresponding to the cases where the variable display mode of the decorative symbol is “non-reach” and “reach” when the variable display result is “losing”. It is explanatory drawing which illustrates a pattern. As shown in FIG. 31, in this embodiment, non-reach PA1-1 to non-reach PA1-7 and non-reach PB1- are used as variation patterns corresponding to the case where the decorative symbol variable display mode is “non-reach”. 1 and non-reach PB1-2, non-reach PC1-1 and non-reach PC1-2 variation patterns are prepared. In addition, normal PA2-1 to normal PA2-4, super PA3-1 to super PA3-8, super PB3-1 to super PB3− are the variation patterns corresponding to the case where the decorative symbol variable display mode is “reach”. 5. Fluctuation patterns of Super PC 3-1 to Super PC 3-4 are prepared.

  FIG. 32 is an explanatory diagram illustrating a variation pattern of decorative symbols prepared in advance corresponding to the case where the variable display result is “big hit” or “small hit”. As shown in FIG. 32, in this embodiment, normal PA2-5 to normal PA2-8 and super PA4 are provided as variation patterns corresponding to the case where the decorative symbol variable display result is “big hit” or “small hit”. -1 to super PA4-8, super PA5-1 to super PA5-4, super PB4-1 to super PB4-4, super PB5-1 to super PB5-4, super PC4-1 and super PC4-2, super PD1 -1 and Super PD1-2, Super PE1-1 and Super PE1-2, Super PF1-1 to Super PF1-3, Special PG1-1 to Special PG1-4, Special PG2-1 to Special PG2-3, Special PG3 Variation patterns of -1 to special PG3-3 are prepared.

  FIG. 33 shows a configuration example of a special figure display result determination table stored in the ROM 506. In this embodiment, as the special figure display result determination table, a first special figure display result determination table 130A shown in FIG. 33A and a second special figure display result determination table 130B shown in FIG. Are prepared in advance. The first special figure display result determination table 130A has a variable display result before a fixed special symbol that is a variable display result is derived and displayed in the special figure game using the first special figure by the first special symbol display device 4A. Whether or not to control the big hit gaming state as “big hit” and whether to control the small display game status as “small hit” based on the random number value MR1 for determining the special figure display result It is a table referred to for determination. The second special figure display result determination table 130B shows the variable display result before the fixed special symbol that becomes the variable display result is derived and displayed in the special figure game using the second special figure by the second special symbol display device 4B. Whether or not to control the big hit gaming state as “big hit” and whether to control the small display game status as “small hit” based on the random number value MR1 for determining the special figure display result It is a table referred to for determination.

  In the first special figure display result determination table 130A, the random value MR1 for determining the special figure display result is determined depending on whether the probability change flag provided in the game control flag setting unit 592 shown in FIG. 45 is OFF or ON. Are allocated so as to be associated with the big hit determination value data, the small hit determination value data, and the loss determination value data. In the second special figure display result determination table 130B, the random value MR1 for special figure display result determination is associated with the big hit determination value data or the loss determination value data depending on whether the probability variation flag is OFF or ON. Is allocated as In the first special figure display result determination table 130A and the second special symbol display result determination table 130B, the table data indicating the random value MR1 for determining the special figure display result is allocated to the determination result as to whether or not to control the big hit gaming state. This is the judgment data. In each of the first special figure display result determination table 130A and the second special figure display result determination table 130B, when the probability variation flag is on, a larger number of random values MR1 than when the probability variation flag is off, Allocated to jackpot decision data. Here, when the gaming state in the pachinko gaming machine 1 is the probability variation state, the probability variation flag is turned on. On the other hand, when the gaming state in the pachinko gaming machine 1 is a normal state or a short time state, the probability variation flag is turned off. Thereby, when the gaming state in the pachinko gaming machine 1 is in a probable variation state, the probability that it will be determined that the variable display result is “big hit” and control is made to the big hit gaming state is higher than in the normal state or the short time state. . That is, in each of the first special figure display result determination table 130A and the second special figure display result determination table 130B, when the gaming state in the pachinko gaming machine 1 is in a probabilistic state, compared to when it is in a normal state or a short time state. Therefore, the determination data is allocated to the determination result as to whether or not to control the jackpot gaming state so that the probability of determining to control the jackpot gaming state increases.

  Also, in the setting example of the first special figure display result determination table 130A shown in FIG. 33A, a predetermined range of values ("30000" to "30099") is included in the random number MR1 for determining the special figure display result. It is assigned so as to be associated with the small hit judgment value data. On the other hand, in the setting example of the second special figure display result determination table 130B shown in FIG. 33B, the random value MR1 for determining the special figure display result is not associated with the small hit determination value data. Allocated. With such a setting, the variable display result is determined based on the fact that the first start condition for starting the special figure game using the first special figure by the first special symbol display device 4A is satisfied, When the variable display result is determined based on the fact that the second start condition for starting the special figure game using the second special figure by the second special symbol display device 4B is established, the variable display result is expressed as “ The ratio determined to be controlled in the small hit gaming state as “small hit” can be varied. In the second special figure display result determination table 130B as well, a value within a predetermined range different from the setting in the first special figure display result determination table 130A among the random value MR1 for special figure display result determination is a small hit determination. It may be allocated so as to be associated with value data. Alternatively, regardless of whether the first start condition or the second start condition is satisfied, the variable display result may be determined with reference to the common special figure display result determination table.

  FIG. 34 shows a configuration example of the jackpot type determination table 131 stored in the ROM 506. The jackpot type determination table 131 is used to determine the jackpot type as one of a plurality of types based on the random number MR2 for determining the jackpot type when it is determined that the variable display result is “big hit” and the game state is controlled to the big hit game state. It is a table that is referred to. In the jackpot type determination table 131, whether the value of the variation special figure designation buffer (variation special figure designation buffer value) provided in the game control buffer setting unit 595 shown in FIG. 45 is “1” or “2”. Accordingly, the random number MR2 for determining the big hit type is assigned so as to be associated with a plurality of types of big hit types such as “normal”, “first probability variation” to “third probability variation”, and “surprise probability”. Here, the variable special figure designation buffer value is set to “1” when the special figure game using the first special figure is started on the first special symbol display device 4A when the first start condition is satisfied. Thus, “2” is set when the second special symbol display device 4B starts the special figure game using the second special figure when the second start condition is satisfied. Further, the jackpot type determination table 131 corresponds to the jackpot type determined based on the random number MR2 for determining the jackpot type by using the value of the jackpot type buffer provided in the game control buffer setting unit 595 (the jackpot type buffer value). Thus, table data (setting data) for setting to any one of “0” to “4” is included.

  In the setting example of the big hit type determination table 131 shown in FIG. 34, depending on whether the variation special figure designation buffer value is “1” or “2”, the big hit type determination disturbance for the “surprise” big hit type The allocation of numerical value MR2 is different. That is, when the fluctuation special figure designation buffer value is “1”, the value in the range of “82” to “99” among the random value MR2 for determining the big hit type is assigned to the big hit type of “surprise”. When the variation special figure designation buffer value is “2”, the random value MR2 for determining the big hit type is not allocated to the big hit type of “surprise”. With such a setting, the jackpot type is determined as one of a plurality of types based on the fact that the first start condition for starting the special figure game using the first special figure by the first special symbol display device 4A is satisfied. And determining the jackpot type as one of a plurality of types based on the fact that the second start condition for starting the special figure game using the second special figure by the second special symbol display device 4B is satisfied. Thus, the rate at which the jackpot type is determined to be “surprising” can be varied. Even when the fluctuation special figure designation buffer value is “2”, the random range value MR2 for determining the big hit type has a value in a predetermined range different from that when the fluctuation special figure designation buffer value is “1”. , It may be assigned to the big hit type of “Accuracy”. As an example, when the fluctuation special figure designation buffer value is “2”, the random number MR2 for determining the big hit type has a smaller number of values than when the fluctuation special figure designation buffer value is “1”. Is set to be assigned to the “big hit” big hit type, when the second start condition is satisfied, the ratio determined to be the “big hit” big hit type compared to when the first start condition is satisfied Can be reduced.

  FIGS. 35A to 35F and FIGS. 36A to 36C show configuration examples of the big hit variation pattern type determination table stored in the ROM 506. In this embodiment, as the big hit variation pattern type determination table, the big hit variation pattern type determination tables 132A to 132F shown in FIGS. 35 (A) to (F) and the big hit variation shown in FIGS. 36 (A) to (C). Fluctuation pattern type determination tables 132G to 132I are prepared in advance. Each of the big hit variation pattern type determination tables 132A to 132I determines that the variable display result is “big hit” and is controlled to the big hit gaming state, based on the random value MR4 for determining the variable pattern type. It is a table that is referenced to determine. Each of the big hit variation pattern type determination tables 132A to 132I is, for example, whether the gaming state in the pachinko gaming machine 1 is the normal state, the probability variation state, or the short-time state according to the table selection setting as shown in FIG. Depending on the determination result of the jackpot type, it is selected as a use table. In each of the big hit variation pattern type determination tables 132A to 132I, depending on whether the determination result of the big hit type is “normal”, “first probability variation” to “third probability variation”, or “surprise probability”, the variation pattern type The random number value MR4 for determination is normal CA3-1, super CA3-2 to super CA3-8, super CB3-1 to super CB3-5, special CA4-1, special CA4-2, special CB4-1, special CB4. -2, Special CC4-1, Special CC4-2, and so on.

  Here, as an example, focusing on the case where the gaming state in the pachinko gaming machine 1 is a normal state, the big hit shown in FIG. 35 (A) used when the big hit type is “normal” or “third probability variation”. The normal variation pattern type determination table 132A and the big hit variation pattern type determination table 132B shown in FIG. 35B used when the big hit type is “first probability change” include the normal CA 3-1 and the super CA 3-2. The allocation of the random value MR4 for determining the variation pattern type for the variation pattern types is different. In addition, in the big hit variation pattern type determination table 132A, the random value MR4 for determining the variation pattern type is assigned to the variation pattern type of the super CA3-3, while in the big hit variation pattern type determination table 132B, the super CA3. The random pattern value MR4 for determining the variation pattern type is not assigned to the variation pattern type -3. On the other hand, in the big hit variation pattern type determination table 132A, the random value MR4 for determining the variation pattern type is not assigned to the variation pattern type of the super CA 3-4, whereas in the big hit variation pattern type determination table 132B, the super CA3 The random pattern value MR4 for determining the variation pattern type is assigned to the variation pattern type -4. In this way, paying attention to the case where the gaming state in the pachinko gaming machine 1 is one of the normal state, the probability variation state, and the short-time state, the variation pattern type determination table for big hit that is selected according to the big hit type in the gaming state 132A to 132D (selected in the normal state), big hit variation pattern type determination tables 132E to 132H (selected in the probability variation state), big hit variation pattern type determination tables 132A to 132C, 132I (in the short time state) When the selection) is compared with each other, the allocation of the random value MR4 for determining the variation pattern type for each variation pattern type is different according to the jackpot type, and the variation pattern type is different for the variation pattern type depending on the jackpot type. A random number value MR4 for determination is allocated. As a result, it is possible to determine different variation pattern types according to the determination result of whether the big hit type is a plurality of types, and it is possible to vary the ratio determined for the same variation pattern type.

  In particular, in the big hit variation pattern type determination table 132D, 132H, 132I used when the big hit type is “surprise”, for example, special CA4-1, special CA4-2, special CB4-1, special CB4-2, special When the jackpot type is other than “surprising”, such as CC4-1 or special CC4-2, the random number value for determining the variation pattern type for the variation pattern type to which the random value MR4 for determining the variation pattern type is not allocated. MR4 is allocated. As a result, when the variable display result is “big hit” and the big hit type is “surprise”, when the control is set to the two round big hit state, the variation pattern type is determined to be different from the case of controlling to the 15 round big hit state. can do.

  As another example, focusing on the case where the jackpot type is determined to be “normal”, the jackpot shown in FIG. 35 (A) used when the gaming state in the pachinko gaming machine 1 is a normal state or a short-time state. The fluctuation pattern type determination table 132A for use and the big hit change pattern type determination table 132E shown in FIG. 35 (E) used when the gaming state is a probable change state, change patterns of normal CA3-1 and super CA3-2 The allocation of the random pattern MR4 for determining the variation pattern type for the type is different. In addition, in the big hit variation pattern type determination table 132A, the random value MR4 for determining the variation pattern type is assigned to the variation pattern type of the super CA3-3, while in the big hit variation pattern type determination table 132E, the super CA3. The random pattern value MR4 for determining the variation pattern type is not assigned to the variation pattern type -3. Thus, paying attention to the case where the big hit type is determined as one of “normal”, “first probability variation” to “third probability variation”, or “surprise probability”, it is selected according to the gaming state in the pachinko gaming machine 1 Jackpot variation pattern type determination tables 132A and 132E (selected when “normal” or “third probability variation”), jackpot variation pattern type determination tables 132B and 132F (selected when “first probability variation”), When the big hit variation pattern type determination tables 132C and 132G (selected when “second probability variation”) and the big hit variation pattern type determination tables 132D, 132H and 132I (selected when “surprise probability”) are compared with each other, pachinko games For determining the variation pattern type for each variation pattern type depending on whether the gaming state in the machine 1 is a normal state, a short-time state or a probable variation state Have different allocation of the random number values MR4, also sometimes random value MR4 for variation pattern type determination for different variation pattern type according to the playing state is allocated. This makes it possible to determine different variation pattern types depending on whether the gaming state in the pachinko gaming machine 1 is a normal state, a short-time state or a probable variation state, and is determined to be the same variation pattern type. The ratio can be varied.

  FIGS. 37A to 37C show a configuration example of the small hit variation pattern type determination table stored in the ROM 506. In this embodiment, small hit variation pattern type determination tables 133A to 133C shown in FIGS. 37A to 37C are prepared in advance as small hit variation pattern type determination tables. When it is determined that the small hit variation pattern type determination tables 133A to 133C are set to the small hit gaming state with the variable display result as “small hit”, the variation pattern type is changed to the random value MR4 for determining the variation pattern type. It is a table that is referred to for making a determination based on In each of the small hit variation pattern type determination tables 133A to 133C, for example, according to the table selection setting as shown in FIG. 37D, whether the gaming state in the pachinko gaming machine 1 is the normal state, the probability variation state, or the short-time state Is selected as a use table. In each of the small hit variation pattern type determination tables 133A to 133C, the random number MR4 for determining the variation pattern type corresponds to one of a plurality of variation pattern types such as special CA4-1, special CB4-1, and special CC4-1. Allocated to be attached.

  Here, the variation pattern type of the special CA4-1 to which the random value MR4 for variation pattern type determination is assigned in the variation pattern type determination table 133A for small hits shown in FIG. 37A is shown in FIG. The random number MR4 for determining the variation pattern type is also allocated in the big hit variation pattern type determination table 132D shown in FIG. In the variation pattern type of the special CB4-1 to which the random value MR4 for determining the variation pattern type is assigned in the variation pattern type determination table 133B for small hits shown in FIG. 37B, the big hit shown in FIG. Also in the variation pattern type determination table 132H, a random value MR4 for determining the variation pattern type is allocated. In the variation pattern type of the special CC4-1 to which the random value MR4 for variation pattern type determination is assigned in the variation pattern type determination table 133C for small hits shown in FIG. 37C, the big hit shown in FIG. Also in the change pattern type determination table 132I, a random value MR4 for determining the change pattern type is assigned. As described above, the variation pattern types of the special CA 4-1, the special CB 4-1, and the special CC 4-1 are common variations in the case where the big hit type is “surprise” and the variable display result is “small hit”. It is a pattern type. That is, the big hit variation pattern type determination table 132D shown in FIG. 35 (D) and the big hit variation pattern type determination table 132H shown in FIG. Big hit variation pattern type determination table 132I shown in FIG. 37C, the small hit variation pattern type determination table 133A shown in FIG. 37A used when the variable display result is “small hit”, and FIG. The small hit variation pattern type determination table 133B shown in FIG. 37 and the small hit variation pattern type determination table 133C shown in FIG. 37C are set to include common variation pattern types.

  38A to 38C show configuration examples of reach determination tables stored in the ROM 506. FIG. In this embodiment, reach determination tables 134A to 134C shown in FIGS. 38A to 38C are prepared in advance as reach determination tables. Each of the reach determination tables 134A to 134C determines whether or not to display the decorative symbols in the reach display state when it is determined that the variable display result is “losing” and not controlled to the big hit game state or the small hit game state. It is a table referred in order to determine based on the random number value MR3 for reach determination. Each reach determination table 134A to 134C is used depending on whether the gaming state in the pachinko gaming machine 1 is the normal state, the probability variation state, or the short-time state, for example, according to the table selection setting as shown in FIG. Selected as a table. In each of the reach determination tables 134A to 134C, the reach determination random value MR3 is determined as non-reach HA1-1 to non-reach HA1-5, non-reach HB1-1, non-reach HB1-2, non-reach HC1-1, non-reach. The determination result that the variable display mode such as HC1-2 is “non-reach”, and the variable display mode such as reach HA2-1 to reach HA2-3, reach HB2-1, reach HC2-1 is set to “reach” Are allocated so as to be associated with one of the determination results.

  Here, in the setting of the reach determination table 134A shown in FIG. 38A, for example, “1” to “204” among the random numbers MR3 for reach determination corresponding to the case where the total reserved storage number is “0”. The value in the range “205” to “239” is assigned to the determination result of the reach HA 2-1. Corresponding to the case where the total reserved storage number is “1”, among the random number values MR3 for reach determination, “1” to “217”, which are larger than the number of random number values allocated to the non-reach HA 1-1. Range values are assigned to the non-reach HA1-2 decision results. Further, in response to the case where the total number of reserved memories is “2”, “1” which is larger than the number of random numbers assigned to the non-reach HA 1-1 and the non-reach HA 1-2 among the random numbers MR3 for reach determination. A value in a range of “-220” is assigned to the determination result of non-reach HA1-3. Corresponding to the case where the total number of reserved memories is “3” or “4”, “1” to “230”, which is larger than the number of determination values assigned to each of the non-reach HA 1-1 to non-reach HA 1-3. Is assigned to the determination result of non-reach HA1-4. Corresponding to the case where the total pending storage number is any one of “5” to “8”, “1” to “1”, which is larger than the number of determination values assigned to each of the non-reach HA 1-1 to non-reach HA 1-4. The determination value in the range of “233” is assigned to the determination result of non-reach HA 1-5. With such a setting, when the total number of reserved memories is equal to or greater than a predetermined number (eg, “3”), the ratio at which it is determined that the variable display mode is “reach” compared to when the total number is less than the predetermined number Becomes lower. If the average special figure fluctuation time in the fluctuation pattern corresponding to “non-reach” is set to be shorter than the average special figure fluctuation time in the fluctuation pattern corresponding to “reach”, the total When the number of reserved memories is equal to or greater than the predetermined number, the average special figure fluctuation time can be shortened compared to when the number is less than the predetermined number.

  FIGS. 39A to 39C show a configuration example of the reach variation pattern type determination table stored in the ROM 506. In this embodiment, reach variation pattern type determination tables 135A to 135C shown in FIGS. 39A to 39C are prepared in advance as reach variation pattern type determination tables. The reach variation pattern type determination tables 135A to 135C each determine the variation pattern type for determining the variation pattern type when it is determined that the variable display result is “lost” and the variable display mode is “reach”. It is a table referred in order to determine based on the random value MR4. Each of the reach variation pattern type determination tables 135A to 135C has a variable display mode such as reach HA2-1 to reach HA2-3, reach HB2-1, reach HC2-1, etc. Selected as a usage table. That is, the reach variation pattern type determination table 135A is selected as a usage table according to the determination results of the reach HA2-1 to the reach HA2-3, and the reach variation pattern type determination table 135B according to the determination result of the reach HB2-1. Is selected as the usage table, and the variation pattern type determination table for reach 135C is selected as the usage table in accordance with the determination result of the reach HC2-1. In each of the reach variation pattern type determination tables 135A to 135C, the determination result indicating that the variable display mode is “reach” is any one of reach HA2-1 to reach HA2-3, reach HB2-1, and reach HC2-1. Accordingly, the random value MR4 for determining the variation pattern type is one of a plurality of types of variation pattern types such as normal CA2-1, super CA2-2, super CA2-3, super CB2-1, super CB2-2. It is allocated so that it may correspond.

  Here, in the setting example of the reach variation pattern type determination table 135A shown in FIG. 39A, for example, “0” of the random value MR4 for determining the variation pattern type corresponding to the determination result of the reach HA2-1. A value in the range of “128” is assigned to the variation pattern type of normal CA2-1, while other random values are assigned to the variation pattern types of super CA2-2 and super CA2-3. Corresponding to the determination result of reach HA2-2, a value in the range of “0” to “170” among the random number MR4 for determining the variation pattern type is assigned to the variation pattern type of normal CA2-1. Further, the value in the range of “0” to “182” of the random value MR4 for determining the variation pattern type is assigned to the variation pattern type of the normal CA2-1 in accordance with the determination result of the reach HA2-3. As the determination result of the reach HA 2-1, the random determination value MR 3 for reach determination is assigned in accordance with the setting of the reach determination table 134 A shown in FIG. ing. As the determination result of reach HA2-2, the random number value MR3 for reach determination is assigned in correspondence with the case where the total number of reserved storage is “1” or “2”. The determination result of reach HA2-3 indicates that the total pending storage number is either “3” or “4” or any of “5” to “8”. A random value MR3 is allocated. With these settings, a normal CA 2-1 in which a “normal” reach effect (normal reach) is executed when the total number of reserved memories is equal to or greater than a predetermined number (eg, “1”), compared to when the total number is less than the predetermined number. The ratio determined for the variation pattern type becomes higher. And the average special figure fluctuation time in the fluctuation pattern that executes the “normal” reach production is set to be shorter than the average special figure fluctuation time in the fluctuation pattern that executes the reach production other than “normal”. If so, when the total number of reserved memories is greater than or equal to the predetermined number, the average special figure variation time can be shortened as compared to when the total number is less than the predetermined number.

  40A to 40C show configuration examples of a non-reach variation pattern type determination table stored in the ROM 506. FIG. In this embodiment, non-reach variation pattern type determination tables 136A to 136C shown in FIGS. 40A to 40C are prepared in advance as non-reach variation pattern type determination tables. The non-reach variation pattern type determination tables 136A to 136C each determine the variation pattern type when the variable display result is “lost” and the variable display mode is “non-reach”. It is the table referred in order to determine based on random number value MR4 for. The non-reach variation pattern type determination tables 136A to 136C include non-reach HA1-1 to non-reach HA1-5, non-reach HB1-1, non-reach HB1-2, non-reach HC1-1, and non-reach HC1-2. It is selected as a usage table according to the determination result that the variable display mode is “non-reach”. That is, the non-reach variation pattern type determination table 136A is selected as a use table in accordance with the determination results of the non-reach HA1-1 to non-reach HA 1-5, and the determination results of the non-reach HB1-1 and non-reach HB1-2. Accordingly, the non-reach variation pattern type determination table 136B is selected as the use table, and the non-reach variation pattern type determination table 136C is selected as the use table according to the determination results of the non-reach HC1-1 and non-reach HC1-2. The In the non-reach variation pattern type determination tables 136A to 136C, the determination results indicating that the variable display mode is “non-reach” are non-reach HA1-1 to non-reach HA1-5, non-reach HB1-1, and non-reach HB1. -2, non-reach HC1-1, non-reach HC1-2, the random value MR4 for determining the variation pattern type is determined as non-reach CA1-1 to non-reach CA1-4, non-reach CB1-. 1 to non-reach CB1-3 and non-reach CC1-1 to non-reach CC1-3 so as to be associated with any one of a plurality of types of variation patterns.

  41, 42A, and 42B show configuration examples of the hit variation pattern determination table stored in the ROM 506. FIG. In this embodiment, the hit fluctuation pattern determination table 137A shown in FIG. 41, the hit fluctuation pattern determination table 137B shown in FIG. 42A, and the hit fluctuation pattern shown in FIG. A determination table 137C is prepared in advance. Each of the hit variation pattern determination tables 137A to 137C determines the variation pattern according to the determination result of the big hit type or the variation pattern type when it is determined that the variable display result is “big hit” or “small hit”. This is a table that is referred to for determination based on a random value MR5 for determining a variation pattern. Each of the variation pattern determination tables 137A to 137C is selected as a use table according to the determination result of the variation pattern type. That is, the hit variation pattern determination table 137A is selected as the use table in accordance with the determination result that the variation pattern type is either normal CA3-1 or super CA3-2 to super CA3-8, and the variation pattern type is super CB3. -1 to Super CB3-5, the hit variation pattern determination table 137B is selected as a use table in accordance with the determination result, and the variation pattern type is special CA4-1, special CA4-2, special CB4-1, The hit variation pattern determination table 137C is selected as the use table in accordance with the determination result indicating that any one of the special CB4-2, the special CC4-1, and the special CC4-2 is used. In each of the winning variation pattern determination tables 137A to 137C, a random number MR5 for determining the variation pattern according to the variation pattern type includes a plurality of cases corresponding to the case where the decorative symbol variable display result is “big hit” or “small hit”. It is allocated so as to be associated with one of the types of variation patterns.

  43 and 44 show a configuration example of the loss variation pattern determination table stored in the ROM 506. FIG. In this embodiment, a loss variation pattern determination table 138A shown in FIG. 43 and a loss variation pattern determination table 138B shown in FIG. 44 are prepared in advance as loss variation pattern determination tables. Each of the loss variation pattern determination tables 138A and 138B determines the variation pattern according to the reach determination result or the variation pattern type determination result when the variable display result is determined to be “losing”. It is the table referred in order to determine based on random number value MR5 for use. Each loss variation pattern determination table 138A, 138B is selected as a usage table in accordance with the determination result of the variation pattern type. That is, in the determination result that the variation pattern type is any one of non-reach CA1-1 to non-reach CA1-4, non-reach CB1-1 to non-reach CB1-3, non-reach CC1-1 to non-reach CC1-3. Accordingly, the loss variation pattern determination table 138A is selected as a usage table, and the variation pattern type is determined to be one of normal CA2-1, super CA2-2, super CA2-3, super CB2-1, super CB2-2. The loss variation pattern determination table 138B is selected as a usage table according to the result. In the loss variation pattern determination table 138A, the random value MR5 for determining the variation pattern corresponds to the case where the variable pattern display result of the decorative pattern is “lost” and the variable display mode is “non-reach” according to the variation pattern type. Allocation is performed so as to be associated with one of a plurality of types of variation patterns. In the loss variation pattern determination table 138B, according to the variation pattern type, the random number MR5 for determining the variation pattern includes a plurality of cases corresponding to the case where the variable display result of the decorative symbol is “lost” and the variable display mode is “reach”. It is allocated so as to be associated with one of the types of variation patterns.

  Here, in the setting example of the loss variation pattern determination table 138A shown in FIG. 44, the non-reach PA1-4 to the non-reach variation pattern types such as the non-reach CA1-4 and the non-reach CC1-2. A random pattern MR5 for determining a variation pattern is assigned to a variation pattern for executing a specific effect such as non-reach PA1-7. Also, corresponding to the variation pattern type of non-reach CB1-3, a specific effect in which the value in the range of “0” to “100” among the random value MR5 for determining the variation pattern is “end of development chance eyes” is executed. Assigned to the fluctuation pattern of non-reach PA1-7. With such a setting, the variation pattern is set to the non-reach PA1 corresponding to the determination result that the variable display result is “losing” and the determination result that the variable display state of the decorative symbol is “non-reach”. -4 to non-reach PA 1-7, and a rendering operation that is a specific rendering can be executed.

  For the variation pattern type of non-reach CA1-4, in non-reach variation pattern type variation pattern 136A shown in FIG. 40A, among the random value MR4 for determining the variation pattern type, non-reach HA1. A value in the range of “217” to “241” is allocated corresponding to the determination result of −1, and a value in the range of “230” to “241” is allocated corresponding to the determination result of non-reach HA1-2. A value in the range of “231” to “241” is assigned corresponding to the determination result of non-reach HA1-3, and corresponds to each of the determination result of non-reach HA1-4 and the determination result of non-reach HA1-5. A value in the range of “237” to “241” is assigned. Here, for the determination result of non-reach HA1-1, in the reach determination table 134A shown in FIG. 38A, the reach determination disturbance corresponds to the case where the total number of reserved storage is “0”. A value in the range of “0” to “204” is assigned to the numerical value MR3. For the determination result of non-reach HA1-2, in the reach determination table 134A, the total reserved storage number corresponds to “1”, and the range of “0” to “217” of the random number MR3 for reach determination Value is allocated. For the determination result of non-reach HA1-3, in the reach determination table 134A, the total reserved storage number corresponds to “2”, and the range of “0” to “220” among the random numbers MR3 for reach determination Value is allocated. For the determination result of the non-reach HA1-4, in the reach determination table 134A, the total number of reserved memories corresponds to “3” and “4”, and “0” to “0” among the random numbers MR3 for reach determination. A value in the range of “230” is allocated. For the determination result of non-reach HA1-5, in the reach determination table 134A, the total number of reserved memories corresponds to “5” to “8”, and among the random numbers MR3 for reach determination, “0” to “ A value in the range of “233” is allocated. Therefore, when the total number of reserved memories is “1” or “2”, the ratio determined as the variation pattern type of non-reach CA1-4 is larger than that when the total number of reserved memories is “0”. Lower. Further, when the total number of reserved memories is “3”, “4” or “5” to “8”, the total number of reserved memories is “0”, or “1” or “2”. Compared with the case of "", the ratio determined as the variation pattern type of non-reach CA1-4 is low.

  In the example of the fluctuation pattern shown in FIG. 31, the special figure fluctuation time in the fluctuation pattern of the non-reach PA1-1 in which the specific effect is not executed is 5.75 seconds, and the special figure fluctuation time in the fluctuation pattern of the non-reach PA1-2. 3.75 seconds, and the special figure fluctuation time in the fluctuation pattern of non-reach PA1-3 is 1.50 seconds. On the other hand, the special figure fluctuation time in the fluctuation pattern of the non-reach PA1-4 in which the “slip” specific effect is executed is 8.25 seconds, and the non-reach PA1 in which the “pseudo-continuous” specific effect is executed. The special figure fluctuation time in the fluctuation pattern of −5 is 16.70 seconds, the special figure fluctuation time in the fluctuation pattern of the non-reach PA 1-6 in which the specific effect of “Intro” is executed is 7.75 seconds, The special figure fluctuation time in the fluctuation pattern of the non-reach PA 1-7 in which the specific effect “end of development opportunity end” is executed is 9.25 seconds. That is, the special figure change time in the variation pattern in which the specific effect is executed corresponding to “non-reach” is longer than the special figure change time in the change pattern in which the specific effect is not executed. When the total number of reserved memories is “1” or more, the ratio determined as the variation pattern type of the non-reach CA 1-4 that executes the specific effect is lower than when it is “0”. In addition, when the total number of reserved memories is “3” or more, the ratio determined as the variation pattern type of non-reach CA1-4 is lower than that when it is less than “3”. Thus, when the total number of reserved memories is greater than or equal to the predetermined number, the average special figure fluctuation time can be shortened as compared to when the total number is less than the predetermined number.

  In the RAM 507 provided in the game control microcomputer 100, for example, a game control data holding area as shown in FIG. 45 is provided as an area for holding various data used for controlling the progress of the game in the pachinko gaming machine 1. 590 is provided. The game control data holding area 590 shown in FIG. 45 includes a first special figure hold storage unit 591A, a second special figure hold storage unit 591B, a start data storage unit 591C, a game control flag setting unit 592, and a game control. A timer setting unit 593, a game control counter setting unit 594, and a game control buffer setting unit 595 are provided. Further, as the RAM 507, for example, a DRAM (Dynamic RAM) is used, and a refresh operation for maintaining the stored data content is required. The CPU 505 has a built-in refresh register for performing this refresh operation. For example, the refresh register consists of 8 bits, and the lower 7 bits are automatically incremented each time the CPU 505 fetches an instruction from the ROM 506. Accordingly, the stored value in the refresh register is updated every execution time of one instruction in the CPU 505.

  The first special figure storage unit 591A is a special game in which a game ball wins a first starting winning opening formed by the normal winning ball apparatus 6A and the first starting condition is satisfied but the first starting condition is not satisfied. The hold data of (a special game using the first special figure by the first special symbol display device 4A) is stored. As an example, the first special figure holding storage unit 591A associates with the holding numbers in the order of winning in the first start winning opening, and the special figure display result determination acquired by the CPU 505 based on the establishment of the first starting condition by the winning. The numerical data indicating the random number value MR1 for use and the numerical data indicating the random number value MR2 for determining the big hit type are reserved data and stored until the number reaches a predetermined upper limit value (eg, “4”).

  The second special figure holding storage unit 591B is a special figure in which the game ball is won at the second start winning opening formed by the normal variable winning ball apparatus 6B and the second start condition is satisfied but the second start condition is not satisfied. Hold data of a game (a special game using the second special figure by the second special symbol display device 4B) is stored. As an example, the second special figure holding storage unit 591B associates with the holding number in the order of winning in the second start winning opening, and the special figure display result determination acquired by the CPU 505 based on the establishment of the second starting condition by the winning. The numerical data indicating the random number value MR1 for use and the numerical data indicating the random number value MR2 for determining the big hit type are reserved data and stored until the number reaches a predetermined upper limit value (eg, “4”).

  The start data storage unit 591C stores start data indicating which of the first start winning opening and the second starting winning opening the game ball has won, so that the order of winning of each game ball can be specified. As an example, an area corresponding to the upper limit value (for example, “8”) of the total reserved storage number is secured in the start data storage unit 591C, and “first” start data corresponding to winning in the first start winning opening is obtained. Alternatively, the “second” start data corresponding to the winning at the second start winning opening is stored in association with the holding number according to the winning order of each game ball.

  The first special figure reservation storage unit 591A, the second special figure reservation storage unit 591B, and the start data storage unit 591C may be provided separately, or a storage area combining them may be provided. . As an example, as shown in FIG. 46, a storage area including eight areas obtained by combining the start data storage area and the random value storage area may be provided. In the configuration shown in FIG. 46, continuous addresses in the RAM 507 may be assigned to the start data storage area and the random value storage area.

  In the configuration shown in FIG. 46, for example, the start data is set in the start data storage area that is the head of the empty area by updating the value of the pointer that specifies the address of the data storage destination based on the total number of reserved storage. At this time, in order to specify the head of the free space, for example, a value obtained by adding 1 to the value obtained by multiplying the total number of reserved memories by the number of data in one piece of reserved data (numerical data indicating start data and random number values) (start data storage) A value obtained by adding one area) is specified as an address offset value. The pointer value may be updated in accordance with the offset value thus specified. In the configuration shown in FIG. 46, a total of two data storage areas, one start data storage area and one random number value storage area, are provided corresponding to one reserved data. Therefore, a value obtained by adding 1 to a value obtained by doubling the total number of reserved memories is specified as an address offset value. As an example, when the total number of reserved memories is “3”, “+7” (a value obtained by doubling the total number of reserved memories “3” and adding 1) is specified and corresponds to this offset value. The start data is set in the start data storage area. If a total of three data storage areas including one start-up data storage area and two random number value storage areas are provided corresponding to one reserved data, the total number of reserved memories is tripled. A value obtained by adding 1 (a value obtained by adding one start data storage area) may be specified as the offset value of the address.

  Further, when the initial position of the pointer for designating the data storage destination address is set as the start data storage area corresponding to the hold number “1” shown in FIG. 46, the number of data in one hold data is set as the total hold storage number. The multiplied value may be specified as the offset value of the address. For example, in the configuration shown in FIG. 46, a value obtained by doubling the total number of reserved storages may be specified as the address offset value. When a total of three data storage areas including one start-up data storage area and two random number value storage areas are provided corresponding to one hold data, a value obtained by multiplying the total hold storage number by three is obtained. The address offset value may be specified. After the start data is set in the start data storage area in this way, 1 is added to the value of the pointer specifying the address, and numerical data indicating the random number value is stored in the random value storage area of the address pointed to by the pointer after the addition. That's fine.

  The game control flag setting unit 592 is provided with a plurality of types of flags that can be updated in accordance with the progress of the game in the pachinko gaming machine 1. For example, the game control flag setting unit 592 stores data indicating the flag value and data indicating the on state or the off state for each of the plurality of types of flags. In this embodiment, the game control flag setting unit 592 is provided with a special figure process flag, a common figure process flag, a big hit flag, a small hit flag, a probability change flag, a short time flag, and the like.

  The special figure process flag indicates the progress of the special figure game using the first special figure by the first special symbol display device 4A, the progress of the special figure game using the second special figure by the second special symbol display device 4B, and the like. In step S95 of FIG. 51 executed for control and the special symbol process shown in FIG. 53, which process is to be selected and executed is instructed. The normal symbol process flag is selected and executed in the normal symbol process shown in step S96 of FIG. 51, which is executed to control the progress of the normal symbol game using the normal symbol by the normal symbol indicator 20. Tell what to do.

  The big hit flag is set to an on state corresponding to the determination result that the variable display result is “big hit” when the special figure game is started. On the other hand, it is cleared and turned off in response to, for example, that the jackpot symbol is stopped and displayed as a confirmed special symbol in the special symbol game. The small hit flag is set to an on state corresponding to the determination result that the variable display result is “small hit” when the special figure game is started. On the other hand, it is cleared and turned off in response to, for example, the small hit symbol being stopped and displayed as the confirmed special symbol in the special symbol game. The probability change flag is set to an on state in response to the gaming state in the pachinko gaming machine 1 being controlled to a probability change state, while being cleared to an off state in response to the end of the probability change state. . The time reduction flag is set to the on state in response to the gaming state in the pachinko gaming machine 1 being controlled to the time reduction state, and is cleared to the off state in response to the completion of the time reduction state. .

  The game control timer setting unit 593 is provided with various timers used for controlling the progress of the game in the pachinko gaming machine 1. For example, the game control timer setting unit 593 stores data indicating timer values in each of a plurality of types of timers. In this embodiment, the game control timer setting unit 593 is provided with a game control process timer, a special figure variation timer, a common figure variation timer, and the like.

  The game control process timer is for measuring, for example, the time for controlling the progress of the big hit game state or the small hit game state on the main board 11 side. As a specific example, the game control process timer stores, as a game control process timer value, data indicating a timer value corresponding to the time measured to control the progress of the big hit game state or the small hit game state. It is used as a down counter that counts down automatically. Alternatively, the game control process timer is used as an up-counter that stores data indicating a timer value corresponding to an elapsed time from a predetermined time point, such as a big hit game state or a small hit game state start point, and periodically counts up. May be.

  The special figure variation timer is for measuring, on the main board 11 side, a time for controlling the progress of the special figure game such as a special figure variation time which is the execution time of the special figure game. As a specific example, the special figure variation timer stores data indicating a timer value corresponding to the time measured in order to control the progress of the special figure game as a special figure fluctuation timer value and periodically counts down. Used as a counter. Alternatively, the special figure variation timer may be used as an up counter that stores data indicating a timer value corresponding to the elapsed time from the start time of the special figure game and periodically counts up.

  The universal map change timer is for measuring, on the main board 11 side, a time for controlling the progress of the normal game, such as the normal map change time which is the execution time of the normal game. As a specific example, the normal fluctuation timer stores data indicating a timer value corresponding to the time measured to control the progress of the normal figure game as a normal fluctuation timer value, and periodically counts down. Used as a counter. Alternatively, the normal time variation timer may be used as an up counter that stores data indicating a timer value corresponding to the elapsed time from the start time of the normal time game and periodically counts up.

  The game control counter setting unit 594 is provided with a plurality of types of counters for counting the count values used for controlling the progress of the game in the pachinko gaming machine 1. For example, the game control counter setting unit 594 stores data indicating the count value in each of a plurality of types of counters. In this embodiment, the game control counter setting unit 594 includes a random counter, a first reserved memory number counter, a second reserved memory number counter, a total reserved memory number counter, a round number counter, a first start winning determination counter, a second A start winning determination counter is provided.

  The random counter of the game control counter setting unit 594 counts a part of numerical data indicating a random value used for controlling the progress of the game separately from the random number circuit 509 so that the CPU 505 can be updated by software. belongs to. For example, the random counter of the game control counter setting unit 594 stores numerical data indicating the random number values MR1 to MR6 as random count values. As for the random number values MR2 to MR5, numerical data indicating each random number value is updated regularly or irregularly according to the execution of software by the CPU 505.

  The round number counter is for counting the number of rounds executed in the big hit gaming state. For example, in the round number counter, data indicating a count initial value “1” at the start of the big hit gaming state is set as the round number count value. When one round is completed and the next round is started, the round count value is incremented by 1 and updated. The round number counter may also count the number of executions of the variable winning operation in the small hit gaming state.

  The first start winning determination counter is counted every time a timer interrupt for game control occurs when the first start winning signal SS1 as a detection signal transmitted from the first start opening switch 22A is in an ON state. Used as an up-counter that is up. When the first start winning determination count value that is the value of the first start winning determination counter reaches a predetermined winning determination value (for example, “2”), the game ball that has entered the first start winning opening is made effective. It is determined that it has been detected.

  The second start winning determination counter counts every time a timer interrupt for game control occurs when the second start winning signal SS2 as a detection signal transmitted from the second start opening switch 22B is ON. Used as an up-counter that is up. When the second start winning determination count value, which is the value of the second start winning determination counter, reaches a predetermined winning determination value (for example, “2”), the game ball that has entered the second start winning opening is made effective. It is determined that it has been detected.

  The game control buffer setting unit 595 is provided with various buffers that temporarily store data used for controlling the progress of the game in the pachinko gaming machine 1. For example, the game control buffer setting unit 595 stores data indicating buffer values in each of a plurality of types of buffers. In this embodiment, the game control buffer setting unit 595 is provided with a transmission command buffer, a variable special figure designation buffer, a big hit type buffer, a start port buffer, and the like.

  The transmission command buffer is used to temporarily store setting data for transmitting a control command from the main board 11 to the sub-side control board. For example, the transmission command buffer is configured to include a plurality of (for example, “12”) buffer areas, and setting data indicating storage addresses in the ROM 506 of the command table corresponding to the control command to be transmitted is stored in each buffer area. The In addition, a buffer area where setting data is written and read in the transmission command buffer may be specified by a transmission command pointer or the like, and a plurality of buffer areas may be used as a ring buffer.

  The variable special symbol designation buffer includes a special symbol game using the first special symbol by the first special symbol display device 4A and a special symbol game using the second special symbol by the second special symbol display device 4B. A buffer value indicating whether the special figure game is executed is stored. As an example, the value of the fluctuation special figure designation buffer (fluctuation special figure designation buffer value) is “1” in response to the execution of the special figure game using the first special figure by the first special symbol display device 4A. Set to Further, the variable special figure designation buffer value is set to “2” in response to the execution of the special figure game using the second special figure by the second special symbol display device 4B. Then, the variable special figure designation buffer value is set to “0” in response to the completion of the special figure game.

  In the jackpot type buffer, the variable display mode of the decorative symbol when the variable display result is “big hit” is a plurality of types of jackpot types such as “normal”, “first probability variation” to “third probability variation”, and “surprise probability”. The buffer value corresponding to the determination result as one of the above is stored. As an example, based on the setting in the jackpot type determination table 131 as shown in FIG. 34, when the jackpot type is “normal”, the value of the jackpot type buffer (hit type buffer value) is set to “0”, and the jackpot type When the type is “first probability variation”, the big hit type buffer value is set to “1”, when the big hit type is “second probability variation”, the big hit type buffer value is set to “2”, and the big hit type is In the case of “third probability variation”, the big hit type buffer value is set to “3”, and when the big hit type is “surprise”, the big hit type buffer value is set to “4”.

  A game ball that has entered any of the starting winning ports is effective in the starting port buffer, among the first starting winning port formed by the normal winning ball device 6A and the second starting winning port formed by the normal variable winning ball device 6B. The buffer value corresponding to the detected value is stored as the start port buffer value. As an example, when a game ball that has entered the first start winning opening is effectively detected by the first start opening switch 22A, the start buffer value is set to “1”, and a game ball that has entered the second start winning opening. Is effectively detected by the second start port switch 22B, the start port buffer value is set to "2".

  As shown in FIG. 2, an effect control microcomputer 120 is mounted on the effect control board 12. The effect control board 12 includes a VDP (Video Display Processor) 121 that generates image data in response to a drawing command from the effect control microcomputer 120, the image display device 5, speakers 8L and 8R, and a game effect lamp 9. An effect data memory 122 for storing various data used for controlling the effect operation by the effect device such as a light emitter is also mounted. The effect control microcomputer 120 is a one-chip microcomputer having the same configuration as the game control microcomputer 100, for example, and includes an external bus interface, a clock circuit, a unique information storage circuit, a reset / interrupt controller, a CPU, a ROM, and a RAM. , CTC, random number circuit, PIP, serial communication circuit, address decoding circuit, and the like. Further, all or part of the configuration of the effect control microcomputer 120 may be different from the configuration of the game control microcomputer 100. As an example, in the case where all the numerical data serving as random number values used on the side of the effect control board 12 are updated by software, the effect control microcomputer 120 may not include the random number circuit. Further, the serial communication circuit only needs to be provided with a receiving circuit capable of receiving at least an effect control command transmitted from the main board 11, and data and commands for the image display device 5, the audio control board 13, and the lamp control board 14 are provided. Signal transmission may be performed using an external bus interface or an address decoding circuit.

  In the effect control microcomputer 120, the CPU executes the effect control program read from the ROM, thereby executing a process for controlling the effect operation by the effect electrical component (effect device). At this time, a fixed data reading operation in which the CPU reads fixed data from the ROM, a variable data writing operation in which the CPU writes various fluctuation data in the RAM and temporarily stores the data, and various fluctuation data in which the CPU is temporarily stored in the RAM. Fluctuating data reading operation for reading out, receiving operation for receiving various signals input from the outside of the production control microcomputer 120 via the external bus interface, PIP, serial communication circuit, etc., CPU for external bus interface, serial communication circuit, etc. A transmission operation for outputting various signals to the outside of the effect control microcomputer 120 is also performed. It should be noted that the one-chip microcomputer constituting the production control microcomputer 120 only needs to incorporate a RAM in addition to at least the CPU, and the ROM, random number circuit, PIP, and the like are incorporated even if they are externally attached. May be used.

  In this embodiment, a control signal, which is an effect control command transmitted from the main board 11 via the relay board 18, is supplied to a predetermined serial receiving terminal provided in the effect control microcomputer 120, and the effect control microcomputer. The data is received by a serial communication circuit built in 120.

  A scaler circuit for converting the resolution in the image data may be provided between the effect control board 12 and the image display device 5. In this case, the image data generated by the VDP 121 mounted on the effect control board 12 according to the drawing command from the effect control microcomputer 120 is supplied to the image display device 5 after the resolution is converted by the scaler circuit. . As a specific example, the scaler circuit inputs the image data with the first resolution generated by the VDP and performs the following processing on one or both of the vertical direction and the horizontal direction. The converted image data is converted to a second resolution different from the first resolution.

  For example, when converting the resolution in the vertical direction, after performing upsampling at a first sample rate along the vertical direction of the input image data, a filtering process using a filter (for example, an FIR filter) prepared in advance. Apply. Thereafter, downsampling may be performed at a second sample rate corresponding to a predetermined scaling coefficient along the vertical direction. When converting the resolution in the horizontal direction, upsampling, filtering, and downsampling similar to those in the vertical direction may be performed along the horizontal direction of the input image data. As a specific example, when image data in VGA mode (640 × 480 pixels) is generated by VDP, the image data is converted into SXGA mode (1280 × 1024 pixels) or other modes by conversion processing in the scaler circuit. Can be converted to

  On the voice control board 13, for example, an input / output driver, a voice synthesis IC, a voice data ROM, an amplifier circuit, a volume, and the like are mounted. As an example, in the voice control board 13, the sound number data indicated in the sound effect signal transmitted from the effect control board 12 is input to the voice synthesis IC via the input / output driver. The voice synthesis IC generates voice and sound effects corresponding to the sound number data and outputs them to the amplifier circuit. The amplifier circuit outputs an audio signal obtained by amplifying the output level of the speech synthesis IC to a level corresponding to the volume set by the volume to the speakers 8L and 8R. The voice data ROM stores control data corresponding to the sound number data, and the voice synthesis IC reads out the control data corresponding to the sound number data to generate voice and sound effects. The data stored in the audio data ROM may be composed of data indicating the output mode of audio and sound effects in a predetermined period in time series.

  For example, an input / output driver and a lamp driver are mounted on the lamp control board 14. As an example, in the lamp control board 14, the electrical decoration signal transmitted from the effect control board 12 is input to the lamp driver via the input / output driver. The lamp driver amplifies the electric decoration signal and supplies it to the game effect lamp 9 and the like.

  On the payout control board 15, a payout control microcomputer 150, a switch circuit 151, and the like are mounted. The switch circuit 151 receives detection signals from various switches and sensors, such as the full tank switch 26, the ball-out switch 27, the payout motor position sensor 71, the payout count switch 72, and the error release switch 73. The switch circuit 151 takes these detection signals and transmits them to the payout control microcomputer 150. The payout control microcomputer 150 is, for example, a one-chip microcomputer similar to the game control microcomputer 100, and includes an external bus interface, a clock circuit, a specific information storage circuit, a reset / interrupt controller, a CPU, a ROM, a RAM, a CTC, A random number circuit, PIP, serial communication circuit, address decoding circuit, and the like may be provided. Further, all or part of the configuration of the payout control microcomputer 150 may be different from the configuration of the game control microcomputer 100. As an example, when numerical data that is a random number value is not used on the payout control board 15 side, the payout control microcomputer 150 may not include a random number circuit. Further, in the serial communication circuit, it is only necessary to provide at least one transmission / reception circuit capable of bidirectional serial communication with the main board 11, and data for the payout motor 51, the error display LED 74, and the launch control board 17. The command signal may be transmitted using an external bus interface or an address decoding circuit.

  In the payout control microcomputer 150, the CPU executes a payout control program read from the ROM, thereby executing processing for controlling the payout operation by the payout device including the payout motor 51 and the like. At this time, a fixed data reading operation in which the CPU reads fixed data from the ROM, a variable data writing operation in which the CPU writes various fluctuation data in the RAM and temporarily stores the data, and various fluctuation data in which the CPU is temporarily stored in the RAM. Data reading operation for reading out, receiving operation for receiving various signals input from the outside of the payout control microcomputer 150 via the external bus interface, PIP, serial communication circuit, etc., CPU for external bus interface, serial communication circuit, etc. A transmission operation for outputting various signals to the outside of the payout control microcomputer 150 is also performed. It should be noted that the one-chip microcomputer constituting the payout control microcomputer 150 may include at least RAM in addition to the CPU, and ROM, PIP, and the like may be externally attached or incorporated. Good.

  Next, the operation (action) of the pachinko gaming machine 1 in this embodiment will be described. In the main board 11, when the power supply from the power supply board 10 is started and the reset signal to the game control microcomputer 100 becomes high level (off state), the game control microcomputer 100 is activated, Based on the security check program 506A read from the ROM 506 by the CPU 505, a security check process as shown in the flowchart of FIG. 47 is executed. At this time, the game control microcomputer 100 is in the security mode, and the game control user program stored in the ROM 506 is not yet executed.

  When the security check process shown in FIG. 47 is started, the CPU 505 first executes a process for determining a time (security time) in which the game control microcomputer 100 is in the security mode by executing the security check process. . At this time, the CPU 505 reads the bit value in the bit number [2-0] of the security time setting KSES stored in the program management area of the ROM 506 (step S1). Then, it is determined whether or not the read value is “000” (step S2).

  If it is determined in step S2 that the read value is “000” (step S2; Yes), the steady set time is set to a predetermined fixed time (step S3). Here, the regular setting time is constant regardless of the number of times of security check processing based on the occurrence of a system reset in the pachinko gaming machine 1 (the number of times that the gaming control microcomputer 100 enters the security mode) in the security time. Is a time component. The fixed time is an invariant time component that is predetermined based on the specifications of the game control microcomputer 100 in the security time, and may be any minimum value that can be set as the security time, for example.

  If it is determined in step S2 that the read value is other than “000” (step S2; No), the read value is selected according to the set content shown in FIG. 12D in addition to the fixed time. The extended time is set to the steady set time (step S4). Thus, when the bit value [2-0] of the security time setting KSES is a value other than “000”, the security time that is the execution time of the security check process can be selected in advance in addition to the fixed time. It can be set to any one of a plurality of extension times.

  After executing one of the processes of steps S3 and S4, the bit value in the bit number [4-3] of the security time setting KSES is read (step S5). Then, it is determined whether or not the read value is “00” (step S6).

  If it is determined in step S6 that the read value is “00” (step S6; Yes), the steady setting time is set as the security time (step S7). On the other hand, when it is determined that the read value is other than “00” (step S6; No), the variable setting time determined in accordance with the read value is added to the steady setting time to obtain the security time. (Step S8). Here, the variable setting time is a time component that changes every time the security check process is executed, and the bit value in the bit number [4-3] of the security time setting KSES is “01” (short). Mode) or “10” (long mode), and changes in different predetermined time ranges. For example, when a count value in a predetermined free-run counter is stored in a variable security time register built in the game control microcomputer 100 when a system reset occurs, in the process of step S8, for the variable security time By using the stored value of the register as it is or by using the value obtained by substituting the stored value for a predetermined arithmetic function (for example, hash function) It may be determined so as to change randomly. Thus, when the bit value in the bit number [4-3] of the security time setting KSES is a value other than “00”, the security time that is the execution time of the security check process is set as the security based on the occurrence of the system reset or the like. Each time the check process is executed, it can be changed within a predetermined time range.

  Here, the bit value in the bit number [2-0] of the security time setting KSES is a value other than “000”, and the bit value in the bit number [4-3] of the security time setting KSES is other than “00”. In this case, both the extension time set in step S4 and the variable setting time set in step S8 are added to the fixed time, and the security time is determined. .

  After executing one of the processes in steps S7 and S8, the security code stored in the predetermined area of the ROM 506 is read (step S9). Here, in a predetermined area of the ROM 506, a security code of a calculation result obtained by calculating the data of the stored content by a predetermined calculation formula is stored in advance. As a security code generation method, for example, a hash value is generated using a hash function, an error detection code (CRC code) is used, or an error correction code (ECC code) is used. A generation method may be used. In a predetermined area different from the security code storage area of the ROM 506, an arithmetic expression for specifying the security code by calculation is encrypted and stored in advance.

  Following the processing in step S9, the encrypted arithmetic expression is decrypted and restored (step S10). Thereafter, the storage code in the predetermined area of the ROM 506 is calculated by the arithmetic expression decrypted in step S10 to specify the security code (step S11). The storage data used for the calculation for specifying the security code at this time is, for example, program data corresponding to all or part of the user program different from the security check program 506A among the storage data of the ROM 506, or predetermined table data May be all or a part of the fixed data constituting the. Then, the security code read in step S9 is compared with the security code specified in step S11 (step S12). At this time, it is determined whether or not the security codes match in the comparison result (step S13).

  If the security codes do not match in step S13 (step S13; No), it is determined that an unauthorized change has been made to the ROM 506, and the operation of the CPU 505 is shifted to a halt state (HALT). On the other hand, if the security codes match in step S13 (step S13; Yes), it is determined whether or not the security time set in the processing of step S7 or step S8 has elapsed (step S14). . At this time, if the security time has not elapsed (step S14; No), the process of step S14 is repeatedly executed and waits until the security time elapses. If it is determined in step S14 that the security time has elapsed (step S14; Yes), for example, the value of the program counter built in the CPU 505 is set to the start address (address 0000H) of the user program in the ROM 506. Thus, the execution of the game control main process is started. Thus, when the execution of the game control main process is started, the operation state of the game control microcomputer 100 is shifted from the security mode to the user mode, and the execution of the user program stored in the ROM 506 is started. Become.

  FIG. 48 is a flowchart showing an example of a game control main process executed by the CPU 505 of the game control microcomputer 100. Each process described below is executed by the CPU 505 provided in the game control microcomputer 100. An interrupt request based on various interrupt factors generated by the CTC 508, the random number circuit 509, the serial communication circuit 511, etc. provided in the game control microcomputer 100 is for causing the CPU 505 to execute predetermined interrupt processing. The concept including the CPU 505 and various circuits other than the CPU 505 is sometimes referred to as a game control microcomputer 100. When the game control main process shown in FIG. 48 is started, the CPU 505 first sets the interrupt prohibition (step S21), and sets the interrupt mode (step S22). For example, in step S22, the value (1 byte) of the specific register (I register) of the game control microcomputer 100 and the interrupt vector (1 byte: the least significant bit is “0”) output from the built-in device are synthesized. As a result, the interrupt mode [2] of the maskable interrupt in which the interrupt address is generated is set. When an interrupt that can be masked occurs, the CPU 505 performs a setting for automatically disabling the interrupt, and the contents of the program counter may be saved in the stack.

  Subsequently, settings relating to the stack pointer, such as setting of a stack pointer designation address, are performed (step S23). Further, the internal register is set (initialized) as shown in FIG. 9B (step S24). As an example, in the process of step S24, the operation setting in the serial communication circuit 511 may be performed by setting the first channel communication setting register SAFM, the second channel communication setting register SBFM, and the like. Subsequent to step S24, the CTC 508 and PIP 510 are set (step S25). After the process of step S25 is executed, it may be determined whether or not the power-off signal is in an off state, for example, by checking a terminal state at a predetermined input port included in the PIP 510.

  Thereafter, the RAM 507 is set to be accessible (step S26). Subsequently, based on the signal state of the switch signal (clear signal) transmitted from the clear switch 304 installed on the power supply board 10, it is determined whether the clear switch 304 is turned on (step S27). In the process of step S27, the clear signal transmitted from the clear switch 304 may be checked a plurality of times, and it may be determined that the clear switch 304 has been turned on when the clear signal is continuously turned on. For example, once it is confirmed that the state of the clear signal is off, the state of the clear signal is confirmed once again after a predetermined time (for example, 0.1 second) has elapsed. At this time, if the clear signal is off, it is determined that the clear signal is off. On the other hand, if the state of the clear signal is on at this time, the state of the clear signal may be confirmed again after a predetermined time has elapsed. Note that the number of times of reconfirming the state of the clear signal may be one time or may be a plurality of times. In addition, it is possible to check twice and check again when the check results do not match.

  When the clear switch 304 is off in step S27 (step S27; No), it is determined whether or not a backup flag provided in the game control flag setting unit 592 or the like is on (step S28). The state of the backup flag is set in the game control flag setting unit 592 or the like when power supply to the game control microcomputer 100 is stopped. The backup flag setting location is backed up by the backup power source, so that the state of the backup flag is saved even when the power supply is stopped. In step S28, for example, if “55H” is set in the game control flag setting unit 592 as the value of the backup flag, it is determined that there is a backup (ON state). On the other hand, if a value other than “55H” is set, it is determined that there is no backup (OFF state).

  If the backup flag is on in step S28 (step S28; Yes), data check of the RAM 507 is performed to determine whether the check result is normal (step S29). In the process of step S29, for example, a checksum is calculated using data stored in a specific area of the RAM 507, and the calculated checksum is compared with the checksum stored in the main checksum buffer. Here, the main checksum buffer stores a checksum calculated by the same processing when the power supply was stopped last time. If the comparison results do not match, the data in the specific area of the RAM 507 is different from the data when the power supply is stopped, so that the check result is determined to be not normal.

  When the check result in step S29 is normal (step S29; Yes), for example, the control state of the main board 11 such as the internal state of the game control microcomputer 100 or the sub-side control board (for example, the effect control board 12). A setting at the time of restoration for returning the control state to the state when the power supply is stopped is performed, and the gaming state before the power interruption is restored (step S30). As a specific example, in the process of step S30, the start address of the backup setting table stored in the ROM 506 is set as a pointer, and the contents of the backup setting table are sequentially set in the work area in the RAM 507. Here, the work area of the RAM 507 is backed up by a backup power source, and initialization data for an area that may be initialized among the work areas may be set in the backup time setting table.

  When the clear switch 304 is on in step S27 (step S27; Yes), the backup flag is off in step S28 (step S28; No), or the check result is not normal in step S29. Sometimes (step S29; No), initialization processing corresponding to power-on or system reset that is not during a power failure recovery is executed. In this initialization process, the RAM 507 is cleared (initialized) (step S31), and a work area to be a work area is set (step S32). In the process of step S31, predetermined data (for example, stored data in a random counter provided in the game control counter setting unit 594) may be set to an arbitrary value or a predetermined initial value. Further, the entire area of the RAM 507 may be initialized, or a part of the area may be initialized while the predetermined data is left as it is. When the process of step S31 is executed, the operation state of the random number circuit 509 may be initialized. The initial value may be set in the game control flag setting unit 592, the game control timer setting unit 593, the game control counter setting unit 594, the game control buffer setting unit 595, and the like by the process of step S <b> 32. At this time, a control command (initialization designation command) for initializing each sub-side control board such as the effect control board 12 may be transmitted. For example, the presentation control board 12 displays an image for notifying that the control in the pachinko gaming machine 1 is initialized on the display screen of the image display device 5 in response to the reception of the initialization designation command. It suffices if initialization notification is executed.

  After the game state before the power interruption is restored in step S30, or after the processing of step S32 is executed, various circuits built in the game control microcomputer 100 are stored based on the stored data in the program management area of the ROM 506. Operation setting is performed (step S33). As an example, in the process of step S33, the first random number initial setting KRS1 and the second random number initial setting KRS2 stored in the program management area are read, and the random number circuit setting process as shown in the flowchart of FIG. 49 is executed. The Note that the process of step S33 may be executed when the process of step S24 or the process of step S25 is executed.

  In the random number circuit setting process shown in FIG. 49, the CPU 505 first makes settings for using the random number circuit 509 based on the bit value in the bit number [3] of the first random number initial setting KRS1 (step S51). In this embodiment, the bit value in the bit number [3] of the first random number initial setting KRS1 is set to “1” in advance, and setting to use the random number circuit 509 is performed corresponding to this bit value. Subsequently, the random number update clock RGK in the random number circuit 509 is set based on the bit value in the bit number [2] of the first random number initial setting KRS1 (step S52). For example, in response to the bit value [2] of the first random number initial setting KRS1 being set to “1” in advance, the random number clock RCLK generated by the random number clock generation circuit 112 is divided by two. As a result, the random number update clock RGK is set.

  After the setting in step S52, the random number update rule is set in the random number circuit 509 based on the bit value in the bit number [1-0] of the first random number initial setting KRS1 (step S53). For example, when the bit value in the bit number [1-0] of the first random number initial setting KRS1 is set to “00” in advance, the random number update that specifies the update order of the numerical data that becomes the random number value in the random number sequence RSN The rule is set so as not to change after the second round. If the bit value in the bit number [1-0] of the first random number initial setting KRS1 is set to “01” in advance, the random number update rule in the random number sequence RSN is set to be changed by software after the second round. Is made. Further, when the bit value [1-0] of the first random number initial setting KRS1 is set to “10” in advance, the random number update rule in the random number sequence RSN is automatically changed after the second round. Is made.

  Subsequently, based on the bit value in the bit number [1] of the second random number initial setting KRS2, the start value at start-up in the numerical data that becomes the random value is determined (step S54). For example, when the bit value in the bit number [1] of the second random number initial setting KRS2 is set to “0” in advance, the random value start value is set to the default value “0001H”. Further, when the bit value [1] of the second random number initial setting KRS2 is set to “1” in advance, the random number start value is set to a value based on the ID number.

  Further, based on the bit value in the bit number [0] of the second random number initial setting KRS2, it is set whether or not to change the start value of the numerical data serving as the random value every time the system is reset (step S55). For example, when the bit value [0] of the second random number initial setting KRS2 is set to “0” in advance, the pachinko gaming machine 1 is activated when the power is initially turned on (activation after backup is disabled). Regardless of whether the system is reset due to system reset, the start value set in step S54 may be used as it is as the start value in the random number circuit 509. In addition, when the bit value in the bit number [0] of the second random number initial setting KRS2 is set to “1” in advance, a setting for changing the start value of the random number at every system reset is made. For example, when a count value in a predetermined free-run counter is stored in a random number start value register built in the game control microcomputer 100 when a system reset occurs, in the process of step S55, for the random number start value By using the stored value of the register as it is, or by using the value obtained by substituting the stored value for a predetermined arithmetic function (for example, a hash function), the random number start value becomes a predetermined numerical value every time the system is reset. It may be determined so as to change randomly within a range (for example, a range including all or part of numerical data included in the count value permutation RCN generated by the random number generation circuit 553). When the setting by the processing in step S55 is completed, the random number circuit 509 may start the random value generation operation.

  It should be noted that the setting by the random number circuit setting process may be performed autonomously by the random number circuit 509 based on the stored data in the program management area without the processing of the CPU 505 being involved. In this case, when the game control microcomputer 100 is in the security mode, the random number circuit 509 may not perform the initial setting and may not perform the random value generation operation. Then, when the CPU 505 reads out the user program stored in the ROM 506 in the game control microcomputer 100 and the execution of the game control main process is started, the CPU 505 instructs the random number circuit 509 to perform initial setting, for example. In response to the signal being transmitted, the random number circuit 509 may perform the initial setting and then start the random value generation operation. Alternatively, particularly when the random number circuit 509 is externally attached to the game control microcomputer 100, the random number circuit 509 is independent of the processing in the CPU 505 even when the game control microcomputer 100 is in the security mode. Thus, the random number generation operation may be started after the initial setting based on the stored data in the program management area. 48 includes processing for reading the interrupt initial setting KIIS stored in the program management area and setting the priority control of maskable interrupt factors in the reset / interrupt controller 504. May be. When setting the priority order of the maskable interrupt factor, the highest priority interrupt is set according to the bit value in the bit number [3-0] of the interrupt initial setting KIIS. For example, by setting the bit value [3-0] of the interrupt initial setting KIIS to “04H” or “05H” in advance, the interrupt processing due to the interrupt factor generated in the serial communication circuit 511 has the highest priority. Can be executed. Thus, by performing priority control of maskable interrupt factors according to the bit value in bit number [3-0] of interrupt initial setting KIIS, the priority order of interrupt processing can be arbitrarily set, and the degree of freedom of design is increased. be able to.

  After the setting in step S33, random number circuit abnormality inspection processing for inspecting the presence or absence of operation abnormality in the random number circuit 509 is executed (step S34). FIG. 50 is a flowchart showing an example of the random number circuit abnormality inspection process executed in step S34.

  In the random number circuit abnormality inspection process shown in FIG. 50, the CPU 505 first clears the random number clock abnormality determination counter provided in, for example, the game control counter setting unit 594, and the random number clock abnormality determination count that is the count value. The value is initialized to “0” (step S61). Subsequently, the internal information data CIF4 stored in the bit number [4] of the internal information register CIF is read (step S62). Then, it is determined whether or not the read value in step S62 is “1” (step S63). At this time, if the frequency monitoring circuit 551 provided in the random number circuit 509 detects a frequency abnormality in the random number clock RCLK from the random number external clock terminal ERC, the bit value “1” is written as the internal information data CIF4. .

  Therefore, when it is determined in step S63 that the read value is “1” (step S63; Yes), the random number clock abnormality determination count value is updated to be incremented by 1 (step S64). At this time, it is determined whether or not the count value after the update in step S64 has reached a predetermined clock abnormality determination value (step S65). Here, the clock abnormality determination value may be a numerical value determined in advance in order to determine that the clock abnormality is detected when the frequency monitoring circuit 551 continuously detects the frequency abnormality of the random number clock RCLK. If the clock abnormality determination value has not been reached in step S65, the process returns to step S62, and determination based on the bit value of the internal information data CIF4 is performed again.

  When the clock abnormality determination value is reached in step S65 (step S65; Yes), a predetermined random number clock error process is executed (step S66), and the random circuit abnormality inspection process is terminated. In the random number clock error process, for example, a setting for transmitting a predetermined effect control command to the effect control board 12 is performed, and the effect device detects that a frequency abnormality of the random number clock RCLK has been detected. In addition, the processing may not proceed until a predetermined error canceling procedure (for example, system reset or error canceling switch operation) is taken. Further, the operation of the CPU 505 may be shifted to a halt state (HALT) without executing the random number clock error process.

  When the read value is determined to be “0” in step S63 (step S63; No), for example, the random value abnormality determination counter provided in the game control counter setting unit 594 or the like is cleared, and the count value is used. A certain random value abnormality determination count value is initialized to “0” (step S67). In the process of step S63, the read value is “0” when the bit value of the internal information data CIF4 read in step S62 is continuously “0” a plurality of times (for example, twice). May be determined.

  Subsequent to the processing in step S67, the check value used for checking whether there is an abnormality in the random number value is set to an initial value “0000H” (step S68). Then, the stored numerical data as the random value is read from the random value register 559A serving as the random value register R1D and the random value register 559B serving as the random value register R2D provided in the random number circuit 509 (step S69). For example, in the process of step S69, the bit values of the random number latch selection data RDLS1 and the random number latch selection data RDLS0 stored in the bit number [1] and the bit number [0] of the random number latch selection register RDLS are set to “0”. Specifies fetching random values by. Subsequently, the bit values of the random number acquisition specification data RDLT1 and the random value acquisition specification data RDLT0 stored in the bit number [1] and the bit number [0] of the random value acquisition specification register RDLT are set to “1”. Specifying loading into the random value register R2D or the random value register R1D. Note that setting the bit value in the bit number [1] or bit number [0] of the random number fetch specification register RDLT to “1” instructs the CPU 505 to fetch (latch) numerical data to the random number circuit 509. This corresponds to outputting a latch signal. After that, by turning on the register read signal RRS2 supplied to the random value register R2D or turning on the register read signal RRS1 supplied to the random value register R1D, the numerical data that becomes the stored random value May be read out. Note that the numerical data stored in each of the random value register R2D and the random value register R1D may be read simultaneously to check whether there is an abnormality in the random number value, or after checking whether there is an abnormality in one of the registers. The other register may be checked for abnormality.

  After reading the numerical data in step S69, the read value is set as a random number inspection reference value (step S70). Subsequently, numerical data that becomes a random value is read from the random value register 559A and the random value register 559B (step S71). Note that the read operation in step S71 may be performed in the same procedure as the read operation in step S69. In addition, a sufficient delay time may be provided between the read operation in step S69 and the read operation in step S71 so that the numerical data in the random number sequence RSN generated by the random number circuit 509 changes. After reading the numerical data in step S71, an exclusive OR operation is performed on the random number inspection reference value and the read value in step S71 (step S72). Further, a logical sum operation between the calculation result in step S72 and the check value is executed, and the calculation result is updated to be a new check value (step S73). For example, the check value may be stored in a predetermined area of the RAM 507, and each time the process of step S73 is executed, the calculation result obtained by the process may be saved as a new check value. As a result, changes in all the bits in the numerical data read from the random value register 559A and the random value register 559B are recorded, and if the bit has changed at least once during a plurality of times of reading, it corresponds in the check value. The bit value is “1”.

  Therefore, it is determined whether or not the check value is “FFFFH” (step S74). If it is (step S74; Yes), since the change of the bit value is recognized for all bits, the random number value is normal. The random number circuit abnormality inspection process is terminated by determining that the number has been updated. When it is confirmed that the random number value has been updated normally, the random number latch selection data RDLS1 and the random number latch selection stored in the bit number [1] and the bit number [0] of the random number latch selection register RDLS are selected. The bit value of the data RDLS0 is set to “1”, the random value is taken into the random value register R2D according to the signal input to the input port P1, and the random value register R1D according to the signal input to the input port P0 You may make it instruct | indicate numerical value acquisition. In this embodiment, a wiring for transmitting the first start winning signal SS1 from the first start port switch 22A is connected to the input port P0, and the second start winning signal SS2 from the second start port switch 22B is connected to the input port P1. Are connected. Thereby, when the first start winning signal SS1 is turned on, the random number value is taken into the random value register R1D, while when the second starting winning signal SS2 is turned on, the random value register R2D is entered. It is possible to take in random values.

  When it is determined in step S74 that the check value is other than “FFFFH” (step S74; No), the random number abnormality determination count value is updated to be incremented by 1 (step S75). At this time, it is determined whether or not the count value after the update in step S75 has reached a predetermined random value abnormality determination value (step S76). Here, the random value abnormality determination value is determined so that all bits of the numerical data read from the random value register 559A and the random value register 559B change at least once if the random number circuit 509 is operating normally. It may be a predetermined numerical value so as to be the number of times. If the random number abnormality determination value has not been reached in step S76, the process returns to step S71, and determination for reading numerical data as a random value from the random number circuit 509 and checking for abnormality is performed.

  If the random number abnormality determination value is reached in step S76 (step S76; Yes), a predetermined random value error time process is executed (step S77), and the random number circuit abnormality inspection process is terminated. In the random value error process, for example, a setting for transmitting a predetermined effect control command to the effect control board 12 is performed to notify that an abnormality in the random value is detected by the effect device. Until the error canceling procedure (for example, system reset, error canceling switch operation, etc.) is taken, the subsequent processing may not proceed. Further, the operation of the CPU 505 may be shifted to the stopped state (HALT) without executing the random value error process.

  The random number circuit abnormality inspection process in step S34 is not limited to that executed by the CPU 505, and the random number circuit abnormality inspection process may be executed by a built-in circuit in the game control microcomputer 100 other than the CPU 505. As an example, the random number circuit 509 has a function of executing a random number circuit abnormality inspection process. When a frequency abnormality of the random number clock RCLK is detected or when an abnormality of the random number value is detected, the CPU 505 May be notified. The random number circuit abnormality inspection process is not limited to the process executed only in step S34. For example, every time a timer interrupt occurs in the game control microcomputer 100, a game control timer interrupt process (see FIG. 51), part or all of the random number circuit abnormality inspection process may be executed.

  After executing the above random number circuit abnormality inspection processing in step S34 shown in FIG. 48, the game start switch is based on the signal state of the switch signal transmitted from the game start switch 31 installed on the main board 11. It is determined whether or not 31 has been turned on (step S35). In the process of step S35, the switch signal transmitted from the game start switch 35 may be checked a plurality of times, and it may be determined that the game start switch 31 is turned on when the switch signal is continuously turned on. Further, the process of step S35 is executed only when starting from the initial state without recovery (at the time of cold start), for example, when the processes of step S31 and step S32 are executed. For example, the process of step S30 is performed. Controls the progress of the game, for example, a game control timer interrupt process, regardless of the operation of the game start switch 31 at the time of start (at the time of hot start) to restore the game state before the power interruption as if executed You may make it progress to the process to do. Here, in the RAM 507 provided in the game control microcomputer 100, when an area to be a random counter provided in the game control counter setting unit 594 is backed up by a backup power source, if it is a hot start, before power interruption Since the update of numerical data serving as a random value is started using the stored data in the random counter, it is difficult to specify the random value stored in the random counter from the operation start timing of the pachinko gaming machine 1. On the other hand, at the time of cold start, for example, the random counter is cleared (initialized) in the process of step S31, so that updating of the random number value is started from a certain initial value (for example, “0”), There is a possibility that the random value stored in the random counter is specified from the operation start timing of the pachinko gaming machine 1. Therefore, at the cold start, the process of step S35 is executed until the game start switch 31 is turned on, and it is difficult to specify the random number stored in the random counter from the operation start timing of the pachinko gaming machine 1. To. As a result, the operation of the pachinko gaming machine 1 is started by connecting a so-called “hanging board” particularly when the random number value for jackpot determination (for example, the random number value MR1 for special figure display result determination) is updated only by software. Even if an illegal signal is input at a timing when a predetermined time has elapsed from the timing, an illegal big hit gaming state can be prevented. If it is determined in step S35 that the game start switch 31 is not turned on, the random number update process is executed and the random number stored in the random counter is updated by software before returning to the process of step S35. You may make it do. Accordingly, in addition to the elapsed time from the timing when the game start switch 31 is turned on, the elapsed time from the operation start timing of the pachinko gaming machine 1 to when the game start switch 31 is turned on cannot be specified. Even at cold start, it becomes difficult to specify the random value stored in the random counter, and it is possible to reliably prevent actions such as illegally generating a big hit gaming state by aiming or inputting illegal signals it can.

  If it is determined in step S35 that the game start switch 31 is off (step S35; No), the process of step S35 is repeatedly executed, and the process waits until the game start switch 31 is turned on. Thus, even after a predetermined initial setting process is executed by the game control microcomputer 100, the progress of the game, such as a game control timer interrupt process, is controlled until the game start switch 31 is turned on. Processing execution does not start. The initial setting process executed by the game control microcomputer 100 includes, for example, the entire security check process shown in FIG. 47 and the processes of steps S21 to S35 in the game control main process shown in FIG. Should be included.

  If it is determined in step S35 that the game start switch 31 is on (step S35; Yes), or if the process of step S35 is not executed, the interrupt permission state is set (step S36), and various interrupt requests are made. Wait for the occurrence of The process of step S36 may also be included in the initial setting process executed by the game control microcomputer 100. After executing the process of step S36, for example, based on the setting of the CTC 508 in step S25, a timer interrupt for game control may be generated every 2 milliseconds. After executing the process of step S36, the random number update process is repeatedly executed (step S37).

  After the processing of step S25 is executed and the interrupt is permitted, for example, when a plurality of maskable interrupt factors occur simultaneously in part or all of the CTC 508, the random number circuit 509, the serial communication circuit 511, etc. Based on the designation by the bit value in the bit number [3-0] of the initial setting KIIS, the reset / interrupt controller 504 accepts an interrupt factor having a high priority. When the reset / interrupt controller 504 receives an interrupt factor, for example, an interrupt request signal in an on state is output to an I class interrupt (IRQ) terminal provided in the CPU 505. When an on-state interrupt request signal is input to the IRQ terminal by the CPU 505, the generated interrupt factor is identified based on, for example, the result of checking the data stored in the internal register, and the vector address corresponding to the identified interrupt factor By executing the program having the first address as the interrupt address, interrupt processing based on each interrupt factor can be started.

  As a specific example, when the bit value in the bit number [3-0] of the interrupt initial setting KIIS indicates “04H”, first, the bit number [5] or the bit number [4] of the first channel status register SAST. ] To bit number [0] to determine whether at least one bit value is “1”. At this time, if there is a place where the bit value is “1”, it is determined that the interrupt processing corresponding to the interrupt factor of the first channel reception interrupt generated in the serial communication circuit 511 is executed. A vector address in the interrupt vector is set based on the bit value in the bit number [7-4] of the initial setting KIIS, and a program having the vector address as the head address is executed. When the bit numbers [5] and bit numbers [4] to [0] of the first channel status register SAST are all “0”, the bit number “7” of the first channel status register SAST is “0”. ”And bit number“ 6 ”are read out and it is determined whether or not any bit value is“ 1 ”. At this time, if there is a place where the bit value is “1”, the interrupt processing corresponding to the interrupt factor of the first channel transmission interrupt generated in the serial communication circuit 511 is executed. On the other hand, if any of the bit values is “0”, the bit number [7] and the bit number [6] of the second channel status register SAST are read, and any of the bit values is “1”. Determine whether or not. At this time, if there is a place where the bit value is “1”, the interrupt processing corresponding to the interrupt factor of the second channel transmission interrupt generated in the serial communication circuit 511 is executed. Further, when the interrupt factor is not in the serial communication circuit 511, for example, the interrupt factor is generated in a predetermined priority order such as the interrupt factor in the random number circuit 509, the interrupt factor in the CTC 508, and the external interrupt factor in the external maskable interrupt terminal XINT. The interrupt process corresponding to the interrupt factor whose occurrence is specified is executed. Thus, when the bit value in the bit number [3-0] of the interrupt initial setting KIIS is set to “04H”, the first channel reception interrupt, the first channel transmission interrupt, the second channel transmission interrupt in the serial communication circuit 511, Specify whether or not an interrupt factor has occurred in the priority order of interrupt from the random number circuit 509, interrupt from the CTC 508, and interrupt from the external maskable interrupt terminal XINT, and execute interrupt processing corresponding to the specified interrupt factor Can do.

  If any of the four types of errors such as an overrun error, break code error, framing error, and parity error occurs during reception of communication data by the first channel transmission / reception circuit 571A included in the serial communication circuit 511, A 1-channel reception interrupt occurs. At this time, the CPU 505 may execute a predetermined serial communication error interrupt process. In this serial communication error interrupt processing, for example, the bit value [7] and bit number [6] of the first channel communication setting register SAFM and the bit value [7] of the second channel communication setting register SBFM are changed. Also, it is only necessary to set that neither the transmission function nor the reception function in the serial communication circuit 511 is used by setting “0”. Further, when an error occurs during reception of communication data by the first channel transmission / reception circuit 571A, control may be performed to prohibit the payout of the game ball by the payout device including the payout motor 51. Thereby, when an abnormality due to a communication data reception error or the like occurs, it is possible to prevent an excessive payout of game balls as prize balls.

  In the game control microcomputer 100, for example, based on the fact that the reset / interrupt controller 504 has received an interrupt request from the CTC 508, the CPU 505 executes the game control timer interrupt process shown in the flowchart of FIG. In the game control timer interrupt process shown in FIG. 51, the CPU 505 first sets the interrupt disabled state, and then executes a predetermined switch process, whereby the game ball detection switches 21, 22A, The state of the detection signal (winning detection signal) input from 22B, 23, etc. is determined (step S91). Subsequently, by executing predetermined main-side error processing, abnormality diagnosis of the pachinko gaming machine 1 is performed, and if necessary, warning can be generated according to the diagnosis result (step S92). For example, in the main-side error processing, settings for notifying the occurrence of an abnormal operation may be performed in response to excessive prize balls, insufficient prize balls, or other operation errors. After that, by executing a predetermined information output process, for example, data such as jackpot information, starting information, probability variation information supplied to a hall management computer installed outside the pachinko gaming machine 1 is output (step) S93).

  Subsequent to the information output process, a random number update process is executed (step S94). Thereafter, the CPU 505 executes special symbol process processing (step S95). In the special symbol process, the value of the special symbol process flag provided in the game control flag setting unit 592 is updated according to the progress of the game in the pachinko gaming machine 1, and the first special symbol display device 4A and the second special symbol are processed. Various processes are selected and executed in order to perform control of the display operation in the display device 4B and setting of the opening / closing operation of the special winning opening in the special variable winning ball device 7 in a predetermined procedure.

  Following the special symbol process, the normal symbol process is executed (step S96). The CPU 505 controls the display operation (for example, turning on / off the segment LED) on the normal symbol display 20 by executing the normal symbol process, thereby allowing the normal symbol variable display and the normal variable winning ball apparatus 6B to move. Enables setting of the tilting movement of the blade. After executing the normal symbol process, the CPU 505 executes a prize ball process for setting the number of prize balls according to the input of the winning detection signal based on the execution result of the switch process in step S91, for example (step S97). ). Subsequent to the prize ball process, the main side communication control process is executed, so that a control command is transmitted from the main board 11 to a sub-side control board such as the effect control board 12 or the payout control board 15 or the payout control is performed. Communication control for receiving a control command transmitted from the board 15 is performed.

  As an example, in the main-side communication control process, serial communication corresponding to the setting in the command transmission table specified by the storage data of the payout transmission command buffer included in the transmission command buffer provided in the game control buffer setting unit 595 By sending a transmission operation instruction to the first channel transmission / reception circuit 571A included in the circuit 511, the payout control command can be transmitted. More specifically, when the bit value in the communication status data SAST7 stored in the bit number [7] of the first channel status register SAST is “1” indicating that transmission is completed, or the first channel status When the bit value in the communication data status data SAST6 stored in the bit number [6] of the register SAST is “1” to indicate the completion of transmission shift register transfer, all or one in the table data of the command transmission table Are transferred to the first channel data register SADT. As a result, the communication status data SAST7 is cleared and the bit value becomes “0”, and data transfer from the first channel data register SADT to the transmission data register 582A included in the first channel transmission / reception circuit 571A is started. When the transfer to the transmission data register 582A is completed, the communication status data SAST6 is cleared and the bit value becomes “0”, and the data transfer from the transmission data register 582A to the transmission shift register 581A is started. When the transfer to the transmission shift register 581A is completed, the bit value of the communication status data SAST6 is set to “1”, and each bit data is sequentially transmitted from the transmission shift register 581A to the first channel transmission terminal TXA. Is done. As a result, the payout control command is transmitted to the payout control board 15 in the serial signal format using the first channel transmission / reception circuit 571A of the serial communication circuit 511.

  Further, the storage contents of the payout reception command buffer provided in the game control buffer setting unit 595 and the like are checked to determine whether or not the reception command is stored. When the reception command is stored, the reception command is read out. The reception command is stored in the payout reception command buffer based on a first channel reception interrupt that occurs in response to reception of communication data serving as a payout notification command by the first channel transmission / reception circuit 571A in the serial communication circuit 511. It may be performed by the interrupt process executed in the above. In this case, in the serial communication circuit 511, when the communication data sequentially stored from the first channel reception terminal RXA to the reception shift register 585A is transferred to the reception data register 584A, the bit of the first channel status register The bit value in the communication status data SAST5 stored in the number [5] is set to “1”. At this time, if the communication interrupt control data SAIC5 stored in the bit number [5] of the first channel interrupt control register SAIC is “1”, an interrupt request by the first channel reception interrupt is permitted. Then, in response to the first channel reception interrupt, the CPU 505 executes predetermined interrupt processing, whereby the communication data stored in the reception data register 584A is read out and stored in the payout reception command buffer. When communication data is read from the reception data register 584A, the communication status data SAIC5 is cleared and the bit value becomes “0”. In this way, communication data serving as a payout notification command received by the first channel transmission / reception circuit 571A of the serial communication circuit 511 can be taken into the payout reception command buffer and stored. When a received command stored in the payout received command buffer is read in the main side communication control process, it corresponds to the type of received command, for example, a process for setting or clearing a flag according to the type of the received received command. Execute the process. When a received command is read from the payout received command buffer, an exclusive OR of the first byte and the second byte in the received command is calculated, and whether or not the calculated calculation result is a normal value. It is possible to check whether or not the received command is an appropriate command. In this embodiment, since the command transmitted from the payout control board 15 to the main board 11 is configured to be the second byte by inverting the first byte, one byte of the received command. As a result of calculating the exclusive OR of the first and second bytes, if all the bit values are “1”, it can be determined that the received command is an appropriate command. Alternatively, after the serial communication error interrupt process is executed based on the occurrence of an error in the serial communication circuit 511, the process for transmitting the payout control command and the process for receiving the payout notification command are not executed. It may be. Thus, when an error occurs during the receiving operation in the serial communication circuit 511, transmission of the payout control command to the payout control board 15 and reception of the payout notification command from the payout control board 15 are controlled to be stopped. be able to.

  As another example, in the main-side communication control process, the second channel transmission included in the serial communication circuit 511 corresponding to the setting in the command transmission table specified by the storage data of the effect transmission command buffer included in the transmission command buffer. An effect control command can be transmitted, for example, by sending a transmission operation instruction to the circuit 571B. More specifically, when the bit value in the communication status data SBST7 stored in the bit number [7] of the second channel status register SBST is “1” indicating transmission completion, or the second channel status When the bit value in the communication data status data SBST6 stored in the bit number [6] of the register SBST is “1”, indicating that the transmission shift register transfer is complete, all or one in the table data of the command transmission table Are transferred to the second channel data register SBDT. As a result, the communication status data SBST7 is cleared and the bit value becomes “0”, and data transfer from the second channel data register SBDT to the transmission data register 582B included in the second channel transmission circuit 571B is started. When the transfer to the transmission data register 582B is completed, the communication status data SBST6 is cleared and the bit value becomes “0”, and data transfer from the transmission data register 582B to the transmission shift register 581B is started. When the transfer to the transmission shift register 581B is completed, the bit value of the communication status data SBST6 is set to “1”, and each bit data is sequentially transmitted from the transmission shift register 581B to the second channel transmission terminal TXB. Is done. Thereby, the effect control command is transmitted toward the effect control board 12 in the serial signal format using the second channel transmission circuit 571B of the serial communication circuit 511. As described above, a register (for example, the second channel data register SBDT or the transmission data register 582B) used when transmitting the effect control command toward the effect control board 12 is used as the payout control command toward the payout control board 15. A register (for example, the first channel data register SADT and the transmission data register 582A) used for transmitting the data, and a register (for example, the reception data register 584A) used for receiving the payout notification command transmitted from the payout control board 15. Are different registers.

  When such main-side communication control processing is completed, the game control timer interrupt processing is terminated after the interrupt is permitted.

  FIG. 52 is a flowchart showing an example of processing executed in step S37 shown in FIG. 48 or step S94 shown in FIG. 51 as the random number update processing. In the random number update process shown in FIG. 52, the CPU 505 first sets the interrupt disabled state (step S501). Note that when the game control microcomputer 100 automatically enters an interrupt-inhibited state in response to the start of the random number update process, the process of step S501 need not be executed. Subsequently, for example, by updating the stored data in a predetermined area of the random counter provided in the game control counter setting unit 594, the random number MR2 for determining the big hit type is incremented by 1 (step S502). Thus, in this embodiment, the random number MR2 for determining the big hit type is updated so that it is incremented by one every time a timer interrupt occurs. After executing the processing in step S502, the reach determination random number MR3 is set as a random number to be updated (step S503).

  Then, the CPU 505 reads out numerical data indicating the random value MR6 for determining the addition value from, for example, a random counter provided in the game control counter 594 (step S504). At this time, it is determined whether or not the read value in step S504 is less than the addition determination value determined for each random value to be updated (step S505). Here, as shown in FIG. 14, addition determination values are determined in advance corresponding to the random number values MR <b> 3 to MR <b> 5. If the read value is less than the addition determination value in step S505 (step S505; Yes), the random value MR6 read in step S504 is set as the addition value (step S506). On the other hand, if the read value is equal to or greater than the addition determination value in step S505 (step S505; No), a value obtained by subtracting the addition determination value from the random value MR6 read in step S504 is set as the addition value. (Step S507).

  After executing one of the processes in steps S506 and S507, the addition value is added to the random number value to be updated (step S508). At this time, it is determined whether or not the random number value after addition obtained in step S508 is less than the maximum determination value determined for each random value to be updated (step S509). Here, as shown in FIG. 14, the maximum determination value is determined in advance corresponding to each of the random number values MR3 to MR5. If the random number value after addition is less than the maximum determination value in step S509 (step S509; Yes), the random number value after addition obtained in step S508 is set as the updated random number value (step S510). On the other hand, if the random number value after addition is greater than or equal to the maximum determination value in step S509 (step S509; No), the value obtained by subtracting the maximum determination value from the random number value after addition obtained in step S508 is updated. A subsequent random value is set (step S511).

  After executing one of the processes in steps S510 and S511, the updated random number value is set in a predetermined area for storing the random number value to be updated by the random counter (step S512). In this way, the update of the random number value to be updated is completed. Following the processing of step S512, it is determined whether there is an unprocessed random number value (step S513). In this embodiment, the random number values MR3 to MR5 are sequentially set to the random number values to be updated, so that every time the random number update process is executed, all of the random number values MR3 to MR5 are updated. To be. If there is an unprocessed random value in step S513 (step S513; Yes), the next random value is set as a random value to be updated (step S514), and the process returns to step S504. . On the other hand, if there is no unprocessed random number value in step S513 (step S513; No), the interruption is permitted (step S515), and the random number update process is terminated.

  FIG. 53 is a flowchart showing an example of processing executed in step S95 shown in FIG. 51 as the special symbol process. In this special symbol process, the CPU 505 first executes a start winning determination process (step S101). 54 and 55 are flowcharts showing an example of the start winning determination process executed in step S101.

  In the start winning determination process shown in FIGS. 54 and 55, the CPU 505 first reads the input port data stored in the input port register PI (step S201). The input port data read at this time may be stored in a start winning buffer provided in the game control buffer setting unit 595, for example. Then, it is determined whether or not the bit value in the bit number [1] of the input port data read in step S201 is “1” (step S202). In this embodiment, a wiring for transmitting the second start winning signal SS2 from the second start port switch 22B is connected to the input port P1 provided in the PIP 510, and the bit value in the bit number [1] of the input port data is set. By confirming, it is possible to specify whether or not the game ball is detected by the second start port switch 22B. When the second start winning signal SS2 is in the ON state, the bit value in the bit number [1] of the input port data is “1”.

  Therefore, when it is determined as “1” in Step S202 (Step S202; Yes), the second start winning determination which is the value of the second start winning determination counter provided in the game control counter setting unit 594 is performed. The count value is updated so as to be counted up, for example, by adding 1 (step S203). On the other hand, when it is determined as “0” in step S202 (step S202; No), the second start winning determination counter is cleared and the count value is initialized to “0”. (Step S204).

  After executing one of the processes in steps S203 and S204, it is determined whether or not the bit value in the bit number [0] of the input port data read in step S201 is “1” (step S205). In this embodiment, a wiring for transmitting the first start winning signal SS1 from the first start port switch 22A is connected to the input port P0 included in the PIP 510, and the bit value in the bit number [0] of the input port data is set. By confirming, it is possible to specify whether or not the game ball is detected by the first start port switch 22A. When the first start winning signal SS1 is on, the bit value at the bit number [0] of the input port data is “1”.

  Therefore, when it is determined as “1” in Step S205 (Step S205; Yes), the first start winning determination which is the value of the first starting winning determination counter provided in the game control counter setting unit 594 is performed. The count value is updated so as to be counted up, for example, by adding 1 (step S206). On the other hand, when it is determined as “0” in step S205 (step S205; No), the first start winning determination counter is cleared and the count value is initialized to “0”. (Step S207).

  After executing one of the processes in steps S206 and S207, it is determined whether or not the first start winning determination count value has reached a predetermined determination value (for example, “2”) predetermined as a winning determination value. (Step S208). At this time, if the first start winning determination count value has reached the winning determination value (step S208; Yes), the value of the start port buffer (start port buffer value) provided in the game control buffer setting unit 595 is set to “ 1 "(step S209). Further, the first start winning determination counter is cleared and the count value is initialized to “0” (step S210).

  If the first start winning determination count value has not reached the winning determination value in step S208 (step S208; No), it is determined whether or not the second starting winning determination count value has reached the winning determination value (step S211). ). At this time, if the second start winning determination count value has not reached the winning determination value (step S211; No), the start winning determination process is terminated. On the other hand, if the second start winning determination count value has reached the winning determination value (step S211; Yes), the start port buffer value is set to “2” (step S212). Further, the second start winning determination counter is cleared and the count value is initialized to “0” (step S213).

  After executing one of the processes in steps S210 and S213, the CPU 505 reads the reserved storage number count value corresponding to the start port buffer value (step S214). For example, when the starting port buffer value is “1”, the value of the first reserved memory number counter (first reserved memory number count value) provided in the game control counter setting unit 594 is read, and the starting port buffer value is “ If “2”, the value of the second reserved memory number counter provided in the game control counter setting unit 594 (second reserved memory number count value) is read. Then, it is determined whether or not the read value in step S214 has reached a predetermined upper limit value (for example, “4”) (step S215 in FIG. 55). At this time, if the read value in step S214 does not reach the upper limit value, the starting condition for starting the variable display of the special symbol and the decorative symbol is effectively established. For example, if it is determined in step S208 shown in FIG. 54 that the first start winning determination count value has reached the winning determination value and then it is determined in step S215 that the read value has not reached the upper limit value, The first start condition for executing the special symbol game using the first special symbol by the one special symbol display device 4A and the variable display of the decorative symbol is established. Further, after it is determined in step S211 shown in FIG. 54 that the second start winning determination count value has reached the winning determination value, it is determined in step S215 that the read value has not reached the upper limit value. The second starting condition for executing the special symbol game using the second special symbol by the two special symbol display device 4B and the variable display of the decorative symbol is established.

  Thus, when the read value has not reached the upper limit value in step S215 (step S215; No), 1 is added to the reserved storage number count value corresponding to the start port buffer value (step S216). For example, when the starting port buffer value is “1”, 1 is added to the first reserved memory number count value, and when the starting port buffer value is “2”, 1 is added to the second reserved memory number count value. Then, the CPU 505 adds 1 to the value of the total reserved memory number counter (total reserved memory number count value) indicating the total reserved memory number that is the total value of the first reserved memory number and the second reserved memory number (step S217). ).

  Following the processing of step S217, the CPU 505 sets the start data corresponding to the start port buffer value at the head of the empty area in the start data storage unit 591C and stores it (step S218). For example, when the start port buffer value is “1”, start data indicating “first” is set, and when the start port buffer value is “2”, start data indicating “second” is set. The CPU 505 executes random number setting processing (step S219). After the random number setting process is executed in step S219, a setting for transmitting a start port winning designation command corresponding to the start port buffer value is performed (step S220). For example, when the start port buffer value is “1”, the storage address (first address) of the first start port winning designation command table in the ROM 506 is stored in the buffer area designated by the transmission command pointer in the transmission command buffer. On the other hand, when the starting port buffer value is “2”, the storage address (head address) of the second starting port winning designation command table in the ROM 506 is stored in the buffer area designated by the transmission command pointer in the transmission command buffer. The start opening winning designation command set in this way is performed from the main board 11 to the effect control board 12 by executing the main side communication control process of step S98 shown in FIG. 51 after the special symbol process process is completed, for example. Is transmitted.

  Further, the CPU 505 stores the storage address of the reserved memory number notification command table in the ROM 506 in the buffer area designated by the transmission command pointer in the transmission command buffer, etc. Is set to transmit (step S221). The first start opening winning designation command table is configured to include setting data for transmitting the first starting opening winning designation command and setting data for transmitting the reserved storage number notification command. When the second start opening winning designation command table is configured to include setting data for transmitting the second starting opening winning designation command and setting data for transmitting the pending storage number notification command As the processes of steps S220 and S221, only the storage address of the command table corresponding to the start port buffer value is stored in the buffer area of the transmission command buffer among the first start port winning specification command table and the second start port winning specification command table. do it. For example, the reserved memory number notification command set in this way is performed by executing the main side communication control process in step S98 shown in FIG. 2 is transmitted from the main board 11 to the effect control board 12 following the start opening winning designation command.

  When the read value has reached the upper limit value in step S215 (step S215; Yes), after executing the process of step S221, it is determined whether the start port buffer value is “1” or “2”. Determination is made (step S222). At this time, if the start port buffer value is “1” (step S222; “1”), the start port buffer is cleared and the buffer value is initialized to “0” (step S223), and then FIG. The process proceeds to step S211 shown in FIG. On the other hand, when the start port buffer value is “2” (step S222; “2”), the start port buffer is cleared and the buffer value is initialized to “0” (step S224). The start winning determination process is terminated.

  In this embodiment, when both of the first start port switch 22A and the second start port switch 22B detect the start winning of a game ball that is effective at the same time, both processes are executed by processing executed within 2 milliseconds. A process based on the fact that the switch has detected a start winning of a valid game ball is executed. That is, when it is determined in step S208 shown in FIG. 54 that the first start winning determination count value has reached the winning determination value, the processing in steps S209, S210, and S214 shown in FIG. After executing the processing of steps S215 to S221 shown in FIG. 54, the processing of step S223 is executed in response to the start port buffer value being “1” in step S222, and then the processing of step S211 shown in FIG. Proceed to processing. When it is determined in step S211 that the second start winning determination count value has reached the winning determination value, the processes of steps S212 to S214 shown in FIG. 54 are executed, and then steps S215 to S221 shown in FIG. After executing the above process, the process of step S224 is executed in response to the start port buffer value being “2” in step S222, and then the start winning determination process is terminated. Thereby, even when both the first start port switch 22A and the second start port switch 22B detect the start winning of the game balls that are effective at the same time, the processing based on the detection of both effective start winnings can be completed reliably.

  FIG. 56 is a flowchart showing an example of the random number setting process executed in step S219 of FIG. In this random number setting process, the CPU 505 executes a process for processing numerical data indicating the random value extracted from the random number circuit 509 by software. In FIG. 57, the CPU 505 uses a software to determine the numerical data indicating the random value extracted from the random value register 559A serving as the random value register R1D and the random value register 559B serving as the random value register R2D included in the random number circuit 509. It is explanatory drawing for demonstrating operation | movement until it processes into random number value MR1 for use and random number value MR6 for addition value determination.

  In the random number setting process shown in FIG. 56, the CPU 505 first sets the interrupt prohibited state (step S351), and then determines whether the start port buffer value is “1” or “2” (step S352). . If the game control microcomputer 100 automatically enters an interrupt disabled state in response to the start of the random number setting process, the process of step S351 need not be executed. If the start port buffer value is “1” in step S352 (step S352; “1”), numerical data is read from the random value register 559A as the random value register R1D provided in the random number circuit 509 shown in FIG. To extract (step S353). At this time, the CPU 505 may read the numerical data that becomes the random value stored in the random value register 559A by supplying the register read signal RRS1 to the random value register 559A of the random number circuit 509. When the start port buffer value is “2” in step S352 (step S352; “2”), numerical data is read and extracted from the random value register 559A as the random value register R2D included in the random number circuit 509. (Step S354). The numerical data extracted from the random number circuit 509 in this way is stored in a 16-bit general-purpose register of the CPU 505 or the like. For example, as shown in FIG. 57, among the numerical data extracted from the random number circuit 505, the upper byte of the numerical data extracted from the random value register 559A, the upper byte of the numerical data extracted from the random value register 559B, etc. The portion corresponding to the upper byte of the numerical data is stored as the upper byte GR1-1 in the general-purpose register of the CPU 505. Among the numerical data extracted from the random number circuit 509, the lower byte of the numerical data such as the lower byte of the numerical data extracted from the random value register 559A and the lower byte of the numerical data extracted from the random value register 559B The portion corresponding to is stored as a lower byte GR1-2 in a general-purpose register of the CPU 505. The numerical data extracted from the random number circuit 509 is not limited to that stored in the general-purpose register of the CPU 505, and may be stored in a predetermined area of the RAM 507, for example.

  Subsequently, the CPU 505 reads the stored value (refresh register value) of the built-in refresh register RR1 as numerical data that becomes a random number value for processing (step S355). The CPU 505 adds the refresh register value read in step S355 to the upper byte GR1-1 in the general-purpose register (step S356). At this time, the lower byte GR1-2 in the general-purpose register is left as it is. Thereafter, the CPU 505 obtains numerical data indicating the random value MR1 for determining the special figure display result based on the value stored in the general-purpose register, that is, the value obtained by adding the refresh register value serving as the processing random number to the upper byte GR1-1. Setting is made (step S357). As an example, when the random value MR1 for determining the special figure display result takes a value in the range of “0” to “65535”, the stored value of the general-purpose register and “FFFFH” are ANDed, or Numerical data indicating a 16-bit random value MR1 is set by outputting the stored value of the general-purpose register as it is and storing it in a predetermined area of the RAM 507. As another example, when the random number MR1 for determining the special figure display result takes a value in the range of “0” to “16383”, the stored value of the general-purpose register and “7F7FH” are ANDed. Numerical data indicating a 14-bit random value MR1 is set by storing it in a predetermined area of the RAM 507 or the like. When the random number value MR1 for determining the special figure display result takes a value in the range of “0” to “16383”, an arbitrary 14-bit value among the stored values of the general-purpose register is extracted as the random value MR1. In this way, a logical product operation with a predetermined logical value may be executed. Further, a logical sum operation may be executed instead of the logical product operation. At this time, the area of the RAM 507 in which numerical data indicating the random value MR1 is stored may be included in, for example, a random counter provided in the game control counter setting unit 594. Alternatively, the CPU 505 determines the free space in either the first special figure reservation storage unit 591A or the second special figure reservation storage unit 591B depending on whether the start port buffer value is “1” or “2”. The random value MR1 may be set by storing numerical data indicating the random value MR1 as reserved data at the beginning.

  Subsequent to the processing of step S357, the CPU 505 sets numerical data indicating a random value MR6 for determining the addition value based on the stored value of the general-purpose register (step S358). As an example, when the numerical data indicating the random value MR6 for determining the addition value takes a value in the range of “0” to “7”, the stored value of the general-purpose register and “C0C0H” are ANDed. Numerical data indicating a 4-bit random value MR6 is set by storing it in a predetermined area of the RAM 507 or the like. Note that a logical product operation with a predetermined logical value or the like may be executed so that an arbitrary 4-bit value of the stored value of the general-purpose register is extracted as the random value MR6. Further, a logical sum operation may be executed instead of the logical product operation. At this time, the area of the RAM 507 in which numerical data indicating the random value MR6 is stored may be included in a random counter provided in the game control counter setting unit 594, for example.

  Subsequent to the processing in step S358, numerical data indicating the random value MR2 for determining the big hit type is extracted from the random counter provided in the game control counter setting unit 594 (step S359). Then, the numerical data indicating the random value MR2 extracted in step S359 is used as reserved data at the head of the free area in the first special figure storage unit 591A or the second special figure storage unit 591B according to the start port buffer value. By setting, the extracted random number value is stored (step S360). In addition, when the numerical data indicating the random value MR1 is stored in the random counter provided in the game control counter setting unit 594 in step S357, the numerical data indicating the random value MR1 extracted from the random counter is the jackpot type. Along with the numerical data indicating the decision random value MR2, it may be set as the reserved data at the head of the empty area in the first special figure reservation storage unit 591A or the second special figure reservation storage unit 591B. Thereafter, the CPU 505 permits an interrupt (step S361), and ends the random number setting process. The process for setting the random value MR6 for determining the addition value may be executed every time the random value MR6 is read in the process of step S504 shown in FIG. In this case, when the process of step S504 is executed, the addition value is obtained without extracting new numerical data from the random number circuit 509 by executing the processes of steps S355, S356, and S358 shown in FIG. The numerical data indicating the random number value MR6 for determination may be updated. Alternatively, each time the process of step S504 is executed, numerical data may be extracted from the random number circuit 509 and the numerical data indicating the random value MR6 for determining the addition value may be updated. At this time, the numerical data extracted from the random number circuit 509 may be numerical data that is always stored in a certain random value register such as data stored in the random value register 559A, or each time the process of step S504 is executed, The data stored in the register 559A and the data stored in the random value register 559B may be extracted alternately.

  Further, the processing in step S356 is not limited to adding the refresh register value to the high-order byte GR1-1 in the general-purpose register, and the value obtained by executing an arbitrary operation is numerical data indicating the random value MR1. What should I do? As an example, by executing random number update processing in step S37 shown in FIG. 48 or step S94 shown in FIG. 51, 16-bit soft random numbers that are updated by software are prepared in the same manner as the random number values MR2 to MR5. In the process of step S356, first, the soft random number value is added to the upper byte GR1-1 and the lower byte GR1-2 in the general-purpose register. Subsequently, for example, the result of the addition is divided by “10000H (65536)”, and a part where the carry-over has occurred in the addition operation is excluded (ignored) by an operation that takes the remainder (modulo operation). The value obtained as a result of such calculation may be numerical data indicating the random value MR1.

  After the start winning determination process is executed in step S101 shown in FIG. 53, any one of the processes in steps S110 to S120 is selected and executed according to the value of the special figure process flag.

  The special symbol normal process of step S110 is executed when the value of the special symbol process flag is “0”. In the special symbol normal process, the first special symbol display device 4A and the second special symbol are based on the presence / absence of reserved data stored in the first special symbol storage unit 591A and the second special symbol storage unit 591B. It is determined whether or not to start the special game using the display device 4B. Also, in the special symbol normal processing, whether the variable display result of the special symbol, the decorative symbol, the color symbol, etc. is set to “big hit” or “small hit” based on the numerical data indicating the random value MR1 for determining the special symbol display result. A determination is made whether or not. Further, in the special symbol normal process, in response to the variable display result of the special symbol in the special symbol game, the confirmed special symbol (big hit symbol, the special symbol game by the first special symbol display device 4A and the second special symbol display device 4B) Either a small hit symbol or a lost symbol) is set.

  The variation pattern setting process in step S111 is executed when the value of the special figure process flag is “1”. This variation pattern setting process includes a pre-determined result on whether or not the variable display result is “big hit” or “small hit”, a reach determination result on whether or not the variable display state of the decorative symbol is in the reach state, etc. The process includes determining a variation pattern type as one of a plurality of types, and determining a variation pattern as a plurality of types in accordance with the determination result of the variation pattern type.

  The special symbol variation process in step S112 is executed when the value of the special symbol process flag is “2”. This special symbol variation process includes a process for setting the special symbol to be varied in the first special symbol display device 4A and the second special symbol display device 4B, and an elapsed time after the special symbol starts to vary. It includes processing to measure For example, every time the special symbol variation process of step S112 is executed, the value (special diagram variation timer value) in the special diagram variation timer provided in the game control timer setting unit 593 is decremented or incremented by one. Regardless of whether the game is a special game using the first special symbol in the first special symbol display device 4A or a special game using the second special symbol in the second special symbol display device 4B, a common timer is used. The elapsed time is measured. It is also determined whether or not the measured elapsed time has reached a special figure fluctuation time corresponding to the fluctuation pattern. As described above, the special symbol variation process in step S112 is performed in the special symbol variation in the special symbol game using the first special symbol in the first special symbol display device 4A or the second special symbol in the second special symbol display device 4B. This is a process for controlling the variation of the special symbol in the special figure game using the game according to a common processing routine. When the elapsed time since the start of the special symbol variation reaches the special symbol variation time, the value of the special symbol process flag is updated to “3”.

  The special symbol stop process in step S113 is executed when the value of the special symbol process flag is “3”. In this special symbol stop process, the first special symbol display device 4A or the second special symbol display device 4B stops the change of the special symbol, and the fixed special symbol which is the variable symbol display result is stopped and displayed. A process for setting is included. Then, a determination is made as to whether one of the big hit flag and the small hit flag provided in the game control flag setting unit 592 is on. If the big hit flag is on, the special process flag The value is updated to “4”, and when the small hit flag is on, the value of the special figure process flag is updated to “8”. When both the big hit flag and the small hit flag are off, the value of the special figure process flag is updated to “0”.

  The pre-opening process for the special winning opening in step S114 is executed when the value of the special figure process flag is “4”. This pre-opening process for the big winning opening is a process for starting the execution of the round in the big winning gaming state and setting the opening for the big winning opening based on the fact that the variable display result is “big hit” Etc. are included. At this time, for example, an upper limit of a period during which the big prize opening is in an open state may be set corresponding to the setting of the maximum number of big prize opening times. As an example, when the maximum value of the number of times of winning the big winning opening is set to “15” corresponding to the 15 round big hit state, the upper limit of the period during which the big winning opening is opened is set to “29 seconds”. On the other hand, if the maximum value for the number of times a big winning opening is opened is set to “2” corresponding to the two round big hit state, the upper limit of the period during which the big winning opening is opened is set to “0.5 seconds”. Set to.

  The special winning opening opening process in step S115 is executed when the value of the special figure process flag is “5”. This process during opening of the big winning opening is based on the process of measuring the elapsed time since the big winning opening is opened, the elapsed time measured, the number of game balls detected by the count switch 23, and the like. Processing for determining whether or not it is time to return the winning opening from the open state to the closed state is included. And when returning a special winning opening to a closed state, the process etc. which stop supply of the solenoid drive signal with respect to the solenoid for special prize opening doors should just be performed.

  The post-opening processing for the special winning opening in step S116 is executed when the value of the special figure process flag is “6”. The post-opening process for the big prize opening includes a process for determining whether or not the number of executions of the round in which the big prize opening is in an open state has reached the maximum number of open big prize openings, This includes a process for making a setting for transmitting an end designation command when hit.

  The big hit end process in step S117 is executed when the value of the special figure process flag is “7”. In the jackpot ending process, an ending effect as an effect operation for notifying the end of the jackpot gaming state is executed by an effect electrical component (effect device) such as the image display device 5, the speakers 8L and 8R, and the game effect lamp 9. A process of waiting until a waiting time corresponding to a period of time elapses, a process of performing various settings corresponding to the end of the big hit gaming state, and the like.

  The small hit pre-release process in step S118 is executed when the value of the special figure process flag is “8”. This pre-opening process for small hits is a setting for starting the execution of the variable winning action in the small hit game state and opening the big winning opening based on the fact that the variable display result is “small hit”, etc. The processing to perform is included. At this time, for example, the maximum value of the number of times that the big prize opening is opened is “0” because the variable display result is “small hit”, and the upper limit of the period during which the big prize opening is opened is set to “0. “5 seconds” may be set.

  The small hit releasing process in step S119 is executed when the value of the special figure process flag is “9”. In the small hit opening process, the process of measuring the elapsed time since the big prize opening is in the open state, and the timing for returning the big prize opening from the open state to the closed state based on the measured elapsed time, etc. The process etc. which determine whether or not were included are included. When returning the big prize opening to the closed state, a process of stopping the supply of the solenoid drive signal to the solenoid for the big prize opening door may be executed.

  The small hit end process in step S120 is executed when the value of the special figure process flag is “10”. In this small hit end process, a period in which an effect operation for notifying the end of the small hit game state is executed by an electric component (effect device) for effects such as the image display device 5, the speakers 8L and 8R, and the game effect lamp 9 The process of waiting until the waiting time corresponding to the elapses is included. Here, when the small hit gaming state is finished, the state of the pachinko gaming machine 1 before the small hit gaming state is continued without changing the state of the probability change flag and the short time flag.

  FIG. 58 is a flowchart showing an example of the special symbol normal process executed in step S110 of FIG. In the special symbol normal process shown in FIG. 58, the CPU 505 first determines whether or not the total reserved memory count value stored in the game control counter setting unit 594 is “0”, that is, the first reserved memory count. It is determined whether or not the total reserved memory number that is the total value of the second reserved memory numbers is “0” (step S231). At this time, if the total pending storage number count value is other than “0” (step S231; No), the start data is read from the start data storage unit 591C (step S232). Here, the start data stored in association with the hold number “1” in the start data storage unit 591C may be read.

  In this embodiment, the first start condition and the second start condition are not distinguished from each other, and it is assumed that the special game corresponding to the previously established start condition is executed sequentially. On the other hand, for example, on the condition that the second reserved memory number is not “0”, the special figure game using the second special figure is executed in preference to the special figure game using the first special figure. You may do it. In this case, for example, if the total reserved memory number count value is other than “0” in step S231, it is determined whether or not the second reserved memory number count value is “0”. If the second reserved storage number count value is “0”, the same processing as when the start data indicating “first” is read from the start data storage unit 591C is executed, while the second hold If the stored number count value is other than “0”, the same process as when the start data indicating “second” is read from the start data storage unit 591C may be executed. Alternatively, it is determined which of the first reserved memory number and the second reserved memory number is larger, and priority is given to a special game using a special symbol corresponding to the person with the larger reserved memory number. You may make it perform. In this case, for example, if the total reserved memory number count value is other than “0” in step S231, the first reserved memory number count value is compared with the second reserved memory number count value. When the first reserved storage number count value is larger, the same processing as when the start data indicating “first” is read from the start data storage unit 591C is executed, while the second hold When the stored number count value is larger, the same processing as when the start data indicating “second” is read from the start data storage unit 591C may be executed. At this time, if the first reserved memory number count value matches the second reserved memory number count value, the special game using the first special figure may be preferentially executed, or the second special figure may be executed. A special game using the game may be preferentially executed. In this way, by giving priority to the special figure game using the special symbol corresponding to the person with the larger number of reserved memories, it is possible to reduce the occurrence of invalid start winnings.

  Subsequent to the processing of step S232, for example, by subtracting 1 from the total reserved storage number count value, the total reserved storage number is updated so as to be decremented by 1, and the start data storage unit 591C uses the hold number “1”. The storage contents of the start data stored in the lower entries (for example, entries corresponding to the holding numbers “2” to “8”) are shifted up by one entry (step S233). Then, it is determined whether the start data read in step S232 is “first” or “second” (step S234).

  If it is determined in step S234 that the start data is “first” (step S234; first), the first special game using the first special figure by the first special symbol display device 4A is started. In response to the establishment of the 1 start condition, the variable special figure designation buffer value stored in the game control buffer setting unit 595 is set to “1” (step S235). On the other hand, when it is determined in step S234 that the start data is “second” (step S234; second), a special game using the second special figure by the second special symbol display device 4B is started. In response to the establishment of the second start condition, the variable special figure designation buffer value is set to “2” (step S236).

  After executing one of the processes in steps S235 and S236, the hold data is read from the special figure hold storage unit corresponding to the start-up data read in step S232 (step S237). For example, when the start data is “first”, the reserved data stored in association with the holding number “1” in the first special figure holding storage unit 591A is stored as a random value for determining the special figure display result. The numerical data indicating MR1 and the numerical data indicating the random value MR2 for determining the jackpot type are respectively read out. On the other hand, when the start data is “second”, the hold data stored in association with the hold number “1” in the second special figure hold storage unit 151B is used for special figure display result determination. The numerical data indicating the random number value MR1 and the numerical data indicating the random number value MR2 for determining the jackpot type are respectively read out.

  Subsequent to the processing in step S237, the pending storage number count value corresponding to the start data is decremented by 1, and an entry lower than the hold number “1” (for example, the hold number “ The stored contents of the pending data stored in the entries corresponding to “2” to “4”) are shifted upward by one entry (step S238). For example, when the start data is “first”, the first reserved memory number count value is decremented by 1, and the storage contents of the reserved data in the first special figure reservation storage unit 591A are shifted upward by one entry. Let On the other hand, when the start data is “second”, the second reserved memory number count value is decremented by 1, and the stored contents of the reserved data in the second special figure reservation storage unit 591B are stored one entry at a time. Shift to the top.

  After that, select and set the special figure display result determination table according to the start data as the use table for determining whether the variable display result is “big hit” or “small hit” (Step S239). For example, if the start data is “first”, the first special figure display result determination table 130A shown in FIG. 33A is set as the use table, while if the start data is “second”, FIG. The second special figure display result determination table 130B shown in B) is set as a use table. The CPU 505 refers to the special figure display result determination table set in this way, so that the numerical data indicating the special figure display result determination random number MR1 read in step S237 matches the big hit determination value data. Whether or not (step S240).

  If the numerical data indicating the random value MR1 matches the big hit determination value data in step S240 (step S240; Yes), the big hit flag provided in the game control flag setting unit 592 is set to the on state (step S241). ). At this time, the big hit type determination table 131 shown in FIG. 34 is selected and set as a use table for determining the big hit type as one of a plurality of types (step S242). Then, based on the numerical data indicating the jackpot type determination random value MR2 read in step S237, the jackpot type is set to “normal”, “first” by referring to the jackpot type determination table 131 set in step S242. One of a plurality of types of “1 probability variation” to “third probability variation” and “surprising accuracy” is determined (step S243). When the variable special figure designation buffer value is set to “2” in the process of step S236, a random value MR2 for determining the big hit type is assigned to the big hit type of “surprise” in the big hit type determining table 131. As a result, the jackpot type is not determined to be “accurate”. Corresponding to the jackpot type determined in step S243, the jackpot type buffer value is set to any one of “00” to “04” (step S244).

  If the numerical data indicating the random value MR1 does not match the jackpot determination value data in step S240 (step S240; No), the numerical value indicating the random number value MR1 for determining the special figure display result read in step S237. It is determined whether or not the data matches the loss determination value data (step S245). At this time, if it does not coincide with the loss determination value data (step S245; No), the small hit flag is set to the on state as being matched with the small hit determination value data (step S246).

  After executing one of the processes of step S244 and step S246, a confirmed special symbol is set corresponding to the determination result of the variable display result and the determination result of the jackpot type (step S247). As an example, when the numerical data indicating the random number value MR1 matches the loss determination value data in step S245, the loss pattern corresponding to the prior determination result indicating that the variable display result is “lost” The special symbol indicating the symbol “-” is set as the confirmed special symbol. On the other hand, if the numerical data indicating the random number MR1 matches the jackpot determination value data in step S240, “1”, “3”, which are jackpot symbols, according to the determination result of the jackpot type in step S243. , One of the special symbols indicating the number “7” is set as the confirmed special symbol. That is, according to the determination result that the jackpot type is “normal”, the special symbol indicating the number “3” that is the normal jackpot symbol is set as the confirmed special symbol. Further, according to the determination result that the big hit type is any one of “first probability variation” to “third probability variation”, the special symbol indicating the number “7” that becomes the probability variation big hit symbol is set as the confirmed special symbol. Further, according to the determination result that the big hit type is “surprise”, the special symbol indicating the number “1” that becomes the two round big hit symbol is set as the confirmed special symbol. Furthermore, when the numerical data indicating the random number value MR1 does not match the loss determination value data in step S245, a small hit symbol is obtained corresponding to the preliminary determination result that the variable display result is “small hit”. The special symbol indicating the number “5” is set as the confirmed special symbol.

  After the confirmed special symbol is set in step S247, the special symbol process flag value is updated to “1” corresponding to the variation pattern setting process (step S248), and then the special symbol normal process is terminated. . If the total number of reserved memories is “0” in step S231 (step S231; Yes), a predetermined demo display setting is performed (step S249), and the special symbol normal process is terminated.

  FIG. 59 is a flowchart showing an example of the variation pattern setting process executed in step S111 of FIG. In the variation pattern setting process shown in FIG. 59, the CPU 505 first determines whether or not the big hit flag is on (step S261). At this time, if the jackpot flag is on (step S261; Yes), the table selection shown in FIG. According to the setting, any one of the big hit variation pattern type determination tables 132A to 132I is selected and set as a use table for determining any one of a plurality of variation pattern types (step S262). Here, the gaming state in the pachinko gaming machine 1 may be specified from the state of the probability change flag and the time reduction flag provided in the game control flag setting unit 592.

  When the big hit flag is off in step S261 (step S261; No), it is determined whether or not the small hit flag is on (step S263). At this time, if the small hit flag is on (step S263; Yes), the table shown in FIG. 37D is based on whether the gaming state in the pachinko gaming machine 1 is the normal state, the probability variation state, or the short-time state. In accordance with the selection setting, any one of the small hit variation pattern type determination tables 133A to 133C is selected and set as a use table for determining one of a plurality of variation pattern types (step S264).

  When the small hit flag is OFF in step S263 (step S263; No), based on whether the gaming state in the pachinko gaming machine 1 is the normal state, the probability variation state, or the short-time state, FIG. In accordance with the table selection setting shown in FIG. 4, any one of the reach determination tables 134A to 134C is selected and set as a use table for determining whether or not the decorative symbol is derived and displayed in the reach display state (step S265). At this time, for example, the total reserved memory number is specified by reading the total reserved memory number count value stored in the game control counter setting unit 594 (step S266). Subsequently, a random value MR3 for reach determination is extracted from, for example, a random counter provided in the game control counter setting unit 594 (step S267). Then, based on the reach determination random number MR3 extracted in step S267, the presence / absence of the reach display state is determined by referring to one of the reach determination tables 134A to 134C set in step S265 (step S268). ), It is specified whether or not the determination result is a reach display state (step S269).

  When the reach determination result indicating that the reach display state is present is specified in step S269 (step S269; Yes), reach HA2-1 to reach HA2-3, reach HB2-1, reach HC2-1 in step S268. 39A to 39C as a use table for determining one of a plurality of variation pattern types in accordance with each determination result in the reach display state such as the determination result of FIG. 39 (A) to (C). Any one of the decision tables 135A to 135C is selected and set (step S270). On the other hand, when the reach determination result indicating that the reach display state is absent is specified in step S269 (step S269; No), non-reach HA1-1 to non-reach HA1-5, non-reach in step S268. In order to determine the variation pattern type as one of a plurality of types according to each determination result without reach display state such as determination results of HB1-1, non-reach HB1-2, non-reach HC1-1, and non-reach HC1-2. As the usage table, any one of the non-reach variation pattern type determination tables 136A to 136C shown in FIGS. 40A to 40C is selected and set (step S271).

  After executing any of the processes of steps S262, S264, S270, and S271, the random value MR4 for determining the variation pattern type is extracted from, for example, a random counter provided in the game control counter setting unit 594 (step S272). ). Then, based on the random value MR4 for determining the variation pattern type extracted in step S272, by referring to the use table set in any of steps S262, S264, S270, and S271, a plurality of variation pattern types are selected. Either one is determined (step S273).

  Here, in the processing of steps S272 and S273, the variation pattern of the decorative symbol corresponding to the special symbol game executed by the first special symbol display device 4A using the first special symbol on the basis that the first starting condition is satisfied. Whether to determine the type, or to determine the variation pattern type of the decorative symbol corresponding to the special symbol game executed using the second special symbol by the second special symbol display device 4B based on the fact that the second start condition is satisfied Regardless, the variation pattern type is determined to be one of a plurality of types using numerical data indicating the common random value MR4 for determining the variation pattern type updated by a common random counter or the like. Further, in the processing of steps S272 and S273, regardless of the determination result of the presence / absence of the reach display state in step S268, numerical data indicating the common random number value MR4 for determining the variation pattern type is used to perform the processing by a common processing module. The variation pattern type can be determined as one of a plurality of types. As an example, in the process of step S273, the variation pattern type may be determined with reference to the determination table stored in the address of the ROM 506 set in the determination table pointer.

  After the variation pattern type is determined in step S273 in this way, based on the determination result of the variation pattern type, as a use table for determining one of a plurality of types of variation patterns, FIG. 41 and FIG. And, one of a plurality of types of variation pattern determination tables such as hit variation pattern determination tables 137A to 137C shown in FIG. 4B and loss variation pattern determination tables 138A and 138B shown in FIGS. ). Subsequently, the random value MR5 for determining the variation pattern is extracted from, for example, a random counter provided in the game control counter setting unit 594 (step S275). Then, based on the random value MR5 for determining the variation pattern extracted in step S275, the variation pattern is determined as one of a plurality of types by referring to the variation pattern determination table set in step S274 (step S276). .

  Here, in the processes of steps S275 and S276, the decorative symbol variation pattern corresponding to the special symbol game executed by the first special symbol display device 4A using the first special symbol when the first start condition is satisfied. Whether or not the variation pattern of the decorative symbol corresponding to the special symbol game executed using the second special symbol is determined by the second special symbol display device 4B based on the fact that the second start condition is satisfied Instead, the variation pattern is determined to be one of a plurality of types using numerical data indicating the common random value MR5 for determining the variation pattern updated by a common random counter or the like. Further, in the processes of steps S275 and S276, the numerical value data indicating the common random number value MR5 used for determining the fluctuation pattern is used to change by the common processing module regardless of the determination result of the presence / absence of the reach display state in step S268. The pattern can be determined as one of a plurality of types. As an example, in the process of step S276, the variation pattern may be determined with reference to the determination table stored at the address of the ROM 506 set in the determination table pointer.

  Following the determination of the variation pattern in step S276, a special figure variation time corresponding to the variation pattern determination result is set (step S277). Thereafter, according to the variable special symbol designation buffer value, the special symbol game using the first special symbol by the first special symbol display device 4A and the special symbol game using the second special symbol by the second special symbol display device 4B. The setting for starting the variation of the special symbol is performed so as to start any of the above (step S278). As an example, if the variable special symbol designation buffer value is “1”, a setting for transmitting a drive signal for updating the display of the first special symbol by the first special symbol display device 4A is performed. On the other hand, if the variable special symbol designation buffer value is “2”, a setting for transmitting a drive signal for updating the display of the second special symbol by the second special symbol display device 4B is performed.

  After the process of step S278 is executed, settings for transmitting various commands for starting the change of the special symbol are performed (step S279). For example, when the variation special figure designation buffer value is “1”, the CPU 505 sequentially issues a first variation start command, a variation pattern designation command, and a variable display result notification command from the main board 11 to the effect control board 12. For transmission, the setting data indicating the storage address (first address) in the ROM 506 of the first variation start command table prepared in advance is transmitted for presentation included in the transmission command buffer provided in the game control buffer setting unit 595. Store in the buffer area specified by the send command pointer in the command buffer. On the other hand, when the variation special figure designation buffer value is “2”, the CPU 505 sequentially issues a second variation start command, a variation pattern designation command, and a variable display result notification command from the main board 11 to the effect control board 12. In order to transmit, setting data indicating the storage address in the ROM 506 of the second variation start command table prepared in advance is stored in the buffer area designated by the transmission command pointer in the effect transmission command buffer. When the setting in step S279 is performed, the main board 11 changes to the effect control board 12 every time the main-side communication control process in step S98 shown in FIG. In contrast, the first variation start command or the second variation start command, the variation pattern designation command, and the variable display result notification command are sequentially transmitted.

  Following the setting in step S279, the value of the special figure process flag is updated to “2” which is a value corresponding to the special symbol fluctuation process (step S280), and then the fluctuation pattern setting process is terminated.

  FIG. 60 is a flowchart showing an example of the special symbol stop process executed in step S113 of FIG. In the special symbol stop process shown in FIG. 60, the CPU 505 first determines whether or not the big hit flag is on (step S291). At this time, if the big hit flag is on (step S291; Yes), the big hit start production waiting time is set (step S292). For example, in the process of step S 292, a timer initial value determined in advance corresponding to the jackpot start time production waiting time may be set in the game control process timer provided in the game control timer setting unit 593.

  Subsequent to the processing in step S292, setting for transmitting a hit start designation command from the main board 11 to the effect control board 12 is performed (step S293). For example, in the process of step S293, setting data indicating the storage address in the ROM 506 of the hit start specifying command table prepared in advance for transmitting the hit start specifying command is designated by the send command pointer in the effect transmission command buffer. It only has to be stored in the buffer area. Thereafter, the big hit flag is cleared and turned off (step S294). In addition, a setting for ending the probability variation state and the time reduction state is performed (step S295). For example, in step S295, a process of clearing the probability change flag or the time-short flag to turn it off, a process of clearing a special-figure variation counter for counting the number of times that the special-figure game is executed in the probability change state or the time-short state, etc. It only has to be executed. Then, the value of the special symbol process flag is updated to “4” which is a value corresponding to the pre-opening process for the special winning opening (step S296), and then the special symbol stop process is ended.

  If the big hit flag is off in step S291 (step S291; No), it is determined whether the small hit flag is on (step S297). At this time, if the small hit flag is ON (step S297; Yes), a small hit start start waiting time is set (step S298). For example, in the process of step S298, a timer initial value determined in advance corresponding to the small hitting start time production waiting time may be set in the game control process timer.

  Subsequent to the process of step S298, as in the process of step S293, a setting for transmitting a hit start designation command from the main board 11 to the effect control board 12 is performed (step S299). Thereafter, the small hit flag is cleared and turned off (step S300). Then, the value of the special figure process flag is updated to “8”, which is a value corresponding to the small hit release pre-processing (step S301).

  If the small hit flag is off in step S297 (step S297; No), the value of the special figure process flag is updated to “0” which is a value corresponding to the special symbol normal process (step S302). . After executing one of the processes in steps S301 and S302, it is determined whether or not to end the probability change state or the time reduction state (step S303). For example, in the process of step S303, the value of the special figure fluctuation number counter (special figure fluctuation number count value) is updated by, for example, subtracting 1 or adding 1, and the updated special figure fluctuation number count value is a predetermined value. It is determined whether or not the special game state end determination value is met. At this time, if it matches the special game state end determination value, the probability variation state or the time reduction state may be terminated by clearing the probability variation flag or the time reduction flag, etc., and controlled to the normal state. On the other hand, if it does not coincide with the special game state end determination value, the state of the probability variation flag or the time reduction flag may be maintained and the process of step S303 may be ended. After executing the end determination of the probability variation state or the short time state, the special symbol stop process ends. Note that the end determination based on the special figure variation count value may be performed only in the short-time state, and the probability variation state may be continued until the next variable display result becomes “big hit”. . Alternatively, for example, by extracting numerical data indicating a random value for determining the probability change state end from a random counter provided in the game control counter setting unit 594 and referring to a probability change state end determination table stored in advance in the ROM 506 or the like. Further, it may be determined whether or not to end the probability variation state.

  FIG. 61 is a flowchart showing an example of the big hit end process executed in step S117 shown in FIG. In the jackpot end process shown in FIG. 61, the CPU 505 first determines whether or not the big hit end presentation waiting time has elapsed (step S311). As an example, in the post-opening of the big prize opening in step S116 shown in FIG. 53, when the value of the special figure process flag is updated to “7”, a timer initial value determined in advance corresponding to the effect waiting time at the end of the big hit A value is set in the game control process timer. In this case, in the process of step S311, for example, the game control process timer value is updated by subtracting 1 or the like, and depending on whether or not the updated game control process timer value matches a predetermined waiting time elapsed determination value. What is necessary is just to determine whether the production waiting time at the end of the big hit has elapsed. If the big hit end presentation waiting time has not elapsed in step S311 (step S311; No), the big hit end processing is ended as it is.

  On the other hand, when the big hit end presentation waiting time has elapsed in step S311 (step S311; Yes), the big hit type buffer value stored in the game control buffer setting unit 595 is read (step S312). Subsequently, it is determined whether or not the jackpot type buffer value read in step S312 is “0” corresponding to the “normal” jackpot type (step S313). At this time, if the big hit type buffer value is “0” (step S313; Yes), the setting for starting the control to the short time state is performed (step S314). As an example, in the process of step S314, the time reduction flag is set to the on state, and the count initial value (for example, “100”) determined in advance corresponding to the upper limit value of the special figure game that can be executed in the time reduction state. May be set in the special figure fluctuation counter.

  When the big hit type buffer value is other than “0” in step S313 (step S313; No), setting for starting control to the probability variation state is performed (step S315). As an example, in the process of step S315, the probability variation flag is set to the on state, and a predetermined count initial value corresponding to the upper limit value of the special figure game that can be executed in the probability variation state is the number of times of the special diagram variation. What is necessary is just to set to a counter. If the probability variation state is continued until the next variable display result becomes “big hit”, it is not necessary to set the special figure fluctuation number counter in the process of step S315. After executing one of the processes in steps S314 and S315, the special figure process flag value is updated to “0” which is a value corresponding to the special symbol normal process (step S316), and then the big hit end process is terminated. To do.

  Next, the operation in the effect control board 12 will be described. In the effect control board 12, when the power supply voltage is supplied from the power supply board or the like, the CPU of the effect control microcomputer 120 is activated, and the effect control main process as shown in the flowchart of FIG. 62 is executed. Also in the production control microcomputer 120, the security check process may be executed by the CPU when the power is turned on or the system is reset, and the production control microcomputer 120 may be in the security mode. In this case, after it is determined in the security check process that no unauthorized changes have been made to the ROM, after the security time has elapsed, the process shifts to a user mode in which execution of the effect control main process is started. That's fine. When the effect control main process shown in FIG. 62 is started, the CPU of the effect control microcomputer 120 first executes a predetermined initialization process (step S401), and is built in or externally attached to the effect control microcomputer 120. The RAM is cleared, various initial values are set, and the register of a CTC (counter / timer circuit) built in the microcomputer 120 for effect control is set.

  Thereafter, a random number update process is executed (step S402), and numerical data indicating random values counted by a random counter provided in the RAM of the effect control microcomputer 120 as various random value values used for effect control, Update by software. Subsequently, it is determined whether or not the timer interrupt flag is on (step S403). The timer interrupt flag is set to the on state every time a predetermined time (for example, 2 milliseconds) elapses based on, for example, the CTC register setting in the effect control microcomputer 120.

  On the side of the effect control board 12, an interrupt for receiving an effect control command from the main board 11 is generated separately from the timer interrupt that occurs every time a predetermined time elapses. This interrupt may be an interrupt generated when the received data is full in the serial communication circuit included in the production control microcomputer 120, for example. Alternatively, when a signal line for transmitting an effect control INT signal is wired between the main board 11 and the effect control board 12, an interrupt is generated when the effect control INT signal is turned on. Also good. In response to the occurrence of such an interrupt, the CPU of the production control microcomputer 120 automatically sets the interrupt prohibition, but if a CPU that does not automatically enter the interrupt prohibition state is used, an interrupt prohibition instruction (DI It is desirable to issue an order). The CPU of the effect control microcomputer 120 executes, for example, a predetermined command reception interrupt process in response to an interrupt due to reception data full or an interrupt due to the effect control INT signal being turned on. In this command reception interrupt process, communication data stored in a communication data register or the like provided corresponding to the serial communication circuit of the effect control microcomputer 120 is fetched. Alternatively, in the command reception interrupt process, a predetermined input port that receives a control signal transmitted from the main board 11 via the relay board 18 among the input ports included in the PIP or the like included in the effect control microcomputer 120. A control signal that becomes an effect control command may be captured. The effect control command fetched at this time is stored in an effect control command reception buffer provided in the RAM of the effect control microcomputer 120, for example. As an example, when the production control command has a 2-byte configuration, the first byte (MODE) and the second byte (EXT) are sequentially received and stored in the production control command reception buffer. Thereafter, the CPU of the effect control microcomputer 120 sets the interrupt permission, and then ends the command reception interrupt process.

  If the timer interrupt flag is off in step S403 (step S403; No), the process returns to step S402. On the other hand, if the timer interrupt flag is on in step S403 (step S403; Yes), the timer interrupt flag is cleared and turned off (step S404), and command analysis processing is executed (step S405). . In the command analysis process executed in step S405, for example, after reading various effect control commands transmitted from the game control microcomputer 100 of the main board 11 and stored in the effect control command reception buffer, the reading is performed. Settings and control corresponding to the issued effect control command are performed.

  After executing the command analysis process in step S405, an effect control process is executed (step S406). In the effect control process, for example, an effect image display operation in the display area of the image display device 5, an audio output operation from the speakers 8L and 8R, and a lighting operation in the game effect lamp 9 and the decoration LED are performed. With respect to the control content of the effect operation using the (effect device), determination, determination, setting, etc. according to the effect control command and the like transmitted from the main board 11 are performed.

  FIG. 63 is a flowchart showing an example of the effect control process executed in step S406 of FIG. In the effect control process shown in FIG. 63, the CPU of the effect control microcomputer 120 performs the following steps S160 to S160 according to the value of the effect process flag provided in the RAM of the effect control microcomputer 120, for example. One of the processes in S166 is selected and executed.

  The decorative symbol variation start waiting process in step S160 is a process executed when the value of the effect process flag is “0”. In the decorative symbol variation start waiting process, the image display device 5 depends on whether one of the first variation start command and the second variation start command is received as the variation start command transmitted from the main board 11. Starts variable display of decorative symbols on the “left”, “middle”, and “right” decorative symbol displays 5L, 5C, and 5R provided in the display area, and variable display of color symbols on the color symbol display unit. The process of determining whether or not to perform is included. At this time, if it is determined that variable display is started, the value of the effect process flag is updated to “1”.

  The decorative symbol variation setting process in step S161 is a process executed when the value of the effect process flag is “1”. In this decorative symbol variation setting process, the start of the special symbol game using the first special symbol by the first special symbol display device 4A or the start of the special symbol game using the second special symbol by the second special symbol display device 4B. In order to perform various production operations including variable display of decorative designs and color designs in response to the The process of determining the presence or absence, etc., and selecting and setting any one of a plurality of types of effect control patterns prepared in advance as the use pattern according to the determination result is included. After such determination and setting are performed, the value of the production process flag is updated to “2”.

  The decorative symbol variation process in step S162 is a process executed when the value of the effect process flag is “2”. In the decorative symbol variation processing, for example, an effect control pattern to be used corresponding to a value of an effect control process timer (effect control process timer value) provided in the RAM of the effect control microcomputer 120 or the like A process for reading out various control data from, and performing various effects control during variable display of decorative symbols is included. Then, in response to, for example, that the effect control process timer value has reached a predetermined variable display end value (for example, “0”) or that a decorative symbol stop command transmitted from the main board 11 has been received. A final decorative symbol as a final stop symbol that is a variable display result of the symbol is displayed in a completely stopped state. If the effect control process timer value is set to the variable display end value and the fixed decorative symbol is displayed in a completely stopped state, the variable display time corresponding to the variation pattern specified by the variation pattern designation command has elapsed. Sometimes, without depending on the effect control command from the main board 11, it is possible to determine and display the variable display result by autonomously deriving and displaying the determined decorative symbol on the effect control board 12 side. When the finalized decorative symbol is displayed as a complete stop, the value of the effect process flag is updated to “3”.

  The decorative symbol variation end process in step S163 is a process executed when the value of the effect process flag is “3”. This decoration symbol variation end process includes a process of determining whether or not a hit start designation command transmitted from the main board 11 has been received. At this time, if it is determined that the hit start designation command has been received, the value of the rendering process flag is updated to “4” when the variable display result specified from the hit start designation command is “big hit”. Is done. On the other hand, when the variable display result specified from the hit start designation command is “small hit”, the value of the effect process flag is updated to “5”. Further, when a predetermined time has elapsed without receiving the hit start designation command, the value of the effect process flag is updated to “0” in response to the variable display result being “lost”.

  The big hit control effect process in step S164 is a process executed when the value of the effect process flag is “4”. In the effect processing during the big hit control, for example, an effect control pattern corresponding to the fact that the variable display result is “big hit” or the like is set, and an effect image based on the set content is displayed in the display area of the image display device 5. Or by outputting sound number data to the sound control board 13 and outputting sound and sound effects from the speakers 8L and 8R, and turning on the game effect lamp 9 and the decoration LED by outputting an electric decoration signal to the lamp control board 14 This includes processing for controlling various performance operations in the big hit gaming state such as turning off / off / flashing. Then, for example, the value of the effect process flag is updated to “6” in response to receiving a hit end designation command transmitted from the main board 11.

  The effect process during small hit control in step S165 is a process executed when the value of the effect process flag is “5”. In the effect process during the small hit control, for example, an effect control pattern is set in response to the variable display result being “small hit”, and an effect image based on the set content is displayed on the image display device 5. Displaying in the area, outputting sound and sound effects from the speakers 8L and 8R by outputting the sound number data to the sound control board 13, and outputting the electric decoration signal to the lamp control board 14 for the game effect lamp 9 and decoration Processing for controlling various performance operations in the small hit gaming state such as turning on / off / flashing the LED is included. Then, for example, the value of the effect process flag is updated to “6” in response to receiving a hit end designation command transmitted from the main board 11.

  The ending effect process in step S166 is a process executed when the value of the effect process flag is “6”. In this ending effect process, an effect control pattern or the like corresponding to the end of the big hit game state or the small hit game state is set, and an effect image based on the set content is displayed in the display area of the image display device 5. In addition, sound and sound effects are output from the speakers 8L and 8R by outputting the sound number data to the sound control board 13, and the game effect lamp 9 and the decoration LED are turned on / off by outputting an electric decoration signal to the lamp control board 14. This includes processing for controlling various performance operations corresponding to the end of the big hit gaming state or the small hit gaming state, such as blinking / flashing. Then, the value of the effect process flag is updated to “0” in response to the end of the effect operation.

  Next, the operation in the payout control board 15 will be described. In the payout control board 15, the payout control microcomputer 150 is activated in response to the start of power supply from the power supply board 10 and the reset signal to the payout control microcomputer 150 becoming high level (off state). A payout control main process as shown in the flowchart of FIG. 64 is executed. Also in the payout control microcomputer 150, when the power is turned on or the system is reset, the security check process may be executed by the CPU so that the payout control microcomputer 150 enters the security mode. In this case, after it is determined in the security check process that no unauthorized changes have been made to the ROM, after the security time has elapsed, the process shifts to a user mode in which execution of the payout control main process is started. That's fine. When the payout control main process shown in FIG. 64 is started, the payout control microcomputer 150 first sets the interrupt disabled state (step S421) and sets the interrupt mode (step S422). For example, in step S422, the maskable interrupt mode [2] is set. Subsequently, settings relating to the stack pointer such as setting of a stack pointer designation address are performed (step S423). The internal register is set (initialized) (step S424). Further, the CTC and PIP included in the payout control microcomputer 150 are set (step S424).

  Thereafter, the RAM of the payout control microcomputer 150 is set to be accessible (step S425). Subsequently, for example, a switch signal transmitted from the clear switch 304 installed on the power supply board 10 by checking a terminal state at any of a plurality of input ports provided in the PIP included in the payout control microcomputer 150. Based on the signal state of (clear signal), it is determined whether or not the clear switch 304 is turned on (step S427). Here, the payout control microcomputer 150 may confirm the state of the clear signal only once through the input port, but may confirm the state of the clear signal a plurality of times.

  If the clear switch 304 is off in step S427 (step S427; No), it is determined whether or not a predetermined backup flag in the payout control microcomputer 150 is on (step S428). The state of the backup flag in the payout control microcomputer 150 is set in a predetermined area such as a RAM provided in the payout control microcomputer 150 when power supply is stopped. The backup flag setting location is backed up by the backup power source, so that the state of the backup flag is saved even when the power supply is stopped.

  If the backup flag is on in step S428 (step S428; Yes), the RAM data provided in the payout control microcomputer 150 is checked to determine whether the check result is normal (step S429). In the process of step S429, for example, a checksum is calculated using data stored in a specific area of the RAM, and the calculated checksum is compared with the checksum stored in the payout checksum buffer. Here, the payout checksum buffer stores a checksum calculated by the same processing when the power supply was stopped last time. If the comparison results do not match, it is determined that the check results are not normal because the data in the specific area of the RAM is different from the data when the power supply is stopped.

  When the check result in step S429 is normal (step S429; Yes), recovery for returning the control state of the payout control board 15 such as the internal state of the payout control microcomputer 150 to the state when the power supply is stopped, for example. The time setting is performed to restore the control state before the power interruption (step S430). For example, when the power supply to the pachinko gaming machine 1 is stopped, if the value of a predetermined prize ball unpaid counter is stored in the backup area in the RAM of the payout control microcomputer 150, the process of step S430 In this case, the stored data in the RAM backup area may be read out and set in the award ball non-payout counter.

  When the clear switch 304 is on in step S427 (step S427; Yes), when the backup flag is off in step S428 (step S428; No), or the check result is not normal in step S429. Sometimes (step S429; No), initialization processing corresponding to power-on or system reset that is not at the time of power failure recovery is executed. In this initialization process, the RAM in the payout control microcomputer 150 is cleared (initialized) (step S431), and a work area to be a work area is set (step S432). In the process of step S431, the predetermined data stored in the RAM of the payout control microcomputer 150 may be set to an arbitrary value or a predetermined initial value. Further, the entire area of the RAM in the payout control microcomputer 150 may be initialized, or a predetermined area may be left as it is while a part of the area is initialized.

  After executing one of the processes in steps S430 and S432, the interrupt is permitted (step S433), and various interrupts are awaited. In addition, before setting the interrupt enabled state in step S433, for example, by setting the CTC register in the payout control microcomputer 150, a timer interrupt is generated every predetermined time (for example, 2 milliseconds). The internal settings of the payout control microcomputer 150 may be performed. Also, serial communication initial setting processing for initial setting of serial communication operation, interrupt initial setting processing for initial setting regarding interrupt processing executed based on an interrupt request, and the like may be executed.

  Subsequently, it is determined whether or not the timer interrupt flag is on (step S434). The timer interrupt flag is set to an on state when a time-out occurs in the CTC in the payout control microcomputer 150, for example. If the timer interrupt flag is off (step S434; No), the process of step S434 is repeatedly executed and the process waits.

  On the payout control board 15 side, an interrupt for receiving a payout control command from the main board 11 is generated separately from a timer interrupt that occurs every time a predetermined time elapses. This interrupt may be an interrupt generated when the received data is full in the serial communication circuit included in the payout control microcomputer 150, for example. In response to the occurrence of such an interrupt, the CPU of the payout control microcomputer 150 automatically sets the interrupt prohibition, but if a CPU that does not automatically enter the interrupt prohibition state is used, an interrupt prohibition instruction (DI It is desirable to issue an order). The CPU of the payout control microcomputer 150 executes, for example, a predetermined command reception interrupt process in response to an interruption due to the reception data full. In this command reception interrupt process, communication data stored in a communication data register or the like provided corresponding to the serial communication circuit of the payout control microcomputer 150 is fetched. The payout control command fetched at this time is stored in a payout control command reception buffer provided in a RAM or the like in the payout control microcomputer 150, for example. As an example, when the payout control command has a 2-byte configuration as shown in FIG. 6A, the first byte (MODE) and the second byte (EXT) are sequentially received to receive the payout control command. To store. Thereafter, the CPU of the payout control microcomputer 150 sets the interrupt permission, and then ends the command reception interrupt process.

  If the timer interrupt flag is on in step S434 (step S434; Yes), the timer interrupt flag is cleared and turned off (step S435), and the payout control timer interrupt process is executed (step S435). Step S436) and the process returns to Step S434.

  FIG. 65 is a flowchart showing an example of a payout control timer interrupt process executed in step S436 of FIG. This payout control timer interruption process is a process that becomes a payout control process for controlling the payout motor 51 in accordance with the payout control command transmitted from the main board 11. In the payout control timer interruption process shown in FIG. 65, the CPU of the payout control microcomputer 150 first executes a predetermined input / output process (step S491) and is provided in, for example, the PIP in the payout control microcomputer 150. The state of a predetermined bit in the input port is checked, or predetermined control data is set for a predetermined bit in an external bus interface or the like in the payout control microcomputer 150.

  Subsequently, the CPU of the payout control microcomputer 150 executes card unit processing, and performs communication with the card unit connected to the payout control board 15 via the interface board (step S492). Further, the CPU of the payout control microcomputer 150 checks the presence or absence of various errors that occur on the payout control board 15 side, and executes payout side error processing for coping with the generated errors (step S493). For example, in payout-side error processing, signal states from the full switch 26, the ball-out switch 27, the payout motor position sensor 71, the payout count switch 72, etc. are checked, or a serial communication circuit in the payout control microcomputer 150 is used. The presence / absence of various errors occurring on the payout control board 15 side is determined by checking the communication state. When the occurrence of an error is detected, for example, a display operation corresponding to the type of error that has occurred in the error display LED 74 is executed, or a payout notification command for notifying the main substrate 11 of the occurrence of the error is transmitted. It suffices if a setting for performing the above is performed. Thereafter, for example, when a procedure for canceling an error caused by turning on the error cancel switch 73 is taken, for example, the display of the error display LED 74 is initialized or the main substrate 11 is notified of the error cancel. Setting for transmitting a payout notification command is required.

  After the payout side error process is executed in step S493, a payout operation control process for controlling the payout operation of the game ball according to a ball lending request from the card unit or a payout number designation command from the main board 11 is performed. This is executed (step S494). In the payout operation control process, a setting for transmitting a prize ball ACK command when a payout number designation command from the main board 11 is received may be performed. Or you may perform the process by which the setting for transmitting a prize ball ACK command is performed as a process separate from a payout operation control process.

  Following the payout operation control process in step S494, a payout control command transmitted from the main board 11 is received or a payout notification command is transmitted to the main board 11 by executing a payout side communication control process. Communication control is performed. As an example, in the payout side communication control process, a payout control command acquisition process for acquiring a payout control command transmitted from the main board 11 by serial communication is executed. In the payout control command acquisition process, the payout control command stored in the payout control command reception buffer is read out, and a flag and a buffer corresponding to the read out payout control command are set. As another example, in the payout-side communication control process, the payout notification command can be transmitted by sending a transmission operation instruction to a transmission circuit included in the serial communication circuit of the payout control microcomputer 150. When such payout-side communication control processing is completed, the payout control timer interrupt processing is ended after the interrupt is permitted.

  Hereinafter, a specific operation example in the pachinko gaming machine 1 will be described. In the main board 11, the security check program 506A stored in the ROM 506 or the like is stored in the ROM 506 or the like when the initial power is supplied from the power board 10 (when power is turned on without a backup power source) or when the CPU 505 is restarted after a system reset occurs. Is read out and executed, the gaming control microcomputer 100 enters the security mode.

  At this time, as a process corresponding to the security check program 506A, for example, a security check process as shown in FIG. 47 is executed. Here, the security time when the game control microcomputer 100 is in the security mode is set in advance in the bit number [2-0] or the bit number [4-3] of the security time setting KSES stored in the program management area of the ROM 506. Depending on the stored bit value, a time component different from the fixed time can be included.

  For example, if the bit value in the bit number [2-0] of the security time setting KSES is a value other than “000” (step S2 shown in FIG. 47; No), the setting contents as shown in FIG. Correspondingly, in addition to the fixed time, any one of a plurality of extension times that can be selected in advance can be set as a time component included in the security time (step S4). If the bit value [4-3] of the security time setting KSES is a value other than “00” (step S6; No), the short mode or the long mode as shown in FIG. 12C is supported. Then, a variable setting time that changes in a predetermined time range each time the initial setting process is executed based on system reset or power-on can be set as a time component included in the security time (step S8).

  Until the security time set in this way has elapsed (step S14; No), the execution of the game control main process by the user program stored in the ROM 506 is not started. Then, the operation of generating numerical data to be a random number value by the random number circuit 509 may not be started during the period in which the game control microcomputer 100 is in the security mode. As a result, it becomes difficult to specify the operation start timing of the random number circuit 509 or the numerical data to be updated from the operation start timing due to power-on of the pachinko gaming machine 1 or system reset, and the analysis result of the game control processing program By connecting a so-called “hanging board” and inputting a fraud signal at a predetermined timing, it is possible to reliably prevent actions such as illegally generating a big hit gaming state.

  As an example, the bit value in the bit number [2-0] of the security time setting KSES is set to a different value for each model of the pachinko gaming machine 1. In this case, the extension time set in step S4 shown in FIG. 47 can be made different for each model of the pachinko gaming machine 1, and the operation start timing of the random number circuit 509 is determined from the operation start timing of the pachinko gaming machine 1. It becomes difficult to specify. Further, by setting the bit value in the bit number [4-3] of the security time setting KSES to “01” or “10”, the variable setting time set in step S8 is varied for each system reset. This makes it extremely difficult to specify the operation start timing of the random number circuit 509 from the operation start timing of the pachinko gaming machine 1.

  FIG. 66 is a timing chart for explaining the operation of the random number circuit 509 built in the game control microcomputer 100 mounted on the main board 11. FIG. 66A shows the control clock CCLK generated by the control clock generation circuit 111 mounted on the main board 11. FIG. 66B shows the random number clock RCLK generated by the random number clock generation circuit 112. As shown in FIGS. 66A and 66B, the oscillation frequency of the control clock CCLK and the oscillation frequency of the random number clock RCLK are different from each other. It does not become an integral multiple of the other oscillation frequency.

  As shown in FIG. 66 (B), the random number clock RCLK rises from a low level to a high level at timings T10, T11, T12,. The random number clock RCLK is supplied to the random number external clock terminal ERC of the game control microcomputer 100 and input to the clock terminal CK in the clock flip-flop 552 provided in the random number circuit 509 shown in FIG. The clock flip-flop 552 responds to the rising edge of the random number clock RCLK input to the clock terminal CK with the latch clock RC0 fed back from the negative phase output terminal (inverted output terminal) Q bar to the D input terminal. Are taken in (latched) and output as a random number update clock RGK from the positive phase output terminal (non-inverted output terminal) Q. Thereby, as shown in FIG. 66 (C), the random number update clock RGK rises from the low level to the high level at the timing T10, T12, T14,..., And is half the oscillation frequency of the random number clock RCLK. The signal has an oscillation frequency. For example, if the oscillation frequency of the random number clock RCLK is 20 MHz, the oscillation frequency of the random number update clock RGK is 10 MHz. Since the oscillation frequency of the random number clock RCLK is neither an integer multiple nor a fraction of the oscillation frequency of the control clock CCLK, the oscillation frequency of the random number update clock RGK is the oscillation frequency of the control clock CCLK. Different frequency. The random number generation circuit 553 updates the numerical data in the count value permutation RCN in response to, for example, the rising edge of the random number update clock RGK. The random number sequence change circuit 555 changes the numerical data update order in the count value permutation RCN output from the random number generation circuit 553 based on the setting of the random number update rule by the random number sequence change setting circuit 556 as a random number sequence RSN. Output. Thus, the numerical data in the random number sequence RSN is updated in response to the rising edge of the random number update clock RGK, for example, as shown in FIG. 66 (D).

  The latch clock RC0 output from the clock flip-flop 552 is an inverted signal of the random number update clock RGK, the oscillation frequency thereof is the same as the oscillation frequency of the random number update clock RGK, and its phase is equal to the phase of the random number update clock RGK and π It differs by (= 180 °). The latch clock RC0 is branched into a latch clock RC1 and a latch clock RC2 at a branch point BR1. Therefore, for example, as shown in FIG. 66E, each of the latch clocks RC0, RC1, and RC2 becomes an oscillation signal whose signal state changes in a common cycle. The latch clock RC1 is input to the clock terminal CK of the latch flip-flop 557A. The latch clock RC2 is input to the clock terminal CK of the latch flip-flop 557B.

  In response to the rising edge of the latch clock RC1, the latch flip-flop 557A captures (latches) the first start winning signal SS1 transmitted from the first start port switch 22A and supplied to the input port P0. Output from the output terminal Q as a start winning latch signal SL1. Then, if the capturing method in the random number latch selector 558A is designated as signal input to the input port P0, the start winning latch signal SL1 is output as the random number latch signal LL1. Thereby, for example, the first start winning signal SS1 whose signal state changes between the off state (low level) and the on state (high level) at the timing shown in FIG. 66 (F) is the timing at which the latch clock RC1 rises. After being taken into the latch flip-flop 557A at T11, T13, T15,..., The random number latch signal LL1 whose signal state changes between the off state and the on state at timings T11 and T13 as shown in FIG. And output from the random number latch selector 558A. Here, the first start winning signal SS1 transmitted from the first start opening switch 22A is turned off when the start winning of the game ball at the first start winning opening formed by the normal winning ball apparatus 6A is detected. Change to ON state. The random number latch signal LL1 output from the latch flip-flop 557A via the random number latch selector 558A is supplied to the random number value register 559A serving as the random number value register R1D, and in the random number sequence RSN output from the random number sequence change circuit 555. Used to obtain numerical data. Thus, the latch flip-flop 557A and the random number latch selector 558A acquire numerical data as a random number value using the latch clock RC1 based on the detection of the start winning of the game ball at the first start winning opening. The random number latch signal LL1 is generated separately from the case where the start winning of the game ball at the second start winning opening is detected.

  In response to the rising edge of the latch clock RC2, the latch flip-flop 557B takes in (latches) the second start winning signal SS2 transmitted from the second start port switch 22B and supplied to the input port P1, It is output from the output terminal Q as the start winning latch signal SL2. Then, if the capturing method in the random number latch selector 558B is designated as signal input to the input port P1, the start winning latch signal SL2 is output as the random number latch signal LL2. Thereby, for example, the second start winning signal SS2 whose signal state changes between the off state (low level) and the on state (high level) at the timing shown in FIG. 66 (I) is the timing at which the latch clock RC2 rises. After being fetched into the latch flip-flop 557B at T11, T13, T15,..., The random number latch signal LL2 whose signal state changes between the off state and the on state at timings T14 and T15 as shown in FIG. And output from the random number latch selector 558B. Here, the second start winning signal SS2 transmitted from the second start opening switch 22B is turned off when the start winning of the game ball at the second start winning opening formed by the normal variable winning ball apparatus 6B is detected. Changes from ON to ON. The random number latch signal LL2 output from the latch flip-flop 557B via the random number latch selector 558B is supplied to the random number value register 559B serving as the random number value register R2D, and the random number sequence RSN output from the random number sequence change circuit 555 Used to obtain numerical data. In this way, the latch flip-flop 557B and the random number latch selector 558B acquire numerical data as a random number value using the latch clock RC2 based on the detection of the start winning of the game ball at the second start winning opening. The random number latch signal LL2 is generated separately from the case where the start winning of the game ball at the first start winning opening is detected.

  The random value register 559A serving as the random value register R1D responds to the numerical data in the random number sequence RSN output from the random number sequence change circuit 555 in response to the rising edge of the random number latch signal LL1 input from the random number latch selector 558A to the clock terminal. Then, the numerical data serving as stored data is updated (latched). The random value register 559B serving as the random value register R2D responds to the numerical data in the random number sequence RSN output from the random number sequence change circuit 555 in response to the rising edge of the random number latch signal LL2 input from the random number latch selector 558B to the clock terminal. Then, the numerical data serving as stored data is updated (latched).

  For example, as shown in FIG. 66 (G), when a rising edge occurs in which the random number latch signal LL1 changes from the off state to the on state at timing T11, the random number sequence changing circuit 555 outputs the timing edge T11. As shown in FIG. 66 (H), the numerical data in the random number sequence RSN is taken into the random value register R1D and acquired as numerical data that becomes a random value. As a result, in the random value register 559A serving as the random value register R1D, the numerical data used as the random number value based on the detection of the start winning of the game ball at the first starting winning opening is used as the game at the second starting winning opening. It can be acquired and stored separately from the case where the starting winning of the ball is detected.

  For example, as shown in FIG. 66 (J), when a rising edge is generated at which the random number latch signal LL2 changes from the off state to the on state at timing T13, the random number sequence changing circuit 555 starts at timing T13. As shown in FIG. 66 (K), the numerical data in the output random number sequence RSN is taken into the random value register R2D and acquired as numerical data that becomes a random value. As a result, the random value register 559B serving as the random value register R2D, based on the detection of the start winning of the game ball at the second start winning opening, converts the numerical data used as the random number value into the game at the first starting winning opening. It can be acquired and stored separately from the case where the start winning of the ball is detected.

  Thus, the random value register 559A responds to the rising edge of the start winning latch signal SL1 generated by the latch flip-flop 557A using the latch clock RC1 and the random number latch signal LL1 output from the random number latch selector 558A. Numerical data in the random value RSN is acquired. The numerical data stored in the random value register 559A is determined to have reached the winning determination value in step S208 shown in FIG. 54 (step S208; Yes), and the first starting is performed. Based on the fact that a valid winning of a game ball is detected by the mouth switch 22A, the CPU 505 reads it in step S353 shown in FIG. At this time, in steps S357 and S358, using the numerical data read from the random value register 559A, for example, as shown in FIG. A numerical value MR6 is set.

  In addition, the random value register 559B responds to the start winning latch signal SL2 generated by the latch flip-flop 557B using the latch clock RC2 and the rising edge of the random number latch signal LL2 output from the random number latch selector 558B. Numerical data in the random number sequence RSN is acquired. The numerical data stored in the random value register 559B is determined to have reached the winning determination value in step S211 shown in FIG. 54 (step S211; Yes). Based on detection of a valid game ball start winning by the mouth switch 22B, the CPU 505 reads it in step S354 shown in FIG. At this time, in steps S357 and S358, using the numerical data read from the random value register 559B, for example, as shown in FIG. A numerical value MR6 is set.

  As described above, in the random number circuit 509, the clock flip-flop 552, the random number generation circuit 553, the random number sequence change circuit 555, and the like acquire numerical data that becomes a random number value based on the start winning of the game ball at the first start winning opening. Based on the combination of the latch flip-flop 557A, the random number latch selector 558A, and the random value register 559A configured as described above, and numerical data that becomes a random value based on the starting winning of the game ball at the second starting winning opening is obtained. The latch flip-flop 557B, the random number latch selector 558B, and the combination of the random number value register 559B are shared. Therefore, the random number update clock RGK output from the clock flip-flop 552 and supplied to the random number generation circuit 553 and used for updating the numerical data in the count value permutation RCN and the numerical data in the random number sequence RSN is the first starting prize opening. A common random number update configuration for acquiring numerical data that is a random value based on a starting winning of a game ball and a configuration that acquires numerical data that is a random value based on a starting winning of a gaming ball at the second starting winning opening This is a clock signal.

  When it is determined in step S14 shown in FIG. 47 that the security time has elapsed (step S14; Yes), the CPU 505 reads out the user program stored in the ROM 506, and the game control main process as shown in FIG. Executed. For example, a random number circuit setting process as shown in FIG. 49 is performed as the setting process in step S33. In this case, the random number circuit 509 starts the operation of generating numerical data to be a random value based on the setting in the random number circuit setting process by the CPU 505. After the random number value generation operation by the random number circuit 509 is started in this way, the process of step S35 is repeatedly executed until the on operation of the game start switch 31 installed on the main board 11 is detected, and the process of step S36 is performed. Is not set to enable interrupts. Therefore, even after the update operation of the numerical data by the random number circuit 509 is started, until the ON operation of the game start switch 31 is detected, for example, a pachinko game such as a game control timer interrupt process shown in FIG. The game control process for controlling the progress of the game in the machine 1 is not started. This makes it difficult to specify the operation start timing of the random number circuit 509 and the update operation of the numerical data from the start timing of the game control process, and aiming based on the analysis result of the game control process program, so-called “hanging board” , And an illegal signal is input at a predetermined timing, so that an action such as illegally generating a big hit gaming state can be surely prevented.

  If the bit value in the bit number [0] of the second random number initial setting KRS2 as shown in FIG. 11B is set to “1”, the random number circuit 509 generates it by the process of step S55 shown in FIG. 49, for example. The start value of the numerical data to be a random value to be changed can be changed at every system reset. Thereby, even if the operation start timing of the random number circuit 509 can be specified, it becomes difficult to specify numerical data read from the random value register 559A and the random value register 559B included in the random number circuit 509. It is possible to reliably prevent actions such as illegally generating a big hit gaming state by aiming based on the analysis result of the control processing program or inputting a fraud signal at a predetermined timing by connecting a so-called `` hanging board '' it can.

  Next, a specific example of the rendering operation by displaying various rendering images centering on the variable display of decorative symbols in the display area of the image display device 5 will be described. The effect control board 12 responds to the reception of the first change start command and the second change start command transmitted from the main board 11 based on the change pattern specified by the change pattern specifying command, for example, The CPU of the control microcomputer 120 supplies a predetermined display control command to the VDP 121, etc. so that the “left”, “middle”, and “right” decorative symbol display portions 5L provided in the display area of the image display device 5 are used. At 5C and 5R, the variation of the decorative design is started.

  Hereinafter, a specific example in the case where the variable display result of the decorative design is “non-reach” among the cases where the variable display result is “losing” will be described. FIG. 67 shows a case where the specific effect of “slip” is executed when the specific effect is not executed among the cases where the decorative symbol variable display mode is “non-reach”, or when the “pseudo-continuous” specific effect is executed. In this case, a display operation example in the case where a specific effect of “end of development opportunity eye” is executed is shown. For example, when the variation pattern of the non-reach PA1-1 is designated by the variation pattern designation command, the specific effect as shown in FIGS. 67 (C1) and (C2) is not executed, and the variation pattern of the non-reach PA1-4. 67 is designated when a “slip” specific effect as shown in FIGS. 67 (E1) to (E4) is executed. When a non-reach PA1-5 variation pattern is designated, FIG. 67 (D1) ˜ When a specific effect of “pseudo-continuous” as shown in (D6) is executed, and a variation pattern of non-reach PA1-7 is designated, “expansion chance” as shown in FIGS. 67 (F1) to (F6). This is a case where a specific effect of “eye end” is executed. In FIG. 67 (A), for example, in response to the start of variation of special symbols in a special symbol game, the decorative symbols are displayed on all of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R. The fluctuation starts. Thereafter, for example, as shown in FIG. 67B, the decorative symbol indicating the number “6” is stopped and displayed (temporary stop display) in the “left” decorative symbol display section 5L.

  When the specific effect is not executed or when the “slip” specific effect is executed, the decorative symbol indicating the number “6” is displayed as the left final stop symbol in the decorative symbol variation setting process of step S161 shown in FIG. Corresponding to the determination, a decorative symbol stop display as shown in FIG. 67 (B) is performed. Note that when the decorative symbol variable display mode is “non-reach”, the variation pattern of the non-reach PA1-4 in which the specific effect of “slip” is executed is always displayed on the “right” decorative symbol display unit 5R. The specific effect of “slip” is executed to re-variate the temporarily displayed decorative symbol, and the decorative symbol to be stopped and displayed on the “left” decorative symbol display unit 5L must be changed depending on the specific effect of “sliding”. That's fine. Further, when the specific effect of “end of development chance” is executed, the combination of the decorative symbols constituting the predetermined development chance in the decorative symbol variation setting process of step S161 shown in FIG. Corresponding to the determination as the stop symbol, the decorative symbol as shown in FIG. 67 (B) may be stopped and displayed. When the “pseudo-ream” specific effect is executed, the decorative symbol indicating the number “6” is determined as the left final stop symbol in the decorative symbol variation setting process in step S161 shown in FIG. In response to the combination of the decorative symbols constituting the predetermined pseudo-continuous chance based on the stop symbol being determined as the left middle right temporary stop symbol, the decorative symbol as shown in FIG. 67 (B) is stopped and displayed. That's fine.

  Thereafter, when the specific effect is not executed, as an example, as shown in FIG. 67 (C1), the decorative symbol indicating the number “7” is stopped and displayed (temporary stop display) on the “right” decorative symbol display portion 5R. ), And then stop display (temporary stop display) of the decorative symbol indicating the number “4” in the “medium” decorative symbol display section 5C as shown in FIG. 67 (C2), and then the non-reach combination is obtained. The confirmed decorative symbol is stopped (final stop). At this time, if the finalized decorative symbol that is stopped and displayed on the “right” decorative symbol display unit 5R or the “middle” decorative symbol display unit 5C is determined in the decorative symbol variation setting process of step S161 shown in FIG. Good.

  On the other hand, when the specific effect of “pseudo ream” is executed, as an example, the number “7” is shown in the “right” decorative symbol display section 5R as shown in FIG. 67 (D1). After the decorative symbol is stopped (temporarily stopped), the decorative symbol indicating the number “6” is stopped (temporarily stopped) on the “middle” decorative symbol display 5C as shown in FIG. 67 (D2). ), The decorative pattern that becomes the pseudo-ream chance is stopped and displayed. At this time, for example, a temporary stop display such as a decorative pattern fluctuation display is performed, and then the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R are displayed as shown in FIG. 67 (D3). All that is necessary is to change the decorative pattern again. Thereafter, for example, as shown in FIGS. 67 (D4) to (D6), decorative symbols indicating the numbers “6”, “7”, and “4” in a predetermined order such as “left” → “right” → “middle”. Are sequentially displayed in a stop (temporary stop display), and then the fixed decorative symbol that is a non-reach combination is stopped (final stop display).

  When the specific effect of “slip” is executed, as an example, as shown in FIG. 67 (E1), the decorative symbol indicating the number “5” is stopped and displayed on the decorative symbol display portion 5R of “right” ( After the temporary stop display), as shown in FIG. 67 (E2), the decorative symbol is re-varied on the “right” decorative symbol display section 5R. Thereafter, as shown in FIG. 67 (E3), the decorative symbol indicating the number “7” is derived and displayed on the “right” decorative symbol display section 5R, thereby changing the decorative symbol to be stopped and displayed. Here, as shown in FIG. 67 (E1), the decorative symbol displayed temporarily stopped by the “right” decorative symbol display unit 5R is, for example, the final right in the decorative symbol variation setting process in step S161 shown in FIG. What is necessary is just to be determined based on a stop symbol. Thereafter, for example, as shown in FIG. 67 (E4), after the decorative symbol indicating the number “4” is stopped (temporarily stopped) on the “middle” decorative symbol display section 5C, the non-reach combination is confirmed. The decorative design is stopped (final stop display).

  When the specific effect of “end of development opportunity” is executed, as an example, as shown in FIG. 67 (F1), a decorative symbol indicating the number “7” is displayed on the “right” decorative symbol display portion 5R. After the stop display (temporary stop display), as shown in FIG. 67 (F2), the decorative symbol indicating the numeral “7” is also stopped (temporary stop display) on the “middle” decorative symbol display portion 5C. As a result, the decorative symbols constituting the predetermined development opportunity are temporarily stopped and displayed. At this time, for example, as shown in FIG. 67 (F3), an effect display is performed in which the temporarily stopped decorative design is rotated in a certain direction, and then the decorative design is displayed as shown in FIG. 67 (F4). An effect display (turning effect) is made so as to make the player expect the development derived and displayed in the reach display state. Here, if the decorative symbol displayed temporarily stopped from the effect display as shown in FIG. 67 (F4) is rotated in the reverse direction, the reach display state is developed. In this example, an effect display is performed so that the decorative pattern displayed in the temporarily stopped state returns to the original state as shown in FIG. 67 (F5), for example, as shown in FIG. Thus, the confirmed decorative pattern constituting the predetermined development chance is stopped and displayed as it is (final stop display).

  FIG. 68 shows a display operation example in the case where the specific effect of “intro” is executed among the cases where the decorative symbol variable display mode is “non-reach”. For example, when the variation pattern of non-reach PA 1-6 is designated by the variation pattern designation command, a specific effect of “Intro” as shown in FIG. 68 is executed. In FIG. 68 (A), for example, in response to the start of variation of special symbols in a special symbol game, the decorative symbols are displayed on all of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R. The fluctuation starts. Thereafter, for example, as shown in FIG. 68B, the decorative symbol indicating the number “3” is stopped (temporarily stopped) on the “left” decorative symbol display section 5L, and the “right” decorative symbol is displayed. The decorative symbol indicating the number “2” is stopped (temporarily stopped) in the portion 5R, and an effect image indicating the character CH1 is displayed at a display position corresponding to the “middle” decorative symbol display portion 5C. The The effect image indicating the character CH1 may be any image that appears as an effect image in a reach effect that is executed when a decorative symbol is derived and displayed later in the reach display state.

  Subsequently, for example, as shown in FIG. 68 (C), after the effect display is performed to update the decorative symbols temporarily displayed on the “left” and “right” decorative symbol display portions 5L and 5R. For example, as shown in FIG. 68 (D), with the update display of the effect image such that the character CH1 changes, the “left” decorative symbol display unit 5L is updated to the decorative symbol indicating the number “4”. In the “right” decorative symbol display section 5R, update display to the decorative symbol indicating the number “3” is performed. Further, for example, as shown in FIG. 68 (E), after the effect display is performed to further update the decorative symbols updated and displayed on the “left” and “right” decorative symbol display portions 5L and 5R, For example, as shown in FIG. 68 (F), in accordance with the update display of the effect image such that the character CH1 changes, the “left” decorative symbol display unit 5L updates and displays the decorative symbol indicating the number “2”. However, in the “right” decorative symbol display section 5R, update display to the decorative symbol indicating the number “1” is performed. Then, for example, as shown in FIG. 68 (G), with the updated display of the effect image such that the character CH1 changes, the “left” and “right” decorative symbol display portions 5L and 5R are temporarily stopped and displayed. For example, as shown in FIGS. 68 (H) to 68 (K), the “left” decorative symbol display unit 5L displays a decorative symbol indicating “2”. Is temporarily stopped and displayed, the decorative symbols indicating the numbers “1” to “3” are updated and displayed in a predetermined order on the “right” decorative symbol display portion 5R. Thereafter, in the “right” decorative symbol display section 5R, for example, as shown in FIG. 68 (L), an effect display for updating the decorative symbol is performed, and then “3” as shown in FIG. 68 (M). A decorative symbol indicating the number is temporarily stopped and displayed. When the specific effect of “Intro” is finished in this way, for example, as shown in FIG. 68 (N), after the effect image indicating the character CH1 is erased, the fixed decorative symbol that is a non-reach combination is displayed in a stop (final stop display). Is done.

  FIG. 69 shows an example of a display operation when the specific effect of “intro” is executed among the cases where the decorative symbol variable display mode is “reach”. For example, the variation pattern designation command is used to change the variation pattern of Super PA3-3, Super PA3-7, Super PB3-3, Super PA4-3, Super PA4-7, Super PA5-3, Super PB4-3, Super PB5-3. When any one of them is designated, the “intro” specific effect as shown in FIG. 69 is executed. In the display operation example shown in FIG. 69, the same effect display as in FIGS. 68A to 68L is performed in the portions of FIGS. Thereafter, in the “right” decorative symbol display portion 5R, for example, as shown in FIG. 69 (M), the decorative symbol indicating the number “2” is temporarily stopped and displayed, thereby the “left” decorative symbol display portion 5L. The reach display state is set together with the decorative symbols temporarily displayed at. When the specific effect of “intro” is completed in this way, for example, as shown in FIG. 69 (N), the reach corresponding to the fact that the effect image indicating the character CH1 is erased and then the decorative design is derived and displayed in the reach display state. An effect or the like is started, and then a finalized decorative symbol that is a reach combination, a finalized symbol that is a jackpot combination, and the like are stopped and displayed (final stop display).

  70 to 72 show display operation examples when the variable display result is “big hit” and the big hit type is other than “surprise”. In FIG. 70 (A), for example, in response to the start of variation of special symbols in a special symbol game, the decorative symbols are displayed on all of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R. The fluctuation starts. Thereafter, for example, as shown in FIG. 70B, the decorative symbol indicating the number “6” is stopped (temporarily stopped) on the “left” decorative symbol display section 5L.

  When a specific effect of “slip” is executed, for example, when the variation pattern is Super PA4-2, as an example, as shown in FIGS. 70 (C1) to (C3), “ By temporarily stopping and displaying the decorative symbols on the “left” and “right” decorative symbol display portions 5L and 5R, changing the decorative symbols again on the “right” decorative symbol display portion 5R, and then stopping and displaying them. The effect display for changing the decorative design to be stopped is performed so that the decorative design is derived and displayed in the reach display state. Further, when a specific effect of “pseudo-continuous” is executed, for example, when the variation pattern is Super PA 4-4, for example, as shown in FIGS. 70 (D1) to (D5), After the decorative symbols are temporarily stopped and displayed on all of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R, the decorative symbols are displayed on all the decorative symbol display portions 5L, 5C, and 5R. An effect display is made to change (pseudo continuous fluctuation) again. Thereafter, the decorative symbols indicating the number “6” are aligned and stopped and displayed (temporarily stopped) in the “left” and “right” decorative symbols display portions 5L and 5R. It reaches the reach state. Further, when a specific effect of “Development Chance” is executed, for example, when the variation pattern is Super PC 4-1, for example, as shown in FIGS. 70 (E1) to (E6). , “Left”, “Middle”, “Right” decorative symbol display portions 5L, 5C, and 5R are all displayed with a combination of decorative symbols serving as a predetermined development opportunity stop display (temporary stop display). After the effect display is performed such that the stop-displayed decorative symbol rotates in the reverse direction, the decorative symbol is derived and displayed in a reach display state.

  After the decorative symbols are derived and displayed in the reach display state as shown in FIG. 70 (C3) and FIG. 70 (D5), for example, as shown in FIG. The speed of change of the decorative pattern in decreases. For example, when the variation pattern is any one of normal PA2-5 to normal PA2-8, “6” is displayed in the “medium” decorative symbol display section 5C as shown in FIG. 71 (B). A “normal” reach effect that is stopped and displayed (temporarily stopped) together with the decorative symbol display portions 5L and 5R having the numbers “left” and “right” is performed. In the example shown in FIG. 71 (B), the decorative symbols constituting the jackpot combination are stopped and displayed in correspondence with the case where the variable display result is “big hit”, but the variable display result is “lost”. In this case, for example, as shown in FIG. 71 (H), after displaying the effect image indicating that the numeral indicating “5” is stopped and displayed on the decorative symbol display portion 5C having “medium”, “medium” is displayed. The decorative symbol display unit 5C stops displaying the decorative symbol of the numeral “5”, and the decorative symbol display unit 5C of “medium” stops the decorative symbol other than the numeral indicating “6”. Thus, the confirmed decorative symbols constituting the reach-losing combination may be stopped and displayed, and the variable display of decorative symbols may be terminated. When any one of reach production α1 to reach production α3 or reach production β1 to reach production β3 is executed, for example, as shown in FIG. The fluctuating speed of the decorative pattern at is increased again, and various reach effects are displayed. For example, in the reach effect β1, after the effect image indicating the character CH2 as shown in FIG. 71 (D) is displayed, the corresponding reach effect display proceeds. Further, in the case of any one of the reach effects α1 to reach effect α3, after the effect image indicating the character CH1 as shown in FIG. 71 (E) is displayed, the reach effect as shown in FIG. 71 (F) is displayed. Display progresses. Then, in the reach effect α1, for example, as shown in FIG. 71 (G), a decorative design that is stopped (temporarily stopped) in the first stage effect display appears. In the example shown in FIG. 71 (G), the decorative symbol constituting the jackpot combination is stopped and displayed in correspondence with the case where the variable display result is “big hit”, but the variable display result is “lost”. In such a case, the fixed decorative symbols constituting the reach-losing combination may be stopped and displayed, and the variable display of decorative symbols may be terminated. On the other hand, in the reach effect α2 and the reach effect α3, for example, as shown in FIGS. 71 (H) and (I), the process proceeds to the second stage effect display. On the other hand, in reach effect β2 and reach effect β3, after the effect image indicating character CH3 as shown in FIG. 71 (J) is displayed, the corresponding reach effect display proceeds.

  When the second stage effect display progresses as shown in FIG. 71 (I), if the reach effect α2 is reached, for example, as shown in FIG. A decorative pattern to be displayed appears. When the variable display result is “losing”, for example, as shown in FIG. 72B, the displayed decorative symbols are not changed, and the fixed decorative symbols constituting the reach-losing combination are stopped and displayed. What is necessary is just to finish the variable display of a decoration design. On the other hand, in the reach effect α3, for example, as shown in FIGS. 72B to 72D, the process proceeds to a third stage effect display (also referred to as “relief effect”). Then, a decorative pattern that is stopped (temporarily stopped) in the third stage of effect display appears. Here, when the changing promotion effect is not executed, as shown in FIG. 72 (E), the temporarily stopped decorative pattern is stopped and displayed as a final decorative pattern as it is as a final decorative pattern (final stop display). The On the other hand, in the case of executing the changing promotion effect, after temporarily displaying the decorative symbol that is a normal jackpot combination as shown in FIG. 72 (F), as shown in FIG. All of the left, middle, and right decorative symbol display portions 5L, 5C, and 5R are changed again in a state where the same decorative symbols are aligned. Then, when the changing promotion effect is executed in response to the big hit type being “first probability change”, for example, as shown in FIG. 72 (H), the decorative design displayed temporarily stopped is changed again. After that, the promotion success effect during change is performed to stop and display the confirmed decorative pattern that becomes the probability variation big hit combination. If the promotion promotion effect during change is executed, after the decorative symbol is re-changed as shown in FIG. 72 (G), for example, as in FIG. 72 (F), the normal jackpot combination is confirmed. What is necessary is just to stop-display a decorative design.

  FIG. 73 shows a display operation example when the variable display result is “big hit” and the big hit type is “surprise”. In this case, for example, as shown in FIG. 73A, for example, the decorative symbol display section 5L for “left”, “middle”, and “right” corresponding to the start of fluctuation of the special symbol in the special symbol game, etc. The decoration pattern starts to change in all of 5C and 5R. Thereafter, for example, as shown in FIGS. 73 (B) to 73 (D), decorative symbols indicating the numbers “1”, “5”, and “3” in a predetermined order such as “left” → “right” → “middle”. Are sequentially displayed in a stop (temporary stop display), and then a finalized decorative symbol that becomes a predetermined chance of a certain chance is stopped and displayed (final stop display). At this time, as a big hit effect in the two round big hit state, for example, as shown in FIG. 73 (E), an effect image for notifying the transition to a special effect mode such as “Live mode” is displayed. Then, as an ending effect in response to the end of the two round big hit state, for example, an effect image as shown in FIG. 73 (F) is displayed, and the display enabling recognition of the “Live mode” is, for example, As shown in FIG. 73 (G), the display is kept displayed even after the next decorative pattern change is started.

  In the example of the special symbol process shown in FIG. 53, the start winning determination process in step S101 is executed each time a timer interrupt occurs, and the stored data in the input port register PI read in step S201 shown in FIG. From (input port data), it is determined whether or not the first start winning signal SS1 and the second starting winning signal SS2 are turned on (steps S202 and S205). On the other hand, instead of the start winning determination process in step S101 shown in FIG. 53, at least one of the random number value register 559A serving as the random number value register R1D and the second random number value register 559B serving as the random number value register R2D in the random number circuit 509. When numerical data is fetched (latched) into either of them, an interrupt process corresponding to an interrupt request from the random number circuit 509 may be executed. In this case, for example, in the random number circuit setting process shown in FIG. 49, the bit values at the bit numbers [1] and [0] of the random number interrupt control register RDIC are set to “1” as shown in FIG. deep. When an interrupt request from the random number circuit 509 is generated, the CPU 505 executes a start winning interrupt process as shown in the flowchart of FIG.

  In the start winning interrupt process shown in FIG. 74B, the CPU 505 first reads the random number latch flag data RDFM0 stored in the bit number [0] of the random number latch flag register RDFM (step S601). Then, it is determined whether or not the read value in step S601 is “1” (step S602). Here, as shown in FIG. 22B, the random number latch flag data RDFM0 stored in the bit number [0] of the random number latch flag register RDFM receives numerical data in the random number value register 559A serving as the random number value register R1D. When this occurs, the bit value becomes “1”. Accordingly, when it is determined that the read value is “1” in step S602 (step S602; Yes), it is determined that the numerical value data has been taken into the random value register 559A based on the first start winning signal SS1 being turned on. Then, the start port buffer value is set to “1” (step S603).

  When it is determined in step S602 that the read value is “0” (step S602; No), the random number latch flag data RDFM1 stored in the bit number [1] of the random number latch flag register RDFM is read (step S604). . Then, it is determined whether or not the read value in step S604 is “1” (step S605). Here, as shown in FIG. 22B, the random number latch flag data RDFM1 stored in the bit number [1] of the random number latch flag register RDFM is stored in the second random number value register 559B serving as the random number value register R2D. The bit value becomes “1” when. Therefore, when it is determined in step S605 that the read value is “1” (step S605; Yes), it is determined that the numerical data has been taken into the random value register 559B based on the fact that the second start winning signal SS2 is turned on. Then, the start port buffer value is set to “2” (step S606).

  After executing either one of the processes in steps S603 and S606, the CPU 505 reads the reserved storage number count value corresponding to the start port buffer value (step S607). Note that this process may be similar to the process of step S214 shown in FIG. On the other hand, when it is determined in step S605 that the read value is “0” (step S605; No), numerical data that is an appropriate random number value corresponding to the interrupt request from the random number circuit 509 is fetched. If it is determined that it is not, a start winning interrupt error process is executed (step S608), and then the start winning interrupt process is terminated. In the start winning interrupt error process, for example, a setting for transmitting a predetermined effect control command to the effect control board 12 is performed to notify that an abnormality in the start prize is detected by the effect device, Until the error canceling procedure (for example, system reset, error canceling switch operation, etc.) is taken, the subsequent processing may not proceed.

  After executing the process of step S606, the processes of steps S609 to S616 shown in FIG. 74B are executed in the same manner as the processes of steps S215 to S224 shown in FIG. Here, after the process of step S616 is executed, the process proceeds to step S604. Thereby, even when both the first start port switch 22A and the second start port switch 22B detect the start winning of the game balls that are effective at the same time, the processing based on the detection of both effective start winnings can be completed reliably.

  When such a start winning interrupt process is executed, when a game ball enters (start winning) the first start winning opening or the second starting winning opening, the random value register 559A corresponding to the start winning is obtained. And a process for extracting numerical data from the random number circuit 509 in response to an interrupt request based on the acquisition of numerical data to be a random value in the random value register 559B (for example, the random number setting process executed in step S613) 56, and the like (steps S353 and S354 shown in FIG. 56) are executed, and each time the timer interrupt occurs, it is determined whether or not the first start winning signal SS1 or the second starting winning signal SS2 is turned on. Therefore, it is possible to reduce the processing load on the CPU 505 provided in the game control microcomputer 100.

  As described above, in the pachinko gaming machine 1 in the above embodiment, by setting the bit value in the bit number [4-3] of the security time setting KSES to a value other than “00”, the system can be reset or turned on. Based on this, it is possible to set, as a time component included in the security time, a variable setting time that changes within a predetermined time range each time the initial setting process is executed. As a result, it becomes difficult to specify the operation start timing of the random number circuit 509 or the numerical data to be updated from the operation start timing due to power-on of the pachinko gaming machine 1 or system reset, and the analysis result of the game control processing program By connecting a so-called “hanging board” and inputting a fraud signal at a predetermined timing, it is possible to reliably prevent actions such as illegally generating a big hit gaming state.

  Also, by setting the bit value in the bit number [2-0] of the security time setting KSES to a value other than “000”, any one of a plurality of extension times that can be selected in advance in addition to the fixed time is set as the security time. It can be set as an included time component. As a result, it becomes difficult to specify the operation start timing of the random number circuit 509 or the numerical data to be updated from the operation start timing due to power-on of the pachinko gaming machine 1 or system reset, and the analysis result of the game control processing program By connecting a so-called “hanging board” and inputting a fraud signal at a predetermined timing, it is possible to reliably prevent actions such as illegally generating a big hit gaming state.

  The CPU 505 incorporated in the game control microcomputer 100 determines the variation pattern type using one of the variation pattern type determination tables shown in FIGS. 35, 36, 37, 39 and 40, and then changes the variation pattern type. Based on the pattern type, the variation pattern is determined using one of the variation pattern determination tables shown in FIGS. Thereby, when adding the variation pattern type or changing the occurrence rate, it is only necessary to change the setting of the determined value in the variation pattern type determination table, so that the setting time can be shortened. In addition, when adding a detailed variation pattern or changing the occurrence rate, it is only necessary to change the setting of the determination value in the variation pattern determination table, so that the setting time can be shortened. That is, since the determination ratio of the variation pattern type and the determination ratio of the variation pattern can be set separately, the design change related to the variation pattern type and the distribution of the variation pattern can be easily performed.

  Here, as a gaming machine using a plurality of variation type counter values, a reach type or the like is determined based on the value of the first variation type counter CS1, and more detailed symbols are determined based on the value of the second variation type counter CS2. A method for determining a variation mode has been proposed (for example, paragraphs 0209, 0211, 0212 and FIG. 30 of Japanese Patent Laid-Open No. 2005-160763). However, in the technique proposed in this document, for example, in addition to the 15 round big hit state, the big hit gaming state (specifically, the number of rounds executed, the opening time of the big prize opening, etc.) are different from the 15 round big hit state. Even if the big hit type is provided with a two-round big hit state corresponding to “surprise”, the variable display result is determined to be “big hit” regardless of the big hit type. Therefore, even when controlled to a big hit gaming state such as a two round big hit state, which is different from the normal big hit gaming state such as a 15 round big hit state, the reach type and the pattern variation are the same as when controlled to the normal big hit gaming state. Aspects and the like appear at a common rate, which may cause distrust to the player. On the other hand, in the pachinko gaming machine 1 according to the above embodiment, since the big hit type is determined to be “surprise” in step S243 shown in FIG. 58, it is used for the determination in step S273 shown in FIG. In the big hit variation pattern type determination table 132D, 132H, 132I set in step S262, for example, special CA4-1, special CA4-2, special CB4-1, special CB4-2, special CC4-1, special CC4 The table data is configured to include a variation pattern type different from the case where the big hit type is other than “surprise”, such as a variation pattern type of −2. In this way, when the big hit type is “accuracy”, it is determined that the variation pattern type or the fluctuation pattern is different from that other than “surprise accuracy”. Despite being controlled in the round big hit state, it is possible to prevent the player from feeling distrusted by performing the same production operation as in the case of being controlled in the 15 round big hit state.

  In the random number circuit 509 built in or externally attached to the gaming control microcomputer 100, a latch flip-flop 557B, a random number latch selector 558B, and a random number value are obtained by a combination of the latch flip-flop 557A, the random number latch selector 558A, and the random value register 559A. Separately from the combination of the registers 559B, the numerical data in the random number sequence RSN output from the random number sequence changing circuit 555 is captured and stored so as to update the numerical data serving as the random number value. Thus, even when a game ball enters a plurality of start areas, such as the first and second start winning openings, and a start win occurs, numerical data that is an accurate random number value can be acquired. The clock flip-flop 552, the random number generation circuit 553, the random number sequence change circuit 555, and the like include a latch flip-flop 557A, a random number latch selector 558A, a random value register 559A, a latch flip-flop 557B, and a random number latch selector 558B. The random number update clock RGK used for updating the count value permutation RCN and the random number sequence RSN by being supplied to the random number generation circuit 553 is shared with each combination of the random number value register 559B and the random number value register 559B. This is a common random number update clock signal. Thereby, the circuit configuration in the random number circuit 509 can be simplified, and the manufacturing cost of the pachinko gaming machine 1 can be reduced. The latch flip-flops 557A and 557B are latches whose signal states change at a common cycle by branching the latch clock RC0 generated by the common clock flip-flop 552 at the branch point BR1. Using the clocks RC1 and RC2, the start winning latch signal SL1 and the starting winning latch signal SL2 for generating numerical data as random numbers are generated. This can also simplify the circuit configuration of the random number circuit 509 and reduce the manufacturing cost of the pachinko gaming machine 1.

  Also, the oscillation frequency of the random number clock RCLK generated by the random number clock generation circuit 112 and the oscillation frequency of the control clock CCLK generated by the control clock generation circuit 111 are different from each other. The oscillation frequency does not become an integral multiple of the other oscillation frequency. Therefore, the oscillation frequency of the random number update clock RGK and the latch clock RC0 generated by the clock flip-flop 552 of the random number circuit 509 is ½ of the oscillation frequency of the random number clock RCLK, but the oscillation of the control clock CCLK. The frequency and the oscillation frequency of the internal system clock SCLK that is ½ of the oscillation frequency of the control clock CCLK are different. In this way, the control clock CCLK, the internal system clock SCLK, and the random number update clock RGK are prevented from being synchronized. From the operation timing of the CPU 505, the random number circuit 509 generates the random number generation circuit 553 and the random number sequence change circuit 555. It becomes difficult to specify the update timing of numerical data in the random number sequence RSN to be performed. As a result, it is possible to reliably prevent aiming and the like based on the result of analyzing the update operation of the numerical data serving as the random number value in the random number circuit 509 from the operation timing of the CPU 505. Also, the oscillation frequencies of the latch clocks RC1 and RC2 generated by branching the latch clock RC0 are different from the oscillation frequencies of the control clock CCLK and the internal system clock SCLK. In this way, synchronization between the control clock CCLK and the internal system clock SCLK and the latch clocks RC1 and RC2 is prevented, and the random number circuit 509 takes in numeric data as a random value from the operation timing of the CPU 505. It becomes difficult to specify the timing. As a result, it is possible to reliably prevent aiming and the like based on the result of analyzing the operation of fetching numerical data as a random value in the random number circuit 509 from the operation timing of the CPU 505.

  The CPU 505 built in the game control microcomputer 100 executes a random number circuit setting process as shown in FIG. 49, for example, as the setting process in step S33 shown in FIG. Until the game start switch 31 installed on the main board 11 is detected to be turned on, the process of step S35 is repeatedly executed to control the progress of the game in the pachinko gaming machine 1. The execution of the game control process is not started. This makes it difficult to specify the operation start timing of the random number circuit 509 and the numerical data update operation from the start timing of the game control process. Therefore, it is possible to reliably prevent aiming based on the result of analyzing the start timing of the game control process and the input of an illegal signal due to connection of a so-called “hanging board”. When the random number circuit 509 is externally attached to the game control microcomputer 100, for example, the random number circuit 509 performs program management independently of the processing in the CPU 505 before the CPU 505 executes the processing in step S35. A random number generation operation may be started after initial setting based on the storage data of the area.

  In the random number circuit 509 built in or externally attached to the game control microcomputer 100, the random number generation circuit 553 corresponds to the bit value [0] of the second random number initial setting KRS2 being “1”. The start value of numerical data in the count value permutation RCN output from the random number sequence RSN and the random number sequence RSN output from the random number sequence change circuit 555 can be changed at each system reset. Thereby, even if the operation start timing of the random number circuit 509 can be specified, it becomes difficult to specify numerical data read from the random value register 559A and the random value register 559B included in the random number circuit 509. Aiming based on the analysis result of the control processing program or the input of an illegal signal due to the connection of a so-called “hanging board” can be surely prevented.

  In the external bus interface 501 provided in the game control microcomputer 100, the internal resource access control circuit 501A allows external data other than the internal circuit such as the CPU 505 to externally read the internal data of the game control microcomputer 100 such as data stored in the ROM 506. Limited. Thereby, it is possible to prevent a game control processing program such as a game control user program stored in the ROM 506 from being read from the outside of the game control microcomputer 100 and provided for analysis or the like. Further, it is possible to reliably prevent aiming based on the analysis result of the game control processing program and input of an illegal signal due to connection of a so-called “hanging board”.

  In the serial communication circuit 511 provided in the game control microcomputer 100, a payout control microcomputer 150 mounted on the payout control board 15 using the first channel transmission / reception circuit 571A capable of transmitting and receiving serial data bidirectionally. Bidirectional serial communication is performed. On the other hand, using the second channel transmission circuit 571B capable of only transmitting serial data from the main board 11 in a single direction, it is connected to the presentation control microcomputer 120 mounted on the presentation control board 12 only. Serial communication in the direction. Thereby, the signal input with respect to the main board | substrate 11 from the production control board | substrate 12 side can be prohibited, and an improper act can be prevented.

  In the random number circuit 509 built in or externally attached to the game control microcomputer 100, when the frequency monitoring circuit 551 detects a frequency abnormality in the random number clock RCLK, the random number circuit 509 stores the bit number [4] in the internal information register CIF. The bit value of the internal information data CIF4 is set to “1”. Then, the CPU 505 determines that the number of times that the read value of the internal information data CIF4 is continuously determined to be “1” in step S63 shown in FIG. 50 has reached the clock abnormality determination value in step S65, for example. When it is determined that an abnormality has occurred in the operation state of the random number circuit 509. Thereby, it is possible to reliably prevent an illegal act by inputting an illegal signal as the random number clock RCLK.

  The CPU 505 built in the game control microcomputer 100 repeats the process of step S71 shown in FIG. 50, for example, to the random number value fetch designation register RDLT corresponding to the output of the latch signal to the random number circuit 509. The bit value “1” is written, and the numerical data stored in the random value register 559A and the random value register 559B is read a plurality of times. Then, all the bits of the numerical data read out by executing the processes of steps S72 to S74 are monitored, and an abnormality has occurred in the operation state of the random number circuit 509 in step S76 based on the presence or absence of bit data that does not change. It is determined whether or not. As a result, it is possible to reliably and easily detect that an abnormality has occurred in the operating state of the random number circuit 509 and prevent fraud.

  In the random number circuit 509 built in or externally attached to the gaming control microcomputer 100, when the first winning opening switch 22A detects the starting winning of the gaming ball at the first starting winning opening formed by the normal winning ball apparatus 6A. In addition, the combination of the latch flip-flop 557A, the random number latch selector 558A, and the random number value register 559A captures the numerical data in the random number sequence RSN output from the random number sequence change circuit 555 so as to update the numerical data serving as the random number value. Remember me. On the other hand, when the starting winning of the game ball at the second starting winning opening formed by the normal variable winning ball apparatus 6B is detected by the second starting opening switch 22B, the latch flip-flop 557B, the random number latch selector 558B, The numerical value data in the random number sequence RSN output from the random number sequence change circuit 555 is captured and stored so that the numerical value data to be the random number value is updated by the combination of the numerical value registers 559B. As a result, even when a game ball enters (start winning prize) in both the first starting winning opening and the second starting winning opening within a short time, the random number value acquired corresponding to one starting win is It is possible to reliably prevent the inconvenience of being used as a random value corresponding to the starting prize.

  The CPU 505 incorporated in the game control microcomputer 100, in step S242, when the numerical data indicating the random value MR1 for special figure display result determination matches the jackpot determination value data in step S240 shown in FIG. After the jackpot type determination table 131 shown in FIG. 34 is set as a usage table, the jackpot type is determined as one of a plurality of types in step S243. In the jackpot type determination table 131, any one of the jackpot types is selected based on the fact that the first start condition for starting the special game using the first special figure by the first special symbol display device 4A is satisfied. And determining whether the jackpot type is one of a plurality of types based on the fact that the second start condition for starting the special figure game using the second special figure by the second special symbol display device 4B is satisfied. The table data is configured so that the rate at which the big hit type is determined to be “accurate” differs depending on the case of determination. Thereby, the player's expectation for being controlled to the two round big hit state according to which one of the first start condition and the second start condition is satisfied can be made different, and the game entertainment can be improved. In particular, when the second start condition is satisfied, the big hit type is not determined to be “surprising accuracy”, so that the big start winning opening is easily controlled in the wide open state such as the probability changing state or the short time state. It is possible to prevent the gaming interests from deteriorating when the type is “accurate”, and it is possible to increase the frequency at which award balls are paid out in the probability variation state or the short time state.

  When an interrupt request from the random number circuit 509 is generated, the CPU 505 incorporated in the game control microcomputer 100 reads the random number latch flag data RDFM0 in step S601 shown in FIG. 74B, and then proceeds to step S602. By determining whether or not the read value is “1”, it is determined whether or not the first start condition is established based on the game ball entering (start winning) into the first starting winning opening. Further, after the random number latch flag data RDFM1 is read in step S604, it is determined whether or not the read value is “1” in step S605, so that the game ball enters (starts) the second start winning opening. The success or failure of the second start condition based on having won a prize is determined. As a result, the determination process becomes easier and the processing load on the CPU 505 can be reduced as compared with the case where the success or failure of the first start condition or the second start condition is determined each time a timer interrupt occurs.

  For example, a clear switch 304 as shown in FIG. When the CPU 505 of the game control microcomputer 100 determines that the clear switch 304 is turned on in step S27 shown in FIG. 48, the random number circuit 509 executes the processing of step S31 and step S32. The game control including the operation state is initialized. Then, the game start switch 31 is installed on the main board 11 as shown in FIG. 2, for example, to initialize the operation state of the random number circuit 509 and start the execution of the game control processing program. Since it is required to turn on both the clear switch 304 installed on the main board 11 and the game start switch 31 installed on the main board 11, it is possible to prevent fraudulent acts such as aiming.

  When the bit value [0] of the second random number initial setting KRS2 is “1”, the random number circuit 509 built in or externally attached to the game control microcomputer 100 is, for example, the step shown in FIG. Corresponding to the execution of the process of S55, etc., the start value of the numerical data that becomes a random value is changed every time the system is reset. At this time, for example, a start value that is changed every time the system is reset may be determined by using a count value of a free-run counter built in the game control microcomputer 100. As a result, the initial value can be determined by using different initial value determination data depending on the timing of system reset or the like, and illegal acts due to shooting or the like can be prevented.

  The present invention is not limited to the above embodiment, and various modifications and applications are possible. For example, in the above embodiment, the extension time set in step S4 shown in FIG. 47 corresponds to the bit value in the bit number [2-0] of the security time setting KSES, and a plurality of extensions that can be selected in advance. It has been described that this extended time is not changed at every system reset. However, the present invention is not limited to this. For example, the extension time added to the fixed time is determined as one of a plurality of extension times for each system reset by the setting in the user program stored in the ROM 506. May be. In this case, the extension time set in step S4 is defined to be longer than the longest variable setting time that can be set in step S8. Then, after a rough extension time is determined in step S4, a detailed extension time may be determined in step S8. As a result, the security time for entering the security mode when the power of the pachinko gaming machine 1 is turned on or when the system is reset can be greatly changed every time the system is reset. It becomes more difficult to specify the start timing and the numerical data to be updated.

  For example, the extended time set in step S4 shown in FIG. 47 may be determined using an ID number assigned to each chip constituting the game control microcomputer 100. As an example, an extension time corresponding to the calculated value is executed by executing a part or all of an operation for performing a predetermined scramble process on the ID number and an operation such as addition / subtraction / multiplication / division using the ID number. May be set. In this case, the extension time may be randomly determined for each system reset, for example, by changing an arithmetic expression used for determining the extension time for each system reset. Furthermore, the count value of the free run counter, the ID number, and the like, for example, the arithmetic expression for determining the extension time using the ID number is determined corresponding to the count value of the free run counter stored at the time of system reset. The extended time may be determined randomly at each system reset by using a combination of the above. In addition, when changing the start value of the random number generated by the random number circuit 509 at each system reset, the start value of the random number can be changed by using a combination of the count value of the free-run counter and the ID number. You may decide.

  In the above embodiment, the random number clock generation circuit 112 provided outside the game control microcomputer 100 has an oscillation frequency different from the oscillation frequency of the control clock CCLK generated by the control clock generation circuit 111. It has been described that the random number clock RCLK is generated and supplied to the random number circuit 509. However, the present invention is not limited to this, and the clock signal supplied to the CPU 505 of the game control microcomputer 100 and the clock signal supplied to the random number circuit 509 are included in a common clock generation circuit. May be generated using the oscillation signal generated by the above. In this case, for example, a frequency divider for generating the random number clock RCLK and the control clock CCLK is provided, and the latch clocks RC0, RC1, RC2 are synchronized with the control clock CCLK or the internal system clock SCLK. What is necessary is just to set the frequency division ratio etc. in each frequency divider so that it may become difficult to produce. The control clock generation circuit 111 and the random number clock generation circuit 112 may be provided in whole or in part inside the game control microcomputer 100 or outside the game control microcomputer 100. May be.

  In the above embodiment, the random number circuit 509 is supplied with the random number clock RCLK generated by the random number clock generation circuit 112, and the random number update clock RGK and the latch clock RC0 are generated by the clock flip-flop 552. As explained. However, the present invention is not limited to this, and an oscillation signal serving as the random number update clock RGK or the latch clock RC0 may be generated outside the random number circuit 509, such as the random number clock generation circuit 112, for example. Alternatively, a circuit for generating the random number update clock RGK and a circuit for generating the latch clock RC0 may be separately provided in the random number circuit 509. As an example, while generating a random number update clock RGK by a flip-flop similar to the clock flip-flop 552, an inversion circuit for inverting the signal state of the random number update clock RGK is provided, and a signal output from the inversion circuit is latched. It may be used as the clock RC0.

  In the above embodiment, the stored value of the refresh register RR1 built in the CPU 505 is added to the upper byte GR1-1 in the general-purpose register, and the numerical data indicating the random value MR1 for determining the special figure display result, or the addition value determination In the above description, numerical data indicating the random number MR6 is set. However, the present invention is not limited to this, and a value periodically updated by hardware or software may be added, unlike the stored value of the refresh register RR1. Further, instead of adding the stored value of the refresh register RR1 or the like, predetermined arithmetic processing such as subtraction, logical sum, and logical product may be executed. Alternatively, the stored value of the refresh register RR1 may be added to the lower byte GR1-2 in the general-purpose register. Alternatively, numerical data as various random numbers may be set using the upper byte GR1-1 and the lower byte GR1-2 in the general-purpose register as they are without executing any of these arithmetic processes. Further, the upper byte and the lower byte of the numerical data extracted from the random number circuit 509 may be exchanged and stored as the upper byte GR1-1 or the lower byte GR1-2 in the general-purpose register. Further, after the stored value of the refresh register RR1 is added to the upper byte GR1-1 or the lower byte GR1-2 in the general-purpose register, or an arithmetic process such as addition to the upper byte GR1-1 or the lower byte GR1-2 in the general-purpose register The upper byte and the lower byte may be exchanged without performing the above. Of the upper byte and lower byte of the numerical data extracted from the random number circuit 509, the data of a specific bit may be replaced with the data of other bits. In this case, for example, in the bus connecting the random number value register 559A or the random number value register 559B in the random number circuit 509 and the upper byte GR1-1 or the lower byte GR1-2 of the general-purpose register, the data of a specific bit is transferred to the other bits. The wiring may be crossed so as to replace the bit data.

  In the above embodiment, the clear switch 304 is installed on the power supply board 10, and the game start switch 31 is installed on the main board 11 separately from the clear switch 304. However, the present invention is not limited to this. For example, one of the power supply board 10 and the main board 11 may be provided with one switch that serves both as the clear switch 304 and the game start switch 31. As a result, for example, even when an illegal act such as fixing the game start switch 31 with a tape is fixed, the clear switch 304 is simultaneously operated to clear (initialize) the control contents. It is possible to prevent cheating by. However, in the above embodiment, the security time for entering the security mode can be changed by setting the extension time in step S4 shown in FIG. 47 or setting the variable setting time in step S8. When the clear switch 304 and the game start switch 31 are not used together, even if an illegal act is performed on the game start switch 31, the operation start timing of the random number circuit 509 or the random number by software is determined from the operation start timing of the pachinko gaming machine 1. It is difficult to specify the start timing of the update operation, and the effect of preventing fraudulent acts such as aiming is sufficiently high.

  In the above embodiment, when setting random values used in the main board 11 such as numerical data indicating the random number value MR1 for determining the special figure display result and numerical data indicating the random value MR6 for determining the added value, It explained as what performs processing by. However, the present invention is not limited to this. For example, processing by software may be performed when setting a random value used in the sub-side control board such as the effect control board 12. As an example, the CPU of the effect control microcomputer 120 mounted on the effect control board 12 executes a random number value used to determine the final stop symbol that becomes the final decorative symbol in the variable display of the decorative symbol, or the notice effect. The random value used for determining whether or not may be set by performing processing by software.

  In the above embodiment, the external reading of the internal data of the game control microcomputer 100 such as all or part of the data stored in the ROM 506 is limited by the internal resource access control circuit 501A provided in the external bus interface 501. did. However, the present invention is not limited to this. For example, the connection terminal for externally reading out the data stored in the ROM 506 by the game control microcomputer 100 is sealed so that the external device cannot be connected to the provider of the pachinko gaming machine 1. It may be possible to limit external reading of the ROM 506 by stopping it.

  In the embodiment described above, the first start winning opening formed by the normal winning ball apparatus 6A and the second starting winning opening formed by the normal variable winning ball apparatus 6B are described as being provided as a plurality of start areas. However, the present invention is not limited to this, and a plurality of starting regions such as three or more may be provided. In this case, a start condition for executing a special game using different special symbols may be established based on the detection of a start winning game ball in each start area. Or, for example, a special game using the same special symbol is executed based on the detection of a start winning game ball in a part (at least two) of the starting areas of three or more starting areas. The starting condition for doing so may be satisfied. In addition, even if a start winning of a game ball is detected in any start area among a plurality of start areas, a special game using a common (or one set) special symbol is executed. The start condition may be satisfied. In this case, the start condition for starting the special game may be established in the same order as the order in which the start winnings of the game balls are detected in the plurality of start areas. Alternatively, a priority is given to a plurality of start areas, and a start condition for starting a special game based on detection of a start winning game ball in a start area having a high priority is set as a start area having a low priority. The starting condition based on the detection of the start winning of the game ball may be established with priority.

  In the above embodiment, as the variation pattern setting process of step S111 shown in FIG. 53, the process shown in the flowchart of FIG. 59 is executed regardless of which of the first start condition and the second start condition is satisfied. Explained. However, the present invention is not limited to this, and when the first start condition is satisfied and when the second start condition is satisfied, a process different from each other is executed, and the variation pattern type is selected from a plurality of types. It is also possible to determine whether or not one of a plurality of types of variation patterns. In this case, the process for determining the variation pattern type and the process for determining the variation pattern are varied depending on which of the first start condition and the second start condition is satisfied, while the variation pattern type The numerical data indicating the random number value SR4 for determination and the numerical data indicating the random value SR5 for determining the variation pattern are common numerical data regardless of which of the first start condition and the second start condition is satisfied. May be used.

  For example, as a variation pattern type determination table such as a big hit variation pattern type determination table, a small hit variation pattern type determination table, a reach variation pattern type determination table, or a non-reach variation pattern type determination table, the first start condition and the second Depending on which of the start conditions is satisfied, the allocation of the random value SR4 for determining the variation pattern type for each variation pattern type may be prepared in advance. Then, in the variation pattern setting process executed in response to the establishment of the first start condition, a variation pattern type determination table corresponding to the establishment of the first start condition is selected as a use table, and a random value for determining the variation pattern type Based on SR4, the variation pattern type is determined as one of a plurality of types. On the other hand, in the variation pattern setting process executed in response to the establishment of the second start condition, a variation pattern type determination table that is different from the case where the first start condition is established according to the establishment of the second start condition. It may be selected as a usage table and the variation pattern type may be determined as one of a plurality of types based on the random value SR4 for determining the variation pattern type common to the case where the first start condition is satisfied.

  In addition, regarding the process of determining whether or not the decorative symbol is derived and displayed in the reach display state, different processes are executed when the first start condition is satisfied and when the second start condition is satisfied. May be. In this case, the process for determining whether or not to reach the reach state is made different depending on whether the first start condition or the second start condition is satisfied, while the numerical data indicating the random value MR3 for reach determination is Regardless of which of the first start condition and the second start condition is satisfied, the common numerical data may be used. Further, for example, instead of the process in step S243 shown in FIG. 58 in the above embodiment, as a process of determining the jackpot type as one of a plurality of types, the case where the first start condition is satisfied and the second start condition Different processing may be executed depending on whether or not is established. In this case, the process for determining the jackpot type is different depending on whether the first start condition or the second start condition is satisfied, while the numerical data indicating the random number MR2 for determining the jackpot type is as follows: Regardless of which of the first start condition and the second start condition is satisfied, the common numerical data may be used.

  In the above-described embodiment, the small hit game state is controlled based on the fact that the variable display result is “small hit”, and the game state is not changed after the small hit game state ends. On the other hand, when the variable display result is “big hit”, it is controlled to the two round big hit state based on the fact that the big hit type becomes “surprise”, and after the two round big hit state is finished, it is controlled to the positive change state. Explained as being. However, the present invention is not limited to this, and instead of or in addition to the case where the big hit type is “accurate” or the variable display result is “small hit”, A case of “suddenly normal” may be provided. As an example, “suddenly short time” and “suddenly normal” are included in the jackpot type when the variable display result is “big jackpot”. In this case, the jackpot type determination table 131 includes table data for assigning the random number MR2 for determining the jackpot type to the jackpot type “suddenly short” or “suddenly normal” according to the fluctuation special figure designation buffer value. What is necessary is just to be comprised. When the variable display result is “big hit” and the big hit type is “suddenly short”, the two round big hit state is controlled in the same way as the big hit type is “surprise”, and the two round big hit state ends. After that, unlike the case where the big hit type is “accuracy”, it is controlled to the short time state. On the other hand, when the variable display result is “big hit”, when the big hit type is “suddenly normal”, the two round big hit state is controlled in the same way as when the big hit type is “surprise”, and the two round big hit state ends. After that, unlike the case where the jackpot type is “surprise”, the normal state is controlled. Thereby, a player's expectation with respect to the gaming state controlled after the end of the two round big hit state can be enhanced, and the gaming interest can be improved.

  When such “sudden shortening” and “sudden normal” are provided, a variation pattern type and variation pattern different from those other than “sudden shortening” and “sudden normal” may be determined. As a result, although the big hit type is “suddenly short” or “suddenly normal”, the same effect operation as in the case of being controlled to the 15 round big hit state is performed despite being controlled to the 2 round big hit state. It can prevent the player from feeling distrust. In addition, when the big hit type is "Suddenly short" or "Suddenly normal", when the variable display result is "Small hit", or when the big hit type is "Sudden", the common variation pattern type It may be possible to make a decision. As a result, when determining the fluctuation pattern, the big hit type is “Suddenly short” or “Suddenly normal”, or the variable display result is “Small hit” or the big hit type is “Abrupt”. Regardless of whether this is the case, a common variation pattern determination table can be used, and the data capacity can be reduced.

  In the above-described embodiment, it has been described that the game state such as the probability change state or the time-short state can be controlled after the big hit gaming state based on the variable display result being “big hit”. In the probability variation state and the short-time state, it is described that the control that is advantageous to the player is performed by increasing the possibility of the game ball entering the second start winning opening and easily establishing the second start condition. . However, the present invention is not limited to this. For example, in the probability variation state, the probability variation control is continuously performed, and the advantageous release control that increases the possibility that the game ball enters the second start winning opening is performed. The high base state and the high probability low base state in which the probability variation control is performed but the advantageous release control is not performed may be included. Also, in the short-time state, a low-accuracy base state where the special figure fluctuation time is shortened and advantageous opening control is performed, and a low-accuracy low-base state where the special figure fluctuation time is shortened but advantageous opening control is not performed. May be included. As an example, depending on whether the big hit type is “first probability change” to “third probability change” or “surprise probability”, after the big hit gaming state, the high accuracy high base state and the high probability low base state It may be controlled either. As another example, depending on whether the big hit type is “first probability change” to “third probability change” or “surprise probability”, the high-accuracy high base state and the high-accuracy low base state are You may make it make the ratio controlled to either differ mutually.

  When the big hit type is “Crush Probability”, when determining the variation pattern type to be one of multiple types, whether to control to the high probability high base state or the high probability low base state after the big hit gaming state ends Accordingly, different variation pattern types may be determined. As an example, when the big hit type is determined to be “surprise” in step S243 shown in FIG. 58, it is determined whether to control to the high probability high base state or the high probability low base state after the big hit gaming state is finished. A determination process is performed to At this time, when it is determined to control to the high-accuracy low base state, the big hit type such as the special CA4-1, the special CB4-1, and the special CC4-1 variation pattern type is “surprise”. A common variation pattern type is determined when the variable display result is “small hit”. On the other hand, when it is decided to control to the high-accuracy high-base state, it is dedicated only when the big hit type is “surprise” such as special CA4-2, special CB4-2, and special CC4-2. The change pattern type may be determined. As a result, when the big hit type is “surprise” and the high probability low base state is reached after the big hit gaming state is finished, the variable display result is displayed as an effect operation during variable display of the decorative pattern or an effect operation in the two round big hit state. After the production operation common to the case of “small hit” is performed, the highly accurate and low base state can be obtained. On the other hand, when the big hit type is “surprising” and the high hitting high base state is reached after the big hit gaming state is finished, the big hit type is “accurate” as a directing operation during variable display of a decorative symbol or a two round big hit state. After the dedicated performance operation is performed only in the case of “

  In the embodiment described above, the “left”, “middle”, and “right” decorative symbol display areas 5L, 5C, and 5R are provided in the display area of the image display device 5, and the decorative symbol display areas 5L, 5C, and 5R are provided. In the above description, it is assumed that one decorative symbol is stopped and displayed so that the final decorative symbol that is the final stop symbol is stopped and displayed on one predetermined effective line. However, the present invention is not limited to this. For example, in the “left”, “middle”, and “right” decorative symbol display areas 5L, 5C, and 5R, three locations of “upper”, “middle”, and “lower” are provided. It is also possible that the decorative symbols can be stopped and displayed, and the finalized decorative symbols that will be the final stopped symbols are stopped and displayed on five or eight active lines.

  In the embodiment described above, the pachinko gaming machine 1 provided with the first special symbol display device 4A and the second special symbol display device 4B has been described. Part of can be applied. In this case, for example, the combination of the latch flip-flop 557B, the random number latch selector 558B, and the random value register 559B included in the random number circuit 509 shown in FIG. 15 is not used, and the security time is set to a predetermined time range for each system reset. It is only necessary that the security time can be changed, or the security time can be set to any one of a plurality of extension times that can be selected in advance in addition to the fixed time.

  In the above embodiment, the specific effect is executed in response to the fact that the variation pattern type is determined as the non-reach CA1-4 or non-reach CC1-2 variation pattern type based on the random number MR4 for determining the variation pattern type. It has been described as being determined to be one of the fluctuation patterns of non-reach PA1-4 to non-reach PA1-7. That is, it has been described that the presence or absence of the specific effect is determined by determining the variation pattern type using the random value MR4 for determining the variation pattern type. However, the present invention is not limited to this. For example, the presence / absence of the specific effect may be determined by determining the variation pattern using the random number MR5 for determining the variation pattern. As an example, the table data of the loss variation pattern determination table 138A is set so that the variation pattern types of non-reach CA1-4 and non-reach CC1-2 include the variation pattern of non-reach PA1-1. In this case, at the time when the variation pattern type is determined as the non-reach CA1-4 or non-reach CC1-2 variation pattern type based on the random value MR4 for determining the variation pattern type, the presence or absence of the specific effect is still determined. First, it is determined that the specific effect is not executed by determining the non-reach PA1-1 based on the random number MR5 for determining the change pattern, while the change pattern is determined to be non-reach PA1-4 to non-reach. Execution of a specific effect is determined by being determined as one of PA1-7.

  In addition, the device configuration of the pachinko gaming machine 1, the data configuration, the processing shown in the flowchart, the various display operations including the display operation of the display image in the display area of the image display device 5, etc. depart from the spirit of the present invention. Changes and modifications can be made arbitrarily without departing from the scope. In addition, the gaming machine of the present invention is not limited to a payout type gaming machine that pays out a predetermined number of prize balls in response to detection of a winning ball, but responds to detection of a winning ball by enclosing the gaming ball. It can also be applied to enclosed game machines that give points.

  Further, the present invention is not limited to the pachinko gaming machine 1 in the above embodiment, and a part thereof may be applied to other gaming machines such as a slot machine. In this case, for example, the combination of the latch flip-flop 557B, the random number latch selector 558B, and the random value register 559B included in the random number circuit 509 shown in FIG. 15 is not used. On the other hand, a detection signal from a start lever switch provided in the slot machine is input to an input port P0 provided in the PIP 510. The start lever switch outputs a detection signal that is turned on when an operation on the start lever for starting a game is detected by rotating a plurality of reels.

  Inside the casing of the slot machine, there is provided a variable display device in which a plurality of (for example, three) reels having a plurality of kinds of symbols arranged on the outer periphery are arranged in parallel in the horizontal direction. The front door of the slot machine is provided with an image display device having a display function similar to that of the image display device 5 in the above embodiment. On the outer periphery of each reel, a plurality of types of symbols that can be distinguished from each other, such as “red 7”, “white 7”, “BAR”, “JAC”, “watermelon”, “cherry”, and “bell”, are predetermined. It is drawn in the order. The symbols drawn on the outer peripheral portion of each reel are displayed on the upper, middle, and lower three stages on the variable display device. Each reel rotates in response to a predetermined operation (for example, a pressing operation) on the start lever, so that the design of each reel is displayed while being continuously changed. When the rotation of each reel is stopped, the player operates a plurality of stop switches installed corresponding to each reel. Note that if the stop switch is not operated even after a predetermined time has elapsed after the rotation of the reel is started, the rotation of the reel may be automatically stopped.

  At a predetermined position of the front door in the slot machine, for example, an insertion slot into which a game medium such as a medal can be inserted, a BET switch for setting (BET) a game medium as one unit (for example, one medal) as a bet number, 1 MAXBET switch for setting the maximum number of bets that can be bet on a game (for example, three medals), stored as credit (number of game media stored as player-owned game value) A settlement switch for settlement of game media and game media used for setting the number of bets is provided.

  When playing a game in a slot machine, first, a game medium is inserted from an insertion slot, or a bet number is set using credits. When using credits, the BET switch or MAXBET switch is operated. When the number of bets is set in this way, one of a plurality of pay lines corresponding to the number of bets becomes valid, the start lever operation is valid, that is, the game can be executed, and the variable display The execution condition is met. Note that when a re-gamer winning such as replay occurs in the previous game, the next game can be executed continuously, and the variable display execution condition is satisfied. When the start lever is operated in such a state that the game can be executed, each reel rotates corresponding to the fact that the variable display start condition is satisfied, and the symbols continuously vary. While the symbols vary due to the rotation of each reel, various effect operations are executed by the display operation of the effect image in the image display device, the sound output operation from the speaker, the lighting operation of the game effect lamp, and the like. For example, in the image display device, the same symbol as the symbol drawn on the outer peripheral portion of each reel, or the symbol associated with the symbol that is different from the symbol of each reel is variably displayed as effect identification information. Just do it. Further, even after the change of the symbols is ended, various effect operations such as an effect operation for notifying the occurrence of a prize and an effect operation for demonstration may be executed. When any of the plurality of stop switches is operated in this state, the rotation of the corresponding reel is stopped, and the display result is derived and displayed so as to be visible.

  Then, when the rotation of all the reels is stopped, one game is finished, and a combination of symbols called a predetermined combination on one of the activated pay lines is stopped as a display result of each reel. Will win a prize. The types of winning combinations are roughly divided into small roles with medals, re-players that can start the next game without the need to set the number of bets, and special cases that have a transition in gaming state. There is a role, and the winning combination is determined according to the gaming state. In the slot machine, the winning of each combination determined according to the gaming state is allowed based on a random number value extracted from a random number circuit similar to the random number circuit 509 in the above embodiment at the timing when the start lever is operated. An internal lottery to determine whether or not The fact that winning in this internal lottery and winning is permitted is also referred to as “internal winning”. Of the winning of each role, the winning of the small role and the replaying role is valid only in the game for which the winning is determined, but the winning of the special role has the roles allowed to be generated by the internal lottery. It is effective until. In other words, once the occurrence of a special winning combination is allowed, even if the special winning combination cannot be generated in each game, the winning is carried over to the next game.

  The gaming state in the slot machine includes a specific gaming state and a normal gaming state. The specific gaming state may include AT (assist time), CT (challenge time), RT (replay time), ART (assist replay time), etc. in addition to the regular bonus and the big bonus. In the regular bonus game state, for example, small roles such as JAC, cherry, watermelon, and bell are defined as winning combinations and are subject to lottery in the internal lottery. In the big bonus game state, in a predetermined small role game, small roles such as cherry, watermelon and bell, and special roles such as regular bonus (or JACIN) are determined as winning roles. It is a lottery target in the internal lottery in the role game. In the AT gaming state, a winning condition for a specific combination that can not make a winning appear unless an operation matching the winning conditions such as the stop order and stop timing of each reel is performed. In the CT gaming state, each reel becomes uncontrolled within a certain range, so that it becomes possible to win a specific small role aimed. In the gaming state of RT, a replay player such as replay wins with a high probability. In the ART gaming state, the AT gaming state and the RT gaming state are combined. In the normal gaming state, for example, small roles such as cherry, watermelon and bell, replay roles such as replay, special roles such as big bonus, regular bonus, etc. are predetermined as winning roles, It is a lottery target in the lottery.

  The slot machine includes a power supply board having a configuration and functions common to the power supply board 10 in the above embodiment, a main board having a configuration and functions common to the main board 11, and a structure common to the effect control board 12. In addition, an effect control board including functions and a payout control board including configurations and functions common to the payout control board 12 are mounted. Each control board may include a different configuration and function from the control board in the above embodiment according to the progress of the game in the slot machine and the contents of the effects.

  The main board of the slot machine is equipped with a game control microcomputer having the same configuration and functions as the game control microcomputer 100 in the above embodiment. For example, this game control microcomputer is provided with a CPU capable of executing the same control as the CPU 505 in the above embodiment, a ROM similar to the ROM 506, a ROM capable of storing fixed data, and a work area similar to the RAM 507. It is sufficient that a possible RAM is incorporated. In addition, a random number circuit that is partially or entirely in common with the random number circuit 509 in the above embodiment may be incorporated in or externally attached to the game control microcomputer.

  As an example, the CPU built in the game control microcomputer included in the slot machine executes a process corresponding to steps S1 to S8 shown in FIG. 47, thereby reducing the security time to a predetermined time range for each system reset. It is only necessary that the security time can be changed, or the security time can be set to any of a plurality of pre-selectable extended times in addition to the fixed time. In addition, the configuration and function of the pachinko gaming machine 1 in the above embodiment may be applied to the slot machine without departing from the spirit of the present invention. Here, when determining the variation pattern type and variation pattern as shown in FIG. 41 to FIG. 44 in the slot machine, the processing in which the processing of steps S261 to S276 shown in FIG. It may be executed by the CPU of the game control microcomputer mounted on the main board of the machine, or mounted on the effect control board of the slot machine based on the effect control command transmitted from the main board to the effect control board. It may be executed by the CPU of the production control microcomputer. When the variation pattern type or variation pattern is determined on the main board side of the slot machine, an effect control command indicating the determined change pattern may be transmitted from the main board to the effect control board. On the other hand, when the variation pattern type is determined as the variation pattern on the effect control board side of the slot machine, an effect control command indicating an internal lottery result is transmitted from the main board to the effect control board, and the effect control micro The CPU of the computer refers to the variation pattern type determination table selected based on this effect control command and determines one of a plurality of variation pattern types (a process corresponding to steps S261 to S273). Then, by referring to the variation pattern determination table selected corresponding to the determined variation pattern type, etc., the effect identification that is variably displayed on the image display device from among the variation patterns included in the variation pattern type What is necessary is just to determine the variation pattern of the information pattern (processing corresponding to steps S274 to S276).

(3) In order to achieve the above object, the gaming machine according to the present invention can identify each based on the establishment of start conditions (for example, determination of Yes in steps S202 and S205, determination of No in step S215, etc.) And a variable display device (for example, the first special symbol display device 4A, the second special symbol display device 4B, the image display device 5 and the like) that variably displays a plurality of types of identification information (for example, special symbols and decorative symbols). When the variable display result of the identification information becomes a predetermined specific display result (for example, a jackpot symbol or a combination of jackpot combinations), control to a specific gaming state (for example, a jackpot gaming state) advantageous to the player a to the gaming machine (for example, such as pachinko gaming machine 1), the initial setting process (for example security by the security check program 506A (For example, a game check timer interruption process) for controlling the progress of the game based on control data (for example, stored data in the user program area of the ROM 506). Built-in in a game control microcomputer (such as game control microcomputer 100) including a CPU (such as CPU 505), a non-volatile memory (such as ROM 506) storing the control data, and the game control microcomputer Alternatively, a random number circuit (for example, a random number circuit 509) that generates numerical data that becomes an externally attached random number value and a game start operation means (for example, a game start switch 31) that outputs a game start signal in response to a predetermined operation are provided. A microcomputer for controlling the game , Security check means for storing contents to perform the security check process for checking whether or not the change in the non-volatile memory before Symbol Initial setting processing (e.g. CPU505 and portions for performing the processing of step S9~ step S14) If the security check means the execution time of the initial setting process for performing security check process by the variable security time setting means for varying in a predetermined time range each time before Symbol initial setting processing is executed (for example, security time After the start of the random number generation operation by the random number circuit, the CPU 505 executes the processing of steps S5 to S8 based on the bit number [4-3] of the set KSES and the game start operation means. Execution of game control processing when game start signal is output Game control starting means for starting the game (for example, the part in which the CPU 505 executes the process of step S36 based on the determination of Yes in step S35 and then executes the game control timer interrupt process including the processes of steps S91 to S98) And a prior determination means for determining whether or not to control to the specific gaming state using the random number value read from the random number circuit in the game control process before the variable display result of the identification information is derived and displayed ( For example, the CPU 505 executes the start winning determination process in step S101 and then executes a process in step S240).

According to the gaming machine described in (3) above, the execution time of the initial setting process for executing the security check process is changed within a predetermined time range each time the initial setting process is executed. This makes it difficult to identify the execution start timing of the game control process, pick off and based on the result of analysis of the game control process program, it is possible to prevent cheating by connecting the so-called "hanging board" .
Also, since the execution of the game control process is started when the game start signal is output, it becomes difficult to specify the operation start timing of the random number circuit from the execution start timing of the game control process, and illegal acts such as sniper shooting Can be prevented.

(4) Or, based on the establishment of the starting condition (for example, Yes determination in steps S202 and S205, No determination in step S215, etc.), a plurality of types of identification information (for example, special symbols and decorative symbols) that can be distinguished from each other And the like, for example, the first special symbol display device 4A, the second special symbol display device 4B, and the image display device 5), and the identification information variable display result is a predetermined specific display. A game machine (for example, pachinko gaming machine 1 or the like) that controls to a specific gaming state (for example, a big hit gaming state) advantageous to the player when a result (for example, a jackpot symbol or a combination of big hits) Te, after performing the initial setting process (for example by the security check program 506A security check processing, etc.), A game incorporating a control CPU (for example, CPU 505) for executing a game control process (for example, a game control timer interrupt process) for controlling the progress of the game based on the control data (for example, stored data in the user program area of the ROM 506). A control microcomputer (for example, the game control microcomputer 100), a non-volatile memory (for example, the ROM 506) for storing the control data, and a numerical value that becomes a random number value that is built in or externally attached to the game control microcomputer. A random number circuit for generating data (for example, a random number circuit 509) and a game start operation means (for example, a game start switch 31) for outputting a game start signal in response to a predetermined operation; It said non-volatile in the previous Symbol Initial setting process A security check means for performing a security check process to check whether the stored content of the memory is changed (for example, a portion CPU505 executes the process of step S9~ step S14), and a security check process according to the security check means In the extended security time setting means (for example, bit number [2-0] of security time setting KSES), the execution time of the initial setting process to be executed is set to one of a plurality of pre-selectable extension times in addition to the fixed time A portion where the CPU 505 executes the processing of step S1 to step S4) and a random number generation operation by the random number circuit is started, and then a game start signal is output from the game start operation means. Game control start means for starting execution of the control process (for example, For example, the CPU 505 executes the process of step S36 based on the determination of Yes in step S35 and then executes a game control timer interrupt process including the processes of steps S91 to S98), and the random number in the game control process Predetermining means (for example, the CPU 505 is started in step S101) that determines whether or not to control the specific gaming state using a random value read from the circuit before the variable display result of the identification information is derived and displayed. And the like after executing the winning determination process).

According to the gaming machine described in (4) above, the execution time of the initial setting process for executing the security check process is set to one of a plurality of pre-selectable extended times in addition to the fixed time. This makes it difficult to identify the execution start timing of the game control process, pick off and based on the result of analysis of the game control process program, it is possible to prevent cheating by connecting the so-called "hanging board" .
Also, since the execution of the game control process is started when the game start signal is output, it becomes difficult to specify the operation start timing of the random number circuit from the execution start timing of the game control process, and illegal acts such as sniper shooting Can be prevented.

(5) Alternatively, it is possible to start a game by setting a predetermined number of bets for one game using game media, and variably display a plurality of types of winning identification information that can be distinguished from each other. With a gaming machine (for example, a slot machine) in which one game is completed when the display result is derived to the winning variable display section, and a winning can be generated according to the display result derived to the winning variable display section. there are, after performing the initial setting process, is mounted on the main board of the game control microcomputer the control CPU with built (e.g. a slot machine for executing a game control process of controlling the progress of the game based on the game control data And a non-volatile memory for storing the game control data (for example, a game control microcomputer of the slot machine). A ROM provided in a computer), a random number circuit (for example, a random number circuit mounted on a main board of a slot machine) that generates numeric data that is built in or externally attached to the game control microcomputer and becomes a random number value, and a predetermined number operation and a game start operation means for outputting a game start signal (e.g., such as slots, game start switch mounted on the machine), depending on whether the storage contents of the nonvolatile memory is changed in the previous Symbol Initial setting processing whether Security check means for performing security check processing for checking whether or not (for example, a portion corresponding to steps S9 to S14 is executed in the slot machine) and the initial setting processing for executing security check processing by the security check means of the execution time, it before Symbol Initial setting process is executed After the variable security time setting means (for example, the part corresponding to steps S5 to S8 is executed in the slot machine) and the random number circuit generating operation by the random number circuit are started. When a game start signal is output from the game start operation means, game control start means for starting execution of the game control process (for example, a process corresponding to step S35 or step S36 in the slot machine is executed, and then the game is started. A portion for executing a control process) and a random value read from the random number circuit in the game control process, and a specific prize (for example, a big bonus, AT · Whether or not the generation of each of a plurality of types of winnings including CT, RT, ART, etc.) is permitted. A pre-decision unit for winning that is determined before the variable display result is derived and displayed (for example, a portion in which processing corresponding to step S240 is executed in the slot machine).

According to the gaming machine described in (5) above, the execution time of the initial setting process for executing the security check process is changed within a predetermined time range each time the initial setting process is executed. This makes it difficult to identify the execution start timing of the game control process, pick off and based on the result of analysis of the game control process program, it is possible to prevent cheating by connecting the so-called "hanging board" .
Also, since the execution of the game control process is started when the game start signal is output, it becomes difficult to specify the operation start timing of the random number circuit from the execution start timing of the game control process, and illegal acts such as sniper shooting Can be prevented.

(6) Alternatively, it is possible to start a game by setting a predetermined number of bets for one game using game media, and variably display a plurality of types of winning identification information that can be distinguished from each other. With a gaming machine (for example, a slot machine) in which one game is completed when the display result is derived to the winning variable display section, and a winning can be generated according to the display result derived to the winning variable display section. there are, after performing the initial setting process, is mounted on the main board of the game control microcomputer the control CPU with built (e.g. a slot machine for executing a game control process of controlling the progress of the game based on the game control data And a non-volatile memory for storing the game control data (for example, a game control microcomputer of the slot machine). A ROM provided in a computer), a random number circuit (for example, a random number circuit mounted on a main board of a slot machine) that generates numeric data that is built in or externally attached to the game control microcomputer and becomes a random number value, and a predetermined number operation and a game start operation means for outputting a game start signal (e.g., such as slots, game start switch mounted on the machine), depending on whether the storage contents of the nonvolatile memory is changed in the previous Symbol Initial setting processing whether Security check means for performing security check processing for checking whether or not (for example, a portion corresponding to steps S9 to S14 is executed in the slot machine) and the initial setting processing for executing security check processing by the security check means Can be pre-selected in addition to the fixed time An extended security time setting means (for example, a part in which processing corresponding to steps S1 to S4 is executed in a slot machine) set to any one of the extension times of the number and a random number value generating operation by the random number circuit are started. Thereafter, when a game start signal is output from the game start operation means, game control start means for starting execution of the game control process (for example, after executing processing corresponding to step S35 or step S36 in the slot machine) , A part for executing a game control process) and a random number read from the random number circuit in the game control process, and using a random winning with a transition to a specific game state advantageous to the player (for example, a big bonus, Whether or not to allow each of a plurality of types of winnings including AT, CT, RT, ART, etc.) A pre-decision unit for winning that is determined before a variable display result of information is derived and displayed (for example, a portion in which processing corresponding to step S240 is executed in the slot machine).

According to the gaming machine described in (6) above, the execution time of the initial setting process for executing the security check process is set to one of a plurality of pre-selectable extended times in addition to the fixed time. This makes it difficult to identify the execution start timing of the game control process, pick off and based on the result of analysis of the game control process program, it is possible to prevent cheating by connecting the so-called "hanging board" .
Also, since the execution of the game control process is started when the game start signal is output, it becomes difficult to specify the operation start timing of the random number circuit from the execution start timing of the game control process, and illegal acts such as sniper shooting Can be prevented.

(7) Further, in the gaming machine according to any one of (3) to (6), a gaming control board (for example, the main board 11) on which the gaming control microcomputer and the nonvolatile memory are mounted. In addition to a power supply board (for example, the power supply board 10) that supplies power to the game control board and the game start operation means, an initialization operation means that outputs an initialization request signal in response to a predetermined operation ( The initialization operation means is provided on the power supply board (for example, a portion where the clear switch 304 is mounted on the power supply board 10), and the game start operation means is provided on the game control board. Provided (for example, a part where the game start switch 31 is mounted on the main board 11).

  In the gaming machine described in (7) above, the initialization operation means is provided on the power supply board, and the game start operation means is provided on the game control board. Then, in order to start the execution of the game control process after initializing the operation of the random number circuit, a predetermined operation is required for both the initialization operation means and the game start operation means, so that illegal acts such as aiming are prevented be able to.

(8) Further, in the gaming machine according to any one of (1) to (7), a gaming control board (for example, the main board 11) on which the gaming control microcomputer and the nonvolatile memory are mounted. A payout device (for example, a payout motor 51) for paying out game media (for example, a game ball to be a prize ball), and a payout control microcomputer (for example, a payout control microcomputer 150) for controlling the payout operation by the payout device. ) Mounted on the payout control board (for example, the payout control board 15), an effect device (for example, the image display device 5, speakers 8L, 8R, game effect lamp 9, etc.) for executing a predetermined effect, and the effect device Equipped with a production control microcomputer (eg, production control microcomputer 120) that controls production operations An output control board (for example, an effect control board 12), and the game control microcomputer performs a serial communication between the payout control microcomputer and the effect control microcomputer (for example, a serial communication circuit). A communication control means (for example, a portion where the CPU 505 executes the process of step S24 or a portion where the main side communication control process is executed in step S98). ), And the serial communication circuit only transmits a communication data to the payout control board (for example, the first channel transmission / reception circuit 571A) and the transmission of the communication data to the effect control board. A second communication circuit (for example, the second channel transmission circuit 57) Including the B, etc.) and.

  In the gaming machine described in (8) above, communication data can be transmitted and received by the first communication circuit between the game control board and the payout control board, while the second between the game control board and the effect control board. Only the communication data can be transmitted to the effect control board by the communication circuit. As a result, signal input from the effect control board to the game control board can be prohibited to prevent fraud.

(9) Further, in the gaming machine according to any one of (1) to (8), a random number clock signal (for example, a random number clock RCLK) is generated outside the gaming control microcomputer. A random number clock generation circuit (for example, a random number clock generation circuit 112) for supplying to the random number circuit, the random number circuit is built in the game control microcomputer, and the game control microcomputer is used for the random number circuit. Based on the input state of the random number clock signal supplied from the clock generation circuit, random number clock abnormality determining means for determining whether an abnormality has occurred in the operation state of the random number circuit (for example, internal information data by the frequency monitoring circuit 551) A portion where the CPU 505 executes the processing of steps S61 to S66 based on the setting of CIF4 Including the.

In the gaming machine described in (9) above, it is determined whether an abnormality has occurred in the operating state of the random number circuit based on the input state of the random number clock signal supplied from the random number clock generation circuit. This makes it possible to prevent fraud by entering an incorrect signal as a random number clock signal.

(10) In the gaming machine according to any one of (1) to (9), the gaming control microcomputer monitors all bits of the numerical data generated by the random number circuit and turns on the power. Whether or not an abnormality has occurred in the operating state of the random number circuit based on the presence or absence of bit data that does not change when numerical data is read multiple times by outputting a latch signal from the control CPU to the random number circuit Random number abnormality determining means (for example, a portion where the CPU 506 executes the processing of step S67 to step S77).

  In the gaming machine described in (10), all bits of the numerical data generated by the random number circuit are monitored, and the numerical data is output a plurality of times by outputting a latch signal from the control CPU to the random number circuit when the power is turned on. Whether or not an abnormality has occurred in the operating state of the random number circuit is determined based on the presence or absence of bit data that does not change when read. As a result, it is possible to reliably and easily detect that an abnormality has occurred in the operating state of the random number circuit, and to prevent fraud.

DESCRIPTION OF SYMBOLS 1 ... Pachinko machine 2 ... Game board 3 ... Gaming machine frame 4A, 4B ... Special symbol display device 5 ... Image display device 6A ... Ordinary winning ball device 6B ... Ordinary variable winning ball device 7 ... Special variable winning ball device 8L, 8R ... Speaker 9 ... Game effect lamp 11 ... Main board 12 ... Production control board 13 ... Audio control board 14 ... Lamp control board 15 ... Discharge control board 18 ... Relay board 20 ... Normal symbol display 21 ... Gate switches 22A, 22B ... Start switch 23 ... Count switch 31 ... Game start switch 41 ... Pass gate 100 ... Game control microcomputer 501 ... External bus interface 501A ... Internal resource access restriction circuit 502 ... Clock circuit 503 ... Unique information storage circuit 504 ... Reset / interrupt Controller 505 ... C PU
506 ... ROM
507 ... RAM
508 ... CTC
509 ... random number circuit 510 ... PIP
511 ... Serial communication circuit 512 ... Address decode circuit 551 ... Frequency monitoring circuit 552 ... Clock flip-flop 553 ... Random number generation circuit 554 ... Start value setting circuit 555 ... Random number sequence change circuit 556 ... Random number sequence change setting circuit 557A, 557B ... Latch Flip-flops 558A, 558B ... Random number latch selectors 559A, 559B ... Random value register 571A ... First channel transmission / reception circuit 571B ... Second channel transmission circuits 581A, 581B ... Transmission shift registers 582A, 582B ... Transmission data registers 583A, 583B ... Interrupt control circuit 584A ... Receive data register 585A ... Receive shift register

Claims (2)

A gaming machine that can be controlled to an advantageous state advantageous to a player,
A game control microcomputer including a control CPU for executing a game control process for controlling the progress of the game based on the control data after executing the initial setting process;
A non-volatile memory for storing the control data;
A random number circuit that generates numerical data that is built in or externally attached to the game control microcomputer and becomes a random number value;
The game control microcomputer is:
Security check means for executing a security check process for checking whether or not the storage content of the nonvolatile memory has been changed in the initial setting process;
Variable security time setting means capable of changing the execution time of the initial setting process including the security check process by the security check means within a predetermined time range each time the initial setting process is executed;
Count means for updating the count value separately from the operation of the control CPU;
Initial value setting means for randomly setting an initial value of the numerical data using a count value by the counting means for each system reset of the gaming machine;
Determination means for determining whether or not to control to the advantageous state using a random number value read from the random number circuit in the game control process,
The nonvolatile memory is built in the game control microcomputer,
The game control microcomputer includes a read restriction circuit for restricting external reading of the nonvolatile memory by a device other than the control CPU,
A first variable display means for executing the variable display of the first identification information,
Second variable display executing means for executing variable display of the second identification information;
The first variable display pattern selection process for selecting the variable display pattern of the first identification information and the second variable display pattern selection process for selecting the variable display pattern of the second identification information are the same process. further Ru and a variable display pattern selecting means for performing a routine,
A gaming machine characterized by that. A gaming machine that can be controlled to an advantageous state advantageous to a player,
A game control microcomputer including a control CPU for executing a game control process for controlling the progress of the game based on the control data after executing the initial setting process;
A non-volatile memory for storing the control data;
A random number circuit that generates numerical data that is built in or externally attached to the game control microcomputer and becomes a random number value;
The game control microcomputer is:
Security check means for executing a security check process for checking whether or not the storage content of the nonvolatile memory has been changed in the initial setting process;
An extended security time setting means capable of setting an execution time of the initial setting process including a security check process by the security check means to any one of a plurality of pre-selectable extended times in addition to a fixed time;
Count means for updating the count value separately from the operation of the control CPU;
Initial value setting means for randomly setting an initial value of the numerical data using a count value by the counting means for each system reset of the gaming machine;
Determination means for determining whether or not to control to the advantageous state using a random number value read from the random number circuit in the game control process,
The nonvolatile memory is built in the game control microcomputer,
The game control microcomputer includes a read restriction circuit for restricting external reading of the nonvolatile memory by a device other than the control CPU,
A first variable display means for executing the variable display of the first identification information,
Second variable display executing means for executing variable display of the second identification information;
The first variable display pattern selection process for selecting the variable display pattern of the first identification information and the second variable display pattern selection process for selecting the variable display pattern of the second identification information are the same process. further Ru and a variable display pattern selecting means for performing a routine,
A gaming machine characterized by that.

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