JP6008930B2 - Power converter - Google Patents

Description

  The present invention relates to a power conversion device, and more particularly to a power conversion device that can arbitrarily control a dead time set between a series of pulses for driving on / off of a semiconductor switch element according to a load current.

  The power converter is provided with a plurality of semiconductor switch elements. The semiconductor switch element is composed of, for example, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). In a power converter, power conversion is performed by controlling on / off of these semiconductor switch elements.

  The plurality of semiconductor switch elements of the power conversion device are provided separately on the upper arm side and the lower arm side. The semiconductor switch element on the upper arm side and the semiconductor switch element on the lower arm side are connected in series. At this time, if the semiconductor switch element on the upper arm side and the semiconductor switch element on the lower arm side connected in series are turned on at the same time, there is a possibility that an arm short circuit may occur. Therefore, it is a well-known technique to provide a dead time so that the semiconductor switch element on the upper arm side and the semiconductor switch element on the lower arm side are not turned on simultaneously.

  Hereinafter, the dead time will be briefly described. As described above, the upper arm side semiconductor switch element and the lower arm side semiconductor switch element that are connected in series are not simultaneously turned on during the dead time period. That is, the dead time is a time during which both the upper arm side semiconductor switch element and the lower arm side semiconductor switch element are turned off. This dead time is set between the pulse signals for driving the semiconductor switching elements. As described above, the dead time is a time difference between the timing at which the upper arm side semiconductor switch element is turned off (or turned on) and the timing at which the lower arm side semiconductor switch element is turned on (or turned off).

  However, power transmission is not performed during the dead time. Therefore, if the dead time is set longer than necessary, the conversion efficiency of the power conversion device decreases.

  In order to reduce the dead time, a method of controlling the dead time according to the input voltage has been proposed (see, for example, Patent Document 1). In Patent Document 1, a dead time control voltage generation circuit that generates a dead time control voltage that changes a dead time to a preset value with respect to an input voltage is provided. If the input voltage is less than the first threshold Vx1, the dead time control voltage decreases with a first slope. Further, when the input voltage is equal to or higher than the first threshold value Vx1 and smaller than the second threshold value Vx2, the dead time control voltage decreases with a second gradient smaller than the first gradient. Furthermore, when the input voltage is equal to or higher than the second threshold value Vx2, the dead time control voltage increases with the third gradient.

  On the other hand, recently, the switching frequency tends to be increased in order to reduce the size of the reactor, transformer, and capacitor provided in the DC / DC converter. When the frequency is increased, a semiconductor switching element made of a wide band gap semiconductor is often used.

  An example of the wide band gap semiconductor is SiC (Silicon-Carbide, silicon carbide). The SiC semiconductor has a wider band gap than the Si semiconductor. Therefore, the SiC semiconductor is suitable for a high frequency power device.

  The Si semiconductor can be used in a high voltage region where unipolar operation is difficult. Si semiconductors can greatly reduce the switching loss that occurs during switching. As a result, power loss can be greatly reduced.

  Si semiconductors have low power loss and high heat resistance. Therefore, when a power module including a cooling unit is configured using a Si semiconductor, it is possible to reduce the size of the heat dissipating fins of the heat sink and to air-cool the water cooling unit. Thereby, the semiconductor module can be further reduced in size.

  On the other hand, a MOSFET using SiC has a problem that characteristics deteriorate when a body diode is energized. Therefore, a method of connecting an SBD (Schottky Barrier Diode) in parallel with a MOSFET has been proposed (see, for example, Patent Document 2). In this method, the characteristic of the parasitic inductance of the element is controlled so that a current flows through the SBD.

Japanese Patent No. 3484625 Japanese Patent No. 5525917

  When the switching frequency is increased by increasing the frequency, the ratio of dead time to the switching period increases. As a result, the power transmission time is reduced and the efficiency of the power conversion device is reduced. Therefore, it is necessary to reduce dead time.

  However, Patent Document 1 does not consider high frequency. In order to cope with higher frequencies, the method of Patent Document 1 is insufficient in reducing dead time, and further dead time needs to be reduced.

  Further, Patent Document 2 requires a space for making inductance. This increases the size of the semiconductor switch element. As a result, problems such as an increase in the size and cost of the power converter occur. Furthermore, in Patent Document 2, since the SBD is connected in parallel to the MOSFET, even when synchronous rectification is performed, the body diode can be energized during the dead time depending on the current value. It is a problem.

  The present invention has been made to solve the above-described problems. By making the dead time controllable in accordance with the load current, the efficiency of power conversion is increased without increasing the size of the switching element. An object is to obtain a power conversion device capable of improving the power.

The present invention provides a semiconductor switch element, a current detector that detects a current flowing through the semiconductor switch element, and a gate pulse signal with a dead time set for the semiconductor switch element, A controller for controlling on / off, wherein the controller controls the ratio of the dead time to the switching period of the semiconductor switch element according to the value of the current detected by the current detector. The controller may set the ratio of the dead time to the switching period of the semiconductor switch element so that the dead time change amount has a negative characteristic with respect to the current change amount flowing through the semiconductor switch element. controlled, the relationship between the change amount and the change amount of the dead time of the current flowing through the semiconductor switch, upper Has an inflection point where the slope of the variation of the dead time is changed corresponding to the change in current, the variations of the flex point in the boundary, the dead time in the region said current is smaller than the area the current is large And the following equation (1) is satisfied, where maxduty is the maximum duty ratio (the ratio of the power transmission period to one period of the switching period Tsw is the maximum value 0.5) Td represents the dead time and Tsw represents the switching cycle.

  In the power conversion device according to the present invention, the ratio of the dead time to the switching cycle is controlled according to the value of the current flowing through the semiconductor switch element, so that the size of the switching element does not increase, It is possible to improve the conversion efficiency and extend the life of the power conversion device.

It is explanatory drawing which showed the current dependence of switching delay time with the graph. It is a block diagram which shows the structure of the power converter device which concerns on Embodiment 1 of this invention. It is a block diagram which shows the structure of the controller provided in the power converter device which concerns on Embodiment 1 of this invention. It is explanatory drawing which showed the relationship between the electric current in the power converter device which concerns on Embodiment 1 of this invention, and permissible maximum duty with the graph. It is explanatory drawing which showed the relationship between the electric current and dead time in the power converter device which concerns on Embodiment 1 of this invention with the graph. It is explanatory drawing which showed the gate drive signal generation method in the power converter device which concerns on Embodiment 1 of this invention. It is explanatory drawing which showed the calculation method of the electric current which flows into the switching element of the power converter device which concerns on Embodiment 1 of this invention. It is explanatory drawing which showed the calculation method of the electric current which flows into the switching element of the power converter device which concerns on other embodiment of this invention.

  The present invention relates to a power converter that controls a lower limit value of a dead time according to a load current. In the power converter of the present invention, the ratio of the dead time to the switching period of the semiconductor switch element is controlled according to the value of the current flowing through the semiconductor switch element.

  FIG. 1 is a graph showing current dependency data of switching delay time. In the graph of FIG. 1, the horizontal axis represents current [A], and the vertical axis represents switching delay time [ns]. As shown in FIG. 1, both the turn-on time Ton and the turn-off time Toff are current dependent. However, the degree of change between the turn-on time Ton and the turn-off time Toff is different. The degree of decrease in turn-off time Toff accompanying the increase in current is greater than the degree of increase in turn-on time Ton. Therefore, it can be seen that the difference (Toff−Ton) between the turn-on time Ton and the turn-off time Toff tends to decrease as the current increases.

This difference (Toff−Ton) is the minimum necessary dead time. Therefore, the following relationship holds.
Minimum required dead time in low current area>
Minimum required dead time in high current area

  When the current dependency is not taken into consideration, the minimum necessary dead time is set to a constant value based on the value of the region where the current is small. For this reason, in a region where the current is large, the dead time has a margin. That is, the dead time can be reduced in a region where the current is large.

  Therefore, according to the present invention, the ratio of the dead time to the switching cycle of the semiconductor switch element is changed according to the value of the current flowing through the semiconductor switch element. Specifically, the proportion of dead time is reduced according to the increase in current value. Thereby, the time length of dead time can be reduced as a whole. As a result, the power transmission time of the power converter can be improved.

  Hereinafter, a power converter according to an embodiment of the present invention will be described with reference to the accompanying drawings. The present invention is not limited to the embodiments described below.

Embodiment 1 FIG.
FIG. 2 is a diagram showing a configuration of the power conversion device according to Embodiment 1 of the present invention. As shown in FIG. 2, the power conversion apparatus according to Embodiment 1 is an isolated DC / DC converter having a full bridge circuit on both the primary side and the secondary side.

The configuration of FIG. 2 will be described.
The DC / DC converter 2 is composed of components from a battery 1 (external direct current power source) to a load 12 (external load) shown in FIG. The DC / DC converter 2 includes a primary first module 20, a secondary second module 21, a transformer 6, and a controller 14. The transformer 6 is connected between the first module 20 and the second module 21. The first module 20 is connected to the battery 1. The second module 21 is connected to the load 12.

First, the configuration of the first module 20 will be described.
The first module 20 is provided with four primary side switching elements 5a to 5d. The switching elements 5a to 5d are composed of, for example, MOSFETs. The switching elements 5a to 5d constitute a full bridge circuit. Switching elements 5a and 5c are arranged on the upper arm side, and switching elements 5b and 5d are arranged on the lower arm side. The switching elements 5a and 5b are connected in series. Hereinafter, a connection point between the switching element 5a and the switching element 5b is referred to as a connection point 16e. Similarly, the switching elements 5c and 5d are connected in series. Hereinafter, a connection point between the switching element 5c and the switching element 5d is referred to as a connection point 16f. The primary winding 6a of the transformer 6 is connected to the connection point 16e and the connection point 16f. The primary winding 6 a is wound around the core of the transformer 6. In addition, the first voltage detection circuit 4 and the first voltage detection circuit 4 are connected to both ends 16a and 16b of the series body composed of the switching elements 5a and 5b and both ends 16c and 16d of the series body composed of the switching elements 5c and 5d. The smoothing capacitor 3 is connected in parallel. The first voltage detection circuit 4 detects a voltage applied to an on-state switching element among the switching elements 5a to 5d. Further, the battery 1 is connected in parallel to the first voltage detection circuit 4 and the first smoothing capacitor 3.

  As described above, the switching elements 5 a to 5 d, the first voltage detection circuit 4, and the first smoothing capacitor 3 constitute the first module 20.

Next, the configuration of the second module 21 will be described.
The second module 21 is provided with four secondary rectifier diodes 7a to 7d. The rectifier diodes 7a to 7d constitute a full bridge circuit. The rectifier diodes 7a and 7c are disposed on the upper arm side, and the rectifier diodes 7b and 7d are disposed on the lower arm side. The rectifier diodes 7a and 7b are connected in series. Hereinafter, a connection point between the rectifier diode 7a and the rectifier diode 7b is referred to as a connection point 17e. Similarly, the rectifier diodes 7c and 7d are connected in series. Hereinafter, the connection point between the rectifier diode 7c and the rectifier diode 7d is referred to as a connection point 17f. The secondary winding 6b of the transformer 6 is connected to the connection point 17e and the connection point 17f. The secondary winding 6 b is wound around the core of the transformer 6. Further, the second voltage detection circuit 10 and the second voltage detection circuit 10 are connected to both ends 17a and 17b of the series body composed of the rectifier diodes 7a and 7b and both ends 17c and 17d of the series body composed of the rectifier diodes 7c and 7d. Are connected in parallel with the smoothing capacitor 11. Further, a load 12 is connected in parallel to the second voltage detection circuit 10 and the second smoothing capacitor 11. Further, a smoothing reactor 8 and a current detection circuit 9 are connected in series between the cathode side of the rectifier diode 7 c and the second voltage detection circuit 10.

  As described above, the rectifier diodes 7 a to 7 d, the second voltage detection circuit 10, the second smoothing capacitor 11, the smoothing reactor 8, and the current detection circuit 9 constitute a second module 21.

The controller 14 is connected to the switching elements 5a to 5d via control lines 15a to 15d. The controller 14 outputs a gate drive signal via the control lines 15a to 15d and controls on / off of the switching elements 5a to 5d. The controller 14 receives the following signals (1) to (3). However, for simplification of the drawing, in FIG. 3, signal lines for inputting the signals (1) to (3) are not shown.
(1) Voltage value Vout detected by the second voltage detection circuit 10
(2) Current value Iout detected by the current detection circuit 9
(3) Current value Ids flowing through switching elements 5a to 5d
The controller 14 performs PWM control based on these signals (1) to (3), and controls the switching elements 5a to 5d. The internal configuration and operation of the controller 14 will be described later.

Next, the operation of the DC / DC converter 2 according to Embodiment 1 will be described.
In FIG. 2, when any two of the switching elements 5 a to 5 d are turned on, a current flows from the battery 1 to the primary winding 6 a of the transformer 6. Thereby, a magnetic flux is generated in the primary winding 6a. At this time, an electromotive force (back electromotive force) is generated so as to prevent an increase in magnetic flux. Further, the magnetic flux of the primary winding 6a through the core of the transformer 6 generates a reaction magnetic flux in the secondary winding 6b. Thereby, an electromotive force (inductive electromotive force) is generated, and a current (inductive current) flows through the load 12. The direction of the current is reversed by changing the position of the switching element that is turned on. Thus, the switching elements 5a to 5d drive the load 12, which is an inductive load.

FIG. 3 is a block diagram showing the configuration of the controller 14 that performs PWM control.
As shown in FIG. 3, the controller 14 includes a division unit 140, a subtraction unit 141, a PI control unit 142, a proportional control unit 143, a limiter 144, a PWM control unit 145, and a gate drive signal generation unit 146. And a first lookup table unit 147 and a second lookup table unit 148.

  Hereinafter, the operation of the controller 14 will be described.

  First, the target value Pout * is input to the division unit 140. This target value Pout * is a target value for the output power Pout that the DC / DC converter 2 supplies to the load 12. The target value Pout * is a constant value, and the value is preset in accordance with the load 12 and held in the controller 14 in advance. Or you may make it input target value Pout * into a power converter device as a command value from the outside (for example, load 12). Further, the output voltage Vout detected by the second voltage detection circuit 10 is input to the division unit 140. The division unit 140 generates the output current target value 100 (Iout *) by dividing the target value Pout * by the output voltage Vout.

  The output current target value 100 (Iout *) is input to the subtracting unit 141. Further, the output current Iout detected by the current detection circuit 9 is input to the subtraction unit 141. The subtracting unit 141 subtracts the output current Iout from the output current target value 100 (Iout *), and calculates the difference 101 therebetween.

  The difference 101 is input to the PI control unit 142. The PI control unit 142 calculates the voltage 102 applied to the smoothing reactor 8 from the difference 101.

  The voltage 102 is input to the proportional control unit 143. The proportional control unit 143 calculates the required duty 103 from the voltage 102.

  The first lookup table unit 147 stores in advance a first lookup table that indicates the relationship between the current Ids flowing through the switching elements 5a to 5d and the allowable maximum duty.

  FIG. 4 shows an example of the first lookup table. In Example 1 and Example 2 of FIG. 4, the horizontal axis is the current Ids, and the vertical axis is the allowable maximum duty (duty upper limit). As shown in Example 1 of FIG. 4, the first look-up table may be a linear function in which the relationship between the allowable maximum duty and the current Ids has a constant gradient (gradient). Alternatively, as shown in Example 2, the relationship between the allowable maximum duty and the current Ids may be a second or higher order function having one or more inflection points at which the gradient (slope) changes.

  The first lookup table unit 147 can uniquely obtain the allowable maximum duty value corresponding to the current Ids by using the first lookup table of FIG.

  The first lookup table unit 147 receives a current Ids flowing through the switching elements 5a to 5d. The current Ids is obtained by calculation from the voltage detected by the first voltage detection circuit 4 and the resistance values of the switching elements 5a to 5d in the on state. A method for calculating the current Ids will be described later. Alternatively, a current detection circuit may be provided for the switching elements 5a to 5d, and the current Ids may be detected by the current detection circuit. The first lookup table unit 147 obtains the maximum allowable duty 104 from the first lookup table shown in FIG. 4 based on the input current Ids.

Here, a method for calculating the current Ids will be described. As a method for calculating the current Ids, for example, there are the following methods (1) to (3). Therefore, the current Ids may be obtained by any one of these methods. However, these are merely examples, and the current Ids may be obtained by other methods.
(1) As shown in FIG. 7, the second current detection circuit 13 is provided in the primary winding 6a of the transformer 6, and the absolute value of the current value detected by the current detection circuit 13 is defined as a current Ids.
(2) FIGS. 2 and 7 show the case where the power conversion device is a DC / DC converter. However, when the power conversion device is an inverter, the configuration shown in FIG. In this case, as shown in FIG. 8, a current detection circuit 18 is provided for each of the U, V, and W phases of the motor, which is the load 12, and the measured values of these three-phase currents are obtained as current Ids. And
(3) In the case of the configuration of FIG. 2, the current Ids is calculated using the current value detected by the current detection circuit 9. From the characteristics of the transformer 6, the following relationship holds.
(Primary winding current) = (secondary winding current) × (number of turns of primary winding / number of turns of secondary winding)
At this time, the number of turns of the primary winding 6a of the transformer 6 and the number of turns of the secondary winding 6b are design values and known values, respectively. Therefore, the primary winding current can be calculated by substituting the current value detected by the current detection circuit 9 into the “secondary winding current” of this equation. The absolute value of the primary winding current thus calculated is defined as a current Ids.
As described above, for example, by using any one of the calculation methods (1) to (3), the current Ids can be obtained without directly measuring the currents of the drain terminals and the source terminals of the switching elements 5a to 5d. it can.

  The limiter 144 receives the required duty 103 from the proportional control unit 143 and the allowable maximum duty 104 from the first lookup table unit 147. The limiter 144 compares the required duty 103 with the allowable maximum duty 104, and outputs an operation duty 105 based on the comparison result. That is, when the required duty 103 is greater than the allowable maximum duty 104, the limiter 144 outputs the value of the allowable maximum duty 104. On the other hand, when the required duty 103 is less than or equal to the allowable maximum duty 104, the limiter 144 outputs the required duty 103. As described above, the limiter 144 compares the required duty 103 and the allowable maximum duty 104 and outputs the smaller one of them.

  The PWM control unit 145 outputs a PWM signal (Pulse Width Modulation signal) for realizing the operation duty 105 based on the operation duty 105 from the limiter 144. Here, the PWM control has a constant cycle, and a duty cycle of a pulse width of a gate drive signal (gate pulse) for driving the switching elements 5a to 5d according to the magnitude of the input signal (operation duty 105) ( This is a control method for controlling the load 12 by changing the ratio of the pulse width between H and L). Therefore, the PWM signal is a control signal that indicates the ratio of H to L in the gate drive signal.

  The gate drive signal generation unit 146 generates a gate drive signal for switching on / off of the switching elements 5a to 5d based on the PWM signal.

The gate drive signal generation method of the gate drive signal generation unit 146 will be described with reference to FIG.
As shown in Examples 1 to 3 in FIG. 6, the gate drive signal generation unit 146 stores a sawtooth reference wave 60 for generating a gate drive signal in advance. Further, the gate drive signal generation unit 146 stores determination threshold values (5a_H, 5a_L, 5b_H, 5b_L, 5c_H, 5c_L, 5d_H, 5d_L) for determining the on / off timings of the switching elements 5a to 5d. ing. Specifically, it is as follows.

<ON determination threshold><OFF determination threshold>
・ Switching element 5a 5a_H 5a_L
-Switching element 5b 5b_H 5b_L
・ Switching element 5c 5c_H 5c_L
・ Switching element 5d 5d_H 5d_L

The gate drive signal generation unit 146 compares the reference wave 60 with each determination threshold value, and generates a gate drive signal for the switching elements 5a to 5d. That is, the gate drive signal is switched on / off (H / L) at the timing when the value of the reference wave 60 reaches each determination threshold value.
Specifically, the switching element 5a is turned on at the timing when the value of the reference wave 60 reaches the determination threshold 5a_H.
Further, the switching element 5a is turned off at the timing when the value of the reference wave 60 reaches the determination threshold value 5a_L.
Further, the switching element 5b is turned on at the timing when the value of the reference wave 60 reaches the determination threshold 5b_H.
In addition, the switching element 5b is turned off at the timing when the value of the reference wave 60 reaches the determination threshold 5b_L.
Further, the switching element 5c is turned on at the timing when the value of the reference wave 60 reaches the determination threshold 5c_H.
Further, the switching element 5c is turned off at the timing when the value of the reference wave 60 reaches the determination threshold 5c_L.
Further, the switching element 5d is turned on at the timing when the value of the reference wave 60 reaches the determination threshold 5d_H.
Further, the switching element 5d is turned off at the timing when the value of the reference wave 60 reaches the determination threshold 5d_L.

Moreover, in Example 1 and Example 2 of FIG. 6, the level of each determination threshold has the following relationship.
5a_L <5b_H ≦ 5d_L <5c_H <5b_L <5a_H ≦ 5c_L <5d_H

In Example 3 of FIG. 6, the levels of the determination threshold values have the following relationship.
5b_H <5d_L <5c_H ≦ 5b_L <5a_H <5c_L <5d_H ≦ 5a_L

Among them, it is necessary to set the dead time for the gate drive signal between the gate pulse signals of the switching elements 5a and 5b connected in series, and similarly, between the switching elements 5c and 5d connected in series. This is between the gate pulse signals.
That is, a dead time is required between the timing when the switching element 5a is turned off and the timing when the switching element 5b is turned on.
In addition, a dead time is required between the timing when the switching element 5b is turned off and the timing when the switching element 5b is turned on.
Similarly, a dead time is required between the timing when the switching element 5c is turned off and the timing when the switching element 5d is turned on.
In addition, a dead time is required between the timing when the switching element 5d is turned off and the timing when the switching element 5a is turned on.
Therefore, determination threshold pairs corresponding to the pair of gate pulse signals that require dead time are (5a_H, 5b_L), (5a_L, 5b_H), (5c_H, 5d_L), and (5c_L, 5d_H). As shown in FIG. 6, the level differences of the determination threshold pairs (5a_H, 5b_L), (5a_L, 5b_H), (5c_H, 5d_L), (5c_L, 5d_H) are values corresponding to the lengths of the respective dead times. ing.

Note that the level difference between the determination thresholds may be changed according to the current Ids.
FIG. 5 shows an example of a second lookup table showing the relationship between the current Ids and the time length of the dead time. The second lookup table is stored in advance in the second lookup table unit 148. In Example 1 and Example 2 of FIG. 5, the horizontal axis is the current Ids, and the vertical axis is the time length of the dead time. As shown in Example 1 in FIG. 5, the relationship between the length of the dead time and the current Ids may be a linear function with a constant gradient (gradient). Alternatively, as shown in Example 2, the relationship between the length of the dead time and the current Ids may be a quadratic or higher-order function having one or more inflection points where the gradient (gradient) changes. It is necessary to satisfy 1).

  Here, in Expression (1), maxduty: maximum duty (ratio of the power transmission period to the switching period Tsw), td: dead time, and Tsw: switching period.

  In both Example 1 and Example 2 of FIG. 5, the dead time decreases as the current Ids increases. That is, the change amount of the dead time (that is, the change amount of the dead time ratio with respect to the switching period) has a negative characteristic with respect to the change amount of the current Ids.

  As described above, the second lookup table unit 148 can uniquely determine the time length of the dead time corresponding to the current Ids by using the second lookup table of FIG.

  The gate drive signal generation unit 146 generates a gate drive signal as shown in Examples 1 to 3 of FIG. 6 for the switching elements 5a to 5d by the above operation.

  The controller 14 performs on / off switching control of the switching elements 5 a to 5 d based on the gate drive signal generated by the gate drive signal generation unit 146.

  As described above, the power conversion device according to the first embodiment includes the switching elements (semiconductor switching elements) 5a to 5d and the first voltage detection circuit 4 (current detection) that detects the current Ids flowing through the switching elements 5a to 5d. And a controller 14 that applies a gate drive signal (gate pulse signal) with a dead time to the switching elements 5a to 5d to control on / off of the switching elements 5a to 5d. The controller 14 has a configuration for controlling the ratio of the dead time to the switching period of the switching elements 5a to 5d according to the value of the detected current Ids. As described above, when the switching elements 5a to 5d are driven, the dead time is changed according to the current Ids. Therefore, the dead time in a large current region can be suppressed, and the efficiency of the power conversion device is improved. To do.

  In addition, when the switching elements 5a to 5d are configured with MOSFETs, it is possible to reduce the time required for energizing the body diode of the MOSFET by reducing the time length of the dead time, so that the life of the power conversion device can be expected to be extended. .

  In the first embodiment, the embodiment in which both the allowable maximum duty and the dead time are changed has been described. However, only the dead time may be changed. In that case, since the switching frequency can be reduced, the switching loss is reduced, the conversion efficiency can be improved, and the power converter can be downsized.

In the first embodiment, the switching elements 5a to 5d are made of silicon (Si) semiconductors. However, the switching elements 5a to 5d are made of a non-Si semiconductor material having a wider band gap than the Si semiconductor. It may be a thing. Examples of the wide band gap semiconductor that is a non-Si semiconductor material include silicon carbide, a gallium nitride-based material, and diamond.
A switching element made of a wide bandgap semiconductor can be used in a high voltage region where unipolar operation is difficult with a Si semiconductor, greatly reducing the switching loss that occurs during switching, and greatly reducing the power loss. In addition, since power loss is small and heat resistance is high, when a power module is configured with a cooling unit, the heat sink fins can be downsized and the water cooling unit can be air-cooled. Miniaturization is possible. In addition, power semiconductor switching elements made of wide band gap semiconductors are suitable for high-frequency switching operations, and when applied to inverters and DC / DC converters that have a high demand for higher frequencies, the switching frequency is increased and the inverters and DC / DC / DC converters are increased. A reactor, a capacitor, and the like connected to the DC converter can be downsized. Therefore, the same effect can be obtained when the gate drive signal generation unit 146 of the first embodiment is a power semiconductor switching element made of a wide gap semiconductor such as silicon carbide.

  In the first embodiment, the load 12 is, for example, an inductive load. Examples of inductive loads include a reactor or a motor stator.

  In the first embodiment, the insulation type DC / DC converter is described as an example of the power conversion device. However, the power conversion device is not limited to this, and any power conversion device using a semiconductor switching element may be used. Needless to say, the present invention is applicable.

  DESCRIPTION OF SYMBOLS 1 Battery, 2 DC / DC converter, 3 Smoothing capacitor, 1st voltage detection circuit, 5a, 5b, 5c, 5d Switching element, 6 transformer, 7a, 7b, 7c, 7d Rectifier diode, 8 Smoothing reactor, 9 Current Detection circuit, 10 second voltage detection circuit, 11 smoothing capacitor, 12 load, 13 second current detection circuit, 14 controller.

Claims (8)

A semiconductor switch element;
A current detector for detecting a current flowing through the semiconductor switch element;
A controller for controlling on / off of the semiconductor switch element by applying a gate pulse signal having a dead time set to the semiconductor switch element,
The controller controls the ratio of the dead time to the switching period of the semiconductor switch element according to the value of the current detected by the current detector,
The controller controls the ratio of the dead time to the switching period of the semiconductor switch element such that the amount of change in the dead time has a negative characteristic with respect to the amount of change in the current flowing through the semiconductor switch element;
The relationship between the amount of change in the current flowing through the semiconductor switch and the amount of change in the dead time has an inflection point at which the slope of the amount of change in the dead time with respect to the amount of change in the current changes. As a boundary, in the region where the current is small compared to the region where the current is large, the slope of the change amount of the dead time is large and satisfies the following relational expression, where maxduty is the maximum value of the duty (above When the ratio of the power transmission period to one period of the switching period Tsw is represented by the maximum value 0.5), td is the dead time, and Tsw is the switching period.

Power conversion device. The power converter according to claim 1, wherein the controller controls a maximum duty value in accordance with the value of the current detected by the current detection unit. The power conversion device according to claim 1, wherein the semiconductor switch element drives an inductive load. The power converter according to claim 3, wherein the inductive load is a reactor. The power converter according to claim 3, wherein the inductive load is a stator of a motor. The power converter according to any one of claims 1 to 5, wherein the semiconductor switch element is formed of a wide band gap semiconductor. The power converter according to claim 6, wherein the wide band gap semiconductor is silicon carbide, a gallium nitride-based material, or diamond. The power conversion device according to any one of claims 1 to 7, wherein the semiconductor switch element is a MOSFET.

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