JP6008767B2 - Semiconductor device and manufacturing method of semiconductor device - Google Patents

Semiconductor device and manufacturing method of semiconductor device Download PDF

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JP6008767B2
JP6008767B2 JP2013061626A JP2013061626A JP6008767B2 JP 6008767 B2 JP6008767 B2 JP 6008767B2 JP 2013061626 A JP2013061626 A JP 2013061626A JP 2013061626 A JP2013061626 A JP 2013061626A JP 6008767 B2 JP6008767 B2 JP 6008767B2
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lead terminal
semiconductor device
electrode
metal block
bonding material
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JP2014187245A (en
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吉松　直樹
直樹 吉松
秀俊 石橋
秀俊 石橋
山口　義弘
義弘 山口
英浩 古賀
英浩 古賀
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Mitsubishi Electric Corp
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    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
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    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
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    • H01L2224/401—Disposition
    • H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
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    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L2224/848—Bonding techniques
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    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
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    • H01L2924/1304—Transistor
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Description

本発明は、電気自動車、電車等のモータを制御するインバータおよび回生用コンバータに使用される半導体装置および半導体装置の製造方法に関するものである。   The present invention relates to a semiconductor device used for an inverter for controlling a motor of an electric vehicle, a train or the like and a regeneration converter, and a method for manufacturing the semiconductor device.

従来の半導体装置においては、金属ブロックの上面にロウ材、半導体素子、ロウ材、リード端子、ロウ材、電極の順に載せてから、これら全体を加熱しロウ材を溶融させることで、金属ブロック、リード端子および電極を接合するというロウ付け方法を用いて製造されていた。   In a conventional semiconductor device, after placing a brazing material, a semiconductor element, a brazing material, a lead terminal, a brazing material, and an electrode on the upper surface of the metal block in this order, the entire metal block is heated to melt the brazing material, It has been manufactured using a brazing method in which lead terminals and electrodes are joined.

また、半導体素子の下面に、アルミワイヤボンドによりバンプを形成してロウ材の最低厚みを確保することもあった。さらに、モールド時に電極の上端部にスリーブを装着し、電極の上面にモールド樹脂が回りこまないようにしていた（例えば、特許文献１参照）。   In addition, bumps are formed on the lower surface of the semiconductor element by aluminum wire bonding to ensure the minimum thickness of the brazing material. Further, a sleeve is attached to the upper end of the electrode during molding so that the mold resin does not flow around the upper surface of the electrode (see, for example, Patent Document 1).

特開２０１０−１２９８１８号公報JP 2010-129818 A

従来の半導体装置は、金属ブロックの上面にロウ材、半導体素子、ロウ材、リード端子、ロウ材、電極の順に載せてからこれら全体を加熱するため、ロウ材の厚みが不均一となって、特に電極の重みによってリード端子、半導体素子に傾きが発生したり、半導体素子の下面のロウ材がはみ出したりすることがあった。   In the conventional semiconductor device, the brazing material, the semiconductor element, the brazing material, the lead terminal, the brazing material, and the electrode are placed in this order on the upper surface of the metal block and then heated, so that the brazing material has a non-uniform thickness. In particular, the lead terminal and the semiconductor element may be inclined due to the weight of the electrode, or the brazing material on the lower surface of the semiconductor element may protrude.

上記のようにロウ材の厚みが不均一となることから、リード端子の高さ位置を管理することが難しく、リード端子の上面に搭載されている電極の上面の高さ位置がばらついていた。電極の上面の高さ位置が所定位置よりも低くなった場合、モールド時に電極と金型との間に隙間ができてモールド樹脂がその隙間に回りこむという問題があった。   Since the thickness of the brazing material is not uniform as described above, it is difficult to manage the height position of the lead terminal, and the height position of the upper surface of the electrode mounted on the upper surface of the lead terminal varies. When the height position of the upper surface of the electrode is lower than a predetermined position, there is a problem that a gap is formed between the electrode and the mold at the time of molding, and the molding resin wraps around the gap.

また、電極を金型で押さえ込んだとき、半導体素子に過剰な負荷が掛かるという問題があった。ここで、半導体素子の下面のバンプは、ロウ材の最低厚みを確保するためのものであり、電極の高さ位置を管理することはできない。   Further, when the electrode is pressed with a mold, there is a problem that an excessive load is applied to the semiconductor element. Here, the bump on the lower surface of the semiconductor element is for ensuring the minimum thickness of the brazing material, and the height position of the electrode cannot be managed.

また、特許文献１に記載の技術は、電極の上面の高さ位置が所定位置よりも低くなった場合にモールド樹脂が電極と金型との間の隙間に回りこむことを防止できるが、電極にスリーブを装着する必要があるため、半導体装置の製造コストが上昇してしまう。   Further, the technique described in Patent Document 1 can prevent the mold resin from flowing into the gap between the electrode and the mold when the height position of the upper surface of the electrode is lower than a predetermined position. Therefore, the manufacturing cost of the semiconductor device increases.

そこで、本発明は、スリーブを設けることなく、リード端子の高さ位置を管理することが可能な半導体装置および半導体装置の製造方法を提供することを目的とする。   Therefore, an object of the present invention is to provide a semiconductor device and a method for manufacturing the semiconductor device that can manage the height position of the lead terminal without providing a sleeve.

本発明に係る半導体装置は、金属ブロックと、前記金属ブロックの上面に接合材により接合された半導体素子と、前記半導体素子の上面に前記接合材と同じ種類の接合材により接合されたリード端子と、前記リード端子の上面に接合された第１電極と、前記金属ブロックの上面に前記接合材と同じ種類の接合材により接合された第２電極と、前記金属ブロックの下面および前記第１，第２電極の上面を露出させつつ、前記金属ブロック、前記半導体素子、前記リード端子、および前記第１，第２電極を覆うモールド樹脂とを備え、前記金属ブロックにおいて、前記リード端子の中央部に対応する位置に穴部、もしくは前記リード端子における延設方向の両端部に対応する位置に切り欠き部が形成されたものである。 A semiconductor device according to the present invention includes a metal block, a semiconductor element bonded to the upper surface of the metal block by a bonding material, and a lead terminal bonded to the upper surface of the semiconductor element by the same type of bonding material as the bonding material. A first electrode bonded to the upper surface of the lead terminal; a second electrode bonded to the upper surface of the metal block with the same type of bonding material as the bonding material; the lower surface of the metal block; A mold resin that covers the metal block, the semiconductor element, the lead terminal, and the first and second electrodes while exposing the upper surface of the two electrodes, and corresponds to a central portion of the lead terminal in the metal block A notch is formed at a position corresponding to both ends of the lead terminal in the extending direction .

本発明に係る半導体装置の製造方法において、前記半導体装置は、金属ブロックと、前記金属ブロックの上面に接合材により接合された半導体素子と、前記半導体素子の上面に前記接合材と同じ種類の接合材により接合されたリード端子と、前記リード端子の上面に接合された第１電極と、前記金属ブロックの上面に前記接合材と同じ種類の接合材により接合された第２電極と、前記金属ブロックの下面および前記第１，第２電極の上面を露出させつつ、前記金属ブロック、前記半導体素子、前記リード端子、および前記第１，第２電極を覆うモールド樹脂とを備え、前記リード端子の延設方向の両端部は、前記金属ブロックにおける水平方向の端から突出しており、前記半導体装置の製造方法は、前記リード端子における延設方向の両端部を用いて、治具により前記リード端子を予め定められた高さ位置に固定して前記モールド樹脂でモールドする工程を備えたものである。 In the method of manufacturing a semiconductor device according to the present invention, the semiconductor device includes a metal block, a semiconductor element bonded to the upper surface of the metal block with a bonding material, and a bonding of the same type as the bonding material to the upper surface of the semiconductor element. A lead terminal joined by a material, a first electrode joined to the upper surface of the lead terminal, a second electrode joined to the upper surface of the metal block by the same kind of joining material as the joining material, and the metal block A mold resin that covers the metal block, the semiconductor element, the lead terminal, and the first and second electrodes while exposing the lower surface of the first electrode and the upper surface of the first and second electrodes. both end portions of the arrangement direction is protruded from the horizontal direction of the end of the metal block, the manufacturing method of the semiconductor device, both end portions of the extending direction of the lead terminal Used, it is fixed at a predetermined height position of the lead terminals by a jig which includes a step of molding by the molding resin.

本発明の半導体装置によれば、金属ブロックにおいて、リード端子の中央部に対応する位置に穴部、もしくはリード端子における延設方向の両端部に対応する位置に切り欠き部が形成されたため、モールド時、治具によりリード端子の下面の中央部を支持、もしくはリード端子の延設方向の両端部を挟み込むことで、リード端子を予め定められた高さ位置に固定することができる。すなわち、リード端子の高さ位置を管理することができる。これにより、第１電極の重みでリード端子が傾くことがなく、モールド後に第１電極の上面をモールド樹脂の表面に容易に露出させることができ、また、半導体素子の下面の接合材のはみ出しを防止できる。
According to the semiconductor device of the present invention, in the metal block, the notch is formed at the position corresponding to both ends in the extending direction of the lead terminal in the hole corresponding to the center of the lead terminal . At the time of molding, the lead terminal can be fixed at a predetermined height position by supporting the center portion of the lower surface of the lead terminal with a jig or sandwiching both end portions in the extending direction of the lead terminal. That is, the height position of the lead terminal can be managed. As a result, the lead terminal does not tilt due to the weight of the first electrode, the upper surface of the first electrode can be easily exposed to the surface of the mold resin after molding, and the protrusion of the bonding material on the lower surface of the semiconductor element can be prevented. Can be prevented.

さらに、リード端子の高さ位置を管理するに際して、スリーブを設ける必要がないため、半導体装置の製造コストの上昇を抑制できる。   Furthermore, since it is not necessary to provide a sleeve when managing the height position of the lead terminal, an increase in the manufacturing cost of the semiconductor device can be suppressed.

本発明の半導体装置の製造方法によれば、リード端子における延設方向の両端部を用いて、治具によりリード端子を予め定められた高さ位置に固定する工程を備えたため、リード端子の高さ位置を管理することができる。これにより、第１電極の重みでリード端子が傾くことがなく、モールド後に第１電極の上面をモールド樹脂の表面に容易に露出させることができ、また、第１電極の自重による半導体素子の下面の接合材のはみ出しを防止できる。   According to the method of manufacturing a semiconductor device of the present invention, since the lead terminal is fixed to a predetermined height position by a jig using both ends of the lead terminal in the extending direction, the height of the lead terminal is increased. The position can be managed. Thereby, the lead terminal does not tilt due to the weight of the first electrode, the upper surface of the first electrode can be easily exposed to the surface of the mold resin after molding, and the lower surface of the semiconductor element due to the weight of the first electrode. This prevents the bonding material from protruding.

さらに、リード端子の高さ位置を管理するに際して、スリーブを設ける必要がないため、半導体装置の製造コストの上昇を抑制できる。   Furthermore, since it is not necessary to provide a sleeve when managing the height position of the lead terminal, an increase in the manufacturing cost of the semiconductor device can be suppressed.

実施の形態１に係る半導体装置におけるモールド後の平面図である。FIG. 6 is a plan view after molding in the semiconductor device according to the first embodiment. 半導体装置におけるモールド後の断面図である。It is sectional drawing after the mold in a semiconductor device. ロウ材接合後に治具を取り付けた状態の半導体装置の断面図である。It is sectional drawing of the semiconductor device of the state which attached the jig | tool after brazing material joining. 実施の形態２に係る半導体装置におけるロウ材接合後の断面図である。FIG. 6 is a cross-sectional view after joining a brazing material in the semiconductor device according to the second embodiment. ロウ材接合後に治具を取り付けた状態の半導体装置の断面図である。It is sectional drawing of the semiconductor device of the state which attached the jig | tool after brazing material joining. 変形例１に係る半導体装置のＥ電極とリード端子の接合部周辺の断面図である。7 is a cross-sectional view of a periphery of a joint portion between an E electrode and a lead terminal of a semiconductor device according to Modification 1. FIG. 変形例２に係る半導体装置のＥ電極とリード端子の接合部周辺の断面図である。FIG. 10 is a cross-sectional view of a periphery of a joint portion between an E electrode and a lead terminal of a semiconductor device according to Modification 2. 変形例３に係る半導体装置のＥ電極とリード端子の境界部周辺の断面図である。FIG. 10 is a cross-sectional view around a boundary portion between an E electrode and a lead terminal of a semiconductor device according to Modification 3. 前提技術に係る半導体装置のモールド後の断面図である。It is sectional drawing after the mold of the semiconductor device which concerns on a premise technique.

＜実施の形態１＞
本発明の実施の形態１について、図面を用いて以下に説明する。図１は、実施の形態１に係る半導体装置におけるモールド後の平面図であり、図２は、半導体装置におけるモールド後の断面図である。なお、図１の紙面に向かって左右方向をＸ方向、上下方向をＹ方向として説明する。 <Embodiment 1>
Embodiment 1 of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view after molding in the semiconductor device according to the first embodiment, and FIG. 2 is a cross-sectional view after molding in the semiconductor device. Note that the description will be made with the left-right direction as the X direction and the up-down direction as the Y direction toward the paper surface of FIG.

図１に示すように、半導体装置は、金属ブロック１と、ＩＧＢＴ２（半導体素子）と、フリーホイールダイオード３と、リード端子５と、第１電極であるＥ電極（エミッタ電極）７と、第２電極であるＣ電極（コレクタ電極）６と、中継基板８と、信号電極９と、モールド樹脂１０とを備えている。なお、図１では、金属ブロック１から上方（紙面に向かって手前側）のモールド樹脂１０は、図面を見やすくするために省略されている。   As shown in FIG. 1, the semiconductor device includes a metal block 1, an IGBT 2 (semiconductor element), a free wheel diode 3, a lead terminal 5, an E electrode (emitter electrode) 7 as a first electrode, A C electrode (collector electrode) 6, which is an electrode, a relay substrate 8, a signal electrode 9, and a mold resin 10 are provided. In FIG. 1, the mold resin 10 above the metal block 1 (on the front side in the drawing) is omitted to make the drawing easier to see.

金属ブロック１の上面に、ＩＧＢＴ２およびフリーホイールダイオード３、リード端子５、Ｅ電極７が順に載置され、それぞれの部材は、接合材であるロウ材により接合されている。また、金属ブロック１の上面には、Ｃ電極６、中継基板８がそれぞれ搭載され、中継基板８の上面には信号電極９がロウ付けされ、中継基板８とＩＧＢＴ２はアルミワイヤ４により配線されている。   An IGBT 2, a free wheel diode 3, a lead terminal 5, and an E electrode 7 are placed in this order on the upper surface of the metal block 1, and each member is joined by a brazing material that is a joining material. Further, the C electrode 6 and the relay substrate 8 are mounted on the upper surface of the metal block 1, the signal electrode 9 is brazed on the upper surface of the relay substrate 8, and the relay substrate 8 and the IGBT 2 are wired by the aluminum wire 4. Yes.

次に、部材の接合関係について具体的に説明する。図１と図２に示すように、金属ブロック１の上面の中央部分には、ロウ材１１によりＩＧＢＴ２と、ロウ材２１によりフリーホイールダイオード３が接合されている。また、金属ブロック１の上面のＹ方向端部寄りには、ロウ材１３によりＣ電極６が接合されているとともに、図示外のロウ材により中継基板８が接合されている。   Next, the joining relationship of members will be specifically described. As shown in FIGS. 1 and 2, the IGBT 2 and the free wheel diode 3 are joined to each other by a brazing material 11 and a brazing material 21 at the center of the upper surface of the metal block 1. Further, a C electrode 6 is joined to the upper end of the metal block 1 in the Y direction by a brazing material 13 and a relay substrate 8 is joined by a brazing material not shown.

ＩＧＢＴ２とフリーホイールダイオード３は、金属ブロック１の上面において、Ｘ方向にそれぞれ所定の間隔をあけて配置されている。金属ブロック１は、例えば矩形状に形成され、リード端子５は、その延設方向がＸ方向となるように配置されている。リード端子５におけるＸ方向（延設方向）の長さは、金属ブロック１におけるＸ方向の辺の長さよりも長く形成されている。すなわち、リード端子５のＸ方向の両端部は、金属ブロック１におけるＸ方向の辺の端（水平方向の端）から突出している。   The IGBT 2 and the free wheel diode 3 are arranged on the upper surface of the metal block 1 with a predetermined interval in the X direction. The metal block 1 is formed in a rectangular shape, for example, and the lead terminals 5 are arranged so that the extending direction thereof is the X direction. The length of the lead terminal 5 in the X direction (extension direction) is longer than the length of the side of the metal block 1 in the X direction. That is, both ends of the lead terminal 5 in the X direction protrude from the ends (horizontal ends) of the metal block 1 in the X direction.

ＩＧＢＴ２の上面には、ロウ材１２によりリード端子５のＸ方向における一端側が接合されるとともに、フリーホイールダイオード３の上面には、ロウ材２２によりリード端子５のＸ方向における他端側が接合されている。   One end side of the lead terminal 5 in the X direction is joined to the upper surface of the IGBT 2 by the brazing material 12, and the other end side of the lead terminal 5 in the X direction is joined to the upper surface of the free wheel diode 3 by the brazing material 22. Yes.

Ｅ電極７とリード端子５は、Ｅ電極７とリード端子５との間隔を一定に保持するように接合されている。すなわち、Ｅ電極７とリード端子５は、それぞれ傾くことなく水平方向に対してほぼ平行に接合されている。リード端子５の上面におけるＥ電極７との接合部は、ＩＧＢＴ２の上面におけるリード端子５との接合部よりも、リード端子５のＸ方向における端部側に位置している。   The E electrode 7 and the lead terminal 5 are joined so as to keep the distance between the E electrode 7 and the lead terminal 5 constant. That is, the E electrode 7 and the lead terminal 5 are joined substantially parallel to the horizontal direction without being inclined. The joint portion with the E electrode 7 on the upper surface of the lead terminal 5 is located closer to the end portion side in the X direction of the lead terminal 5 than the joint portion with the lead terminal 5 on the upper surface of the IGBT 2.

ここで、ロウ材１１，１２，１３，１４，２１，２２、および中継基板８が接合されるロウ材は、同じ種類のロウ材である。すなわち、上記に説明した部材の接合に１種類のロウ材が使用されている。   Here, the brazing material 11, 12, 13, 14, 21, 22 and the brazing material to which the relay substrate 8 is joined are the same kind of brazing material. That is, one type of brazing material is used for joining the members described above.

モールド樹脂１０は、金属ブロック１の上面および側面と、ＩＧＢＴ２とフリーホイールダイオード３の上面および側面と、リード端子５の全面と、Ｃ電極６とＥ電極７の側面とを覆っている。また、モールド樹脂１０は、図示外の信号電極の側面も覆っている。すなわち、Ｃ電極６とＥ電極７の上面、信号電極の上面がモールド樹脂１０の表面に露出している。なお、図２に示すように、金属ブロック１の下面はモールド樹脂１の表面に露出することもあり、また、図示外の絶縁層でモールド樹脂１０の表面を覆うこともある。   The mold resin 10 covers the upper and side surfaces of the metal block 1, the upper and side surfaces of the IGBT 2 and the free wheel diode 3, the entire surface of the lead terminal 5, and the side surfaces of the C electrode 6 and the E electrode 7. The mold resin 10 also covers the side surfaces of the signal electrodes not shown. That is, the upper surfaces of the C electrode 6 and the E electrode 7 and the upper surface of the signal electrode are exposed on the surface of the mold resin 10. As shown in FIG. 2, the lower surface of the metal block 1 may be exposed on the surface of the mold resin 1, or the surface of the mold resin 10 may be covered with an insulating layer not shown.

次に、図３を用いて、半導体装置に対する治具１６の取り付けについて説明する。図３は、ロウ材接合後に治具１６を取り付けた状態の半導体装置の断面図である。最初に、半導体装置に取り付けられる治具１６について説明する。治具１６は、土台１６ａと、リード端子５のＸ方向における両端部を挟み込む一対の挟持部材１６ｂとを備えている。   Next, attachment of the jig 16 to the semiconductor device will be described with reference to FIG. FIG. 3 is a cross-sectional view of the semiconductor device with the jig 16 attached after joining the brazing material. First, the jig 16 attached to the semiconductor device will be described. The jig 16 includes a base 16 a and a pair of clamping members 16 b that sandwich both end portions of the lead terminal 5 in the X direction.

リード端子５のＸ方向の両端部、すなわち、リード端子６の金属ブロック１より突出した部分は、金属ブロック１におけるＸ方向の辺の端から突出している。ロウ材接合後の半導体装置は治具１６の土台１６ａ上にセットされ、金属ブロック１の側面は治具１６の一対の挟持部材１６ｂの下部により固定されている。さらに、リード端子５のＸ方向における両端部は、治具１６の一対の挟持部材１６ｂの上部により、例えば上下方向に挟み込まれることで、リード端子５は予め定められた高さ位置に固定される。   Both end portions of the lead terminal 5 in the X direction, that is, portions protruding from the metal block 1 of the lead terminal 6 protrude from the ends of the sides of the metal block 1 in the X direction. The semiconductor device after the joining of the brazing material is set on the base 16 a of the jig 16, and the side surface of the metal block 1 is fixed by the lower portions of the pair of clamping members 16 b of the jig 16. Furthermore, the both ends of the lead terminal 5 in the X direction are sandwiched, for example, in the vertical direction by the upper portions of the pair of sandwiching members 16b of the jig 16, so that the lead terminal 5 is fixed at a predetermined height position. .

次に、半導体装置は、治具１６を取り付けた状態で金型（図示省略）にセットされた後、金型内にモールド樹脂が充填される。この状態では、半導体装置において治具１６が取り付けられている部分がモールド樹脂１０で封止されないため、例えば、治具１６を取り付けた状態でモールド樹脂を充填した後、治具１６を半導体装置から取り外してから、再度半導体装置が金型にセットされる。そして、金型内にモールド樹脂が充填され、半導体装置において治具１６が取り付けられていた部分についてもモールド樹脂１０で封止される。ここで、実施の形態１に係る半導体装置の効果について、図９に示す前提技術に係る半導体装置の場合と対比して説明する。図９は、前提技術に係る半導体装置のモールド後の断面図である。   Next, after the semiconductor device is set in a mold (not shown) with the jig 16 attached, the mold resin is filled in the mold. In this state, since the portion where the jig 16 is attached in the semiconductor device is not sealed with the mold resin 10, for example, after filling the mold resin with the jig 16 attached, the jig 16 is removed from the semiconductor device. After removal, the semiconductor device is set in the mold again. The mold resin is filled in the mold, and the portion where the jig 16 is attached in the semiconductor device is also sealed with the mold resin 10. Here, the effect of the semiconductor device according to the first embodiment will be described in comparison with the case of the semiconductor device according to the base technology shown in FIG. FIG. 9 is a cross-sectional view of the semiconductor device according to the base technology after being molded.

図９に示すように、前提技術に係る半導体装置では、リード端子３５は、金属ブロック１におけるＸ方向の辺よりも短く形成され、金属ブロック１におけるＸ方向の辺から突出していない。すなわち、前提技術に係る半導体装置は、治具１６を用いてリード端子２５のＸ方向における両端部を挟み込むことができない。   As shown in FIG. 9, in the semiconductor device according to the base technology, the lead terminal 35 is formed shorter than the side of the metal block 1 in the X direction and does not protrude from the side of the metal block 1 in the X direction. That is, the semiconductor device according to the base technology cannot sandwich both end portions in the X direction of the lead terminal 25 using the jig 16.

このため、Ｅ電極７の重みによってリード端子３５、ＩＧＢＴ２に傾きが発生したり、ＩＧＢＴ２の下面に接合されたロウ材１１ａがはみ出したりすることがあった。また、リード端子３５、ＩＧＢＴ２が傾くことでＥ電極７の上面とモールド樹脂１０との間に隙間３７が生じ、モールド樹脂１０が隙間３７に回り込むという問題があった。Ｅ電極７の上面がモールド樹脂１０の表面に露出しなくなることを防ぐために、Ｅ電極７の上端部にスリーブ３６を装着していた。   For this reason, the lead terminal 35 and the IGBT 2 may be inclined due to the weight of the E electrode 7, or the brazing material 11 a bonded to the lower surface of the IGBT 2 may protrude. Further, the lead terminal 35 and the IGBT 2 are inclined, so that there is a gap 37 between the upper surface of the E electrode 7 and the mold resin 10, and the mold resin 10 wraps around the gap 37. In order to prevent the upper surface of the E electrode 7 from being exposed on the surface of the mold resin 10, a sleeve 36 is attached to the upper end portion of the E electrode 7.

これに対して、実施の形態１に係る半導体装置では、リード端子５のＸ方向における両端部は、金属ブロック１におけるＸ方向の辺の端から突出しているため、これら突出した部分を治具１６の挟持部１６ｂにより挟み込むことで、リード端子５を予め定められた高さ位置に固定することができる。このため、Ｅ電極７の重みでリード端子５が傾くことがなく、Ｅ電極７の上面をモールド後にモールド樹脂１０の表面に容易に露出させることができ、また、Ｅ電極７の自重によるＩＧＢＴ２の下面のロウ材１１のはみ出しを防止できる。   On the other hand, in the semiconductor device according to the first embodiment, since both end portions in the X direction of the lead terminal 5 protrude from the ends of the sides in the X direction of the metal block 1, these protruding portions are used as the jig 16. The lead terminal 5 can be fixed at a predetermined height position by being pinched by the pinching portion 16b. For this reason, the lead terminal 5 does not tilt due to the weight of the E electrode 7, the upper surface of the E electrode 7 can be easily exposed to the surface of the mold resin 10 after molding, and the IGBT 2 has its own weight due to its own weight. The protrusion of the lower brazing material 11 can be prevented.

以上のように、リード端子５のＸ方向における両端部は、金属ブロック１におけるＸ方向の端から突出しているため、モールド時、治具１６によりリード端子５のＸ方向における両端部を挟み込むことで、リード端子５を予め定められた高さ位置に固定することができる。すなわち、リード端子５の高さ位置を管理することができる。これにより、Ｅ電極７の重みによってリード端子５が傾くことがなく、モールド後にＥ電極７の上面をモールド樹脂１０の表面に容易に露出させることができ、また、ＩＧＢＴ２の下面のロウ材１１のはみ出しを防止できる。   As described above, since both ends of the lead terminal 5 in the X direction protrude from the ends of the metal block 1 in the X direction, the both ends of the lead terminal 5 in the X direction are sandwiched by the jig 16 during molding. The lead terminal 5 can be fixed at a predetermined height position. That is, the height position of the lead terminal 5 can be managed. As a result, the lead terminal 5 does not tilt due to the weight of the E electrode 7, the upper surface of the E electrode 7 can be easily exposed to the surface of the mold resin 10 after molding, and the brazing material 11 on the lower surface of the IGBT 2 can be exposed. Protrusion can be prevented.

さらに、リード端子５の高さ位置を管理するに際して、スリーブを設ける必要がないため、半導体装置の製造コストの上昇を抑制できる。また、リード端子５が傾くことを防止できるため、半導体装置の品質が向上し、半導体装置の長期使用が可能となる。   Furthermore, since it is not necessary to provide a sleeve when managing the height position of the lead terminal 5, an increase in the manufacturing cost of the semiconductor device can be suppressed. Further, since the lead terminal 5 can be prevented from being inclined, the quality of the semiconductor device is improved, and the semiconductor device can be used for a long time.

また、治具１６によってリード端子５のＸ方向における両端部が挟み込まれているため、リード端子５上に搭載されたＥ電極７の重みをリード端子５と治具１６とで受けることができる。このため、リード端子５がＩＧＢＴ２の上面および下面のロウ材１１，１２を押し潰すこともなく、ＩＧＢＴ２の下面のロウ材１１ははみ出すことがない。さらに、リード端子５を支持する治具１６の高さ位置を管理することにより、容易にリード端子５の高さ位置を管理することができる。   In addition, since both ends in the X direction of the lead terminal 5 are sandwiched by the jig 16, the weight of the E electrode 7 mounted on the lead terminal 5 can be received by the lead terminal 5 and the jig 16. For this reason, the lead terminal 5 does not crush the brazing materials 11 and 12 on the upper surface and the lower surface of the IGBT 2, and the brazing material 11 on the lower surface of the IGBT 2 does not protrude. Furthermore, by managing the height position of the jig 16 that supports the lead terminal 5, the height position of the lead terminal 5 can be easily managed.

また、半導体装置では、複数の接合部が存在するが、使用するロウ材は１種類であるため、複数の接合部について同時接合が可能となる。   In the semiconductor device, there are a plurality of joints. However, since one type of brazing material is used, simultaneous joining is possible for the plurality of joints.

Ｅ電極７とリード端子５は、Ｅ電極７とリード端子５との間隔を一定に保持するように接合されたため、Ｅ電極７の上面の高さ位置の精度を向上させることができる。   Since the E electrode 7 and the lead terminal 5 are joined so as to keep the distance between the E electrode 7 and the lead terminal 5 constant, the accuracy of the height position of the upper surface of the E electrode 7 can be improved.

Ｅ電極７は、ＩＧＢＴ２の上面におけるリード端子５との接合部よりも、リード端子５におけるＸ方向の端部側に配置されたため、モールド時、上金型がＥ電極７を押さえ込んだ場合に、上金型がＥ電極７に接触したときに発生する応力を、リード端子５によって吸収させることができ、ＩＧＢＴ２へのダメージを軽減することができる。   Since the E electrode 7 is disposed on the end side in the X direction of the lead terminal 5 rather than the joint portion with the lead terminal 5 on the upper surface of the IGBT 2, when the upper mold presses the E electrode 7 during molding, The stress generated when the upper mold comes into contact with the E electrode 7 can be absorbed by the lead terminal 5, and damage to the IGBT 2 can be reduced.

＜実施の形態２＞
次に、実施の形態２に係る半導体装置について説明する。図４は、実施の形態２に係る半導体装置におけるロウ材接合後の断面図であり、図５は、ロウ材接合後に治具１７を取り付けた状態の半導体装置の断面図である。なお、実施の形態２において、実施の形態１で説明したものと同一の構成要素については同一符号を付して説明は省略する。 <Embodiment 2>
Next, a semiconductor device according to the second embodiment will be described. 4 is a cross-sectional view of the semiconductor device according to the second embodiment after joining the brazing material, and FIG. 5 is a cross-sectional view of the semiconductor device with the jig 17 attached after joining the brazing material. In the second embodiment, the same components as those described in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.

実施の形態２に係る半導体装置は、金属ブロック１Ａと、ＩＧＢＴ２と、フリーホイールダイオード３と、リード端子５Ａと、Ｅ電極７と、Ｃ電極６と、中継基板８と、信号電極９と、モールド樹脂１０（図１参照）とを備えている。金属ブロック１Ａにおいて、リード端子５Ａにおける延設方向（Ｘ方向）の両端部に対応する位置に一対の切り欠き部１ａ、リード端子５Ａの中央部に対応する位置に貫通穴１ｂ（穴部）が形成されている。リード端子５ＡのＸ方向の長さは、金属ブロック１ＡのＸ方向の辺よりも短く形成されている。   The semiconductor device according to the second embodiment includes a metal block 1A, an IGBT 2, a free wheel diode 3, a lead terminal 5A, an E electrode 7, a C electrode 6, a relay substrate 8, a signal electrode 9, and a mold. And a resin 10 (see FIG. 1). In the metal block 1A, there are a pair of notches 1a at positions corresponding to both ends in the extending direction (X direction) of the lead terminal 5A, and through holes 1b (holes) at positions corresponding to the center of the lead terminal 5A. Is formed. The length of the lead terminal 5A in the X direction is shorter than the side of the metal block 1A in the X direction.

次に、半導体装置に対する治具１７の取り付けについて説明する。最初に、半導体装置に取り付けられる治具１７について説明する。図５に示すように、治具１７は、土台１７ａと、リード端子５ＡのＸ方向における両端部を挟み込む一対の挟持部材１７ｂと、リード端子５ＡのＸ方向における中央部を下側から支持する支持部材１７ｃとを備えている。挟持部材１７ｂの下部は、金属ブロック１Ａの切り欠き部１ａと当接するように形成され、金属ブロック１Ａの側面は一対の挟持部材１７ｂの下部により固定されている。   Next, attachment of the jig 17 to the semiconductor device will be described. First, the jig 17 attached to the semiconductor device will be described. As shown in FIG. 5, the jig 17 supports the base 17a, a pair of clamping members 17b that sandwiches both end portions in the X direction of the lead terminal 5A, and a center portion in the X direction of the lead terminal 5A from below. And a member 17c. The lower part of the clamping member 17b is formed so as to contact the notch 1a of the metal block 1A, and the side surface of the metal block 1A is fixed by the lower parts of the pair of clamping members 17b.

挟持部材１７ｂの下部が金属ブロック１Ａの切り欠き部１ａに当接した状態では、治具１７の一対の挟持部材１７ｂの上部はリード端子５ＡのＸ方向における両端部を挟み込むことが可能な位置に位置し、リード端子５ＡのＸ方向における両端部は一対の挟持部材１７ｂの上部により、例えば上下方向に挟み込まれている。   In a state where the lower part of the holding member 17b is in contact with the cutout part 1a of the metal block 1A, the upper parts of the pair of holding members 17b of the jig 17 are at positions where both end parts in the X direction of the lead terminal 5A can be held. The both ends of the lead terminal 5A in the X direction are sandwiched between the upper portions of the pair of sandwiching members 17b, for example, in the vertical direction.

支持部材１７ｃは、金属ブロック１Ａの貫通穴１ｂに挿通可能に形成されている。支持部材１７ｃは、支持部材１７ｃを貫通穴１ｂに挿通させた状態でリード端子５Ａの下面の中央部に支持部材１７ｃの上端が当接している。   The support member 17c is formed so as to be inserted into the through hole 1b of the metal block 1A. In the support member 17c, the upper end of the support member 17c is in contact with the center of the lower surface of the lead terminal 5A in a state where the support member 17c is inserted into the through hole 1b.

次に、半導体装置は、治具１７を取り付けた状態で金型にセットされた後、金型内にモールド樹脂が充填される。この状態では、半導体装置において治具１７が取り付けられている部分がモールド樹脂１０で封止されないため、例えば、治具１７を取り付けた状態でモールド樹脂を充填した後、治具１７を半導体装置から取り外してから、再度半導体装置が金型にセットされる。そして、金型内にモールド樹脂が充填され、半導体装置において治具１７が取り付けられていた部分についてもモールド樹脂１０で封止される。   Next, after the semiconductor device is set in the mold with the jig 17 attached, the mold resin is filled in the mold. In this state, since the portion where the jig 17 is attached in the semiconductor device is not sealed with the mold resin 10, for example, after filling the mold resin with the jig 17 attached, the jig 17 is removed from the semiconductor device. After removal, the semiconductor device is set in the mold again. The mold resin is filled in the mold, and the portion of the semiconductor device where the jig 17 is attached is also sealed with the mold resin 10.

このように、半導体装置に治具１７を取り付けることで、リード端子５Ａを予め定められた高さ位置に固定することができる。なお、金属ブロック１Ａには、必ずしも切り欠き部１ａと貫通穴１ｂの両方が形成されている必要がなく、どちらか一方のみが形成されていてもよく、この場合にも、治具１７を用いてリード端子５Ａを予め定められた高さ位置に固定することができる。   Thus, by attaching the jig 17 to the semiconductor device, the lead terminal 5A can be fixed at a predetermined height position. The metal block 1A does not necessarily have both the notch 1a and the through hole 1b, and only one of them may be formed. In this case, the jig 17 is used. Thus, the lead terminal 5A can be fixed at a predetermined height position.

以上のように、実施の形態２に係る半導体装置では、金属ブロック１Ａにおいて、リード端子５Ａの中央部に対応する位置に貫通穴１ｂ、もしくはリード端子５ＡにおけるＸ方向の両端部に対応する位置に切り欠き部１ａが形成されたため、モールド時、治具１７によりリード端子５Ａの下面の中央部を支持、もしくはリード端子５ＡのＸ方向の両端部を挟み込むことで、リード端子５Ａを予め定められた高さ位置に固定することができる。すなわち、リード端子５Ａの高さ位置を管理することができる。これにより、Ｅ電極７の重みによってリード端子５Ａが傾くことがなく、モールド後にＥ電極７の上面をモールド樹脂１０の表面に容易に露出させることができ、また、ＩＧＢＴ２の下面に接合されたロウ材１１のはみ出しを防止できる。   As described above, in the semiconductor device according to the second embodiment, in the metal block 1A, at the position corresponding to the central portion of the lead terminal 5A, the through hole 1b or the position corresponding to both ends of the lead terminal 5A in the X direction. Since the cutout portion 1a is formed, the lead terminal 5A is predetermined by supporting the center portion of the lower surface of the lead terminal 5A with the jig 17 or sandwiching both end portions in the X direction of the lead terminal 5A during molding. Can be fixed at a height position. That is, the height position of the lead terminal 5A can be managed. As a result, the lead terminal 5A does not tilt due to the weight of the E electrode 7, the upper surface of the E electrode 7 can be easily exposed to the surface of the mold resin 10 after molding, and the solder bonded to the lower surface of the IGBT 2 The protrusion of the material 11 can be prevented.

さらに、リード端子５Ａの高さ位置を管理するに際して、スリーブを設ける必要がないため、半導体装置の製造コストの上昇を抑制できる。   Furthermore, since it is not necessary to provide a sleeve when managing the height position of the lead terminal 5A, an increase in the manufacturing cost of the semiconductor device can be suppressed.

また、リード端子５Ａを金属ブロック１ＡのＸ方向の端から突出させる必要がないため、金属ブロック１ＡのＸ方向の長さよりも短いリード端子を使用することが可能となり、金属ブロック１Ａの外形の制約などによりリード端子を使い分けることが可能となる。   In addition, since it is not necessary for the lead terminal 5A to protrude from the end of the metal block 1A in the X direction, it is possible to use a lead terminal that is shorter than the length of the metal block 1A in the X direction. It is possible to properly use the lead terminals by such means.

さらに、半導体装置では、複数の接合部が存在するが、使用するロウ材は１種類であるため、複数の接合部について同時接合が可能となる。   Further, in the semiconductor device, there are a plurality of joints, but since one type of brazing material is used, it is possible to simultaneously join the plurality of joints.

次に、実施の形態１，２の変形例について説明する。ＩＧＢＴ２は、シリコン（Ｓｉ）を基板とする半導体素子によって構成されていてもよいし、炭化シリコン（ＳｉＣ）などのワイドバンドギャップ半導体を基板とする半導体素子によって構成されていてもよい。ＩＧＢＴ２がワイドバンドギャップ半導体素子である場合は、ＩＧＢＴ２の下面のロウ材１１の厚み、およびＩＧＢＴ２の上面のロウ材１２の厚みがそれぞれ均一化され、熱的信頼性が向上することで、高温への対応が可能となる。   Next, modifications of the first and second embodiments will be described. IGBT2 may be comprised by the semiconductor element which uses silicon (Si) as a board | substrate, and may be comprised by the semiconductor element which uses wide band gap semiconductors, such as a silicon carbide (SiC), as a board | substrate. When the IGBT 2 is a wide band gap semiconductor element, the thickness of the brazing material 11 on the lower surface of the IGBT 2 and the thickness of the brazing material 12 on the upper surface of the IGBT 2 are made uniform, and the thermal reliability is improved. Can be supported.

また、Ｅ電極とリード端子については種々の構造が採用可能であり、以下、図６〜図８を用いて、Ｅ電極とリード端子の構造について説明する。図６は、変形例１に係る半導体装置のＥ電極７Ａとリード端子５の接合部周辺の断面図である。図６に示すように、Ｅ電極７Ａの下面にリード端子５側に突出する、例えば複数の第１突起部７ａが形成されている。第１突起部７ａの高さは、ロウ材１４の狙いの厚みとする。第１突起部７ａによりＥ電極７Ａの上面の高さ位置の精度を向上させることができる。   Various structures can be adopted for the E electrode and the lead terminal. Hereinafter, the structure of the E electrode and the lead terminal will be described with reference to FIGS. FIG. 6 is a cross-sectional view of the periphery of the joint between the E electrode 7A and the lead terminal 5 of the semiconductor device according to the first modification. As shown in FIG. 6, for example, a plurality of first protrusions 7 a that protrude toward the lead terminal 5 are formed on the lower surface of the E electrode 7 </ b> A. The height of the first protrusion 7 a is the target thickness of the brazing material 14. The first protrusion 7a can improve the accuracy of the height position of the upper surface of the E electrode 7A.

図７は、変形例２に係る半導体装置のＥ電極７とリード端子５Ｂの接合部周辺の断面図である。図７に示すように、リード端子５Ｂの上面におけるＥ電極７が配置される位置に、Ｅ電極７側に突出する例えば複数の第２突起部５ａが形成されている。第２突起部５ａの高さは、ロウ材１４の狙いの厚みとする。第２突起部５ａによりＥ電極７の上面の高さ位置の精度を向上させることができる。   FIG. 7 is a cross-sectional view of the periphery of the joint between the E electrode 7 and the lead terminal 5B of the semiconductor device according to the second modification. As shown in FIG. 7, for example, a plurality of second protrusions 5 a that protrude toward the E electrode 7 are formed at positions where the E electrode 7 is disposed on the upper surface of the lead terminal 5 </ b> B. The height of the second protrusion 5a is a target thickness of the brazing material 14. The accuracy of the height position of the upper surface of the E electrode 7 can be improved by the second protrusion 5a.

図８は、変形例３に係る半導体装置のＥ電極７とリード端子５の境界部周辺の断面図である。図８に示すように、Ｅ電極７とリード端子５は一体成形されている。ロウ材を使用せずにＥ電極７とリード端子５を一体成形したことにより、Ｅ電極７の上面の高さ位置は、ロウ材の厚みに左右されないため、Ｅ電極７の上面の高さ位置の精度を向上させることができる。また、接合箇所が減るため、半導体装置の信頼性および組み立て性を向上させることができる。   FIG. 8 is a cross-sectional view of the periphery of the boundary between the E electrode 7 and the lead terminal 5 of the semiconductor device according to Modification 3. As shown in FIG. 8, the E electrode 7 and the lead terminal 5 are integrally formed. Since the E electrode 7 and the lead terminal 5 are integrally formed without using the brazing material, the height position of the upper surface of the E electrode 7 does not depend on the thickness of the brazing material. Accuracy can be improved. In addition, since the number of joints is reduced, the reliability and assemblability of the semiconductor device can be improved.

以上説明した図６〜図８に示す構造を採用することで、リード端子に対するＥ電極の高さ位置を管理できるため、金属ブロック下面からＥ電極上面までの寸法を精度よく組み立てることが可能になる。その結果、金型にセットしたときにＥ電極上面と金型は、隙間ができることなく、また、過剰に押し付けることもない。   By adopting the structure shown in FIGS. 6 to 8 described above, the height position of the E electrode with respect to the lead terminal can be managed, so that the dimension from the lower surface of the metal block to the upper surface of the E electrode can be assembled with high accuracy. . As a result, there is no gap between the upper surface of the E electrode and the mold when it is set in the mold, and there is no excessive pressing.

また、実施の形態１，２では、金属ブロックを使用する構造について説明したが、半導体素子の実装は回路付きのセラミックまたは樹脂製絶縁基板であっても同様の効果が得られる。   In the first and second embodiments, the structure using a metal block has been described. However, the same effect can be obtained by mounting a semiconductor element using a ceramic or resin insulating substrate with a circuit.

なお、本発明は、その発明の範囲内において、各実施の形態を自由に組み合わせたり、各実施の形態を適宜、変形、省略することが可能である。   It should be noted that the present invention can be freely combined with each other within the scope of the invention, and each embodiment can be appropriately modified or omitted.

１，１Ａ 金属ブロック、１ａ 切り欠き部、１ｂ 貫通穴、２ ＩＧＢＴ、５，５Ａ，５Ｂ リード端子、５ａ 第２突起部、６ Ｃ電極、７，７Ａ Ｅ電極、７ａ 第１突起部、１０ モールド樹脂。   1, 1A metal block, 1a notch, 1b through hole, 2 IGBT, 5, 5A, 5B lead terminal, 5a second protrusion, 6 C electrode, 7, 7A E electrode, 7a first protrusion, 10 mold resin.

Claims (9)

金属ブロックと、
前記金属ブロックの上面に接合材により接合された半導体素子と、
前記半導体素子の上面に前記接合材と同じ種類の接合材により接合されたリード端子と、
前記リード端子の上面に接合された第１電極と、
前記金属ブロックの上面に前記接合材と同じ種類の接合材により接合された第２電極と、
前記金属ブロックの下面および前記第１，第２電極の上面を露出させつつ、前記金属ブロック、前記半導体素子、前記リード端子、および前記第１，第２電極を覆うモールド樹脂と、
を備え、
前記金属ブロックにおいて、前記リード端子の中央部に対応する位置に穴部、もしくは前記リード端子における延設方向の両端部に対応する位置に切り欠き部が形成された、半導体装置。 A metal block;
A semiconductor element bonded to the upper surface of the metal block by a bonding material;
A lead terminal bonded to the upper surface of the semiconductor element by the same type of bonding material as the bonding material;
A first electrode joined to the upper surface of the lead terminal;
A second electrode bonded to the upper surface of the metal block by the same type of bonding material as the bonding material;
Mold resin covering the metal block, the semiconductor element, the lead terminal, and the first and second electrodes while exposing the lower surface of the metal block and the upper surfaces of the first and second electrodes,
With
In the metal block, a semiconductor device, wherein a hole portion is formed at a position corresponding to a center portion of the lead terminal, or a notch portion is formed at a position corresponding to both end portions in the extending direction of the lead terminal . 前記第１電極および前記リード端子は、前記第１電極と前記リード端子との間隔を一定に保持するように接合された、請求項１記載の半導体装置。 The semiconductor device according to claim 1, wherein the first electrode and the lead terminal are joined so as to keep a constant distance between the first electrode and the lead terminal . 前記第１電極の下面に、前記リード端子側に突出する第１突起部が形成された、請求項２記載の半導体装置。 The semiconductor device according to claim 2 , wherein a first protrusion that protrudes toward the lead terminal is formed on a lower surface of the first electrode . 前記リード端子の上面における前記第１電極が配置される位置に、前記第１電極側に突出する第２突起部が形成された、請求項２記載の半導体装置。 3. The semiconductor device according to claim 2 , wherein a second protrusion protruding toward the first electrode is formed at a position where the first electrode is disposed on an upper surface of the lead terminal . 前記第１電極と前記リード端子は一体成形された、請求項２記載の半導体装置。 The semiconductor device according to claim 2 , wherein the first electrode and the lead terminal are integrally formed . 前記第１電極は、前記半導体素子の上面における前記リード端子との接合部よりも、前記リード端子における延設方向の端部側に配置された、請求項１〜５のいずれか１つに記載の半導体装置。 The said 1st electrode is arrange | positioned rather than the junction part with the said lead terminal in the upper surface of the said semiconductor element at the edge part side of the extending direction in the said lead terminal , The any one of Claims 1-5. Semiconductor device. 前記半導体素子はワイドバンドギャップ半導体素子である、請求項１〜６のいずれか１つに記載の半導体装置。 The semiconductor device according to claim 1 , wherein the semiconductor element is a wide band gap semiconductor element . 半導体装置の製造方法であって、A method for manufacturing a semiconductor device, comprising:
前記半導体装置は、The semiconductor device includes:
金属ブロックと、A metal block;
前記金属ブロックの上面に接合材により接合された半導体素子と、A semiconductor element bonded to the upper surface of the metal block by a bonding material;
前記半導体素子の上面に前記接合材と同じ種類の接合材により接合されたリード端子と、A lead terminal bonded to the upper surface of the semiconductor element by the same type of bonding material as the bonding material;
前記リード端子の上面に接合された第１電極と、A first electrode joined to the upper surface of the lead terminal;
前記金属ブロックの上面に前記接合材と同じ種類の接合材により接合された第２電極と、A second electrode bonded to the upper surface of the metal block by the same type of bonding material as the bonding material;
前記金属ブロックの下面および前記第１，第２電極の上面を露出させつつ、前記金属ブロック、前記半導体素子、前記リード端子、および前記第１，第２電極を覆うモールド樹脂と、Mold resin covering the metal block, the semiconductor element, the lead terminal, and the first and second electrodes while exposing the lower surface of the metal block and the upper surfaces of the first and second electrodes,
を備え、With
前記リード端子の延設方向の両端部は、前記金属ブロックにおける水平方向の端から突出しており、Both ends in the extending direction of the lead terminal protrude from the horizontal end of the metal block,
前記半導体装置の製造方法は、The method for manufacturing the semiconductor device includes:
前記リード端子における延設方向の両端部を用いて、治具により前記リード端子を予め定められた高さ位置に固定して前記モールド樹脂でモールドする工程を備えた、半導体装置の製造方法。A method of manufacturing a semiconductor device, comprising: using the both ends of the lead terminal in the extending direction to fix the lead terminal at a predetermined height position with a jig and molding the mold with the molding resin. 請求項１記載の半導体装置の製造方法であって、
前記金属ブロックの前記穴部、もしくは前記金属ブロックの前記切り欠き部を用いて、治具により前記リード端子を予め定められた高さ位置に固定して前記モールド樹脂でモールドする工程を備えた、半導体装置の製造方法。 A method of manufacturing a semiconductor device according to claim 1,
Using the hole portion of the metal block or the notch portion of the metal block, and fixing the lead terminal at a predetermined height position by a jig and molding the mold resin with the mold resin, A method for manufacturing a semiconductor device.
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