JP5938242B2 - diode - Google Patents

Description

  The technology disclosed in this specification relates to a diode.

  For example, development of a high-breakdown-voltage IC in which a plurality of types of semiconductor elements are integrated using an insulation separation technique is in progress. A diode is incorporated in such a high voltage IC.

  The diode includes an n-type cathode region, a p-type anode region, and an n-type drift region provided between the cathode region and the anode region. An example of this type of diode is disclosed in Patent Document 1.

Japanese Patent Laid-Open No. 11-233795

  In this type of diode, the electric field concentrates on the surface portion of the semiconductor layer during recovery. When the avalanche phenomenon occurs due to this electric field concentration, the recovery charge amount increases and the switching loss increases.

  The technique disclosed in this specification is intended to provide a diode having excellent recovery characteristics.

The diode disclosed in this specification includes a semiconductor layer, a cathode electrode, an anode electrode, a LOCOS oxide film, and a relaxation region. The cathode electrode is provided on the surface of the semiconductor layer. The anode electrode is provided on the surface of the semiconductor layer and is separated from the cathode electrode. The LOCOS oxide film is provided on the surface of the semiconductor layer, and is provided between the cathode electrode and the anode electrode. The relaxation region is filled in a trench extending from the surface of the semiconductor layer toward the deep portion. The semiconductor layer has a first conductivity type cathode region, a second conductivity type anode region, and a first conductivity type drift region. The cathode region is provided on the surface portion of the semiconductor layer and is electrically connected to the cathode electrode. The anode region is provided on the surface portion of the semiconductor layer and is electrically connected to the anode electrode. The drift region is provided between the cathode region and the anode region, and is thinner than the impurity concentration of the cathode region. The relaxation region is disposed at a part below the LOCOS oxide film, and is disposed between the anode region and the drift region . One side surface is in contact with the anode region, and the other side surface is in contact with the drift region. At the same time, it is not in contact with the cathode region. Further, the dielectric breakdown electric field strength of the material used for the relaxation region is larger than that of the semiconductor layer material.

  In the diode of the above aspect, the relaxation region bears the electric field of the surface portion of the semiconductor layer. Since the dielectric breakdown electric field strength in the relaxation region is large, the occurrence of the avalanche phenomenon can be suppressed at the location where the relaxation region exists. An increase in the recovery charge amount is suppressed, and an increase in switching loss is suppressed.

FIG. 1 is a cross-sectional view of a main part corresponding to the line I-I in FIG. 2, and shows the configuration of the diode 1A. FIG. 2 is a plan view of the main part of the SOI substrate on which the diode 1A is formed (note that the electrodes and the like on the SOI substrate are omitted). FIG. 3 shows a modification of the diode 1A having a different cathode region layout. FIG. 4 shows another modification of the diode 1A having a different cathode region layout. FIG. 5 is a cross-sectional view of the main part and shows the configuration of the diode 1B. FIG. 6 is a cross-sectional view of the main part and shows the configuration of the diode 1C. FIG. 7 is an enlarged cross-sectional view of the main part of the anode region of the diode 1C.

The features of the technology disclosed in this specification will be summarized. The items described below have technical usefulness independently.
(First Feature) The diode may include a semiconductor layer, a cathode electrode, an anode electrode, and a relaxation region. The cathode electrode may be provided on the surface of the semiconductor layer. The anode electrode is provided on the surface of the semiconductor layer and may be separated from the cathode electrode. The relaxation region may extend from the surface of the semiconductor layer toward the deep portion.
(Second Feature) The semiconductor layer may be a semiconductor upper layer of an SOI substrate, an epitaxial substrate, or a semiconductor layer formed in a groove of a polycrystalline silicon substrate.
(Third Feature) The semiconductor layer may have a first conductivity type cathode region, a second conductivity type anode region, and a first conductivity type drift region. The cathode region is provided on the surface portion of the semiconductor layer, and may be electrically connected to the cathode electrode. The anode region is provided on the surface portion of the semiconductor layer, and may be electrically connected to the anode electrode. The drift region is provided between the cathode region and the anode region, and may be thinner than the impurity concentration of the cathode region.
(Fourth feature) The relaxation region may be disposed between the cathode region and the anode region. Further, the dielectric breakdown field strength of the material used for the relaxation region may be larger than the dielectric breakdown field strength of the material of the semiconductor layer. For example, when the semiconductor layer is made of silicon, silicon oxide, Si ₃ N ₄ , porous SiO ₂ , or a CVD film is used for the relaxation region.
(5th characteristic) The relaxation area | region may be contacting the edge part by the side of the cathode area | region of an anode area | region. According to this aspect, the relaxation region is arranged corresponding to the location where the electric field concentrates. The avalanche phenomenon can be effectively suppressed.
(Sixth feature) The relaxation region may be formed deeper than the anode region. According to this aspect, the relaxation region is arranged corresponding to most of the portions where the electric field concentrates. The avalanche phenomenon can be more effectively suppressed.
(Seventh feature) The material used for the relaxation region may be an insulator. According to this aspect, since the recovery current flows so as to bypass the relaxation region, the current path of the recovery current can be diffused from the surface of the semiconductor layer toward the deep portion. As a result, the current path of the recovery current and the location where the electric field concentrates can be made inconsistent.
(Eighth feature) The semiconductor layer may further have a second conductivity type low concentration region. The low concentration region is formed deeper than the first anode region, and may have a lower impurity concentration than the anode region.
(Ninth Feature) The diode may be formed in an island region surrounded by an insulating isolation trench that goes around the semiconductor layer. In this case, in the eighth feature, the low concentration region may make a round of the periphery of the island region along the insulating isolation trench. The low concentration region of the diode may be in contact with the side surface of the insulating isolation trench.

As shown in FIG. 1, a lateral diode 1A is formed on an SOI (Silicon On Insulator) substrate 5 in which an n-type or p-type semiconductor lower layer 2, a buried insulating layer 3 and an n ⁻ -type semiconductor upper layer 4 are stacked. ing. As shown in FIG. 2, the diode 1 </ b> A is formed in the island region of the semiconductor upper layer 4 surrounded by the insulating isolation trench 8. The insulating isolation trench 8 extends from the surface of the semiconductor upper layer 4 to the buried insulating layer 3 through the semiconductor upper layer 4, and circulates part of the semiconductor upper layer 4 when viewed in plan. In one example, single crystal silicon is used for the material of the semiconductor lower layer 2 and the semiconductor upper layer 4, and silicon oxide is used for the material of the buried insulating layer 3. The buried insulating layer 3 has a thickness of about 3 μm or more in order to achieve a withstand voltage of 500 V or more. The semiconductor upper layer 4 has an impurity concentration of about 7 × 10 ¹⁴ cm ⁻³ and a thickness of about 10 to 20 μm in order to realize a withstand voltage of 500 V or higher.

  As shown in FIG. 1, the diode 1 </ b> A includes a cathode electrode 6, an anode electrode 7, a LOCOS oxide film 32, and a resistive field plate 34 provided on the surface of the semiconductor upper layer 4. The cathode electrode 6 and the anode electrode 7 are arranged at a distance from each other on the surface of the semiconductor upper layer 4 and are electrically insulated. A laminated electrode of titanium (Ti) / titanium nitride (TiN) / aluminum (Al) is used as a material for the cathode electrode 6 and the anode electrode 7, and titanium is in contact with the semiconductor upper layer 4. In the titanium portion, silicide in which silicon is mixed into titanium may be used as necessary. The LOCOS oxide film 32 is provided between the cathode electrode 6 and the anode electrode 7. The resistive field plate 34 is provided on the surface of the LOCOS oxide film 32 and has one end electrically connected to the cathode electrode 6 and the other end electrically connected to the anode electrode 7. The LOCOS oxide film 32 and the resistive field plate 34 make the potential distribution between the cathode electrode 6 and the anode electrode 7 uniform on the surface portion of the semiconductor upper layer 4.

  An n-type cathode region 10 and a p-type anode region 20 are formed on the surface portion of the semiconductor upper layer 4. The cathode region 10 is electrically connected to the cathode electrode 6. The anode region 20 is electrically connected to the anode electrode 7. A drift region 30 is formed between the cathode region 10 and the anode region 20. The drift region 30 is a remaining portion in which the cathode region 10 and the anode region 20 are formed in the semiconductor upper layer 4. In the drift region 30, a semiconductor region (for example, a RESURF region) for increasing the breakdown voltage may be formed as necessary.

The cathode region 10 includes an n-type first cathode region 10a and an n ⁺ -type second cathode region 10b. The first cathode region 10a and the second cathode region 10b are formed using an ion implantation technique. The diffusion depth of the first cathode region 10a is deeper than the diffusion depth of the second cathode region 10b. Therefore, the entire second cathode region 10b is covered with the first cathode region 10a. In addition, the 1st cathode area | region 10a does not need to be provided as needed. As shown in FIG. 2, the cathode region 10 is disposed at the center of the island region surrounded by the insulating isolation trench 8 and has a substantially rectangular shape. The second cathode region 10b is divided into a plurality of portions, and ap ⁺ -type contact adjusting region 10c is formed between the second cathode regions 10b. As described above, the second cathode regions 10 b and the contact adjustment regions 10 c are alternately and repeatedly formed along the longitudinal direction of the cathode region 10. The contact adjustment region 10c is formed to reduce the contact area between the cathode region 10 and the cathode electrode 6 and adjust the amount of electrons injected during forward bias. The first cathode region 10a, the second cathode region 10b, and the contact adjustment region 10c are in ohmic contact with the cathode electrode 6. In one example, the surface concentration of the first cathode region 10a is about 1.8 × 10 ¹⁷ cm ⁻³ and the diffusion depth is about 3 to 7 μm. The surface concentration of the second cathode region 10b is about 6 × 10 ²⁰ cm ⁻³ and the diffusion depth is about 0.1 to 0.5 μm. The contact adjustment region 10c has a surface concentration of about 1 × 10 ²⁰ cm ⁻³ and a diffusion depth of about 0.3 to 0.6 μm. In addition, as FIG. 3 shows, the contact adjustment area | region 10c does not need to be provided as needed. Alternatively, as shown in FIG. 4, the first cathode region 10a may be interposed between the repeating structure of the second cathode region 10b and the contact adjustment region 10c. Note that these layouts are merely examples, and various layouts can be adopted as combinations of the first cathode region 10a, the second cathode region 10a, and the contact adjustment region 10c as necessary.

The anode region 20 includes a p-type first anode region 20a and a p ⁺ -type second anode region 20b. The first anode region 20a and the second anode region 20b are formed using an ion implantation technique. The diffusion depth of the first anode region 20a is deeper than the diffusion depth of the second anode region 20b. Therefore, the entire second anode region 20b is covered with the first anode region 20a. As shown in FIG. 2, the anode region 20 is disposed around the island region surrounded by the insulating isolation trench 8, and goes around the periphery of the island region along the insulating isolation trench 8. The first anode region 20 a is in Schottky contact with the anode electrode 7, and the second anode region 20 b is in ohmic contact with the anode electrode 7. When the second anode region 20a and the anode electrode 7 are in Schottky contact, the amount of holes injected from the anode region 20 can be suppressed during forward bias. In order for the second anode region 20a and the anode electrode 7 to be in Schottky contact, the work function of the material used for the anode electrode 7 may be 5.16 eV or less. For this reason, the material of the anode electrode 7 may be nickel or copper instead of titanium. In one example, the surface concentration of the first anode region 20a is about 9 × 10 ¹⁷ cm ⁻³ and the diffusion depth is about 1 to 2 μm. The surface concentration of the second anode region 20b is about 1 × 10 ²⁰ cm ⁻³ and the diffusion depth is about 0.2 to 0.6 μm.

The diode 1A further includes a relaxation region 42 extending from the surface of the semiconductor upper layer 4 toward the deep portion. The material of relaxation region 42 is an insulator, which is silicon oxide in this example. The breakdown electric field strength of silicon oxide is about 1 × 10 ⁷ V / cm, and the breakdown electric field strength of silicon is about 3 × 10 ⁵ V / cm. For this reason, the breakdown field strength of the relaxation region 42 is larger than the breakdown field strength of the semiconductor upper layer 4. The relaxation region 42 may be formed by forming a trench from the surface of the semiconductor upper layer 4 using an anisotropic etching technique and then filling the trench with silicon oxide using a chemical vapor deposition method. it can.

  As shown in FIG. 1, the relaxation region 42 is in contact with the end of the anode region 20 on the cathode side. In other words, the relaxation region 42 is provided corresponding to the pn junction surface between the anode region 20 and the drift region 30, and is disposed between the anode region 20 and the drift region 30. The relaxation region 42 is deeper than the anode region 20. Further, as shown in FIG. 2, the relaxation region 42 makes a round along the side surface of the anode region 20 on the cathode side.

  Next, the operation of the diode 1A will be described. When a higher potential is applied to the anode electrode 7 than the cathode electrode 6, the diode 1A is forward biased. As a result, electrons are injected from the cathode region 10 into the drift region 30, and holes are injected from the anode region 20 into the drift region 30. Thereby, in the diode 1 </ b> A, a current flows from the anode electrode 7 toward the cathode electrode 6.

  Next, when a higher potential is applied to the cathode electrode 6 than the anode electrode 7, the diode 1A is reverse-biased. In the recovery immediately after the reverse bias is applied, electrons injected into the drift region 30 at the time of forward bias are discharged from the cathode region 10 and holes are discharged from the anode region 20. Thus, at the time of recovery, a recovery current flows through the diode 1A. Most of this recovery current flows along the surface portion of the drift region 30.

  Here, consider a case where the relaxation region 42 is not provided. At the time of recovery, the pn junction surface between the anode region 20 and the drift region 30 becomes a high electric field region. When the avalanche phenomenon occurs due to this electric field concentration, the amount of recovery charges increases and the switching loss is deteriorated. The high electric field region is a surface portion of the pn junction surfaces of the anode region 20 and the drift region 30. For this reason, the current path of the recovery current matches the high electric field region. As a result, in some cases, a large current flows through the surface portion of the semiconductor upper layer 4, and device breakdown becomes a problem.

  In the diode 1 </ b> A, a relaxation region 42 is provided on the surface portion of the semiconductor upper layer 4. In particular, the relaxation region 42 is provided corresponding to the pn junction surface between the anode region 20 and the drift region 30, that is, the high electric field region. Further, since the relaxation region 42 is formed deeper than the anode region 20, it is provided corresponding to the entire region of the high electric field region. For this reason, since the electric field can be borne in the relaxation region 42, the occurrence of the avalanche phenomenon is suppressed, and the increase in the recovery charge amount is suppressed. In addition, since the relaxation region 42 is provided, the recovery current flows diffused from the surface portion of the semiconductor upper layer 4 toward the deep portion so as to bypass the relaxation region 42. For this reason, the current path of the recovery current does not coincide with the high electric field region. As a result, a situation where a large current flows through the surface portion of the semiconductor upper layer 4 is also suppressed, and element destruction is also suppressed.

  As shown in FIG. 5, the diode 1 </ b> B further includes a second relaxation region 44 extending from the surface of the semiconductor upper layer 4 toward the deep portion. The material of the second relaxation region 44 is silicon oxide. In this example, the second relaxation region 44 is in contact with the anode side surface of the cathode region 10. In other words, the second relaxation region 44 is provided corresponding to the pn junction surface between the cathode region 10 and the drift region 30, and is disposed between the cathode region 10 and the drift region 30. The depth of the second relaxation region 44 is shallower than the first cathode region 10a and deeper than the second cathode region 10b. Further, the second relaxation region 44 makes a round along the anode side surface of the cathode region 10. When the second relaxation region 44 is provided, the electric field concentration at the anode side end of the cathode region 10 is relaxed, and the increase in the recovery charge amount and the element breakdown are suppressed.

As shown in FIG. 6, the diode 1C is, p ^- 2 one low density region 26a of the mold, characterized in that it further comprises a 26b. The diffusion depths of the low concentration regions 26a and 26b are deeper than the diffusion depths of the first anode region 20a and the second anode region 20b. The low concentration region 26 b is in Schottky contact with the anode electrode 7.

As shown in FIG. 7, the first anode region 20a includes a first side surface 20A on the cathode region 10 side, a second side surface 20E opposite to the cathode region 10, and the first side surface 20A and the second side surface 20E. It has a bottom surface 20C extending therebetween. A first corner portion 20B exists between the first side surface 20A and the bottom surface 20C. A second corner portion 20D exists between the second side surface 20E and the bottom surface 20C. One low concentration region 26a covers the first corner portion 20B of the first anode region 20a. The low concentration region 26a also covers the relaxation region 42. The other low concentration region 26b covers the second corner portion 20D of the first anode region 20a. A part of the bottom surface 26a of the first anode region 20a is not covered with the low concentration regions 26a and 26b. In one example, the surface concentration of the low-concentration regions 26a and 26b is about 1.2 × 10 ¹⁶ cm ⁻³ and the diffusion depth is about 3 to 5 μm.

  As shown in FIG. 7, the second anode region 20b is provided unevenly in the first anode region 20a. In this example, the first anode region 20a is provided unevenly on the second side surface 20E side (the left side of the drawing). For this reason, a part of the second anode region 20b is disposed at a position where the low concentration region 26b and the first anode region 20a overlap.

  Next, features of the diode 1C will be described. The diode 1C includes low concentration regions 26a and 26b. When the low concentration regions 26 a and 26 b are provided, the electric field strength of the pn junction between the anode region 20 and the drift region 30 can be suppressed low. For this reason, at the time of recovery, the dynamic avalanche phenomenon caused by the holes flowing into the anode region 20 is suppressed, and the recovery charge amount is also suppressed. As a result, the switching loss of the diode 1C is small.

Other features of the diode 1C are listed.
(1) As shown in FIG. 7, in the diode 1C, the second anode region 20b is arranged at a position where the low concentration region 26b and the first anode region 20a overlap. For this reason, the second anode region 20b is provided unevenly on the opposite side to the cathode region 10 in the first anode region 20a. According to this configuration, the current path at the time of forward bias spreads in the anode region 20, so that a wide range of the drift region 30 can be used as a current path, and the on-resistance can be reduced.

(2) As shown in FIG. 7, the low concentration region 26 b is in contact with the side surface of the insulating isolation trench 8. For this reason, a current path using the surface recombination effect at the interface between the low-concentration region 26b and the insulating isolation trench 8 is formed. Therefore, at the time of recovery, a part of the recovery current flows through the current path formed at this interface. . As a result, since the current concentration of the recovery current is alleviated, the occurrence of the dynamic avalanche phenomenon can be suppressed.

(3) As shown in FIG. 7, the relaxation region 42 is covered with the low concentration region 26a. For this reason, the electric field concentration at the corners of the relaxation region 42 is relaxed.

(4) As shown in FIG. 7, in the diode 1C of this example, a part of the bottom surface 20C of the first anode region 20a is not covered with the low concentration regions 26a and 26b. For example, even if the low concentration regions 26a and 26b are formed so as to completely cover the first anode region 20a, the electric fields at the corner portions 20B and 20D of the first anode region 20a and the corner portions of the relaxation region 42 are relaxed. Useful in terms. However, if such large low-concentration regions 26a and 26b are provided, the amount of holes injected during forward biasing may increase even if the impurity concentration is adjusted to be thin. Like the diode 1C of the present embodiment, the low concentration regions 26a and 26b selectively cover only the corner portions 20B and 20D of the first anode region 20a, thereby increasing the formation range of the low concentration regions 26a and 26b. Therefore, the electric field concentration can be reduced.

Specific examples of the present invention have been described in detail above, but these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.
For example, in the above embodiment, the semiconductor material using silicon is illustrated, but instead of this example, a wide band gap compound semiconductor such as a silicon carbide semiconductor or a nitride semiconductor may be used.
The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology exemplified in this specification or the drawings can achieve a plurality of objects at the same time, and has technical usefulness by achieving one of the objects.

1A, 1B, 1C: Diode 2: Semiconductor lower layer 3: Buried insulating layer 4: Semiconductor upper layer 5: SOI substrate 6: Cathode electrode 7: Anode electrode 10: Cathode region 20: Anode region 30: Drift region 42, 44: Relaxation region

Claims (3)

A semiconductor layer;
A cathode electrode provided on the surface of the semiconductor layer;
An anode electrode provided on a surface of the semiconductor layer and separated from the cathode electrode;
A LOCOS oxide film provided on the surface of the semiconductor layer and provided between the cathode electrode and the anode electrode;
A relaxation region filled in a trench extending from the surface of the semiconductor layer toward a deep portion, and
The semiconductor layer is
A cathode region of a first conductivity type provided on the surface portion and electrically connected to the cathode electrode;
An anode region of a second conductivity type provided on the surface portion and electrically connected to the anode electrode;
A drift region of a first conductivity type that is provided between the cathode region and the anode region and is thinner than the impurity concentration of the cathode region;
The relaxation region is disposed at a part below the LOCOS oxide film, is disposed between the anode region and the drift region , has one side in contact with the anode region, and the other side. Is in contact with the drift region and not in contact with the cathode region,
A diode in which a breakdown field strength of a material used for the relaxation region is larger than a breakdown field strength of a material of the semiconductor layer. The diode according to claim 1 , wherein the relaxation region is formed deeper than the anode region. The diode according to claim 1 , wherein the material used for the relaxation region is an insulator.

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