JP5927484B2 - Display device and control method thereof - Google Patents

Display device and control method thereof Download PDF

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JP5927484B2
JP5927484B2 JP2011246726A JP2011246726A JP5927484B2 JP 5927484 B2 JP5927484 B2 JP 5927484B2 JP 2011246726 A JP2011246726 A JP 2011246726A JP 2011246726 A JP2011246726 A JP 2011246726A JP 5927484 B2 JP5927484 B2 JP 5927484B2
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light emitting
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JP2013104909A (en
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やよい 奥井
やよい 奥井
新井 康弘
康弘 新井
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株式会社Joled
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  The present invention relates to a display device and a control method thereof, and more particularly to an image display device using a current-driven light emitting element and a control method thereof.

  As an image display device using a current-driven light emitting element, an image display device using an organic electroluminescence (EL) element is known. The organic EL display device using the self-emitting organic EL element does not require a backlight necessary for a liquid crystal display device, and is optimal for thinning the device. Moreover, since there is no restriction | limiting also in a viewing angle, utilization as a next-generation display apparatus is anticipated. Further, the organic EL element used in the organic EL display device is different from the liquid crystal cell being controlled by the voltage applied thereto, in that the luminance of each light emitting element is controlled by the value of current flowing therethrough.

  In an organic EL display device, organic EL elements constituting pixels are usually arranged in a matrix. An organic EL element is provided at the intersection of a plurality of row electrodes (scanning lines) and a plurality of column electrodes (signal lines), and a voltage corresponding to a data signal is applied between the selected row electrodes and the plurality of column electrodes. A device for driving an organic EL element is called a passive matrix type organic EL display.

  On the other hand, a switching thin film transistor (TFT) is provided at the intersection of a plurality of scanning lines and a plurality of signal lines, a gate of a driving element is connected to the switching TFT, and the switching TFT is turned on through the selected scanning line. Then, a data signal is input to the drive element from the signal line. A device in which an organic EL element is driven by this drive element is called an active matrix type organic EL display device.

  An active matrix organic EL display device differs from a passive matrix organic EL display device in which an organic EL element connected thereto emits light only during a period when each row electrode (scanning line) is selected. Since the organic EL element can emit light until the selection), the luminance of the display is not reduced even if the number of scanning lines is increased. Therefore, the active matrix organic EL display device can be driven at a low voltage and can reduce power consumption.

  Patent Document 1 discloses a circuit configuration of a display unit in an active matrix organic EL display device.

  FIG. 12 is a circuit configuration diagram of a display unit in a conventional organic EL display device described in Patent Document 1. The organic EL display device 500 shown in the figure includes a selection line 513 for selecting a pixel 501 to be displayed, a signal line 511 for applying a data voltage to the selected pixel 501, and an intersection of the selection line 513 and the signal line 511. Current-driven organic EL elements 527 arranged in a matrix corresponding to the power supply voltage, a power supply wiring 512 for applying a power supply voltage, and a p-type connected in series between the power supply wiring 512 and the organic EL element 527. Between the first transistor 523 and the second transistor 521, the n-type third transistor 524 that connects or blocks the gate terminal and the drain terminal of the first transistor 523, and between the gate terminal of the first transistor 523 and the variable potential wiring 515 Connected to the capacitor 526 provided between the gate terminal of the second transistor 521 and the signal line 511. Over preparative terminal is configured to include a fourth transistor 522 n-type which is connected to the select line 513.

  Hereinafter, the display operation of the pixel 501 configured as described above will be described. The display operation of the pixel 501 is a time division gray scale method, and is executed by a source driver and a gate driver.

  The potential applied to the gate terminal of the second transistor 521 is time division gradation display data. In order to perform time division gray scale display, an ON potential or an OFF potential is applied to the gate terminal of the second transistor 521 through the fourth transistor 522 by the source driver during a period in which the selection line 513 is set to the HIGH potential by the gate driver. .

  On the other hand, in the operation of setting the output current of the first transistor 523, first, the potential of the variable potential wiring 515 is set to the predetermined potential Vp, the control line 514 is set to the HIGH potential, and the third transistor 524 is turned on. Further, the selection line 513 is set to the HIGH level, and a voltage that makes the second transistor 521 conductive for a moment is applied from the source driver, and a voltage that immediately turns off is applied. At this time, since the gate and the drain of the first transistor 523 are short-circuited through the third transistor 524, the gate terminal potential of the first transistor 523 decreases and becomes the ON potential. After that, when the second transistor 521 is turned off as described above, the drain terminal potential of the first transistor 523 increases. As a result, the gate terminal potential of the first transistor 523 increases, and the first transistor 523 changes to a non-conduction state. The source-gate voltage at this time becomes the threshold voltage of the first transistor 523.

  Thereafter, the control line 514 is set to the LOW potential, the third transistor 524 is turned off, the potential of the capacitor 526 is held, and the potential of the variable potential wiring 515 is changed to a potential lower than Vp by Va. Thereby, the gate terminal-source terminal voltage Vgs of the first transistor 523 becomes the threshold voltage Vth-Va.

  Note that when there is a relationship of | Vds | ≧ | Vgs | between the source-drain voltage Vds and the source-gate voltage Vgs of the first transistor 523, that is, when the first transistor 523 operates in the saturation region. The value of the current flowing through the first transistor 523 can be set by compensating the threshold variation of the first transistor 523. When the second transistor 521 becomes conductive, a constant drive current Ids that does not depend on the threshold voltage can be passed from the first transistor 523 to the organic EL element 527 through the second transistor 521.

JP 2006-30946 A

  However, the conventional organic EL display device 500 described in Patent Document 1 is a driver circuit that changes the potentials of the signal line 511 and the selection line 513 necessary for basic display operation in order to set the drive current Ids. In addition, driver circuits for changing the potentials of the variable potential wiring 515 and the control line 514 are required, and the configuration of the external peripheral circuit is complicated.

  The pixel circuit of the pixel 501 described in Patent Document 1 uses both n-type and p-type channel TFTs, and only n-type channel TFTs typified by amorphous silicon TFTs that are inexpensive and easy to manufacture as TFTs. It is difficult to manufacture a pixel circuit using

  In view of the above problems, an object of the present invention is to provide a display device having a pixel circuit that can be driven by a small external peripheral circuit and using a simplified manufacturing process, and a control method thereof.

  In order to solve the above problems, a display device according to one embodiment of the present invention is a display device including a display portion including a plurality of light-emitting pixels arranged in a matrix, and a power supply voltage is applied to the plurality of light-emitting pixels. A power supply line for supplying, an initialization power supply line for supplying a reference voltage for initializing the plurality of light emitting pixels to the plurality of light emitting pixels, a control line, and a pixel line are arranged for each image. A plurality of scanning lines for selecting light emitting pixels for writing a data voltage corresponding to a signal, and a plurality of data lines arranged for each pixel column for writing the data voltage to the selected light emitting pixels, Each of the plurality of light emitting pixels includes a current drive type light emitting element, a constant current driving unit for supplying a constant current to the light emitting element, and a supply from the power line to the light emitting element via the constant current driving unit. Said said A constant current switch unit that conducts and cuts off a current path of current, and the constant current drive unit is configured to apply a voltage corresponding to the power supply voltage to one of a source electrode and a drain electrode, and to supply a current from the power supply line. A current driving transistor to be driven; a first capacitor for holding a voltage between a gate electrode and a drain electrode or a source electrode of the current driving transistor; a gate electrode connected to the control line; and one of the first capacitors A first switch transistor that switches between conduction and non-conduction between an electrode and the initialization power supply line; a gate electrode connected to the control line; and the other electrode of the first capacitor and a corresponding one of the plurality of data lines A second switch transistor that switches between conduction and non-conduction with the data line, and the constant current switch unit includes the power line and the power line. A drive transistor, a current switch transistor connected in series with the light emitting element, and conducting and blocking the current path for flowing a current driven by the current drive transistor to the light emitting element; and a gate electrode of the current switch transistor; A second capacitor for holding a voltage between the drain electrode or the source electrode, a gate electrode connected to a corresponding scan line of the plurality of scan lines, and a gate electrode of the current switch transistor and the data line And a selection transistor that switches between conduction and non-conduction.

  According to the above configuration, conventionally, a driver circuit that changes the control line and the variable potential wiring is required in addition to the driver circuit that changes the potential of the wiring necessary for the basic writing operation and the light emitting operation. Therefore, only a driver circuit for changing the potential of the control line is newly required, and the configuration of the external peripheral circuit can be simplified.

  The display device according to one embodiment of the present invention is further connected to the plurality of scanning lines and the control line, and controls conduction and non-conduction of the first switch transistor, the second switch transistor, and the selection transistor. A scanning line control circuit that is connected to the plurality of data lines, and when the selection transistor is turned on by the scanning line control circuit, the gate electrode and the drain electrode or the source electrode of the current switch transistor; The data voltage for determining the voltage between the first and second switch transistors is turned on by the scanning line control circuit when the data voltage is output to the data line. An initial stage for determining the voltage between the electrode and the drain electrode or the source electrode It is preferable to provide a signal line control circuit for outputting a voltage to the data line.

  According to the above configuration, the data line arranged for each light emitting pixel column is divided in time and used, whereby the initialization voltage for determining the gate-source voltage of the current drive transistor and the gate of the current switch transistor are determined. It is possible to output a data voltage that determines a source-to-source voltage. Therefore, since the data line and the signal line control circuit have a plurality of functions, the scale of the control circuit can be reduced, and a low-cost display device can be realized.

  In the initialization period for setting the voltage between the gate electrode and the source electrode of the current driving transistor, current flows between the initialization power supply line and the data line. Although the current flowing into the data line leads to a loss, the reference voltage and the initialization voltage are compared with the case where the voltage between the gate electrode and the source electrode of the current driving transistor is set between the power supply line and the data line. Since the voltage value can be set to a necessary minimum value without being regulated by the power supply voltage, the flowing current value can be suppressed to the minimum, and the loss due to the current can be minimized.

  In the display device according to one embodiment of the present invention, the absolute value of the data voltage when the current switch transistor is turned on is the absolute value of the drain-source voltage when the current switch transistor is turned on. It is preferable that the absolute value of the potential difference between the reference voltage and the initialization voltage is smaller than the absolute value of the drain-source voltage when the current driving transistor is turned on.

  Accordingly, since the current driving transistor operates in a saturation region, a constant current can be stably supplied even when there is a change in the power supply voltage or the source potential. In addition, since the current switch transistor operates in a linear region, the switching operation and the current drive with a small on-resistance and a suppressed voltage drop are realized, and low power consumption is realized.

  In the display device according to one embodiment of the present invention, the number of times that the signal line control circuit outputs the initialization voltage to the data line within one frame time which is a time for rewriting a unit display image is the one frame time. The number of times that the signal line control circuit outputs the data voltage to the data line may be smaller.

  According to this configuration, the time required for setting the conditions of the current drive transistor as the current source is shortened, and as a result, it is possible to ensure a long light emission period. Therefore, a high-definition display panel can be provided and the peak value of the current flowing through the organic EL element can be reduced, so that highly efficient luminance control can be performed.

  In the current driving transistor, one of a source electrode and a drain electrode is connected to the power supply line, the other of the source electrode and the drain electrode is connected to the other electrode of the first capacitor, and a gate electrode is connected to the first capacitor. The current switch transistor has one of a source electrode and a drain electrode connected to the other of the source electrode and the drain electrode of the current driving transistor, and the other of the source electrode and the drain electrode of the light emitting element. The anode electrode and the other electrode of the second capacitor may be connected, and the gate electrode may be connected to one electrode of the second capacitor.

  Alternatively, in the current driving transistor, one of a source electrode and a drain electrode is connected to one of the source electrode and the drain electrode of the current switch transistor, and the other of the source electrode and the drain electrode is connected to the other electrode of the first capacitor. The gate electrode is connected to one electrode of the first capacitor, the current switch transistor has one of a source electrode and a drain electrode connected to the power supply line, and the gate electrode connected to one electrode of the second capacitor. It may be connected.

  The current driving transistor, the current switch transistor, the selection transistor, the first switch transistor, and the second switch transistor may all be thin film transistors having the same conductivity type channel.

  The current driving transistor, the current switch transistor, the selection transistor, the first switch transistor, and the second switch transistor are all preferably thin film transistors having an n-type channel.

  This makes it possible to manufacture a display panel inexpensively and easily using an amorphous silicon TFT manufacturing process, particularly when a pixel circuit is configured using only n-type transistors.

  The current driving transistor preferably operates in a saturation region, and the current switch transistor, the selection transistor, the first switch transistor, and the second switch transistor operate in a linear region.

  Accordingly, since the current driving transistor operates in a saturation region, a constant current can be stably supplied even when there is a change in the power supply voltage or the source potential. In addition, since the current switch transistor, the selection transistor, the first transistor, and the second transistor operate in a linear region, switching with low on-resistance is achieved, and low power consumption is realized.

  Further, the light emitting element may be an organic EL element.

  The light emitting element may be an inorganic EL element.

  In addition, the present invention can be realized not only as a display device including such characteristic means, but also as a display device control method using the characteristic means included in the display device as a step. .

  According to the display device and its control method of the present invention, it is possible to drive with a small external peripheral circuit with a reduced number of driver circuits compared to the conventional one, and the external peripheral circuit can be simplified.

It is a functional block diagram of a display device of the present invention. It is a circuit block diagram of the display part which the display apparatus which concerns on Embodiment 1 of this invention has. 3 is an internal circuit diagram of a scanning line control circuit included in the display device of the present invention. FIG. It is an internal circuit diagram of the signal line control circuit which the display apparatus of this invention has. 4 is a drive timing chart of the display device according to the first embodiment of the present invention. It is a state transition diagram explaining the current source setting operation | movement of the display apparatus which concerns on Embodiment 1 of this invention. It is a state transition diagram explaining the writing operation of the display device according to the first embodiment of the present invention. It is a circuit block diagram of the display part which the display apparatus which concerns on Embodiment 2 of this invention has. It is a drive timing chart of the display apparatus which concerns on Embodiment 2 of this invention. It is a state transition diagram explaining the current source setting operation | movement of the display apparatus which concerns on Embodiment 2 of this invention. It is a state transition diagram explaining the write-in operation | movement of the display apparatus which concerns on Embodiment 2 of this invention. It is a circuit block diagram of the display part in the conventional organic electroluminescent display apparatus described in patent document 1. FIG.

  Hereinafter, Embodiments 1 and 2 for carrying out the present invention will be described with reference to the drawings.

(Embodiment 1)
<Configuration of display device>
FIG. 1 is a functional block diagram of a display device according to an embodiment of the present invention. The display device 1 shown in FIG. 1 is an active matrix display device that varies the luminance by a digital gradation control method, and includes a control circuit 2, a scanning line control circuit 4, a signal line control circuit 5, and a display unit. 6.

  The control circuit 2 assigns a sub-frame to emit light for each pixel of the display unit 6 according to the input video signal, and outputs a control signal to the scanning line control circuit 4 and the signal line control circuit 5.

  The scanning line control circuit 4 applies a scanning voltage to the display unit 6, and the signal line control circuit 5 applies a data voltage and an initialization voltage to the display unit. Hereinafter, components of the display device 1 described above will be described in detail.

  FIG. 2 is a circuit configuration diagram of a display unit included in the display device according to the embodiment of the present invention. The display unit 6 is a display unit in which a plurality of light emitting pixels arranged in a matrix according to the display resolution (m × n) is arranged. FIG. 2 shows a part of the display unit 6. One light-emitting pixel is described. The light-emitting pixel of the display unit 6 illustrated in FIG. 2 includes a current switch transistor 11, switch transistors 23 and 24, capacitors 12 and 22, a selection transistor 13, an organic EL element 14, a current drive transistor 21, A data line DT disposed for each pixel column, a scanning line SCN disposed for each pixel row, a control line BLK, an initialization power line PI, and a power line PS are provided.

  The plurality of light emitting pixels included in the display unit 6 have the same circuit configuration.

  The light emitting pixel included in the display unit 6 includes a constant current driving unit that generates a constant current that is a light emission current to be supplied to the organic EL element 14, and a current of the constant current that is supplied from the constant current driving unit to the organic EL element 14. It is broadly divided into a constant current switch section that conducts and cuts off the path.

  The constant current drive unit includes a current drive transistor 21, a capacitor 22, and switch transistors 23 and 24. The constant current drive unit operates the current drive transistor 21 in the saturation region, thereby generating a constant current even when the source-drain voltage Vds of the current drive transistor 21 fluctuates, and the constant current is supplied to the constant current switch unit. Stable supply.

  The constant current switch unit includes a current switch transistor 11, a capacitor 12, and a selection transistor 13. A binary data voltage (on voltage and off voltage) supplied from the data line DT is applied to the gate terminal of the current switch transistor 11 so that the source and the drain of the current switch transistor 11 are in a conductive state or a non-conductive state. It becomes a state. As a result, the operation of supplying or not supplying a constant current from the constant current driving unit to the organic EL element 14 is executed in units of subfields, and digital gradation control is performed. Here, in order to reduce switching loss in the on / off control of the current switch transistor 11, it is desirable that the current switch transistor 11 be operated in a linear region having a low on-resistance. On the other hand, when the thin film transistor is operated in a linear region, there is a problem that the drain-source current Ids of the thin film transistor is likely to fluctuate due to the fluctuation of the source-drain voltage Vds. In order to solve the above problem, the constant current drive unit described above supplies a constant current that does not vary Ids even if Vds varies.

  That is, the constant current drive unit having the current drive transistor 21 operating in the saturation region can supply a constant current stably even when there is a fluctuation in the power supply voltage or the source potential, and the current switch operates in the linear region. The constant current switch portion having the transistor 11 enables digital gradation display by low loss switching.

  Hereinafter, each component of the light emitting pixel and a connection state thereof will be described.

The power supply line PS is arranged in all the pixel rows, is connected to the drain of the current driving transistor 21, and supplies a power supply voltage to the plurality of light emitting pixels by applying a positive power supply voltage VTFT to the connection point.

In this embodiment, since the same power supply voltage VTFT is applied to all the light emitting pixels at the same timing, the power supply line PS may be a common line to which all the power supply lines are connected. Good.

  The scanning line SCN is arranged for each pixel row and selects a light emitting pixel to which a data voltage corresponding to the video signal is written.

  The control line BLK is arranged in all the pixel rows and has a function for initializing the constant current driver.

The initialization power supply line PI is disposed in all pixel rows and has a function of supplying a reference voltage VREF for initializing all the light emitting pixels to all the light emitting pixels. Specifically, the initialization power supply line PI supplies the reference voltage V REF to one electrode of the capacitor 22 when initializing the constant current drive unit. In the present embodiment, since the same reference voltage VREF is applied to all the light emitting pixels at the same timing, the initialization power supply line PI arranged in each pixel row is a common line. Therefore, external peripheral circuits such as a drive circuit can be simplified.

  The data line DT is arranged for each pixel column and has a function for writing a data voltage to a selected light emitting pixel.

The organic EL element 14 is a current-driven light-emitting element, and has an anode terminal connected to the source terminal of the current switch transistor 11 and one electrode of the capacitor 12, and a cathode terminal connected to a reference terminal (reference voltage V EL ). ing.

  The current drive transistor 21 has a drain terminal connected to the power supply line PS, a gate terminal connected to one electrode of the capacitor 22, and a source terminal connected to the other electrode of the capacitor 22 to drive the current from the power supply line PS. To do. The current drive transistor 21 supplies a constant current from the power supply voltage according to Vgs by operating in a saturation region where the drain-source voltage Vds is sufficiently larger than the gate-source voltage Vgs. It is a thin film transistor for constant current driving. As described above, the current drive transistor 21 supplies stable Ids that are not affected by fluctuations in Vds to the organic EL element 14, but due to the tendency of the display gradation based on the video signal, an initial value to be described later in units of frames. The magnitude of Ids can be adjusted by changing the Vgs by adjusting the voltage Vdata2. This makes it possible to display all gradations with high accuracy.

  The capacitor 22 is a first capacitor that is connected to the gate electrode and the source electrode of the current driving transistor 21 and holds the gate-source voltage of the current driving transistor 21.

  The current switch transistor 11 has a drain terminal connected to the source terminal of the current driving transistor 21, a gate terminal connected to the other terminal of the capacitor 12, a source terminal connected to one terminal of the capacitor 12, and an anode terminal of the organic EL element 14. And a thin film transistor for constant current switching which operates in a linear region where the gate-source voltage Vgs is sufficiently larger than the drain-source voltage Vds. The current switch transistor 11 conducts and cuts off a current path for flowing a constant current driven by the current drive transistor 21 to the organic EL element 14.

  The capacitor 12 is a second capacitor that holds a voltage between the gate electrode and the source electrode of the current switch transistor 11.

  The selection transistor 13 has a drain terminal connected to the gate terminal of the current switch transistor 11, a gate terminal connected to the scanning line SCN, a source terminal connected to the data line DT, and a data voltage that determines light emission of the organic EL element 14. A light emitting pixel to be written is selected. That is, the selection transistor 13 switches between conduction and non-conduction between the gate electrode of the current switch transistor 11 and the data line DT.

  The switch transistor 23 has a drain terminal connected to the initialization power supply line PI, a gate terminal connected to the control line BLK, and a source terminal connected to the gate terminal of the current driving transistor 21 and one electrode of the capacitor 22. The switch transistor is synchronously controlled with the switch transistor 24 to determine Vgs of the current drive transistor 21 that is the voltage across the capacitor 22.

  The switch transistor 24 has a drain terminal connected to the source terminal of the current driving transistor 21 and the other electrode of the capacitor 22, a gate terminal connected to the control line BLK, and a source terminal connected to the data line DT. By being synchronously controlled with the switch transistor 23, Vgs of the current drive transistor 21, which is the voltage across the capacitor 22, is determined.

  The current switch transistor 11, the switch transistors 23 and 24, and the selection transistor 13 are connected between the drain and the source by applying a voltage higher than the threshold voltage between the gate and the source based on the input video signal. It is a switch element to do.

  The current drive transistor 21, the current switch transistor 11, the switch transistors 23 and 24, and the selection transistor 13 are preferably thin film transistors having the same conductivity type channel, and are further formed of n-channel MOSFETs. Is desirable. Since all of the above transistors are formed of n-channel MOSFETs, a pixel circuit can be configured using only n-type transistors, so that a display panel can be manufactured inexpensively and easily using amorphous silicon TFTs. It becomes.

In the above circuit configuration, the data line DT is the HIGH level (Vdata1) next scan line SCN becomes HIGH level (V SCN), a gate of the select transistor 13 - between the source, is sufficiently large signal voltage than the threshold voltage applied Is done. As a result, the select transistor 13 operates in a linear region, and becomes conductive with a low on-resistance between the drain and the source. Then, after the selection transistor 13 becomes conductive, the capacitor 12 is charged from the data line DT via the selection transistor 13. As a result, a voltage sufficiently larger than the threshold voltage is applied between the gate and source of the current switch transistor 11, and the current switch transistor 11 operates in a linear region and becomes conductive with a low on-resistance between the drain and source. At this time, the constant current by the current driving transistor 21 flows through the path of the power line PS → the current driving transistor 21 → the current switch transistor 11 → the organic EL element 14, and the organic EL element 14 emits light.

  In this embodiment, an organic EL element is used as a light-emitting element. However, the light-emitting element may be a current-driven light-emitting element, and may be, for example, an inorganic EL element.

<Scanning line control circuit>
Next, the scanning line control circuit 4 will be described. In response to the control signal from the control circuit 2, the scanning line control circuit 4 outputs a scanning signal for selecting a light emitting pixel row to the display unit 6 having the light emitting pixels via the scanning line SCN in the data voltage writing period. . In addition, the scanning line control circuit 4 sends an initialization signal for setting the constant current value of each light emitting pixel in the constant current driving unit via the control line BLK in the initialization period in accordance with the control signal from the control circuit 2. Output to the display unit 6 having the light emitting pixels.

FIG. 3 is an internal circuit diagram of a scanning line control circuit included in the display device of the present invention. Scanning line control circuit 4 selects the V SCN or non-selective voltage V L is a selection voltage of the scanning signal is applied to the scanning line SCN1~SCNm arranged in each pixel row.

When the number of pixel rows is m, the scanning line control circuit 4 is connected to the display unit 6 via m scanning lines SCN1 to SCNm. The scanning line control circuit 4 can supply the selection voltage V SCN or the non-selection voltage V L to the scanning lines SCN1 to SCNm for each line in an arbitrary order. Of course, it is possible to apply scanning voltages in a row sequential manner as scanning lines SCN1, SCN2,... SCNm, or it is possible to supply V SCN or VL simultaneously to all scanning lines. It is.

In the circuit shown in FIG. 3, for example, when the selection voltage VSCN is applied to the scanning line SCN1 and the non-selection voltage VL is applied to the other scanning lines, the scanning line control circuit 4 includes the switch SW41A and the switch SW41A. The switches SW42B, SW43B,... SW4mB are turned on, and the switches SW41B and SW42A, SW43A,.

Further, although not shown, the scanning line control circuit 4 selects V BLK that is a selection voltage of the initialization signal or a non-selection voltage and applies it to the control line BLK. The circuit that applies the selection voltage V BLK or the non-selection voltage to the control line BLK has the same configuration as the circuit that applies the selection voltage V SCN or the non-selection voltage V L.

  That is, the scanning line control circuit 4 is connected to the plurality of scanning lines SCN and the control line BLK, and controls conduction and non-conduction of the switch transistors 23 and 24 and the selection transistor 13.

The timing for applying the selection voltages V SCN and V BLK will be described later.

  Further, the control line BLK may be a control line common to all the light emitting pixels, or may be the control lines BLK1 to BLKm arranged for each pixel row.

<Signal line control circuit>
Next, the signal line control circuit 5 will be described. In the data voltage writing period, the signal line control circuit 5 synchronizes with the scanning signal output from the scanning line control circuit 4 in accordance with the control signal from the control circuit 2, and outputs the data voltage corresponding to the video signal (on voltage and off voltage). Voltage) is output to the gate terminal of the current switch transistor 11 via the data line DT. In addition, the signal line control circuit 5 synchronizes with the selection voltage V BLK of the initialization signal output from the scanning line control circuit 4 via the control line BLK during the initialization period, and outputs a constant current switch from the constant current driver. The initialization voltage Vdata2 for determining the current value of the constant current supplied to the unit is output to the source terminal of the current driving transistor 21 via the data line DT. The signal line control circuit 5 has substantially the same circuit configuration as that of the scanning line control circuit 4, but the initialization voltage Vdata2 that sets the applied voltage value as the source voltage of the current drive transistor 21 and the ON voltage Vdata1 of the current switch transistor 11 are used. And can be selected.

  FIG. 4 is an internal circuit diagram of a signal line control circuit included in the display device of the present invention. The signal line control circuit 5 selects the initialization voltage Vdata2 or the ON voltage Vdata1 by the switching function by the switch SWD, and applies it to the data lines DT1 to DTn arranged for each pixel column. In addition, the circuit configuration is such that a switch for supplying the off potential of the data signal is arranged for each line.

  When the number of pixel columns is n, the signal line control circuit 5 is connected to the display unit 6 via n data lines DT1 to DTn. Each data line can be supplied with the ON voltage Vdata1 or the OFF voltage to the data lines DT1 to DTn for each line in accordance with a signal from the signal line control circuit 5. It is also possible to supply the initialization voltage Vdata2 or the off voltage to all the data lines at the same time. The timing for applying the initialization voltage Vdata2, the on voltage Vdata1, or the off voltage will be described later.

  As described above, the signal line control circuit 5 outputs the initialization voltage Vdata2 that becomes the source voltage of the current drive transistor 21 in the initialization period and outputs the data voltage in the data voltage writing period in response to the control signal from the control circuit 2. A certain on-voltage or off-voltage is output to the display unit 6 through the data line DT. In addition, it has a memory function for enabling simultaneous control of n data lines of the number of pixel columns corresponding to the resolution of the display unit 6 by a drive signal corresponding to the video signal.

  That is, the signal line control circuit 5 is connected to the plurality of data lines DT, and when the selection transistor 13 is turned on by the scanning line control circuit 4, the data voltage that determines the gate-source voltage of the current switch transistor 11. Is output to the data line DT, and when the switch transistors 23 and 24 are turned on by the scanning line control circuit 4, the initialization voltage Vdata2 for determining the gate-source voltage of the current driving transistor 21 is output to the data line DT. To do.

  The control circuit 2 functions as a control unit that controls the light emission luminance of the organic EL element 14 by changing the length of the display period of the light emitting pixels by the on / off control of the current switch transistor 11.

<Operation of display device>
Hereinafter, the operation of the display device 1 will be described with reference to FIGS. FIG. 5 is a drive timing chart of the display device according to Embodiment 1 of the present invention. The drive timing chart of FIG. 5 shows, as an example, the operation of the display device when scanning row by row from the scanning line SCN1, and the voltage V22 across the capacitor 22 and the voltage V12 across the capacitor 12 are sequentially shown from the top. , Current drive transistor 21 state TFT 21, current switch transistor 11 conduction state TFT 11, selection transistor 13 gate voltage V13, switch transistor 23 gate voltage V23, switch transistor 24 gate voltage V24, control line BLK voltage, data line DT voltage, scan line SCN1 voltage,..., Scan line SCN1080 voltage. V22 to V24 represent operations for the light emitting pixels belonging to the pixel row connected to the scanning line SCN1. The state TFT 21 of the current driving transistor 21 is expressed as a high level when the switch transistors 23 and 24 are in a conductive state and the capacitor 22 is in a charged state, and as a low level in the other cases. The conduction state TFT 11 of the current switch transistor 11 represents a high level when the drain and source of the current switch transistor 11 are in a conduction state and a low level when the current switch transistor 11 is in a non-conduction state.

  In the operation of the display device 1 to be described below, a series of units of an initialization operation, a writing operation, and a light emission operation are set as one subfield, and the subfield is repeatedly executed.

[Initialization period (current source setting period)]
The operation in the initialization period (current source setting period) for setting the constant current supplied from the constant current driving unit is based on the input video signal between the gate and the source of the current driving transistor 21 serving as the current source of each pixel. This is a step of setting the voltage Vgs.

  First, in order to set Vgs of the current drive transistor 21 from time t01 to time t02, the current switch transistor 11 connected in series to the current drive transistor 21 to be written is turned off. As a method of turning off, as shown in FIG. 5, a scanning voltage pulse may be applied to the scanning line SCN in a row sequence, and an off voltage may be applied to the data line DT to turn off each row. A scanning voltage pulse may be applied. The length of the scanning voltage pulse may be changed according to the length of the light emission period before the initialization period.

  By performing the above operation as a preparatory stage for the initialization period, the source potential of the current drive transistor 21 is disconnected from the current switch transistor 11 and the organic EL element 14 and is in a floating state. Can be arbitrarily set from the data line DT, whereby Vgs can be arbitrarily adjusted.

Next, at time t02, the positive voltage V BLK is applied to the control line BLK, the gate voltages of the switch transistors 23 and 24 are set to be equal to or higher than the threshold voltage, and the drain-source resistance is lowered and turned on. By this operation, Vgs of the current drive transistor 21 is set by the potential difference between the initialization power supply line PI and the data line DT.

FIG. 6 is a state transition diagram for explaining the current source setting operation of the display device according to the first embodiment of the present invention. The figure shows the electrical state at time t02 of the four light emitting pixels 6A to 6D adjacent between the matrices. In the present embodiment, the power supply line PS, the control line BLK, and the initialization power supply line PI are shared by all the light emitting pixels. Since these wirings are shared and the voltage value of the reference voltage V REF by the initialization power supply line PI can be determined only by the potential difference from the initialization voltage Vdata2, the reference voltage V REF can be set low. The peripheral circuit can be simplified.

At time t02, the signal line control circuit 5 outputs the initialization voltage Vdata2 to the data lines DT1 and DT2. Further, the scanning line control circuit 4 outputs a HIGH level selection voltage V BLK to the control line BLK. As a result, the switch transistors 23 and 24 become conductive, and Vgs of the current drive transistor 21 becomes (V REF −Vdata2). In FIG. 6, arrows (broken lines) indicate voltage application paths.

Here, a specific example will be described assuming an organic EL display panel. For example, the power supply voltage V TFT of the power supply line PS is 10V, the reference voltage V EL is set to -2 V. Further, the drain-source voltage Vds of the current driving transistor 21 is about 5V, and the Vds of the current switch transistor 11 is about 1V. In such a case, as described above, in order to operate the current driving transistor 21 as a stable constant current source, it is necessary to set Vgs so that Vds >> Vgs and operate in the saturation region. That is, the absolute value of the potential difference between V REF and Vdata2, the drain of the current drive transistor 21 - smaller than the absolute value of the source voltage Vds. In this specific example, since Vds of the current drive transistor 21 is about 5V, it is desirable to set Vgs of the current drive transistor 21 to about 1V. From this, the reference voltage V REF 3V, initializing voltage Vdata2 may be set as 2V.

  The setting of the constant current driving unit is completed by the operations of the scanning line control circuit 4 and the signal line control circuit 5 at time t02 described above.

  Thereafter, during the period from time t02 to time t03, the scanning line control circuit 4 sets the control line BLK to the LOW level, and sets the gate voltages of the switch transistors 23 and 24 to be equal to or lower than the threshold voltage, thereby reducing the Vgs of the current driving transistor 21. Both electrodes of the capacitor 22 to be held are electrically disconnected from the initialization power supply line PI and the data line DT. At this time, if the voltage of the data line DT is changed before the switch transistors 23 and 24 are sufficiently turned off, the Vgs voltage of the current drive transistor 21 changes. In order to avoid this, it is better to delay the timing at which the voltage of the data line DT falls from Vdata2 than the timing at which the control line BLK falls.

At time t02, the switch transistors 23 and 24 are turned on, and Vgs is set in the current drive transistor 21. At the same time, the power supply line PS → current drive transistor 21 → switch transistor 24 → data line DT → signal line control circuit. There is a concern that current flows through the path 5. In order to eliminate the loss due to the current, it is desirable to set the voltage of the power supply line PS to be equal to or lower than the threshold voltage of the current driving transistor 21 at the timing of applying the selection voltage V BLK to the control line BLK.

[Writing period (ON / OFF setting period)]
The operation in the writing period (ON / OFF setting period) in which the data voltage is written to the selected light emitting pixel is a step of switching between the conductive state and the nonconductive state of the current switch transistor 11 included in each light emitting pixel. Therefore, the scanning line control circuit 4 applies the selection voltage V SCN or the non-selection voltage V L for each scanning line SCN. As a result, the data voltage from the corresponding data line DT is applied to the light emitting pixels belonging to the pixel row to which the selected scanning line SCN is connected, and the gate voltage of the current switch transistor 11 is controlled.

  In FIG. 5, the light-emitting pixels in the first row are in a light emitting state in the subfield periods t03 to t04 and the periods t05 to t06 by the processing by the control circuit 2, and in the subfield periods t04 to t05. It is assumed that the light emitting pixel is in a non-light emitting state.

  First, in the subfield period from time t03 to time t04, the scanning line control circuit 4 applies scanning signal pulses to the scanning lines SCN1 to SCNm. Here, the light emitting pixels in the first row connected to the scanning line SCN1 will be described more specifically.

  FIG. 7 is a state transition diagram illustrating a writing operation to a pixel included in the display device according to Embodiment 1 of the present invention. The figure shows the electrical state at time t03 of four light emitting pixels 6A to 6D adjacent between the matrices.

At time t03, the scanning line control circuit 4 outputs a selection voltage V SCN that is equal to or higher than the threshold voltage of the selection transistor 13 to the scanning line SCN1. As a result, the resistance between the drain and source of the selection transistor 13 decreases, and the selection transistor 13 becomes conductive. Further, the signal line control circuit 5 outputs an on voltage Vdata1 to the data line DT. As a result, the gate voltage of the current switch transistor 11 becomes equal to or higher than the threshold voltage, and the current switch transistor 11 becomes conductive. In FIG. 7, an arrow (broken line) indicates a voltage application path, and an arrow (solid line) indicates a current flow.

In this embodiment, for example, the HIGH level voltages V SCN and V BLK of the scanning line SCN and the control line BLK are + 20V, and the LOW level voltage VL is set to −10V. Further, as described above, in order for the current switch transistor 11 to operate as a switching element with a small switching loss, it is necessary to set Vgs so that Vgs >> Vds and operate in the linear region. That is, the absolute value of the data voltage when the current switch transistor 11 becomes conductive is larger than the absolute value of the drain-source voltage Vds of the current switch transistor 11. In this specific example, since Vds of the current switch transistor 11 is about 1V, it is desirable to set Vgs of the current switch transistor 11 to about 8V. Moreover, since the voltage applied to the organic EL element 14 is about 6V, the anode potential of the organic EL element 14, that is, the source potential of the current switch transistor 11 is about 4V. From the Vgs and source potential of the current switch transistor 11, the data voltage applied to the current switch transistor 11 may be set to about 12V as the on voltage and about 2V as the off voltage. In this case, the OFF voltage and the Vdata2 voltage are set to the same voltage value. However, as shown in the drive timing chart shown in FIG. Each set voltage value in the display device 1 according to the embodiment is not limited to the exemplified voltage value. The drive timing chart shown in FIG. 5 shows an example in which the voltage value of the off voltage is different from the voltage value of the Vdata2 voltage in order to clarify the behavior of the voltage of each wiring.

Next, at time t03~ time t04, the selection transistor 13 the scanning voltage of the scanning line SCN1 is changed from V SCN in V L and a non-conductive state, electrical and gate terminal and the data line DT of the current switch transistor 11 Even when disconnected, the capacitor 12 connected between the gate and source of the current switch transistor 11 holds the Vgs potential of the current switch transistor 11. At this time, the capacity of the capacitor 12 is desirably set to a capacity that can hold a potential equal to or higher than the threshold voltage of the current switch transistor 11 even when the maximum time width during which the current switch transistor 11 is turned on has elapsed.

  When the current switch transistor 11 becomes conductive by the above operation, a current flows through the path of the power supply line PS → the current drive transistor 21 → the current switch transistor 11 → the organic EL element 14 → the reference terminal, and the light emission periods of the light emitting pixels 6A and 6B are increased. Start. The light emission period continues until the current switch transistor 11 is turned off.

  Thereafter, by sequentially scanning the scanning line SCN2, the scanning line SCN3,..., The current switch transistor 11 can be turned on at a desired timing for all the light emitting pixels.

  As described above, it is possible to perform writing and light emission control for all the light emitting pixels for each subfield by performing the writing operation for the desired light emitting pixels for each scanning line after time t03.

  In the series of display operations described in FIG. 5, the initialization operation is performed only once, but may be performed for each subfield. However, if there is no need to change the current setting value of the constant current drive unit between subfields, there is no need to perform the initialization operation, and the drive time is greatly reduced by omitting the initialization operation between subfields. It can be shortened. That is, the number of times that the signal line control circuit 5 outputs the initialization voltage Vdata2 to the data line DT within one frame time which is the time for rewriting the unit display image is equal to the number of times the signal line control circuit 5 outputs the data voltage (ON Voltage and off voltage) is preferably smaller than the number of times of output to the data line DT. As a result, the time required for setting the conditions of the current drive transistor as the current source is shortened, and as a result, it is possible to ensure a long light emission period. Therefore, a high-definition display panel can be provided and the peak value of the current flowing through the organic EL element can be reduced, so that highly efficient luminance control can be performed.

  In addition, when the luminance is modulated by the sub-field time-division method, the maximum luminance and the minimum luminance are restricted by the maximum value or the minimum value of the on / off time ratio of the current switch transistor 11, but the current setting value in the current driving unit is changed. By changing it, it is possible to widen the brightness adjustment range. Specifically, for example, the brightness adjustment range can be expanded by adjusting the set value of Vgs of the current drive transistor 21.

  Further, by setting the capacitance of the capacitor 22 that holds the Vgs of the current driving transistor 21 according to the maximum time interval required for the initialization operation, the Vgs of the current driving transistor 21 can be held at a desired value. It becomes.

  As described above, according to the present embodiment, since the constant current drive unit functioning as a constant current source is arranged in the pixel circuit, the current switch transistor 11 constituting the constant current switch unit needs to be a constant current source. It is only necessary to have a switch function for switching the on / off state of the pixel circuit. Therefore, for example, by setting the data voltage applied to the current switch transistor 11, that is, the gate-source voltage Vgs sufficiently larger than the drain-source voltage Vds, the linear region of the thin film transistor can be used. Therefore, the on-resistance of the drain-source current Ids can be reduced. Therefore, the voltage drop when the light emission current flows between the drain and source of the current switch transistor 11 can be reduced, and the power loss of the display panel can be greatly reduced.

  In addition, according to the present embodiment, only a driver operation for changing the potential of the control line BLK is newly required for the driver circuit for changing the potential of the wiring necessary for the basic writing operation and the light emitting operation. Therefore, the configuration of the external peripheral circuit can be simplified.

Further, according to the present embodiment, current flows from the initialization power supply line PI to the data line DT during the initialization period for setting Vgs of the current driving transistor 21. Flow of the current to the data line DT is lead to losses, as compared with the case of setting between the power supply line PS and the data line DT to Vgs of the current driving transistor 21, the reference voltage V REF and the initialization voltage Vdata2 Can be set to the required minimum value without being regulated by the power supply voltage, and therefore, the flowing current value can be minimized and the loss due to the current can be minimized.

(Embodiment 2)
The pixel circuit included in the display device according to the present embodiment has the same circuit configuration as the constant current drive unit and the constant current switch unit as compared with the pixel circuit according to the first embodiment. And only the arrangement relationship between the constant current switch section and the constant current switch section. Hereinafter, description of the same points as those of the pixel circuit according to Embodiment 1 will be omitted, and only different points will be described.

  FIG. 8 is a circuit configuration diagram of a display unit included in the display device according to Embodiment 2 of the present invention. The light emitting pixel of the display unit 6 illustrated in FIG. 8 includes a current switch transistor 31, switch transistors 43 and 44, capacitors 32 and 42, a selection transistor 33, an organic EL element 34, a current drive transistor 41, A data line DT arranged for each pixel column, a scanning line SCN and a control line BLK arranged for each pixel row, an initialization power supply line PI, and a power supply line PS are provided.

  The light emitting pixel included in the display unit 6 includes a constant current driving unit that generates a constant current that is a light emission current supplied to the organic EL element 34, and a current of the constant current that is supplied from the constant current driving unit to the organic EL element 34. It is broadly divided into a constant current switch section that conducts and cuts off the path.

  The constant current drive unit includes a current drive transistor 41, a capacitor 42, and switch transistors 43 and 44. The constant current drive unit operates the current drive transistor 41 in a saturation region, thereby generating a constant current even when the Vds of the current drive transistor 41 varies, and stably supplying the constant current to the constant current switch unit.

  The constant current switch unit includes a current switch transistor 31, a capacitor 32, and a selection transistor 33. A binary data voltage (on voltage and off voltage) supplied from the data line DT is applied to the gate terminal of the current switch transistor 31, so that the source and drain of the current switch transistor 31 are in a conductive state or non-conductive. It becomes a state. As a result, the operation of supplying or not supplying a constant current from the constant current driving unit to the organic EL element 34 is executed in units of subfields, and digital gradation control is performed. Here, in order to reduce the switching loss in the on / off control of the current switch transistor 31, the current switch transistor 31 is preferably operated in a linear region having a low on-resistance. On the other hand, when the thin film transistor is operated in a linear region, there is a problem that the drain-source current Ids of the thin film transistor is likely to fluctuate due to the fluctuation of the source-drain voltage Vds. In order to solve the above problem, the constant current drive unit described above supplies a constant current that does not vary Ids even if Vds varies.

  In other words, the constant current driving unit having the current driving transistor 41 operating in the saturation region can supply a constant current stably even when there is a fluctuation in the power supply voltage or the source potential, and the current switch operating in the linear region The constant current switch portion having the transistor 31 enables digital gradation display by low loss switching.

  Hereinafter, each component of the light emitting pixel and a connection state thereof will be described.

  The power supply line PS is disposed in all the pixel rows, and is connected to the drain of the current driving transistor 41 through the current switch transistor 31.

In this embodiment, since the same power supply voltage VTFT is applied to all the light emitting pixels at the same timing, the power supply line PS may be a common line to which all the power supply lines are connected. Good.

The organic EL element 34 is a current-driven light-emitting element, and has an anode terminal connected to the source terminal of the current drive transistor 41 and one electrode of the capacitor 42, and a cathode terminal connected to a reference terminal (reference voltage V EL ). ing.

  The current drive transistor 41 has a drain terminal connected to the source terminal of the current switch transistor 31, a gate terminal connected to the other electrode of the capacitor 42, a source terminal connected to one electrode of the capacitor 42, and a power supply line PS. Drive current. The current driving transistor 41 is a thin film transistor for constant current driving that supplies a constant current from the power supply voltage according to Vgs by operating in a saturation region where Vds is sufficiently larger than Vgs. As described above, the current drive transistor 41 supplies stable Ids that are not subject to fluctuations in Vds to the organic EL element 34. However, due to the tendency of display gradation based on the video signal, the current drive transistor 41 is an initial stage that will be described later. The magnitude of Ids can be adjusted by changing the Vgs by adjusting the voltage Vdata2. This makes it possible to display all gradations with high accuracy.

  The capacitor 42 is a first capacitor that is connected to the gate electrode and the source electrode of the current drive transistor 41 and holds the gate-source voltage of the current drive transistor 41.

  The current switch transistor 31 has a drain terminal connected to the power supply line PS, a gate terminal connected to the other terminal of the capacitor 32, a source terminal connected to the drain terminal of the current driving transistor 41, and Vgs sufficiently higher than Vds. It is a thin film transistor for constant current switching that operates in a linear region, which is a large region. The current switch transistor 31 conducts and cuts off a current path for flowing a constant current driven by the current drive transistor 41 to the organic EL element 34.

  The capacitor 32 is a second capacitor that holds a voltage between the gate electrode and the drain electrode of the current switch transistor 31.

  The selection transistor 33 has a drain terminal connected to the gate terminal of the current switch transistor 31, a gate terminal connected to the scanning line SCN, a source terminal connected to the data line DT, and a data voltage that determines light emission of the organic EL element 34. A light emitting pixel to be written is selected. That is, the selection transistor 33 switches between conduction and non-conduction between the gate electrode of the current switch transistor 31 and the data line DT.

  The switch transistor 43 has a drain terminal connected to the initialization power supply line PI, a gate terminal connected to the control line BLK, and a source terminal connected to the gate terminal of the current drive transistor 41 and the other electrode of the capacitor 42. The switch transistor is controlled synchronously with the switch transistor 44, thereby determining Vgs of the current drive transistor 41 that is a voltage across the capacitor 42.

  The switch transistor 44 has a drain terminal connected to the source terminal of the current driving transistor 41 and one electrode of the capacitor 42, a gate terminal connected to the control line BLK, and a source terminal connected to the data line DT. By being synchronously controlled with the switch transistor 43, Vgs of the current drive transistor 41 which is the voltage across the capacitor 42 is determined.

  The current switch transistor 31, the switch transistors 43 and 44, and the selection transistor 33 are connected between the drain and the source by applying a voltage higher than the threshold voltage between the gate and the source based on the input video signal. It is a switch element to do.

  The current drive transistor 41, the current switch transistor 31, the switch transistors 43 and 44, and the selection transistor 33 are preferably thin film transistors having the same conductivity type channel, and are further formed of n-channel MOSFETs. Is desirable. Since all of the above transistors are formed of n-channel MOSFETs, a pixel circuit can be configured using only n-type transistors, so that a display panel can be manufactured inexpensively and easily using amorphous silicon TFTs. It becomes.

In the above circuit configuration, when the data line DT becomes HIGH level (Vdata1) and the scanning line SCN becomes HIGH level (V SCN ), a signal voltage sufficiently larger than the threshold voltage is applied between the gate and the source of the selection transistor 33. Is done. As a result, the select transistor 33 operates in a linear region, and is in a conductive state with low on-resistance between the drain and source. Then, after the selection transistor 33 becomes conductive, the capacitor 32 is charged from the data line DT via the selection transistor 33. As a result, a voltage sufficiently larger than the threshold voltage is applied between the gate and source of the current switch transistor 31, and the current switch transistor 31 operates in a linear region and becomes conductive with a low on-resistance between the drain and source. At this time, the constant current by the current driving transistor 41 flows through the path of the power line PS → the current switch transistor 31 → the current driving transistor 41 → the organic EL element 34, and the organic EL element 34 emits light.

  In FIG. 8, the capacitor 32 is connected between the gate and drain of the current switch transistor 31, but parasitic capacitance is also generated between the gate and source of the current switch transistor 31 (not shown). The sum of the gate-source voltage and the gate-drain voltage of the current switch transistor 31 matches the drain-source voltage. Therefore, holding the drain-gate voltage with the capacitor 32 is equivalent to holding the gate-source voltage.

<Operation of display device>
Hereinafter, the operation of the display device according to the second embodiment will be described with reference to FIGS. FIG. 9 is a drive timing chart of the display device according to the embodiment of the present invention. The drive timing chart of FIG. 9 is V42, V32, TFT41, TFT31, V33, V43, V44, and control lines in order from the top, similarly to the drive timing chart of the display device according to the first embodiment described in FIG. BLK voltage, data line DT voltage, scanning line SCN1 voltage,..., Scanning line SCN1080 voltage.

[Initialization period (current source setting period)]
The operation in the initialization period (current source setting period) in which the constant current supplied from the constant current driver is set is based on the input video signal between the gate and the source of the current drive transistor 41 serving as the current source of each pixel. This is a step of setting the voltage Vgs.

  First, at time t11 to time t12, in order to set Vgs of the current drive transistor 41, the current switch transistor 31 connected in series to the current drive transistor 41 to be written is turned off. As a method of turning off, as shown in FIG. 9, the scanning voltage pulse may be applied to the scanning line SCN sequentially in the row and the off voltage may be applied to the data line DT to turn it off for each row. A scanning voltage pulse may be applied. The length of the scanning voltage pulse may be changed according to the length of the light emission period before the initialization period.

  By performing the above operation as a preparatory stage for the initialization period, the drain potential of the current driving transistor 41 is disconnected from the power supply line PS and becomes a floating state. Therefore, Vgs of the current driving transistor 41 after time t12 is arbitrarily adjusted. It becomes possible to do.

Next, at time t12, a positive voltage V BLK is applied to the control line BLK, the gate voltages of the switch transistors 43 and 44 are set to be equal to or higher than the threshold voltage, and the drain-source resistance is lowered and turned on. With this operation, Vgs of the current drive transistor 41 is set by a potential difference between the data line DT and the initialization power supply line PI. As described above, when setting Vgs of the current drive transistor 41, the current switch transistor 31 is in an OFF state, and therefore the drain terminal of the current drive transistor 41 is disconnected. For this reason, since no unnecessary current flows into the data line DT and the initialization power supply line PI, it is possible to minimize the power required for writing, and a low-loss display device can be realized.

FIG. 10 is a state transition diagram for explaining the current source setting operation of the display device according to the second embodiment of the present invention. The figure shows the electrical state at time t12 of the four light emitting pixels 6A to 6D adjacent between the matrices. In the present embodiment, the power supply line PS, the control line BLK, and the initialization power supply line PI are shared by all the light emitting pixels. Since these wirings are shared and the voltage value of the reference voltage V REF by the initialization power supply line PI can be determined only by the potential difference from the initialization voltage Vdata2, the reference voltage V REF can be set low. The peripheral circuit can be simplified.

At time t12, the signal line control circuit 5 outputs the initialization voltage Vdata2 to the data lines DT1 and DT2. Further, the scanning line control circuit 4 outputs a HIGH level selection voltage V BLK to the control line BLK. Further, the scanning line control circuit 4 outputs a non-selection voltage VL at a LOW level to the scanning line SCN. As a result, the switch transistors 43 and 44 become conductive, and Vgs of the current drive transistor 41 becomes (V REF −Vdata2). In FIG. 10, an arrow (broken line) indicates a voltage application path.

Here, as described above, in order to operate the current driving transistor 41 as a stable constant current source, it is necessary to set Vgs so that Vds >> Vgs and operate in the saturation region. That is, the absolute value of the potential difference between V REF and Vdata2, the drain of the current drive transistor 41 - smaller than the absolute value of the source voltage Vds.

However, in the initialization period from time t12 to time t13, since the switch transistor 44 is in a conductive state, a current flows from the data line DT to the organic EL element 34 via the switch transistor 44, and the organic EL element 34 emits light. There is a risk that. Similarly, since the switch transistor 43 is conductive, current may flow from the initialization power supply line PI to the organic EL element 34 via the switch transistor 43, and the organic EL element 34 may emit light. To avoid this, the reference voltage V REF of the initialization voltage Vdata2 and reset power line of the data line DT is set to be smaller than the voltage plus the forward drop voltage of the organic EL element 34 to the reference potential V EL Need to be done. By ensuring this condition, the pn junction of the organic EL element 34 is reverse-biased, and the data line DT → the switch transistor 44 → the organic EL element 34 and the initialization power line PI → the switch transistor 43 → the organic EL element 34. Unnecessary current does not flow through this path, and Vgs of the current drive transistor 41 can be arbitrarily set.

Here, a specific example will be described assuming an organic EL display panel. For example, the power supply voltage V TFT of the power supply line PS is 10V, the reference voltage V EL is set to -2 V. Further, the drain-source voltage Vds of the current driving transistor 41 is about 5V, and the Vds of the current switch transistor 31 is about 1V. In this case, setting the Vgs of the current drive transistor 41 to approximately 1V, that is, by setting 2V initializing voltage Vdata2, and a reference voltage V REF and 3V, the current driving transistor 41 as described above Vds >> Vgs It becomes.

  The setting of the constant current driving unit is completed by the operations of the scanning line control circuit 4 and the signal line control circuit 5 at time t12 described above.

  Thereafter, during the period from time t12 to time t13, the scanning line control circuit 4 sets the control line BLK to the LOW level and sets the gate voltages of the switch transistors 43 and 44 to be equal to or lower than the threshold voltage, thereby reducing the Vgs of the current driving transistor 41. Both electrodes of the capacitor 42 to be held are electrically disconnected from the initialization power supply line PI and the data line DT. At this time, if the voltage of the data line DT is changed before the switch transistors 43 and 44 are sufficiently turned off, the Vgs voltage of the current driving transistor 41 changes. In order to avoid this, it is better to delay the timing at which the voltage of the data line DT falls from Vdata2 than the timing at which the control line BLK falls.

[Writing period (ON / OFF setting period)]
The operation in the writing period (ON / OFF setting period) in which the data voltage is written to the selected light emitting pixel is a step of switching between the conductive state and the nonconductive state of the current switch transistor 31 included in each light emitting pixel. Therefore, the scanning line control circuit 4 applies the selection voltage V SCN or the non-selection voltage V L for each scanning line SCN. As a result, the data voltage from the corresponding data line DT is applied to the light emitting pixels belonging to the pixel row to which the selected scanning line SCN is connected, and the gate voltage of the current switch transistor 31 is controlled.

  In FIG. 9, the light emitting pixels in the first row are in a light emitting state in the subfield periods t13 to t14 and the periods t15 to t16 by the processing by the control circuit 2, and in the subfield periods t14 to t15. It is assumed that the light emitting pixel is in a non-light emitting state.

  First, in the subfield period from time t13 to time t14, the scanning line control circuit 4 applies scanning signal pulses to the scanning lines SCN1 to SCNm. Here, the light emitting pixels in the first row connected to the scanning line SCN1 will be described more specifically.

  FIG. 11 is a state transition diagram illustrating a write operation to a pixel included in the display device according to Embodiment 2 of the present invention. The figure shows the electrical state at time t13 of the four light emitting pixels 6A to 6D adjacent between the matrices.

At time t13, the scanning line control circuit 4 outputs a selection voltage V SCN that is equal to or higher than the threshold voltage of the selection transistor 33 to the scanning line SCN1. As a result, the resistance between the drain and the source of the selection transistor 33 decreases, and the selection transistor 33 becomes conductive. Further, the signal line control circuit 5 outputs an on voltage Vdata1 to the data line DT. As a result, the gate voltage of the current switch transistor 31 becomes equal to or higher than the threshold voltage, and the current switch transistor 31 becomes conductive. At this time, the source voltage of the switch transistor 44 also changes. However, since the gate voltage of the switch transistor 44 is equal to or lower than the threshold voltage, Vgs of the current drive transistor 41 is not affected. In FIG. 11, an arrow (broken line) indicates a voltage application path, and an arrow (solid line) indicates a current flow.

In this embodiment, for example, the HIGH level voltages V SCN and V BLK of the scanning line SCN and the control line BLK are + 20V, and the LOW level voltage VL is set to −10V. Further, as described above, in order to operate the current switch transistor 31 as a switching element having a small switching loss, it is necessary to set Vgs so that Vgs >> Vds and operate in the linear region. That is, the absolute value of the data voltage when the current switch transistor 31 is in a conductive state is larger than the absolute value of the drain-source voltage Vds of the current switch transistor 31. In this specific example, since Vds of the current switch transistor 31 is about 1V, it is desirable to set Vgs of the current switch transistor 31 to about 8V. Further, the voltage applied to the organic EL element 34 is about 6V, and the Vds of the current drive transistor 41 is 5V. Therefore, the source potential of the current switch transistor 31 is about 9V. From the Vgs and source potential of the current switch transistor 31, the data voltage applied to the current switch transistor 31 may be set to about 17V as the on voltage and about 2V as the off voltage. In this case, the OFF voltage and the Vdata2 voltage are set to the same voltage value. However, as shown in the drive timing chart shown in FIG. It is also possible to set the voltage as high as 7V. That is, each set voltage value in the display device according to the present embodiment is not limited to the exemplified voltage value. The drive timing chart shown in FIG. 9 shows an example in which the voltage value of the off voltage is different from the voltage value of the Vdata2 voltage in order to clarify the behavior of the voltage of each wiring.

Then, at time t13~ time t14, the selection transistor 33 the scanning voltage of the scanning line SCN1 varied from V SCN in V L and a non-conductive state, electrical and gate terminal and the data line DT of the current switch transistor 31 Even when disconnected, the capacitor 32 connected between the gate and source of the current switch transistor 31 holds the Vgs potential of the current switch transistor 31. At this time, the capacity of the capacitor 32 is desirably set to be equal to or larger than a capacity capable of holding a potential equal to or higher than the threshold voltage of the current switch transistor 31 even when the maximum time width during which the current switch transistor 31 is turned on has elapsed.

  When the current switch transistor 31 becomes conductive by the above operation, a current flows through the path of the power supply line PS → the current switch transistor 31 → the current drive transistor 41 → the organic EL element 34 → the reference terminal, and the light emission periods of the light emitting pixels 6A and 6B are increased. Start. The light emission period continues until the current switch transistor 31 is turned off.

  Thereafter, by sequentially scanning the scanning line SCN2, the scanning line SCN3,..., The current switch transistor 31 can be turned on at a desired timing for all the light emitting pixels.

  As described above, writing and light emission control can be performed on all the light emitting pixels for each subfield by performing the writing operation on the desired light emitting pixels for each scanning line after time t13.

  In the series of display operations described in FIG. 9, the initialization operation is performed only once, but may be performed for each subfield. However, if there is no need to change the current setting value of the constant current drive unit between subfields, there is no need to perform the initialization operation, and the drive time is greatly reduced by omitting the initialization operation between subfields. It can be shortened. That is, the number of times that the signal line control circuit 5 outputs the initialization voltage Vdata2 to the data line DT within one frame time which is the time for rewriting the unit display image is equal to the number of times the signal line control circuit 5 outputs the data voltage (ON Voltage and off voltage) is preferably smaller than the number of times of output to the data line DT. As a result, the time required for setting the conditions of the current drive transistor as the current source is shortened, and as a result, it is possible to ensure a long light emission period. Therefore, a high-definition display panel can be provided and the peak value of the current flowing through the organic EL element can be reduced, so that highly efficient luminance control can be performed.

  In addition, when the luminance is modulated by the sub-field time-division method, the maximum luminance and the minimum luminance are restricted by the maximum value or the minimum value of the on / off time ratio of the current switch transistor 31, but the current setting value in the current driving unit is changed. By changing it, it is possible to widen the brightness adjustment range. Specifically, for example, the brightness adjustment range can be expanded by adjusting the set value of Vgs of the current drive transistor 41.

  Further, by setting the capacitance of the capacitor 42 that holds the Vgs of the current driving transistor 41 according to the maximum time interval required for the initialization operation, the Vgs of the current driving transistor 41 can be held at a desired value. It becomes.

  As described above, according to the present embodiment, since the constant current drive unit functioning as a constant current source is arranged in the pixel circuit, the current switch transistor 31 constituting the constant current switch unit needs to be a constant current source. It is only necessary to have a switch function for switching the on / off state of the pixel circuit. Therefore, for example, by setting the data voltage applied to the current switch transistor 31, that is, the gate-source voltage Vgs sufficiently larger than the drain-source voltage Vds, the linear region of the thin film transistor can be used. Therefore, the on-resistance of the drain-source current Ids can be reduced. Therefore, the voltage drop when the light emission current flows between the drain and source of the current switch transistor 31 can be reduced, and the power loss of the display panel can be greatly reduced.

  In addition, according to the present embodiment, only a driver operation for changing the potential of the control line BLK is newly required for the driver circuit for changing the potential of the wiring necessary for the basic writing operation and the light emitting operation. Therefore, the configuration of the external peripheral circuit can be simplified.

Further, according to the present embodiment, current flows from the initialization power supply line PI to the data line DT during the initialization period for setting Vgs of the current driving transistor 41. Flow of the current to the data line DT is lead to losses, as compared with the case of setting the Vgs of the current drive transistor 41 between the power supply line PS and the data lines DT, a reference voltage V REF and the initialization voltage Vdata2 Can be set to the required minimum value without being regulated by the power supply voltage, and therefore, the flowing current value can be minimized and the loss due to the current can be minimized.

  The display device and the control method thereof according to the present invention have been described based on the first and second embodiments. However, the display device and the control method according to the present invention are limited to the above-described first and second embodiments. is not. The present invention includes modifications obtained by making various modifications conceivable by those skilled in the art to Embodiments 1 and 2 without departing from the gist of the present invention, and various devices incorporating the display device according to the present invention. It is.

  Note that the channel width of the current drive transistors 21 and 41, which are constant current sources using the saturation region, is preferably wider than that of the current switch transistors 11 and 31. As a result, the voltage drop when the light emission current flows between the drain and source of the current driving transistors 21 and 41 can be reduced, and the power loss of the display panel can be reduced.

  In the first and second embodiments described above, the transistors are described as n-type transistors that are turned on when the gate voltage of each transistor is at a high level. Even in a display device in which is inverted, the same effects as those of the above-described embodiments can be obtained. Alternatively, a display device in which an n-type transistor and a p-type transistor are mixed may be used.

  In the first and second embodiments according to the present invention, each transistor has been described on the premise that the transistor is an FET having a gate, a source, and a drain. However, these transistors have a base, a collector, and an emitter. Bipolar transistors may be applied. Also in this case, the object of the present invention is achieved and the same effect is produced.

  The display device and the control method thereof according to the present invention are particularly useful for an active display in which luminance is changed by a digital gradation control method.

DESCRIPTION OF SYMBOLS 1 Display apparatus 2 Control circuit 4 Scan line control circuit 5 Signal line control circuit 6 Display part 6A, 6B, 6C, 6D Light emission pixel 11, 31 Current switch transistor 12, 22, 32, 42 Capacitor 13, 33 Selection transistor 14, 34 527 Organic EL element 21, 41 Current drive transistor 23, 24, 43, 44 Switch transistor 500 Organic EL display device 501 Pixel 511 Signal line 512 Power supply wiring 513 Selection line 514 Control line 515 Variable potential wiring 521 Second transistor 522 Fourth Transistor 523 First transistor 524 Third transistor 525, 526 Capacitor

Claims (10)

  1. A display device comprising a display unit having a plurality of light emitting pixels arranged in a matrix,
    A power supply line for supplying a power supply voltage to the plurality of light emitting pixels;
    An initialization power supply line for supplying a reference voltage for initializing the plurality of light emitting pixels to the plurality of light emitting pixels;
    Control lines,
    A plurality of scanning lines for selecting light emitting pixels arranged for each pixel row and writing a data voltage corresponding to a video signal;
    A plurality of data lines arranged for each pixel column and for writing the data voltage to a selected light emitting pixel;
    Each of the plurality of light emitting pixels is
    A current-driven light emitting device;
    A constant current driving unit for supplying a constant current to the light emitting element;
    A constant current switch unit that conducts and cuts off a current path of the constant current supplied from the power line to the light emitting element via the constant current drive unit;
    The constant current driving unit includes:
    A voltage corresponding to the power supply voltage is applied to one of the source electrode and the drain electrode, and a current driving transistor that drives a current from the power supply line;
    A first capacitor for holding the voltage between the gate electrode and the source over the source electrode of the current driving transistor,
    A first switch transistor having a gate electrode connected to the control line and switching between conduction and non-conduction between one electrode of the first capacitor and the initialization power supply line;
    A gate electrode connected to the control line, and a second switch transistor that switches between conduction and non-conduction between the other electrode of the first capacitor and a corresponding data line of the plurality of data lines,
    The constant current switch part is
    A current switch transistor connected in series with the power line, the current driving transistor, and the light emitting element, and conducting and blocking the current path for passing a current driven by the current driving transistor to the light emitting element;
    A second capacitor for holding the voltage between the gate electrode and the source over the source electrode or the power supply line of the current switch transistor,
    A gate transistor connected to a corresponding scan line of the plurality of scan lines, and a selection transistor that switches between conduction and non-conduction between the gate electrode of the current switch transistor and the data line ,
    The display device further includes:
    A scanning line control circuit which is connected to the plurality of scanning lines and the control line and controls conduction and non-conduction of the first switch transistor, the second switch transistor and the selection transistor;
    The data voltage that is connected to the plurality of data lines and determines the voltage between the gate electrode and the source electrode of the current switch transistor when the selection transistor is turned on by the scanning line control circuit. The data line is output to the data line so that the absolute value of the data voltage is larger than the absolute value of the drain-source voltage when the current switch transistor is turned on, and the first switch transistor and the scanning line control circuit When the second switch transistor is turned on, an initialization voltage that determines a voltage between the gate electrode and the source electrode of the current driving transistor is set to a potential difference between the reference voltage and the initialization voltage. The absolute value is the absolute value of the drain-source voltage when the current driving transistor is in a conductive state. Ri display device and a signal line control circuit for outputting becomes smaller as the data lines.
  2. The number of times that the signal line control circuit outputs the initialization voltage to the data line within one frame time, which is a time for rewriting a unit display image, is that the signal line control circuit outputs the data voltage within the one frame time. The display device according to claim 1 , wherein the number is less than the number of times of output to the data line.
  3. Said current drive transistor drain electrodes are connected to the power line, the source electrodes are connected to the other electrode of the first capacitor, a gate electrode connected to one electrode of said first capacitor,
    Said current switching transistor is connected drain electrodes to the source electrodes of the current driving transistor, a source connected electrodes is the anode electrode and the other electrode of said second capacitor of said light emitting element, wherein a gate electrode the display device according to claim 1 or 2 is connected to one electrode of the second capacitor.
  4. The current driving transistor is connected drain electrodes to the source electrodes of said current switching transistor, a source connected electrodes is the other electrode of the first capacitor, one electrode of the gate electrode of the first capacitor Connected to
    Said current switching transistor is connected drain electrodes within the power line, the display device according to claim 1 or 2 and a gate electrode is connected to one electrode of the second capacitor.
  5. It said current drive transistor, said current switching transistor, the selection transistor, the first switch transistor and the second switching transistor, any one of claims 1-4 are all thin film transistor having a same conductivity type channel The display device described in 1.
  6. The display device according to claim 5 , wherein the current driving transistor, the current switch transistor, the selection transistor, the first switch transistor, and the second switch transistor are all thin film transistors having an n-type channel.
  7. The current driving transistor operates in a saturation region;
    It said current switching transistor, the selection transistor, the first switch transistor and the second switching transistor, a display device according to any one of claims 1 to 6 which operates in a linear region.
  8. The light emitting device, a display device according to any one of claims 1 to 7 is an organic EL element.
  9. The light emitting device, a display device according to any one of claims 1-7 is an inorganic EL element.
  10. A power supply line for supplying a power supply voltage to a plurality of light emitting pixels arranged in a matrix;
    An initialization power supply line for supplying a reference voltage for initializing the plurality of light emitting pixels to the plurality of light emitting pixels;
    A plurality of data lines arranged for each pixel column and for writing a data voltage to a selected light emitting pixel;
    Each of the plurality of light emitting pixels is
    A current-driven light emitting device;
    A voltage corresponding to the power supply voltage is applied to one of the source electrode and the drain electrode, and a current driving transistor that drives a current from the power supply line;
    A first capacitor for holding the voltage between the gate electrode and the source over the source electrode of the current driving transistor,
    A first switch transistor that switches between conduction and non-conduction between one electrode of the first capacitor and the initialization power supply line;
    A second switch transistor that switches between conduction and non-conduction between the other electrode of the first capacitor and a corresponding data line of the plurality of data lines;
    A current switch transistor for conducting and blocking a current path for flowing a current driven by the current driving transistor to the light emitting element;
    A second capacitor for holding the voltage between the gate electrode and the source over the source electrode or the power supply line of the current switch transistor,
    A selection transistor that switches between conduction and non-conduction between the gate electrode of the current switch transistor and the data line;
    A display device control method comprising:
    Said first switching transistor and said second switching transistor to a conductive state, and the selection transistor is non-conductive state, between the gate electrode and the front Symbol source electrode of the current driving transistor by a potential difference between the reference voltage The initializing voltage for determining the voltage of the drain voltage is set such that the absolute value of the potential difference between the initializing voltage and the reference voltage is smaller than the absolute value of the drain-source voltage when the current driving transistor is in a conductive state. An initialization step of outputting to the data line and charging the first capacitor with a potential difference between the reference voltage and the initialization voltage;
    After the initialization step, the selection transistor is turned on, and the data voltage is set such that the absolute value of the data voltage is larger than the absolute value of the drain-source voltage when the current switch transistor is turned on. the output to the data line, a control method of a display device and a data voltage writing step of charging the potential difference between the data voltage and source over scan voltage or the voltage of the power supply line of the current switch transistor with the second capacitor.
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