JP5910333B2 - 5 level power converter - Google Patents

Description

  The present invention relates to a 5-level power converter that outputs an AC voltage obtained by converting a DC voltage between positive and negative electrodes in one DC voltage source into five voltage levels.

FIG. 3 is a circuit configuration diagram showing a main circuit in the five-level power converter disclosed in Patent Document 1. In the 5-level power converter shown in FIG. 3, four capacitors C _dc1 , C _dc2 , C _dc3 , C _dc4 are connected in series in order to _divide the voltage of the DC power source connected to the DC side of the 5-level inverter INV2. An AC output having a five-level potential is generated using the energy stored in the capacitors C _{dc1 to} C _dc4 .

In principle, since active power flows into or out of the five-level inverter INV2, charging and discharging of the capacitors C _dc2 and C _dc3 is more than charging and discharging of the capacitors C _dc1 and C _dc4 , and the four capacitors C _{dc1 to} C _dc4 The problem arises that the average values of the resulting voltages are not equal.

In order to make all the wave heights between the levels in the AC output equal (uniform), it is necessary to control so that the average values of the DC voltages generated in the capacitors C _{dc1 to} C _dc4 are all equal. Therefore, in Patent Document 1, a voltage-balancing circuit vbc for controlling all the average values of the DC voltages in the capacitors C _{dc1 to} C _dc4 to be equal is connected to the DC side of the five-level inverter INV2. Has been.

In the 5-level inverter INV2 provided in the 5-level power converter, when the output terminal is A, the following (1) to (5) are applied between the terminals AM by the switching modes shown in (1) to (5) below. The five-level voltage shown is output.
(1) When switching elements S11, S12, S13, S14 are on and switching elements S15, S16, S17, S18 are off: “Voltage 2E”
(2) When switching elements S12, S13, S14, S15 are on and switching elements S11, S16, S17, S18 are off: "Voltage E"
(3) When switching elements S13, S14, S15, and S16 are on and switching elements S11, S12, S17, and S18 are off: “Voltage 0”
(4) When switching elements S14, S15, S16, and S17 are on and switching elements S11, S12, S13, and S18 are off: “Voltage-E”
(5) When switching elements S15, S16, S17, and S18 are on, and switching elements S11, S12, S13, and S14 are off: “Voltage-2E”

JP 2010-220364 A JP 2011-72118 A

  In the 5-level power converter of Patent Document 1 shown in FIG. 3, there is a problem that the use of the voltage uniform circuit vbc increases the reactor Lc and the number of elements, leading to an increase in size and cost of the device. Further, the 5-level inverter shown in FIG. 3 has a problem that a large number of clamping diodes are required.

  Further, the circuit shown in FIG. 1 of Patent Document 2 can be configured with eight switching elements and two capacitors. However, the circuit shown in FIG. 1 of Patent Document 2 cannot adjust the voltages of the capacitors C1 and C2, and the output voltage waveform may be distorted. Further, as described in paragraphs [0016] to [0018], a voltage of 2E may be applied to the switching element. In this case, it is necessary to connect two switching elements in series for the reason that a switching element with a high breakdown voltage is used or there is no switching element with a high breakdown voltage. Therefore, when a switching element having a high withstand voltage is used, the cost increases. When two switching elements are connected in series, the number of elements constituting the circuit increases.

  As described above, it is possible to reduce the size and cost of the device by equalizing the average value of the capacitor voltage of each phase without using a voltage uniform circuit, and to reduce the cost of the 5-level power converter with a small number of elements. Realization is a challenge.

  The present invention has been devised in view of the above-described conventional problems, and one aspect thereof is a five-level power converter that generates an AC output obtained by converting a DC voltage into a plurality of voltage levels, and includes a DC voltage source. And third and fourth capacitors sequentially connected in series between the positive and negative terminals of the DC voltage source, and a sixth switching element, a first capacitor, a second capacitor, and a seventh switching element between the positive and negative electrodes of the DC voltage source. A first series circuit connected in series, a first connection point between the common connection point of the sixth switching element and the first capacitor, and a common connection point of the second capacitor and the seventh switching element. A third diode between a second series circuit in which the fourth switching elements are sequentially connected in series, a common connection point between the sixth switching element and the first capacitor, and a common connection point between the second capacitor and the seventh switching element; 9th A third series circuit in which a tenth switching element and a fourth diode are sequentially connected in series, and a common connection point between the first and second switching elements and a common connection point between the third and fourth switching elements are interposed. Fifth and sixth interposed between a common connection point of the first and second diodes, the third diode and the ninth switching element, and a common connection point of the tenth switching element and the fourth diode. A five-level inverter having a diode, and control means for outputting five voltage levels by on-off controlling the first to fourth, sixth, seventh, ninth, and tenth switching elements, A common connection point of the fifth and sixth diodes and a first neutral point of the third and fourth capacitors are connected to be the output terminal B, and a common connection point of the ninth and tenth switching elements. And first and second Second neutral point of the first capacitor, and a common connection point of the second diode is connected, characterized by a second, output terminals A common connection point of the third switching element.

  Also, as one aspect thereof, the on / off control of the control means has a control mode for charging the first and second capacitors and a control mode for discharging when the same voltage level is output.

  Further, as one aspect thereof, the 5-level inverter is provided for each of the U-phase, V-phase, and W-phase, and the output terminal B is commonly connected as the first neutral point of the three-phase 5-level inverter, and the output terminal A Are the output ends of the U-phase, V-phase, and W-phase.

  According to the present invention, the average value of the capacitor voltage of each phase is made equal without using a voltage uniform circuit, thereby reducing the size and cost of the device and realizing a 5-level power converter with a small number of elements. It becomes possible.

It is a circuit block diagram which shows the main circuit of the 5-level power converter in this Embodiment 1. It is a circuit block diagram which shows the main circuit of the 5-level power converter in this Embodiment 2. It is a circuit block diagram which shows the main circuit of the 5-level power converter in patent document 1. FIG.

  Hereinafter, the 5-level power converter according to Embodiments 1 and 2 will be described in detail with reference to FIGS.

[Embodiment 1]
FIG. 1 is a circuit configuration diagram illustrating a main circuit of the five-level power converter 1 according to the first embodiment. As shown in FIG. 1, the 5-level power converter 1 according to the first embodiment has third and fourth capacitors C3 and C4 connected in series between positive and negative terminals of a DC power source V _DC , and the third and fourth capacitors. A common connection point of C3 and C4 is defined as a first neutral point NP. Here, the first neutral point NP is defined as the output terminal B. In the following description, the positive electrode end of the DC power supply V _DC is expressed as P, and the negative electrode end is expressed as N.

  The P to the fifth and sixth switching elements S5 and S6 and the first capacitor C1 are sequentially connected in series. From N, the eighth and seventh switching elements S8 and S7 and the second capacitor C2 are sequentially connected in series. The first and second capacitors C1 and C2 are connected in series, and the fifth and sixth switching elements S5 and S6, the first and second capacitors C1, C2, the seventh and eighth switching elements S7 and S8 1 series circuit is constituted. A common connection point of the first capacitor C1 and the second capacitor C2 is defined as a second neutral point NP ′.

  Here, FIG. 1 shows zero in which two switching elements (the fifth and sixth switching elements S5 and S6 and the seventh and eighth switching elements S7 and S8) are connected in series in consideration of the breakdown voltage. However, in the case where it is used below the breakdown voltage of one switching element, one switching element is sufficient.

  The first, second, third, and fourth switching elements S1, S2, S3, and S4 are sequentially connected in series to form a second series circuit. The first switching element S1 is connected to a common connection point between the sixth switching element S6 and the first capacitor C1, and the fourth switching element S4 is connected to a common connection point between the second capacitor C2 and the seventh switching element S7. Connecting. Here, the middle point of the second series circuit (common connection point of the second and third switching elements S2 and S3) is defined as the output terminal A. Also, the first and second diodes D1 and D2 are inserted between the common connection point of the first and second switching elements S1 and S2 and the common connection point of the third and fourth switching elements S3 and S4. The common connection point of the first and second diodes D1 and D2 is connected to the second neutral point NP ′.

  Further, between the common connection point of the sixth switching element S6 and the first capacitor C1 and the common connection point of the second capacitor C2 and the seventh switching element S7, the third diode D3, the ninth, A third series circuit in which 10 switching elements S9 and S10 and a fourth diode D4 are sequentially connected in series is connected. The common connection point of the ninth switching element S9 and the tenth switching element S10 is connected to the second neutral point NP ′. Between the common connection point of the third diode D3 and the ninth switching element S9 and the common connection point of the tenth switching element S10 and the fourth diode D4, the fifth and sixth diodes D5 and D6 are interposed, The common connection point of the fifth and sixth diodes D5 and D6 is connected to the first neutral point NP.

  A five-level inverter INV1 shown in FIG. 1 includes one DC power source and ten switching elements (if the switching element can withstand a voltage, the fifth, sixth switching elements S5 and S6 and the seventh and eighth switching elements S7, S8 can be one switching element, and there are eight switching elements), six diodes, and two capacitors.

When the voltage of the first and second capacitors C1 and C2 is E, and the voltage of the third and fourth capacitors C3 and C4 is 2E, the five-level power converter 1 includes the switching element S1 By performing ON / OFF control of .about.S10 in accordance with the switching patterns of modes 1 to 7 shown in Table 1 below, five levels of voltages 2E, E, 0, -E, and -2E can be output between the output terminals AB. Further, Table 1 shows a first, presence or absence of the charge and discharge state of the second capacitor C1 and C2 when the current I _A to be output to the output terminal A was positive.

Here, the path of the current I _A between the modes 1 to 7 of the switching pattern of Table 1 and the output terminals A and B will be described.

<Mode 1>
The third, fourth, seventh, eighth, ninth, tenth switching elements S3, S4, S7, S8, S9, S10 are off, the first, second, fifth, sixth switching elements S1, S2, S5 and S6 are turned on, and the current I _A flows through the path of the output terminal B → first neutral point NP → third capacitor C3 → P → S5 → S6 → S1 → S2 → output terminal A. The negative side → positive side of the third capacitor C3 is connected between the output terminals AB, and the voltage between the output terminals A and B is 2E.

<Mode 2>
The first, fourth, seventh, eighth, ninth and tenth switching elements S1, S4, S7, S8, S9 and S10 are off, the second, third, fifth and sixth switching elements S2, S3 S5 and S6 are turned on, and the current I _A is output terminal B → first neutral point NP → third capacitor C3 → P → S5 → S6 → first capacitor C1 → second neutral point NP ′ → D1 → S2. → Flows along the path of output terminal A. Between the output terminals AB, the negative side of the third capacitor C3 → the positive side → the positive side of the first capacitor C1 → the negative side is connected in series, and the voltage between the output terminals AB becomes 2E−E = E. In this mode 2, the first capacitor C1 is charged when the current I _A > 0.

<Mode 3>
The third, fourth, fifth, sixth, seventh, and eighth switching elements S3, S4, S5, S6, S7, and S8 are off, and the first, second, ninth, and tenth switching elements S1, S2, and S8 are off. S9 and S10 are turned on, and the current I _A is output terminal B → first neutral point NP → D5 → S9 → second neutral point NP ′ → first capacitor C1 → S1 → S2 → output terminal A (or current when I _a is negative, flow in a path of the output terminal B → first neutral point NP → D6 → S10 → second neutral point NP' → first capacitor C1 → S1 → S2 → output terminal a). The negative side → positive side of the first capacitor C1 is connected between the output terminals AB, and the voltage between the output terminals AB becomes E. In this mode 3, the first capacitor C1 is discharged when the current I _A > 0.

<Mode 4>
The first, fourth, fifth, sixth, seventh and eighth switching elements S1, S4, S5, S6, S7 and S8 are off, the second, third, ninth and tenth switching elements S2, S3 S9 and S10 are turned on, and the current I _A is output terminal B → first neutral point NP → D5 → S9 → second neutral point NP ′ → D1 → S2 → output terminal A (or current I _A is negative) The output terminal B → the first neutral point NP → D6 → S10 → the second neutral point NP ′ → D2 → S3 → the output terminal A). The voltage between the output terminals AB is sent directly between the output terminals AB via the ninth and second switching elements S9 and S2 (or the tenth and third switching elements S10 and S3 when the current I _A is negative). Becomes 0.

<Mode 5>
The first, second, fifth, sixth, seventh and eighth switching elements S1, S2, S5, S6, S7 and S8 are off, the third, fourth, ninth and tenth switching elements S3, S4 S9 and S10 are turned on, and the current I _A is output terminal B → first neutral point NP → D5 → S9 → second neutral point NP ′ → second capacitor C2 → S4 → S3 → output terminal A (or current when I _a is negative, flow in a path of the output terminal B → first neutral point NP → D6 → S10 → second neutral point NP' → second capacitor C2 → S4 → S3 → output terminal a). Between the output terminals AB, the positive side → the negative side of the second capacitor C2 is connected, and the voltage between the output terminals AB becomes −E. In this mode 5, the second capacitor C2 is discharged when the current I _A > 0.

<Mode 6>
The first, fourth, fifth, sixth, ninth and tenth switching elements S1, S4, S5, S6, S9 and S10 are off, the second, third, seventh and eighth switching elements S2, S3 S7 and S8 are turned on, and the current I _A is output terminal B → first neutral point NP → fourth capacitor C4 → N → S8 → S7 → second capacitor C2 → second neutral point NP ′ → D1 → S2 → output terminal a (or, when the current I _a is negative, the output terminal B → first neutral point NP → fourth capacitor C4 → N → S8 → S7 → second capacitor C2 → second neutral points NP' → D2 → S3 → Output terminal A) Between the output terminals AB, the positive side of the fourth capacitor C4 → the negative side → the negative side of the second capacitor C2 → the positive side is connected in series, and the voltage between the output terminals AB is −2E + E = E. In this mode 6, the second capacitor C2 is charged when the current I _A > 0.

<Mode 7>
The first, second, fifth, sixth, ninth and tenth switching elements S1, S2, S5, S6, S9 and S10 are off, the third, fourth, seventh and eighth switching elements S3, S4 S7 and S8 are turned on, and the current I _A flows through the path of the output terminal B → the first neutral point NP → the fourth capacitor C4 → N → S8 → S7 → S4 → S3 → the output terminal A. Between the output terminals AB, the positive side → the negative side of the fourth capacitor C4 is connected, and the voltage between the output terminals AB is −2E.

  The voltages of the first and second capacitors C1 and C2 are obtained by using switching patterns (Modes 2, 3, 5, and 6 in Table 1) that are charged or discharged when the output voltage of the five-level power converter is E or -E. Can be controlled. That is, although the output voltages of mode 2 and mode 3 are both + E, since the first capacitor C1 can be charged or discharged, the voltage of the first capacitor C1 can be adjusted. Similarly, although the output voltages of mode 5 and mode 6 are both −E, the voltage of the second capacitor C2 can be adjusted because the second capacitor C2 can be charged or discharged.

  Also, as shown in Table 1, the zero voltage switching pattern is one of mode 4, and the total number of switching patterns is smaller than that of a circuit having a plurality of zero voltage switching patterns, and the control load can be reduced. is there.

  As described above, according to the five-level power converter of the first embodiment, the number of elements is smaller than the DC input by the positive electrode, the negative electrode, and the first neutral point obtained by dividing one DC power supply by a capacitor by two ( It is possible to realize a five-level inverter having ten switching elements (eight depending on the breakdown voltage of the element), six diodes, and two capacitors and capable of adjusting the capacitor voltage.

  Further, when the voltage of the first capacitor C1 is zero, the short circuit between P and NP is prevented by four elements of the fifth, sixth switching elements S5, S6, and the third and fifth diodes D3 and D5. Can do. Further, when the voltage of the second capacitor C2 is zero, the short circuit between NP and N is prevented by four elements of the eighth and seventh switching elements S8 and S7, and the fourth and sixth diodes D4 and D6. Can do. For this reason, even if the voltages of the third and fourth capacitors C3 and C4 are 2E, the voltage stress applied to these four elements can be 2E / 4 = E / 2. Applicable to application load.

[Embodiment 2]
FIG. 2 is a circuit configuration diagram showing the five-level power converter 2 in the second embodiment. 2, the same parts as those in FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted. The five-level power converter according to the second embodiment is provided with three levels of the five-level inverter INV1 according to the first embodiment and connected to the Y connection, and has five levels for the three phases U phase, V phase, and W phase. The voltage (2E, E, 0, -E, -2E) can be output.

  The five-level power converter 2 in the second embodiment connects the output terminals B (first neutral points NP) in the first embodiment, and the output terminals A of the respective phases to the output terminals U and V of the three-phase respective phases. , W.

  Each operation of the 5-level inverter INV1 of FIG. 2 is the same as that of the 5-level inverter INV1 of FIG. 2 can output the five-level voltages 2E, E, 0, −E, and −2E to the three phases U, V, and W based on the first neutral point NP. .

  As described above, according to the five-level power converter in the second embodiment, in addition to the effects of the first embodiment, the positive, negative, and first neutral points obtained by dividing one DC power supply by a capacitor into two parts For DC input, 30 switching elements (24 when switching elements S5, S6 and S7, S8 are combined) are 18 diodes and 6 capacitors, and the capacitor voltage of each phase can be adjusted. Application of a three-phase AC output circuit with a possible five-level inverter can be realized.

  Although the present invention has been described in detail only for the specific examples described above, it is obvious to those skilled in the art that various changes and modifications are possible within the scope of the technical idea of the present invention. Such variations and modifications are naturally within the scope of the claims.

For example, in the first and second embodiments, the DC power source V _DC is used as the DC voltage source. However, the AC power source may be a rectified DC voltage.

1, 2, 5 level power converter INV 1, INV 2, 5 level inverter V _DC, DC voltage source S 1 to S 10, 1st to 10th switching element C 1 to C 4, 1st to 4th capacitor 6th diode A, B ... Output terminal

Claims (3)

A five-level power converter that generates an AC output by converting a DC voltage into a plurality of voltage levels,
A DC voltage source;
Third and fourth capacitors sequentially connected in series between the positive and negative terminals of the DC voltage source;
A first series circuit in which a sixth switching element, first and second capacitors, and a seventh switching element are sequentially connected in series between the positive and negative electrodes of the DC voltage source; and a common connection point of the sixth switching element and the first capacitor; A second series circuit in which first, second, third, and fourth switching elements are sequentially connected in series between a common connection point of the second capacitor and the seventh switching element; a sixth switching element; and a first capacitor; A third series circuit in which a third diode, a ninth, a tenth switching element, and a fourth diode are sequentially connected in series between the common connection point of the second capacitor and the common connection point of the second capacitor and the seventh switching element; A first diode, a second diode, a third diode and a ninth switch interposed between a common connection point of the first and second switching elements and a common connection point of the third and fourth switching elements; A five-level inverter having a, a fifth, sixth diode interposed between a common connection point between the common connection point and the tenth switching element and the fourth diode the element,
Control means for outputting five voltage levels by on-off controlling the first to fourth, sixth, seventh, ninth and tenth switching elements;
A common connection point of the fifth and sixth diodes and a first neutral point of the third and fourth capacitors are connected to be the output terminal B, and a common connection point of the ninth and tenth switching elements. And the second neutral point of the first and second capacitors and the common connection point of the first and second diodes, and the common connection point of the second and third switching elements as the output terminal A, 5 level power converter.   2. The 5-level power according to claim 1, wherein the on / off control of the control means has a control mode for charging the first and second capacitors and a control mode for discharging when the same voltage level is output. converter. The 5-level inverter is provided for each of the U phase, V phase, and W phase,
2. The output terminal B is commonly connected as a first neutral point of a three-phase five-level inverter, and the output terminal A is an output terminal of each of a U phase, a V phase, and a W phase. 5. The 5-level power converter according to 2.

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