JP6232944B2 - Multi-level power converter - Google Patents

Description

  The present invention relates to a multilevel power conversion device that generates a plurality of AC outputs converted from a DC voltage source into a plurality of voltage levels.

  As a conventional multilevel power conversion device, for example, a five-level inverter described in Patent Literature 1 and Non-Patent Literature 1 is known. FIG. 16 is a circuit diagram showing a configuration of one phase of the main circuit in the five-level inverter described in Non-Patent Document 1.

  In FIG. 16, C1 and C2 are DC capacitors, C3 is a flying capacitor, and S21 to S28 are switching elements (modules in which diodes are connected in antiparallel with semiconductor switching elements such as IGBTs; the same applies hereinafter).

  A series circuit of switching elements S21 to S24 is connected in parallel to the series body of the DC capacitors C1 and C2. Switching elements S25 to S28 are connected in series between the common connection point of switching elements S21 and S22 and the common connection point of S23 and S24, and the common connection point of switching elements S25 and S26 and the common connection point of S27 and S28. A flying capacitor C3 is connected between the two.

  The common connection point of the DC capacitor C1 and the switching element 21 is the positive terminal P of the DC power supply, the common connection point of the DC capacitor C2 and the switching element S24 is the negative terminal N of the DC power supply, and the common connection point of the DC capacitors C1 and C2. The common connection point of the switching elements S22 and S23 is connected in common to be a neutral point terminal NP, and the common connection point of the switching elements S26 and S27 is an AC terminal R.

  In the 5-level inverter shown in FIG. 16, the switching elements S21 to S28 are turned on and off, and the voltages VC1, VC2, and VC3 of the DC capacitors C1 and C2 and the flying capacitor C3 are VC1 = VC2 = 1 / 2E and VC3. By controlling so that = 1 / 4E, a five-level phase voltage as shown in FIG. 17 can be output between the terminals NP-R.

  A technique regarding voltage control of a DC capacitor is described in Patent Document 2, and a technique regarding voltage control of a flying capacitor is described in Patent Document 3.

  When power conversion is performed from an AC voltage source or AC load to another AC voltage source or AC load, two AC-DC conversion circuits (41, 42) are prepared as shown in FIG. There is a method of realizing an AC-AC power conversion circuit by connecting power sources back to back so as to be a common DC power source (DC capacitor 31) (back-to-back configuration).

  In FIG. 18, the DC capacitor 31 is constituted by a series body of the DC capacitors C1 and C2 of FIG. The AC-DC conversion circuit 41 has a three-phase (41.1, 41.2, 41.3) DC capacitor 31 with an AC / DC converter configured the same as the switching elements S21 to S28 and the flying capacitor C3 of FIG. The neutral point terminals NP are connected in common, and each AC terminal R is connected to each phase of the three-phase voltage source Vs via a reactor L.

  The AC-DC converter circuit 42 has an AC / DC converter configured the same as the switching elements S21 to S28 and the flying capacitor C3 of FIG. 16 for three phases (42.1, 42.2, 42.3) DC capacitor 31. The neutral point terminals NP are connected in common, and the AC terminals R are connected to the respective phases of the three-phase load M.

Japanese Patent No. 4369425 Japanese Unexamined Patent Publication No. 7-75345 Japanese Patent No. 3301761

P. Barbosa, P.A. Steimer, J. et al. Steinke, L.M. Meysenc, M.M. Winkelnkemper, and N.W. Celanovic, “Active-Neutral-Point-Clamped (ANPC) Multilevel Converter Technology” in Proc. of European Conference on Power Electronics and Applications (EPE), pp. 1-10, 2005.

  Of the losses that occur in the power conversion circuit, the conduction loss that occurs in each switching element is determined by the product of the on-resistance when the switching element is on and the square of the current that flows through the switching element. Therefore, as the number of switching elements through which current passes increases, the on-resistance increases, and thus the conduction loss increases with the number of switching elements.

  In a multilevel conversion circuit, the number of switching elements that pass through during power conversion increases in order to realize the function of outputting the multilevel voltage. Therefore, the conduction loss increases in the multilevel conversion circuit.

  When the loss increases, various disadvantages occur such as a reduction in power conversion efficiency, an increase in the size of the device due to an increase in the size of the cooling device, and an increase in cost.

  The present invention solves the above problems, and an object of the present invention is to provide a multilevel power conversion device in which conduction loss of a switching element is reduced.

  The multilevel power conversion device according to claim 1 for solving the above-described problem is constituted by a series body of first and second capacitors to which a DC voltage is applied, and a common connection point of the series body is neutral. A DC voltage source having a dot terminal, a positive electrode terminal as a positive electrode terminal, and a negative electrode terminal as a negative electrode terminal; a first switching element; a first flying capacitor; a second switching element; a third switching element; A circuit in which a flying capacitor and a fourth switching element are sequentially connected in series, wherein a non-connection side end of the first switching element is connected to the positive terminal, and a non-connection side end of the fourth switching element is the negative terminal And a common circuit in which a common connection point of the second and third switching elements is connected to the neutral point terminal and between the both ends of the first flying capacitor And the sixth switching element are connected in series, the seventh and eighth switching elements are connected in series between both ends of the second flying capacitor, and the common connection point of the fifth and sixth switching elements is A first voltage selection circuit configured by connecting ninth and tenth switching elements in series between a common connection point of the seventh and eighth switching elements; and both ends of the first flying capacitor The eleventh and twelfth switching elements are connected in series, the thirteenth and fourteenth switching elements are connected in series between both ends of the second flying capacitor, and the eleventh and twelfth switching elements The fifteenth and sixteenth switching elements are connected in series between the common connection point and the common connection point of the thirteenth and fourteenth switching elements. A second voltage selection circuit configured as described above, and the AC / DC conversion circuit configured by the common circuit, the first voltage selection circuit, and the second voltage selection circuit is a single phase or a multiphase of three or more phases A common connection point of the ninth and tenth switching elements of the first voltage selection circuit of each of the AC / DC conversion circuits is used as a first AC output terminal, and the second voltage selection circuit of each of the AC / DC conversion circuits A common connection point of the fifteenth and sixteenth switching elements is a second AC output terminal, each of the first AC output terminals is connected to a first AC power source via a reactor or a load, and each of the first AC output terminals is connected to a load. Two AC output terminals, when the first AC output terminal is connected to the first AC power source, connected to a load or connected to a second AC power source via a reactor, and the first AC output terminal If the terminal is connected to a load, It is characterized by being connected to one AC power source via a reactor.

  The multilevel power conversion device according to claim 2 is characterized in that any one of the first to sixteenth switching elements is connected in series.

  The multi-level power converter according to claim 3 is characterized in that any one of the first to sixteenth switching elements is connected in parallel.

  ADVANTAGE OF THE INVENTION According to this invention, the conduction loss of a switching element can be reduced in a multilevel power converter device.

  In particular, in a use state where power is equally transferred between two AC power supplies or between one AC power supply and a load, the conduction loss is lower than that of a conventional circuit.

1 is a circuit diagram showing an embodiment of the present invention. The circuit diagram which shows the structure of the common circuit of FIG. The circuit diagram which shows the structure of the voltage selection circuit of FIG. The circuit diagram which shows the structure of the AC / DC converting circuit of FIG. The circuit diagram which shows the principal part structure of FIG. The circuit diagram which shows the principal part structure of FIG. The circuit diagram which shows the example which connected the circuit of FIG. 1 to the three-phase voltage source and the three-phase load. Explanatory drawing which shows the switching pattern and current path in the conventional power converter circuit. The circuit diagram which shows the principal part structure of FIG. Explanatory drawing which shows the electric current path in the case of the state 1 in the circuit of FIG. Explanatory drawing which shows the electric current path in the case of the state 2 in the circuit of FIG. Explanatory drawing which shows the electric current path in the case of the state 3 in the circuit of FIG. In an alternating current-alternating current converter, the explanatory drawing which shows the appearance state of the voltage of the alternating current power supply side and the motor side, a current waveform, and the states 1-3 in the case of condition (a). In an alternating current-alternating current converter, the explanatory diagram which shows the appearance state of the voltage of AC power supply side and a motor side, a current waveform, and the states 1-state 3 in the case of a condition (b). In an alternating current-alternating current converter, explanatory drawing which shows the appearance state of the voltage of AC power supply side and a motor side, a current waveform, and the states 1-3 in the condition (c). The circuit diagram which shows an example of the conventional 5-level inverter. FIG. 17 is a voltage waveform diagram showing phase voltage waveforms in the 5-level inverter of FIG. 16. The circuit diagram which shows an example of the alternating current-alternating-current power converter circuit of the conventional back-to-back structure.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited to the following embodiments. 1 to 4 show an embodiment of a multilevel power conversion device according to the present invention.

  This embodiment shows an example in which AC / DC conversion circuits 4-1, 4-2 and 4-3 for three phases are connected in parallel to the DC capacitor 1 (common DC voltage source). The configuration is not limited to this, and may be a single-phase configuration (a configuration using one DC capacitor 1 and two AC / DC conversion circuits (4)) or a configuration having four or more phases.

  In FIG. 1, a DC capacitor 1 is constituted by a series body of first and second capacitors CDC1 and CDC2, a common connection point of the series body is a neutral point terminal NP, a positive electrode side is a positive electrode terminal P, and a negative electrode side Is the negative terminal N.

  As shown in FIG. 4, the AC / DC conversion circuit 4 includes a common circuit 2, a voltage selection circuit 3.1 (first voltage selection circuit), and a voltage selection circuit 3.2 (second voltage selection circuit). The conversion circuit 4 is connected in parallel to the three-phase (4-1, 4-2, 4-3) DC capacitor 1 as shown in FIG.

  2 and 4, the common circuit 2 includes a first switching element S1, a first flying capacitor CFC1, a second switching element S2, a third switching element S3, a second flying capacitor CFC2, and a fourth switching element SFC. The switching element S4 is a circuit in which the switching elements S4 are sequentially connected in series. The non-connection side end of the switching element S1 is connected to the positive terminal P of the DC capacitor 1 via the terminal 15, and the non-connection side end of the switching element S4 is the terminal 11. The common connection point of the switching elements S2 and S3 is connected to the neutral point terminal NP via the terminal 13.

  The common connection point between the switching element S1 and the flying capacitor CFC1 is a terminal 14 ', the common connection point between the flying capacitor CFC1 and the switching element S2 is a terminal 14, and the common connection point between the switching element S3 and the flying capacitor CFC2 is a terminal 12'. The common connection point of the flying capacitor CFC2 and the switching element S4 is the terminal 12.

  The common circuit 2 of FIG. 2 is provided with common circuits 2-1, 2-2, 2-3 in FIG. 1 as the three phases, switching elements S1-S4, flying capacitors CFC1, CFC2, and terminals 11-15, 12 ', 14' are suffixed with _1, _2, and _3, respectively.

  As shown in FIG. 4, the voltage selection circuit 3 has two voltage selection circuits 3.1 (first voltage selection circuit) and voltage selection circuit 3.2 (first) configured in the same manner with respect to one common circuit 2. 2 voltage selection circuits) are connected in parallel, and FIG. 3 shows one voltage selection circuit.

  In FIG. 4, the voltage selection circuit 3.1 connects the fifth and sixth switching elements S5.1 and S6.1 in series between both ends of the first flying capacitor CFC1 (between the terminals 14 'and 14). The seventh and eighth switching elements S7.1 and S8.1 are connected in series between both ends of the flying capacitor CFC2 (between the terminals 12 'and 12), and the fifth and sixth switching elements S5. 1 and S6.1 between the common connection point (16.1) and the seventh and eighth switching elements S7.1 and S8.1 (17.1). The switching elements S9.1 and S10.1 are connected in series.

  A common connection point of the switching elements S9.1 and S10.1 is a first AC output terminal 18.1.

  The voltage selection circuit 3.2 connects the eleventh and twelfth switching elements S5.2 and S6.2 in series between both ends of the first flying capacitor CFC1 (between the terminals 14 'and 14), and The thirteenth and fourteenth switching elements S7.2 and S8.2 are connected in series between both ends of the flying capacitor CFC2 (between the terminals 12 'and 12), and the eleventh and twelfth switching elements S5.2 and S6 are connected. .2 common connection point (16.2) and the thirteenth and fourteenth switching elements S7.2 and S8.2 between the common connection point (17.2) and the fifteenth and sixteenth switching elements S9. .2, S10.2 are connected in series.

  A common connection point of the switching elements S9.2 and S10.2 is a second AC output terminal 18.2.

  The first voltage selection circuit 3.1 in FIG. 4 is provided with three phases as voltage selection circuits 3.1-1, 3.1-2, 3.1-3 in FIG. S10.1 and terminals 16.1, 17.1, 18.1 are suffixed with _1, _2, and _3, respectively.

  The second voltage selection circuit 3.2 in FIG. 4 is provided with three phases as voltage selection circuits 3.2-1, 32-2, 3.2-3 in FIG. 1, and the switching element S5.2. S10.2 and terminals 16.2, 17.2, and 18.2 are suffixed with _1, _2, and _3, respectively.

  The first AC output terminals 18.1_1, 18.1_2, and 18.1_3 are connected to the R, S, and T phases of the three-phase voltage source Vs through the reactor L, respectively, as shown in FIG. The second AC output terminals 18.2_1, 18.2_2, and 18.2_3 are connected to the U, V, and W phases of the three-phase load M, for example.

  Also, the three-phase load M is applied to the first AC output terminals (18.1_1, 18.1_2, 18.1_3), and the three-phase loads are applied to the second AC output terminals (18.2_1, 18.2_2, 18.2_3). A voltage source Vs may be connected, or a second three-phase voltage source may be connected instead of the three-phase load M.

  The circuit configured as shown in FIG. 1 is an AC-DC power converter having a function of performing AC-DC power conversion between two different three-phase AC power supplies or loads and one DC voltage source. At the same time, it is an AC-AC power converter having a function of performing AC-AC power conversion between two AC power supplies or loads.

  First, the operation and action of each circuit element will be described. The common circuit 2 shown in FIG. 2 includes a DC voltage source (DC capacitor 1) connected between the terminal 15, the terminal 13, and the terminal 11, a DC voltage source using the flying capacitors CFC1 and CFC2, and switching elements S1 to S4. The terminal 14 ′, the terminal 14, the terminal 12 ′, and the terminal 12 have a function of outputting different voltages. The function will be described with reference to FIG. 5 showing the combination of the common circuit 2 and the DC voltage source (DC capacitor 1).

  Consider a case where the capacitor CDC1 is connected between the terminal 15 and the terminal 13 of the common circuit 2 and the capacitor CDC2 is connected between the terminal 13 and the terminal 11, respectively. The voltage across CDC1 is VDC1, the voltage across CDC2 is VDC2, the voltage across CFC1 is VFC1, the voltage across CFC2 is VFC2, and the voltage polarity is in the direction shown. Terminal 13 = terminal NP is set to a reference potential (zero potential). The potential with respect to the NP generated at the terminal 14 ', the terminal 14, the terminal 12', and the terminal 12 depending on the states of the switching elements S1, S2, S3, and S4 is shown in the following Table 1. ignore).

  Switching elements S1 and S2 and S3 and S4 perform complementary operations in order to prevent short circuits between capacitors CDC1 and CDC2 and flying capacitors CFC1 and CFC2. Therefore, there are four switching patterns.

  In pattern 1, the switching elements S1 and S3 are conducted (S2 and S4 are cut off). A potential VDC1 of the terminal 15 (terminal P) is generated at the terminal 14 '. At the terminal 14, the potential of VDC1-VFC1 is generated by subtracting the potential of the flying capacitor CFC1 from VDC1. A potential 0 of the terminal 13 (terminal NP) is generated at the terminal 12 '. The terminal 12 generates a potential of −VFC2 obtained by subtracting the potential of the flying capacitor CFC2 from 0.

  In pattern 2, switching elements S1 and S4 are conducted (S2 and S3 are cut off). A potential VDC1 of the terminal 15 (terminal P) is generated at the terminal 14 '. At the terminal 14, the potential of VDC1-VFC1 is generated by subtracting the potential of the flying capacitor CFC1 from VDC1. The terminal 12 'generates a potential -VDC2 + VFC2 obtained by adding the potential of the terminal 11 (terminal N) -VDC2 to the potential of CFC2. The terminal 12 generates a potential of the terminal 11 (terminal N)-the potential of -VDC2.

  In pattern 3, the switching elements S2 and S3 are conducted (S1 and S4 are cut off). VFC1 is generated at the terminal 14 'by adding the potential of the flying capacitor CFC1 to the potential 0 of the terminal 13 (terminal NP). The terminal 14 generates a potential 0 of the terminal 13 (terminal NP). A potential 0 of the terminal 13 (terminal NP) is generated at the terminal 12 '. The terminal 12 generates a potential of −VFC2 obtained by subtracting the potential of the flying capacitor CFC2 from 0.

  In pattern 4, switching elements S2 and S4 are conducted (S1 and S3 are cut off). VFC1 is generated at the terminal 14 'by adding the potential of the flying capacitor CFC1 to the potential 0 of the terminal 13 (terminal NP). The terminal 14 generates a potential 0 of the terminal 13 (terminal NP). The terminal 12 'generates a potential -VDC2 + VFC2 obtained by adding the potential of the terminal 11 (terminal N) -VDC2 to the potential of CFC2. The terminal 12 generates a potential of the terminal 11 (terminal N)-the potential of -VDC2.

  When the potentials VDC1 and VDC2 of the capacitors CDC1 and CDC2 are 2E, and the potentials VFC1 and VFC2 of the flying capacitors CFC1 and CFC2 are E, the potentials of the terminals in each switching pattern are as shown in Table 2.

By selecting patterns 1 to 4 in Table 2, it is possible to generate three or four potentials among the five potentials 2E, E, 0, -E, and -2E at each terminal. For example, in pattern 1, potentials 2E, E, 0, and -E can be output to four terminals, respectively. However, in these four patterns, there is no pattern in which the potentials of 2E, 0, and -2E are output simultaneously.
Next, the voltage selection circuit 3 in FIG. 3 will be described. This circuit is connected to the terminal 14 ′, the terminal 14, the terminal 12 ′, and the terminal 12 of the common circuit 2, and has a function of selecting any one of the potentials generated at these four terminals and outputting the selected potential to the terminal 18. Have. Switching elements S5 and S6, S7 and S8, and S9 and S10 perform complementary operations, respectively. Table 3 shows the pattern of the voltage output to each switching element and the terminal 18.

  By the patterns 1 to 4 in Table 3, the terminal 14 ′, the terminal 14, the terminal 12 ′, and the terminal 12 are connected to the terminal 18. In the patterns 1 and 2, the switch states of the switching elements S7 and S8 are not questioned. In the patterns 3 and 4, the state of the switching elements S5 and S6 is not questioned, but by selecting as shown in Table 3, it is possible to suppress an excessive voltage from being applied to the switching elements that are turned off. it can.

  Next, the operation of the AC / DC converting circuit 4 configured by combining FIG. 2 and FIG. 3 will be described with reference to FIG. FIG. 6 shows the parts of the AC / DC converter circuit 4 and the DC capacitor 1, and the same parts as those in FIGS. 4 and 5 are indicated by the same reference numerals.

  A terminal P, a terminal NP, and a terminal N of a DC voltage source (DC capacitor 1) including capacitors CDC1 and CDC2 are connected to the terminal 15, the terminal 13, and the terminal 11 of the common circuit 2, respectively. The voltages of the capacitors CDC1, CDC2 are VDC1, VDC2, and the voltages of the flying capacitors CFC1, CFC2 of the common circuit 2 are VFC1, VFC2.

  The following description will be made when VDC1 and VDC2 are set to + 2E and VFC1 and VFC2 are set to + E. The potential of the neutral point terminal NP is set as a reference potential, the output voltages of the AC output terminals 18.1 and 18.2 are V1 and V2, and the output currents are I1 and I2. The directions of the currents I1 and I2 are positive in the direction shown in FIG.

  Table 4 shows the relationship between the switching pattern of each switching element and the output voltage of the AC output terminals 18.1 and 18.2.

  In Table 4, 48 switching patterns can be selected. The numbers of the switching patterns of the common circuit 2 and the voltage selection circuit 3 apply the relationship between the switching pattern numbers in Tables 2 and 3 and the switch state.

  The charging / discharging columns of the flying capacitors CFC1 and CFC2 indicate whether the flying capacitor is charged or discharged and which output current is involved in charging / discharging when each switching pattern is selected. The charge / discharge polarity indicates the case where the AC output currents I1 and I2 are positive (in the direction of the arrows in FIG. 6).

  Two examples of how to read the charge / discharge train are presented. In the case of pattern 10, the column “CFC1 charge / discharge” is charged I1 and the column “CFC2 charge / discharge” is charged I2, which is charged CFC1 by the current I1 and charged CFC2 by the current I2. Means that. When the polarity of I1 is negative, CFC1 is discharged by the current I1. In the pattern 13, the “CFC1 charge / discharge” column has a discharge I1 + I2, and the “CFC2 charge / discharge” column has a “−” (hyphen). Does not occur. If the polarity of I2 is negative, CFC1 will be charged by the current I1-I2, and if | I1 | <| I2 |, CFC1 will be discharged.

  Originally, there are 25 combinations (5 levels × 5 levels) of output voltages of the output terminals 18.1 and 18.2, but there are 48 switching patterns. This is because there are two patterns of current paths when outputting + E, -E, 0. Due to this redundant switching pattern, the charging / discharging state of the flying capacitors CFC1, CFC2 may change even with the same voltage output.

  As described above, the AC / DC converter circuit can output an arbitrary multi-level AC voltage to each output terminal, and can select the charging / discharging of the flying capacitor.

  Next, the operation and action of the circuit of FIG. 1 will be described based on the configuration example of FIG. In the circuit configuration of FIG. 7, three AC / DC conversion circuits are connected in parallel to the DC capacitor 1 constituting the DC voltage source, and further, for example, AC output terminals (18.1_1, 18.1_2, 18.1_3 or 18.2_1, 18.2_2, 18.2_3), one is connected to the three-phase voltage source Vs and the other is connected to the three-phase load M (motor).

  Here, each of the AC / DC converting circuits 4-1, 4-2, 4-3 outputs an arbitrary five-level voltage to two AC output terminals included in each according to FIG. 6 and Table 2, Table 3, and Table 4. It has been shown that it is possible.

  It is also obvious that there is no limit on the selection of the output voltage level between the AC / DC conversion circuits. Therefore, in the circuit of FIG. 1, arbitrary five-level voltages can be output to the six AC output terminals (18.1_1, 18.1_2, 18.1_3, 18.2_1, 18.2_2, 18.2_3), respectively.

  In actual application, various controls such as voltage / current control of the converter connected to the three-phase voltage source Vs and the three-phase load M, voltage control of the flying capacitor, neutral point control of the DC voltage source (DC capacitor 1) In addition, auxiliary circuits such as a snubber and a reactor filter are necessary, but since these are existing technologies, they are not described here.

  Next, conduction loss will be described. Here, a circuit that performs three-phase AC-three-phase AC conversion is considered.

  As an example of an existing AC-AC power conversion circuit capable of outputting a five-level AC voltage, as shown in FIG. 18, a three-phase power conversion circuit using three phases of the five-level inverter of FIG. A circuit connected to the back-to-back on the side. When the withstand voltage of the element and the capacitance of the capacitor are not taken into consideration, the circuit of FIG. 18 includes 48 switching elements and 6 flying capacitors. On the other hand, the circuit of this embodiment shown in FIG. 7 is also composed of 48 switching elements and 6 flying capacitors. Therefore, the output voltage level and the number of circuit elements are the same.

  Next, consider the conduction loss in these two circuit configurations. First, consider the conventional power conversion circuit shown in FIG. FIG. 8 shows a switching pattern and a current path for each phase of the power conversion circuit. FIG. 8 shows a circuit of, for example, the AC / DC converting unit 42.1 in FIG. 18, and the same reference numerals as those in FIG. 16 are assigned to the respective components in FIG.

  In all the switching patterns of FIGS. 8A to 8H, the number of switching elements through which a current passes is three. Therefore, the conduction loss p generated at this time can be expressed by the following equation (1).

P = i ² × (3 × R _ON ) (1)
Here, i is the current flowing in the current path of FIG. 8, and R _ON is the on-resistance of the switching element. Here, it is assumed that all the switching elements have the same on-resistance. Further, it is assumed that the on-resistance of the gate drive element portion inside the switching element is equal to the on-resistance of the antiparallel diode portion.

  Next, consider the conduction loss of the circuit of the present invention. FIG. 9 shows an AC / DC conversion circuit for one phase in the circuits of FIGS. 1 and 7 of the present invention. 9, the same parts as those in FIG. 6 are denoted by the same reference numerals.

  Considering the conduction loss of this circuit, the circuit is divided into three states depending on the states of the voltages V1 and V2 of the two output terminals 18.1 and 18.2 and the polarity of the current. Table 5 shows the three states.

<State 1>
An example of the current path in the state 1 is shown in FIG. FIG. 10 shows an example of the state 1 in Table 5 when V1> 0, V2> 0, I1> 0, and I2> 0. FIG. 10A shows a pattern in which the switching element S2 is off and the switching elements S1, S5.1, S5.2, S9.1, and S9.2 are on, and FIG. 10B shows the switching element S1. Is a pattern in which switching elements S2, S6.1, S6.2, S9.1, and S9.2 are on.

  In FIG. 10, since the output currents I1 and I2 have the same polarity, a current obtained by adding | I1 | and | I2 | flows through the switching element S1 or S2. Therefore, the conduction loss at this time can be expressed by the following equation (2).

P = I ₁ ² × (2 × R _ON ) + I ₂ ² × (2 × R _ON ) + (| I ₁ | + | I ₂ |) ² × R _ON (2)
<State 2>
An example of the current path in the state 2 is shown in FIG. FIG. 11 shows an example of the state 2 in Table 5 where V1> 0, V2> 0, I1 <0, and I2> 0. FIG. 11A shows a pattern in which the switching element S2 is off and the switching elements S1, S5.1, S5.2, S9.1, and S9.2 are on, and FIG. 11B shows the switching element S1. Is a pattern in which switching elements S2, S6.1, S6.2, S9.1, and S9.2 are on.

  In FIG. 11, since the output currents I1 and I2 have different polarities, a current obtained by subtracting | I2 | from | I1 | flows through the switching element S1 or S2. Therefore, the conduction loss at this time can be expressed by the following equation (3).

P = I ₁ ² × (2 × R _ON ) + I ₂ ² × (2 × R _ON ) + (| I ₁ | − | I ₂ |) ² × R _ON (3)
<State 3>
An example of the current path in the state 3 is shown in FIG. FIG. 12 shows an example of the state 3 in Table 5 where V1> 0, V2 <0, I1 <0, I2> 0, and the current I1 is the switching element S9.1, S5.1, S1. The current I2 flows through each antiparallel diode part, and the current I2 flows through each antiparallel diode part of the switching elements S4, S8.2, and S10.2.

  In state 3, the current path I1 and the current path I2 do not interfere with each other. Therefore, the conduction loss at this time can be expressed by the following equation (4).

P = I ₁ ² × (3 × R _ON ) + I ₂ ² × (3 × R _ON ) (4)
The conduction loss in the above three states is compared with the conduction loss in the conventional circuit shown in FIG. In order to match the current / voltage conditions in the conventional circuit and the circuit of the present invention, it is assumed that the conventional circuit is a two-phase AC / DC converter circuit similar to the circuit of the present invention and has the same currents I1 and I2.

  The two-phase conduction loss of the conventional circuit is expressed by the following formula (5) in any voltage state.

P = I ₁ ² × (3 × R _ON ) + I ₂ ² × (3 × R _ON ) (5)
A comparison of the loss of equation (5) with the loss in each state of the circuit of the present invention is as follows.

  -Compared with Formula (2) which is the conduction | electrical_connection loss of this invention circuit in the state 1, the conduction | electrical_connection loss becomes larger in this invention circuit.

  -Compared with Formula (3) which is the conduction | electrical_connection loss of this invention circuit in the state 2, the conduction | electrical_connection loss of this invention circuit becomes small.

  -Compared with Formula (4) which is a conduction loss of the circuit of the present invention in the state 3, the conduction loss of the circuit of the present invention and the conventional circuit is the same.

  Next, in the AC-AC converter, the circuit of the present invention shows which of the states 1, 2, and 3 is dominant.

The AC-AC converter performs an operation of transferring power from an AC power supply (load) to an AC power supply (load) having a different frequency and voltage. At that time, in general, both power factors are controlled to be close to unity. Therefore, the three-phase AC power supply (Vs) and the three-phase AC are connected to the two three-phase AC terminals (18.1_1, 18.1_2, 18.1_3 and 18.2_1, 18.2_2, 18.2_3) shown in FIG. the case of connecting the motor (M) as shown, the frequency of the AC power source 50H _Z, the frequency of the motor at 40H _Z, described conduction loss when the following conditions (a).

<Condition (a): Power factor of AC power supply side converter = 1, Power factor of motor side converter = 1>
The relationship between each voltage and current under this condition is as shown in FIG. The upper stage of FIG. 13 is the voltage V1 and current I1 on the AC power supply side, and the lower stage is the voltage V2 and I2 on the motor side. As can be seen in FIG. 13, only conditions 2 and 3 exist under condition (a). This is because when the power factor of the AC power supply side converter is 1 and the power factor of the motor side converter is 1, V1 and I1 are always opposite in polarity, and V2 and I2 are always the same polarity. This is because the state 1 cannot exist as can be seen from Table 5.

  Therefore, under this operating condition, the conduction loss is lower than that of the conventional circuit. This is the same even when the motor is operated at a frequency other than 40 Hz.

  As described above, generally, in an AC-AC converter, the power factor of the AC power supply side converter is controlled to be close to 1 and the power factor of the motor side converter is close to 1, so that the condition (a) Sometimes reducing the conduction loss is a big effect.

  For reference, conditions other than the power factor of the motor-side converter = 1 (conditions (b) and (c)) will also be described.

<Condition (b): AC power source side converter power factor = 1, motor side converter power factor = lag 0.8>
The relationship between each voltage and current under these conditions is as shown in FIG. In FIG. 14, the state 1 region in which the loss is increased as compared with the conventional converter appears. Therefore, the conduction loss is increased as compared with the condition (a). However, the state 2 region is wider and dominant than the state 1 region. Therefore, the conduction loss generally decreases as compared with the conventional circuit under the same conditions.

<Condition (c); power factor of AC power supply side converter = 1, power factor of motor side converter = 0>
The relationship between each voltage and current under this condition is as shown in FIG. In FIG. 15, the state 1 region where the conduction loss increases and the state 2 region where the conduction loss decreases appear evenly with respect to the conventional converter. Therefore, the conduction loss is almost the same as that of the conventional circuit under the same conditions.

  As a reference, Table 6 shows the calculation results of the conduction loss of the converter under each of the above conditions (a) to (c). The current value, the on-resistance value of the switching element, and the like were calculated by setting predetermined conditions.

  In this embodiment, the motor load is taken as an example, but the present invention can be applied to other loads. The circuit of FIG. 1 has a three-phase configuration, but can be applied to a single-phase configuration in which the AC / DC converter circuits are only 4-1 and 4-2. Further, in terms of the withstand voltage or current resistance of the switching element, the number of series switching elements in the circuit of FIG.

DESCRIPTION OF SYMBOLS 1 ... DC capacitor 2-1, 2-2, 2-3 ... Common circuit 3.1-1, 3.1-2, 3.1-3, 32-1, 3.2-2, 3. 2-3 ... Voltage selection circuit 4-1, 4-2, 4-3 ... AC / DC conversion circuit CDC1, CDC2 ... Capacitor CFC1, CFC2 ... Flying capacitor S1-S4, S5.1-S10.1, S5.2-S10 .2 ... Switching element Vs ... Three-phase voltage source M ... Three-phase load L ... Reactor

Claims (3)

DC voltage composed of a series body of first and second capacitors to which a DC voltage is applied, the common connection point of the series body being a neutral point terminal, the positive electrode side being a positive electrode terminal, and the negative electrode side being a negative electrode terminal The source,
A circuit in which a first switching element, a first flying capacitor, a second switching element, a third switching element, a second flying capacitor, and a fourth switching element are sequentially connected in series, the first switching element The non-connection side end of the second switching element is connected to the positive terminal, the non-connection side end of the fourth switching element is connected to the negative terminal, and the common connection point of the second and third switching elements is the neutral point terminal A connected common circuit;
Fifth and sixth switching elements are connected in series between both ends of the first flying capacitor, and seventh and eighth switching elements are connected in series between both ends of the second flying capacitor; A first voltage formed by connecting ninth and tenth switching elements in series between a common connection point of the fifth and sixth switching elements and a common connection point of the seventh and eighth switching elements; A selection circuit;
The eleventh and twelfth switching elements are connected in series between both ends of the first flying capacitor, the thirteenth and fourteenth switching elements are connected in series between both ends of the second flying capacitor, and the first A second voltage formed by connecting the fifteenth and sixteenth switching elements in series between the common connection point of the eleventh and twelfth switching elements and the common connection point of the thirteenth and fourteenth switching elements; And a selection circuit,
An AC / DC conversion circuit constituted by the common circuit, the first voltage selection circuit, and the second voltage selection circuit is provided for a single phase or for three or more phases.
The common connection point of the ninth and tenth switching elements of the first voltage selection circuit of each of the AC / DC conversion circuits is a first AC output terminal, and the fifteenth and second of the second voltage selection circuits of the respective AC / DC conversion circuits are The common connection point of the sixteenth switching element is the second AC output terminal,
Each of the first AC output terminals is connected to a first AC power source via a reactor or connected to a load, and each of the second AC output terminals is connected to the first AC power source. When connected, it is connected to a load or connected to a second AC power source via a reactor, and when the first AC output terminal is connected to a load, it is connected to the first AC power source via a reactor. A multi-level power conversion device characterized by that.   The multilevel power conversion device according to claim 1, wherein any one of the first to sixteenth switching elements is connected in series.   The multilevel power conversion device according to claim 1 or 2, wherein any one of the first to sixteenth switching elements is connected in parallel.

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