JP5885904B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device having a through via and a manufacturing method thereof.

  Recently, a through silicon via (TSV) has been attracting attention as a next-generation semiconductor mounting technology that can simultaneously achieve miniaturization, high integration, and high performance of a semiconductor device.

  TSV is an electrode or wiring that penetrates the semiconductor chip vertically. By stacking a plurality of chips and connecting the chips with each other by TSV, it is possible to easily realize a reduction in size, capacity, and performance of a three-dimensional integrated circuit.

  In general, TSV processing is performed in accordance with the sequence of steps in a wafer process, via-first performed before a wiring process (BEOL: Back End Of Line), and via performed after BEOL.・ It can be divided into two types: Via-Last. Via First is advantageous for microfabrication of TSV, and it is easy to reduce the via diameter and to form a large number (thousands or more) of TSVs, but the via conductor has a high resistivity. There is a restriction that it is limited to silicon. On the other hand, it is difficult to reduce the via diameter and increase the number of TSVs in the via last, but the advantage that Cu having low resistivity can be used for the via conductor and the degree of freedom in design are large. There are advantages.

  The TSV processing process basically includes a step of forming a via in a silicon substrate, a step of cutting the back surface of the silicon substrate until the bottom of the via is exposed, and a thin plate, and laminating the silicon substrates together to electrically And a step of physically connecting.

Among them, the via forming step includes, more specifically, a step of forming a hole in the silicon substrate, a step of forming an insulating film on the inner wall of the hole, and a step of embedding a conductor in the hole. . Here, etching or laser beam processing is used for drilling. The insulating film formed on the inner wall of the hole is for partitioning the via conductor from Si of the substrate, and is a silicon oxide film (SiO) deposited by a chemical vapor deposition (CVD) method. ₂ ) is common. For embedding the conductor, CVD is used in the case of polysilicon (via first), and plating is used in the case of Cu (via last).

  In the process of thinning the substrate (via bottom exposure), the back surface of the silicon substrate is ground using a special grindstone. At this time, a support member having substantially the same shape as the wafer is bonded to the front surface of the silicon substrate so that the silicon substrate can withstand polishing even if the silicon substrate is gradually thinned by gliding.

  After the gliding, the silicon substrate is lightly washed, and bumps made of Cu or solder are attached to the upper and lower ends of the via, and the silicon substrates are aligned and the TSV is electrically connected.

JP2009-10311A

In conventional TSV processing, during the thinning (via bottom exposure) process, the back surface of the silicon substrate is inevitably subjected to external stress due to gliding, and scratches such as lattice defects are attached to the back surface of the substrate. The problem is that the insulating film (SiO ₂ film) on the side wall near the bottom of the via is also easily damaged.

In the conventional TSV processing, the insulating film (SiO ₂ ) on the inner wall of the via is formed by low-temperature film formation using a high-frequency capacitively or inductively coupled plasma CVD apparatus using a TEOS-O ₂ gas as a reaction gas. However, it has a problem that it contains a large amount of impurities such as Si—OH and Si—H, is hygroscopic and has poor film quality.

  As described above, if the insulating film on the inner wall or side wall of the via is damaged or defective, the leakage current and the crosstalk increase, the device characteristics become unstable, and the reliability of the TSV mounting technology is impaired.

  The present invention has been made in view of the above-described problems of the prior art, and is capable of manufacturing a semiconductor device that does not cause damage or defects around the through via on the back surface side of the semiconductor substrate or greatly reduces it. Provide a method.

  Furthermore, the present invention provides a semiconductor device with improved electrical characteristics around the through via.

The method of manufacturing a semiconductor device according to the present invention uses a first step of opening a hole in a semiconductor substrate at a desired depth from the device formation surface side , and a processing gas containing TEOS on the inner wall of the hole. And a second step of forming a silicon oxide film by a microwave-excited plasma CVD method using a microwave discharge using a radial line slot antenna, and a silicon oxide film formed on the inner wall of the hole as a processing gas. A third step of forming a silicon oxynitride film by nitriding by a microwave-excited plasma nitriding method using a mixed gas containing an active gas and NH ₃ gas or N ₂ gas and using a radial line slot antenna for microwave discharge; fourth step and, 20 to 30 wt% of hydrofluoric acid and 40 to 20 wt% nitric acid and 5 to 15 wt% acetic acid for embedding conductors in the hole By wet etching using etch rate and 30 [mu] m / min or more by using an etchant containing, and a fifth step of grinding the back surface of the semiconductor substrate until the conductor is exposed.

In the method for manufacturing a semiconductor device, a process gas containing TEOS is used for a hole formed in a semiconductor substrate, a radial line slot antenna is used for plasma generation, and microwave excitation plasma CVD using microwave discharge is used. A silicon oxide film is formed. This silicon oxide film (plasma TEOS film) has few impurities and low hygroscopicity. Next, using a mixed gas containing an inert gas and NH ₃ gas or N ₂ gas, the silicon oxide film is nitrided by a microwave-excited plasma nitridation method using a radial line slot antenna for microwave discharge to form silicon nitride An oxide film is used. Thereby, a silicon nitride oxide film of the hole wall of the through electrode in the wet etching grinding the back surface of the semiconductor substrate in the next step is difficult to cause difficulty rather by damage or defects melted when exposed to the etchant for less hygroscopic . As a result, damage or defects around the through vias on the back side of the semiconductor substrate can be prevented or greatly reduced. In the wet etching step, an etching solution containing 20 to 30% by weight of hydrofluoric acid, 40 to 20% by weight of nitric acid and 5 to 15% by weight of acetic acid is used to etch at 30 μm / min or more. Speed can be achieved.

  According to the method for manufacturing a semiconductor device of the present invention, damage and defects can be prevented or greatly reduced around the through via on the back surface side of the semiconductor substrate by the configuration and operation as described above. In addition, the semiconductor device according to the present invention can improve the electrical characteristics around the through via with the above-described configuration.

It is sectional drawing which shows one step of the TSV processing process in one Embodiment of this invention. It is a longitudinal cross-sectional view which shows one stage of the TSV processing process in embodiment. It is a longitudinal cross-sectional view which shows one stage of the TSV processing process in embodiment. It is a longitudinal cross-sectional view which shows one stage of the TSV processing process in embodiment. It is a longitudinal cross-sectional view which shows one stage of the TSV processing process in embodiment. It is a longitudinal cross-sectional view which shows one stage of the TSV processing process in embodiment. It is a longitudinal cross-sectional view which shows one stage of the TSV processing process in embodiment. It is a longitudinal cross-sectional view which shows one stage of the TSV processing process in embodiment. It is a partial cross section side view which shows the main structures of the single wafer type wet etching apparatus which can be used for the said TSV processing process. It is a longitudinal cross-sectional view which shows the structure of the microwave plasma CVD apparatus which can be used for the said TSV processing process. It is a top view which shows the structure of RLSA with which the said microwave plasma CVD apparatus is equipped.

  Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

  First, a series of steps of a TSV machining process according to an embodiment of the present invention will be described with reference to FIGS. This TSV processing process is via last.

  In the case of via last, a substrate process or a front process (FEOL: Front End Of Line) and a wiring process or a post process (BEOL) have been completed prior to TSV processing. As shown in FIG. A semiconductor element 12 such as a transistor is formed on the front surface of the silicon wafer 10, that is, the device formation surface, and a multilayer wiring structure 14 is formed on the device formation surface.

  In this embodiment, as shown in FIG. 2, a hole 16 is first drilled to a desired depth at a desired position from the front surface of the substrate, that is, the device forming surface side, as shown in FIG. For this drilling, dry etching or laser beam processing can be used. In the case of dry etching, the hole 16 can be formed with a high aspect ratio with high anisotropy by selectively removing only Si at the bottom of the via while protecting the via sidewall with a polymer film by a so-called Bosh process. In terms of size, for example, the thickness A of the silicon substrate 10 is usually about 700 μm, while the depth B of the hole 16 is selected to be 80 to 120 μm, and the diameter C of the hole 16 is selected to be 20 to 50 μm.

Next, as shown in FIG. 3, a silicon oxide film (SiO ₂ ) 18 is formed as an insulating film on the main surface of the silicon substrate 10 including the inner wall of the hole 16. The step of forming the silicon oxide film 18 is one of the features in this embodiment, and is performed by a microwave plasma CVD apparatus equipped with a radial line slot antenna (RLSA) as will be described in detail later. Is called.

  Next, as shown in FIG. 4, on the main surface of the silicon substrate 10 including the inner wall of the hole 16, that is, on the silicon oxide film 18, for example, a TiN layer 20 for preventing diffusion and a Cu seed layer for a plating electrode. 22 are sequentially stacked by sputtering.

  Then, as shown in FIG. 5, Cu is embedded in the hole 16 as the via conductor 24 by electrolytic plating. As shown in FIG. 6, the Cu plating protruding from the hole 16 is removed by chemical mechanical polishing (CMP), and the main surface of the silicon substrate 10 is flattened.

Next, as shown in FIG. 7, the back surface of the silicon substrate 10 is shaved until the bottom of the hole 16, that is, the bottom of the Cu via conductor 24 is exposed, and the silicon substrate 10 is thinned to a thickness of about 100 μm. This process of thinning the wafer or exposing the bottom of the via is also one of the features in this embodiment. As will be described in detail later, a mixed solution of HF, HNO ₃ and carboxylic acid (for example, acetic acid) is used as a chemical solution. This is performed by a single wafer type wet etching apparatus.

  Next, as shown in FIG. 8, metal bumps 26 and 28 made of, for example, Cu or solder are formed or attached to the upper end (front surface side) and the lower end (back surface side) of the Cu via conductor 24, respectively. Although not shown, when a plurality of silicon substrates are stacked vertically, these metal bumps 26 and 28 are respectively connected to corresponding bumps of other silicon substrates. The wiring in the multilayer wiring structure 14 is also electrically connected to the Cu via conductor 24 or the bumps 26 and 28.

  FIG. 9 shows a configuration of a main part of a single wafer type wet etching apparatus that can be suitably used in the wafer thinning step (FIG. 7) in the above-described TSV processing process.

  In this wet etching apparatus, a rotary stage 32 is installed at the center of the inner side of the annular cup 30, and the silicon substrate 10 is placed on the rotary stage 32 in an upside down posture (post substrate upside). The silicon substrate 10 is held by a mechanical or vacuum chuck mechanism (not shown) provided in the above. Then, while the silicon substrate 10 is spin-rotated at an appropriate rotation speed (for example, 500 rpm) integrally with the rotation stage 32 by the rotation drive unit 34 via the rotation shaft 36, the chemical solution, that is, the etching solution is supplied from the nozzle 38 disposed above the silicon substrate 10. It sprays on the upper surface (back surface) of the silicon substrate 10 at a predetermined flow rate (for example, 100 ml / min). At this time, the arm 40 supporting the nozzle 38 may be swung or swung to reciprocate the nozzle 38 in the radial direction of the silicon substrate 10.

  Gases and dissolved substances (reaction products) generated by the reaction on the silicon substrate 10 are scattered around the rotary stage 32 and guided to the bottom of the cup 30, and the drainage is discharged from the drain port 42 to the drain tank (see FIG. The exhaust gas is sent from the exhaust port 44 to an exhaust device (not shown).

In this embodiment, a mixed liquid of HF (hydrofluoric acid), HNO ₃ (nitric acid), and CH ₃ COOH (acetic acid) is used as the etching liquid. Here, HF and HNO ₃ are directly involved in the oxidation / reduction reaction of Si etching. That is, Si of the silicon substrate 10 reacts with HNO ₃ and is oxidized to become SiO ₂ (NOx gas is generated at that time). The intermediate product SiO ₂ reacts with HF to become H ₂ SiF ₆ and dissolves in the liquid. Thus, while HNO ₃ controls the oxidation reaction of Si, HF controls the reduction or dissolution reaction of SiO ₂ , and the two are in a trade-off relationship. Therefore, CH ₃ COOH is added to balance the oxidation reaction and the reduction reaction.

In order to increase the overall etching rate in such a wet etching mechanism, the mixing ratio of HF, HNO ₃ , and CH ₃ COOH is important. When the present inventor repeated a number of experiments using the single wafer type wet etching apparatus as described above, HF is 20 to 30% by weight, HNO ₃ is 40 to 20% by weight, and CH ₃ COOH is 5 to 5%. It was confirmed that 15% by weight was the optimum mixing ratio. The flow rate of the etching solution supplied from the nozzle 38 onto the silicon substrate 10 is preferably selected to be an optimum value in terms of both etching efficiency and cost. For example, for a silicon substrate 10 having a 300 mm aperture, the flow rate is 100 ml. A range of / min to 500 ml / min is preferable.

The wafer thinning process in this embodiment replaces the Si polishing process, which reduces the thickness of the silicon substrate 10 from, for example, about 700 μm to about 100 μm, from the conventional gliding method to the wet etching method. Therefore, it is necessary to increase the etching rate as much as possible. For this purpose, the above-described single wafer type wet etching apparatus is used to improve the metabolism of the treatment liquid on the silicon substrate 10, and HF, HNO ₃ and CH ₃ COOH as described above are mixed at a predetermined mixing ratio. By using the contained etching solution, an etching rate of 30 μm / min or more can be achieved.

FIG. 10 shows the configuration of a microwave plasma CVD apparatus that can be suitably used in the step of forming a silicon oxide film (SiO ₂ film) 18 on the inner wall of the hole 16 (FIG. 3) in the TSV processing process described above.

  This microwave plasma CVD apparatus has a cylindrical vacuum chamber (processing vessel) 50 made of metal such as aluminum or stainless steel. The chamber 50 is a safety ground.

  A disc-shaped susceptor 52 on which a silicon substrate 10 to be processed is placed is horizontally disposed as a substrate holding table that also serves as a high-frequency electrode, in the lower center of the chamber 50. The susceptor 52 is made of, for example, aluminum, and is supported by an insulating cylindrical support portion 54 that extends vertically upward from the bottom of the chamber 50.

  An annular exhaust path 58 is formed between the conductive cylindrical support section 56 extending vertically upward from the bottom of the chamber 50 along the outer periphery of the cylindrical support section 54 and the inner wall of the chamber 50. An annular baffle plate 60 is attached to the top or the inlet, and an exhaust port 62 is provided at the bottom. Each exhaust port 62 is connected to an exhaust device 66 having a vacuum pump via an exhaust pipe 64.

  A coolant, for example, a fluorine-based liquid CW, having a predetermined temperature is circulated and supplied from a chiller unit (not shown) to the coolant chamber or coolant passage 68 formed, for example, in an annular shape inside the susceptor 52 via pipes 70 and 72. . On the upper surface of the susceptor 52, an electrostatic chuck 74 for holding the silicon substrate 10 with electrostatic attraction is provided. A heat transfer gas such as He gas from a heat transfer gas supply unit (not shown) is supplied between the upper surface of the electrostatic chuck 74 and the back surface of the silicon substrate 10 via the gas supply pipe 76. When the switch 78 of the electrostatic chuck 74 is turned on, the silicon substrate 10 can be attracted and held on the electrostatic chuck 74 by an electrostatic attracting force by a direct current voltage from the direct current power source 80.

  A resistance heating element 75 for heater is also enclosed in the insulator of the electrostatic chuck 74, and the resistance heating element 75 generates heat upon receiving electric power from the heater power source 77.

  Thus, the silicon substrate 10 on the susceptor 52 is maintained at a desired set temperature within a range of 200 ° C. to 350 ° C., for example, under a balance between cooling via the heat transfer gas and heating by the heater 75. ing.

  In this microwave plasma CVD apparatus, as a part of the plasma generation mechanism, a dielectric window 82 made of a dielectric material such as quartz or alumina for introducing microwaves is hermetically sealed on a ceiling surface facing the susceptor 52 of the chamber 50. It is attached. The dielectric window 82 constitutes a disc-shaped RLSA 86 having a large number of concentrically distributed slots by being integrally coupled to a conductor radiation plate 84 attached or disposed on the upper surface thereof. The RLSA 86 is electromagnetically coupled to the microwave transmission line 90 via a dielectric plate 88 made of a dielectric such as quartz or alumina. The dielectric plate 88 has a function of shortening the wavelength of the microwave propagating through the dielectric plate 88.

  The microwave transmission line 90 is a line for transmitting the microwave output from the microwave generator 92 to the RLSA 86, and includes a waveguide 94, a waveguide-coaxial tube converter 96, and a coaxial tube 98. Yes. The waveguide 94 is, for example, a rectangular waveguide, and transmits the microwave from the microwave generator 92 toward the chamber 50 to the waveguide-coaxial tube converter 96 using the TE mode as a transmission mode.

  The waveguide-coaxial tube converter 96 couples the terminal end of the rectangular waveguide 94 and the starting end of the coaxial tube 98 to convert the transmission mode of the rectangular waveguide 94 into the transmission mode of the coaxial tube 98.

  The coaxial tube 98 extends vertically downward from the waveguide-coaxial tube converter 96 to the center of the upper surface of the chamber 50, and the end or lower end of the coaxial line is coupled to the RLSA 86 via the dielectric plate 88. The outer conductor 100 of the coaxial tube 98 is a cylindrical body, and the microwave propagates in the space between the inner conductor 102 and the outer conductor 100 in the TEM mode.

  The microwave output from the microwave generator 92 propagates through the microwave transmission line 90 including the waveguide 94, the waveguide-coaxial tube converter 96, and the coaxial tube 98 as described above, and the dielectric plate. The RLSA 86 is powered through 88. Then, the microwave spread in the radial direction by the dielectric plate 88 is ionized by nearby gas by the microwave power radiated from the slots of the antenna toward the chamber 50, and plasma is generated. ing. When the dielectric constant of the generated plasma exceeds the cutoff value of the microwave, the microwave becomes a surface wave that propagates along the interface between the dielectric window 82 and the plasma.

  On the dielectric plate 88, an antenna rear plate 104 is provided so as to cover the upper surface of the chamber 50. The antenna rear plate 104 is made of, for example, aluminum and serves also as a cooling jacket that absorbs (dissipates) heat generated in the dielectric window 82. A chiller unit (not shown) is provided in the flow path 106 formed inside. ), A refrigerant of a predetermined temperature, for example, a fluorine-based liquid CW is circulated and supplied through the pipes 108 and 110.

  In this microwave plasma CVD apparatus, a hollow gas flow path 110 penetrating through the inner conductor 102 of the coaxial tube 98 in the axial direction is provided. A first gas supply pipe 114 from the processing gas supply source 112 is connected to the upper end of the inner conductor 102, and the gas flow path of the first gas supply pipe 114 and the gas flow path 110 of the coaxial pipe 98 communicate with each other. . A conductor injector 116 passing through the dielectric window 82 is connected to the lower end of the inner conductor 102, and the gas flow path 110 of the coaxial tube 98 and the gas flow path of the injector section 116 are in communication. The injector 116 appropriately protrudes from the dielectric window 82 on the ceiling surface in the chamber 50, and the processing gas is discharged from the discharge port 116a at the tip thereof.

  In the first process gas introduction unit 118 having such a configuration, the process gas sent from the process gas supply source 112 at a predetermined pressure passes through the gas flow paths of the first gas supply pipe 114, the coaxial pipe 110, and the injector unit 116 in order. It flows and is discharged from the discharge port 116 a at the tip of the injector unit 116, and diffuses into the plasma generation space in the chamber 50. An MFC (mass flow controller) 120 and an opening / closing valve 122 are provided in the middle of the first gas supply pipe 114.

  This microwave plasma CVD apparatus also includes a second processing gas introduction unit 124 of a system different from the first processing gas introduction unit 118 in order to introduce a processing gas into the chamber 50. The second processing gas introduction section 124 generates plasma from the buffer chamber 126 formed in an annular shape in the side wall of the chamber 50 at a position somewhat lower than the dielectric window 82 and from the buffer chamber 126 at equal intervals in the circumferential direction. A number of side wall gas discharge holes 128 facing the space and a gas supply pipe 128 extending from the processing gas supply source 124 to the buffer chamber 126 are provided. An MFC 130 and an open / close valve 132 are provided in the middle of the gas supply pipe 128.

  In the second processing gas introduction section 124, the processing gas sent from the processing gas supply source 112 at a predetermined pressure is introduced into the buffer chamber 126 in the side wall of the chamber 50 through the second gas supply pipe 128, and the buffer chamber The pressure in the circulation direction is made uniform in 126, and then discharged from each side wall gas discharge port 134 substantially horizontally toward the center of the chamber 10 and diffuses into the plasma processing space.

  Note that the processing gases introduced into the chamber 50 from the first processing gas introduction unit 90 and the second processing gas introduction unit 124 are usually the same type of gas, but may be different types of gases. , 130 can be introduced at independent flow rates or at any flow rate ratio.

  FIG. 11 is a top view showing the slot pattern structure of the RLSA 86. As shown in the drawing, the antenna radiation plate 140 has a number of concentric slots. More specifically, two types of slots 140b and 140c whose directions are orthogonal to each other are alternately arranged concentrically, and are arranged at intervals according to the wavelength of the microwave transmitted through the dielectric plate 88 in the radial direction. Yes. In such a slot pattern structure, the microwave is radiated from the slot plate as a circularly polarized substantially plane wave including two orthogonal polarization components. This type of slot antenna is excellent in uniformly radiating microwaves from substantially the entire surface of the slot plate, and is suitable for generating uniform and stable plasma. A through hole 142 for allowing the injector 116 to pass is formed in the center of the antenna radiating plate 140.

In this microwave plasma CVD apparatus, in order to form the silicon oxide film (SiO ₂ film) 18 on the inner wall of the hole 16 in the TSV processing process on the silicon substrate 10 as described above, the chamber 50 is supplied from the processing gas supply source 112. As a processing gas or reaction gas supplied into the inside, TEOS (Tetra Ethyl Ortho Silicate) and a mixed gas obtained by adding Ar or Kr to O ₂ are used.

  As described above, the substrate processing is performed using the surface wave microwave propagating along the interface between the dielectric window 82 and the plasma. Here, the plasma generation space is limited to a region in the vicinity of the dielectric window 82 (for example, within 10 mm), and the space below it is a region where the plasma diffuses, and the silicon substrate 10 on the susceptor 52 is located in this plasma diffusion region. Placed inside. For this reason, even if the electron temperature in the plasma generation region is as high as 2 to 4 eV, it is extremely low as 1 to 2 eV in the vicinity of the silicon substrate 10. The processing gas (particularly TEOS gas) is preferably introduced into the plasma diffusion region in the chamber 50.

  Kr is a rare gas having a mass higher than that of Ar, and discharges in the plasma generation region to generate a large amount of radicals, improving not only step coverage but also dangling such as Si—OH bond and Si—H bond. It has the effect of suppressing the occurrence of bonds.

In this microwave plasma CVD apparatus, a suitable process condition (recipe) for forming the silicon oxide film (SiO ₂ film) 18 on the inner wall of the hole 16 of the silicon substrate 10 as described above is as follows as an example. It is.
Pressure = 350mTorr
Process gas: TEOS / O ₂ / Ar = 5: 20: 75 (flow rate ratio)
Microwave power = 3.5kW
Processing time = 60 sec

  According to the microwave plasma CVD apparatus using RLSA for the plasma discharge as described above, it has a good (that is, low in impurities and low in hygroscopicity) film quality that is inferior to a thermal oxide film by low-temperature film formation at 350 ° C. or lower. A plasma TEOS film can be formed.

  Here, low-temperature film formation at 350 ° C. or lower is an essential requirement for application to via / last. A thermal oxidation method or a thermal CVD method in which the processing temperature normally exceeds 700 ° C. damages an element or wiring already formed on the silicon substrate 10 and therefore cannot be used for via / last.

  Further, the fact that the silicon oxide film 18 on the inner wall of the via has a good film quality with less impurities and moisture absorption is a very important characteristic also in this embodiment in which the wet etching method is adopted in the wafer thinning process (FIG. 7). It becomes.

  That is, a plasma TEOS film formed by a high-frequency capacitively coupled or inductively coupled plasma CVD apparatus contains a large amount of impurities such as Si—OH and Si—H and is hygroscopic, and is not only vulnerable to external stress, There is a drawback that it is easily dissolved in HF and has low etching selectivity in Si wet etching.

Actually, a plasma TEOS film (sample 1) formed by the above-described RLSA type microwave plasma CVD apparatus, a plasma TEOS film (sample 2) formed by a general capacitively coupled plasma CVD apparatus, An SiO ₂ film (sample 3) formed at a processing temperature of 700 ° C. or higher by a thermal CVD apparatus, and an SiO ₂ film obtained by subjecting the SiO ₂ film of sample 3 to an annealing process of about 900 ° C. and a thermal oxidation process of water vapor. _In an experiment in which _two films (sample 4) were immersed in an HF solution having a concentration of 5% and the respective etching rates were measured, sample 1 was 45 nm / min, sample 2 was 75 nm / min, sample 3 was 60 nm / min, sample 4 The experimental result of 30 nm / min is obtained.

  In short, the plasma TEOS film formed by the RLSA type microwave plasma CVD apparatus has a Si wet etching selection ratio approximately compared with the plasma TEOS film formed by the low-temperature type capacitively coupled plasma CVD apparatus. It can be improved by 1.7 times.

As a result, in the wafer thinning process of this embodiment (FIG. 7), not only the back surface of the silicon substrate 10 is not damaged by lattice stress or the like due to external stress, but also the insulation of the side wall near the via bottom. The electrical characteristics or reliability of the TSV can be stabilized without the film (SiO ₂ ) being dented by overetching.

  The preferred embodiments of the present invention have been described above. However, the present invention is not limited to the above-described embodiments, and various modifications and changes can be made within the scope of the technical idea.

For example, nitriding a silicon oxide film (SiO ₂ ) 18 formed on the inner wall of the hole 16 by a plasma nitriding method to form a silicon oxynitride film is also a preferable method for improving the film quality. In that case, a capacitively coupled plasma CVD apparatus can also be used to form the silicon oxide film (SiO ₂ ) 18, and an inert gas (argon, krypton, xenon) is used as a plasma excitation gas, and a processing gas is used. Ammonia gas or nitrogen gas may be used. However, it is preferable to use the RLSA type microwave plasma CVD apparatus (FIG. 10) as described above for the plasma nitridation process, whereby the quality of the silicon oxynitride film can be further improved.

  In the microwave plasma CVD apparatus (FIG. 10) used for the TSV processing of the above embodiment, it is possible to substitute RLSA for plasma excitation with metal surface wave excitation plasma (MSEP).

10 is merely an example, and various modifications can be made not only in the antenna but also in the structure around the processing gas introduction part and the susceptor.

Further, as the composition of the etching solution used for Si wet etching, CH ₃ COOH (acetic acid) can be substituted with another carboxylic acid such as oxalic acid or citric acid. The single wafer type wet etching apparatus of FIG. 9 is also an example, and other apparatus configurations can be used.

  The TSV processing process in the present invention can be suitably applied to the via last as described above, but can also be applied to the via first.

Claims (3)

A first step of making a hole in a semiconductor substrate at a desired depth from the device formation surface side;
A second step of forming a silicon oxide film on the inner wall of the hole by a microwave-excited plasma CVD method using a microwave discharge using a processing gas containing TEOS and using a radial line slot antenna for plasma generation ;
The silicon oxide film formed on the inner wall of the hole is a microwave-excited plasma nitridation using a mixed gas containing an inert gas and NH ₃ gas or N ₂ gas as a processing gas and using a radial line slot antenna for microwave discharge A third step of nitriding by a method to form a silicon oxynitride film;
A fourth step of embedding a conductor in the hole;
By wet etching using etch rate and 30 [mu] m / min or more by using an etching solution containing a 20-30% by weight of hydrofluoric acid 40 to 20 wt% of nitric acid and 5 to 15 wt% acetic acid, of the semiconductor substrate And a fifth step of scraping the back surface until the conductor is exposed. The method for manufacturing a semiconductor device according to claim 1 , wherein a deposition temperature of the silicon oxide film is 350 ° C. or less. 3. The semiconductor device manufacture according to claim 1, further comprising a sixth step of forming a diffusion prevention film on the silicon oxynitride film between the third step and the fourth step. 4. Method.

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