TWI512890B - Semiconductor device and manufacturing method thereof - Google Patents

Description

Semiconductor device and method of manufacturing same

The present invention relates to a semiconductor device having a through hole and a method of fabricating the same.

Recently, the TSV (Through Silicon Via) has attracted attention as a next-generation semiconductor package technology capable of simultaneously achieving miniaturization, high integration, and high performance of semiconductor elements.

The TSV is perpendicular to the electrodes or wiring of the semiconductor wafer. By stacking a plurality of wafers and connecting the wafers with each other by TSV, it is possible to easily achieve miniaturization, large capacity, and high performance of the three-dimensional integrated circuit.

In general, the TSV processing process is divided into a first step (Via-First) before the BEOL (Back End of Line) and a step after the BEOL, corresponding to the sequence of steps in the wafer process. Two types of post-drilling holes (Via-Last). First drilling is advantageous for the microfabrication of TSV, which can reduce the pore size, or can easily form a plurality of TSVs (thousands or more), but there is a limitation that the filling conductor needs to be a polysilicon having a high resistivity. On the other hand, it is difficult to reduce the aperture or form a plurality of TSVs in the post-drilling hole, but it has the advantage that Cu having a lower resistivity can be used as a conductor to be filled, and the design freedom can be increased.

Basically, the TSV processing process is a step of forming a through hole in the ruthenium substrate, a thinning step of removing the inner surface of the ruthenium substrate until the bottom of the through hole is exposed, and stacking the ruthenium substrates to each other for electrical and physical connection. The steps are composed.

Here, the step of forming the through hole will be described in more detail, including the step of forming a hole in the substrate, the step of forming an insulating film on the inner wall of the hole, and the step of embedding the conductor in the hole. Here, etching or laser processing can be used when forming the holes. Moreover, the insulating film formed at the inner wall of the hole can separate the Si filled in the conductor and the substrate, and is generally a tantalum oxide film (SiO ₂ deposited by a chemical vapor deposition (CVD) method. ). When a conductor is buried, CVD is used in the case where the polycrystalline silicon is drilled first, and in the case of Cu (post-drilled), a plating method is used.

Further, in the step of thinning the substrate (exposed at the bottom of the through hole), a special grinding stone is used to grind the inner surface of the substrate. At this time, a support member having a shape similar to that of the wafer is attached to the support member. At the surface of the ruthenium substrate, a grinding process is performed to support the ruthenium substrate to be gradually thinned by grinding.

After the grinding, the ruthenium substrate is slightly cleaned, and a bump composed of Cu or solder is attached to the upper and lower ends of the through hole, and the position of the ruthenium substrate is aligned to perform electrical conductivity of the TSV. connection.

Patent Document: Japanese Patent Laid-Open Publication No. 2009-10311.

In the conventional TSV processing, when the thin plate is formed (exposed at the bottom of the through hole), the inner surface of the base plate is inevitably subjected to external stress due to grinding, and not only the lattice defects and the like are caused in the inner surface of the substrate. There is also a problem that it is easy to damage the insulating film (SiO ₂ film) on the side wall near the bottom of the through hole.

Further, in the conventional TSV processing, the insulating film (SiO ₂ ) on the inner wall of the through-hole is made by a high-frequency capacitive coupling type or an inductive coupling type plasma CVD apparatus using a TEOS-O ₂ -based gas as a reaction gas. It is formed at a low temperature, but contains a large amount of impurities such as Si-OH or Si-N and is hygroscopic, and the film quality is poor.

As described above, the insulating film on the inner wall of the through hole or the side wall causes damage or defects, which increases leakage current or crosstalk, makes the device characteristics unstable, and impairs the reliability of the TSV packaging technology.

The present invention has been made in view of the above problems in the prior art, and an object of the invention is to provide a method of manufacturing a semiconductor device which can prevent damage or defects from occurring around the through-holes on the inner surface side of the semiconductor substrate.

Furthermore, the present invention provides a semiconductor device capable of improving the electrical characteristics of the periphery of a through hole.

A method of manufacturing a semiconductor device according to a first aspect of the present invention includes the first step of forming a hole having a desired depth from the element forming surface side of the semiconductor substrate, and the second step of attaching the inner wall of the hole An insulating film is formed; in the third step, the conductor is buried in the hole; and in the fourth step, the inner surface of the semiconductor substrate is removed by wet etching until the conductor is exposed.

In the above method, the inner wall of the insulating film is formed at the hole formed by the semiconductor substrate, and after the conductor is buried therein, the inner surface of the semiconductor substrate is subjected to wet etching by dissolving the substrate material (Si) into the etching liquid. The method, that is, the method of applying external stress, removes the inner surface of the substrate. This etching is performed to eventually expose the bottom of the columnar conductor buried in the hole and stop etching at an appropriate point. In this way, a through electrode or a through wiring can be formed on the semiconductor substrate.

A semiconductor device according to a second aspect of the present invention includes a semiconductor substrate having a semiconductor element formed on a surface thereof, a hole penetrating the semiconductor substrate, an insulating film disposed at a sidewall of the hole, and a conductor embedded therein To the hole; wherein the inner surface of the semiconductor substrate is removed by wet etching to allow the conductor to penetrate the hole.

A semiconductor device according to a third aspect of the present invention includes: a semiconductor substrate having a semiconductor element formed on a surface thereof; a hole penetrating through the semiconductor substrate; an insulating film disposed at a sidewall of the hole; and a conductor embedded in the hole To the hole; wherein the insulating film comprises a film composed of ruthenium oxide formed by using a TEOS as a film forming gas and a microwave-excited plasma CVD method using microwave discharge to generate a plasma.

According to the method of manufacturing a semiconductor device of the present invention, it is possible to prevent damage or defects from occurring in the periphery of the through-hole on the inner surface side of the semiconductor substrate by the above-described configuration and action, and it is possible to greatly reduce it. Moreover, in the semiconductor device of the present invention, the electrical characteristics around the through hole can be improved by the above configuration.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

First, a series of steps of a TSV processing process according to an embodiment of the present invention will be described with reference to Figs. 1 to 8 . In addition, the TSV processing process is a post-drilling method.

In the case of post-drilling, before the TSV processing, the substrate step or front end process (FEOL: Front End of Line) and the wiring step or the back end process (BEOL) have ended, as shown in Figure 1, on the germanium substrate (twisted A semiconductor element 12 such as a transistor is embedded in the surface of the circle 10) (that is, the element forming surface), and a multilayer wiring structure 14 is formed above the element forming surface.

In the present embodiment, as shown in FIG. 2, the ruthenium substrate 10 which has been completed to the BEOL step is first formed with a hole 16 having a desired depth (for example, about 100 μm) from the substrate surface (ie, the element formation surface) side at a desired position. . Dry etching or laser beam processing can be used to form the hole. In the case of dry etching, the side wall of the through hole is protected by a polymer film by a so-called Bosh process, and at the same time, only the Si at the bottom of the through hole is selectively removed, and a hole having a high aspect ratio and a high aspect ratio can be formed. 16. Regarding the size, for example, the thickness A of the ruthenium substrate 10 is usually about 700 μm. For this, the depth B of the hole 16 can be selected from 80 to 120 μm, and the diameter C of the hole 16 can be selected from 20 to 50 μm.

Next, as shown in FIG. 3, a tantalum oxide film (SiO ₂ ) 18 as an insulating film is formed on the main surface of the tantalum substrate 10 including the inner wall of the hole 16. The step of forming the tantalum oxide film 18 is a feature of the present embodiment, and is performed by a microwave plasma CVD apparatus including a radial slot antenna (RISA: Radial Line Slot Antenna) as will be described in detail later.

Next, as shown in FIG. 4, the ruthenium substrate 10 including the inner wall of the hole 16 is formed on the main surface (i.e., the ruthenium oxide film 18 is sequentially formed by sputtering to form a diffusion preventing layer such as the TiN layer 20 and the plating electrode. A Cu seed layer 22 is used.

Then, as shown in FIG. 5, Cu as the filling conductor 24 is buried in the hole 16 by electroplating. The Cu plating which overflows above the hole 16 is removed by chemical mechanical polishing (CMP) as shown in FIG. 6, and the main surface of the ruthenium substrate 10 is planarized.

Next, as shown in FIG. 7, the inner surface of the ruthenium substrate 10 is removed until the bottom of the hole 16 (i.e., the bottom of the Cu-filled conductor 24) is exposed, so that the thickness of the ruthenium substrate 10 is thinned to about 100 μm. The step of thinning the wafer or exposing the bottom of the through hole is also a feature of the embodiment. As described in detail later, a mixture of HF, HNO ₃ and a carboxylic acid (for example, citric acid) can be used as the chemical liquid. A leaf type wet etching apparatus is used.

Next, as shown in FIG. 8, metal solder balls 26 and 28 made of, for example, Cu or solder are attached to the upper end (surface side) and the lower end (inner surface side) of the Cu filling conductor 24, respectively. Although not shown in the drawings, when a plurality of ruthenium substrates are stacked vertically, the metal balls 26 and 28 are connected to the corresponding solder balls on the other ruthenium substrates. Further, the wiring in the multilayer wiring structure 14 is also electrically connected to the Cu-filled conductor 24 or the solder balls 26 and 28.

Fig. 9 is a view showing the main part configuration of a leaf type wet etching apparatus which can be applied to the wafer thinning step (Fig. 7) in the aforementioned TSV processing.

In the wet etching apparatus, a turntable 32 is provided at a center portion of the inner side of the annular base 30, and the turntable 32 is placed on the turntable 32 in an upside down posture (a posture in which the inner surface of the substrate faces upward). The crucible substrate 10 is held by a mechanical or vacuum chucking mechanism (not shown) provided by the turntable 32. Then, by rotating the driving unit 34 and rotating the shaft 36, the crucible substrate 10 is rotated together with the turntable 32 at an appropriate rotational speed (for example, 500 rpm), and the chemical solution is applied by the nozzle 38 provided above ( That is, the etching liquid is sprayed onto the crucible substrate 10 (inner surface) at a specific flow rate (for example, 100 ml/min). At this time, the arm 40 supporting the nozzle 38 can be rotated or shaken, and the nozzle 38 can be reciprocated in the radial direction of the cymbal substrate 10.

The gas or dissolved matter (reaction product) generated by the reaction on the substrate 10 is scattered around the turntable 32 and guided to the bottom of the base 30, and the discharge liquid is sent from the liquid discharge port 42 to the drain tank; The exhaust gas is sent from the exhaust port 44 to the exhaust unit (not shown).

In the present embodiment, a mixed liquid of HF (hydrogen fluoride), HNO ₃ (nitric acid), and CH ₃ COOH (tannic acid) is used as the etching liquid. Here, HF and HNO _{3 are} directly related to the oxidation of the Si etching and the reductive reaction. I.e., Si of the silicon substrate 10 by reaction with HNO ₃ will be oxidized to form SiO ₂ (at this time, NO _x production gas will). Next, SiO _{2 of the} intermediate product reacts with HF to form H ₂ SiF ₆ and is dissolved in the liquid. In this way, HNO ₃ is the main factor determining the oxidation reaction of Si. On the other hand, HF is the main factor determining the restitution or dissolution reaction of SiO ₂ , and the two are in a trade-off relationship. Thus, CH ₃ COOH is added to balance the oxidation reaction with the reductive reaction.

In the wet etching mechanism, in order to increase the overall etching rate, the mixing ratio of HF, HNO ₃ , and CH ₃ COOH is important. The inventors of the present invention confirmed that the optimum mixing ratio was HF of 20 to 30% by weight, HNO ₃ of 40 to 20% by weight, and CH ₃ COOH, after performing a plurality of experiments repeatedly using the above-described leaf type wet etching apparatus. 5~15% by weight. Further, it is preferable that the flow rate of the etching liquid supplied to the crucible substrate 10 by the nozzle 38 should be selected from the etching efficiency and the cost, for example, for the substrate 10 of 300 mm in diameter, at 100 ml/min. It is better in the range of ~500 ml/min.

In the wafer thinning step of the present embodiment, the Si polishing process in which the thickness of the tantalum substrate 10 is cut from, for example, 700 μm to about 100 μm can be replaced by a conventional grinding method instead of a wet etching method, in terms of mass productivity and cost. It is necessary to increase the etching speed as much as possible. Therefore, by using the leaf-type wet etching apparatus as described above, the metabolic rate of the treatment liquid on the crucible substrate 10 is preferably obtained by using the above-described etching liquid containing HF, HNO ₃ and CH ₃ COOH at a specific mixing ratio. It can reach an etching rate of 30 μm/min or more.

Fig. 10 is a view showing the structure of a microwave plasma CVD apparatus which is applicable to the step (Fig. 3) of forming a tantalum oxide film (SiO ₂ film) 18 at the inner wall of the hole 16 in the aforementioned TSV processing.

This microwave plasma CVD apparatus has a cylindrical vacuum processing chamber (processing vessel) 50 made of metal such as aluminum or stainless steel. The processing chamber 50 forms a safety ground.

In the center of the lower portion of the processing chamber 50, a disk-shaped mounting table 52 on which the object to be processed (the substrate 10) is placed is horizontally provided, and the substrate holding table also serves as a high-frequency electrode. The mounting table 52 is made of, for example, aluminum and is supported by an insulating cylindrical support portion 54 that extends vertically upward from the bottom of the processing chamber 50.

An annular exhaust passage 58 is formed between the conductive salient support portion 56 extending vertically upward from the bottom of the processing chamber 50 along the outer periphery of the cylindrical support portion 54 and the inner wall of the processing chamber 50, and an exhaust passage 58 is formed therein. An annular baffle 60 is provided at the upper portion or the entrance of the 58th, and an exhaust port 62 is provided at the bottom. Each exhaust port 62 is connected to an exhaust device 66 having a vacuum pump via an exhaust pipe 64.

In the interior of the mounting table 52, for example, a refrigerant chamber or a refrigerant passage 68 that is formed in a ring shape is supplied with a refrigerant having a specific temperature (for example, a fluorine-based liquid) by a condenser unit (not shown) and via pipings 70 and 72. CW). On the upper side of the mounting table 52, an electrostatic chuck 74 for holding the ruthenium substrate 10 with an electrostatic absorbing force is provided. A heat transfer gas (for example, He gas) from a heat transfer gas supply unit (not shown) is supplied to the electrostatic chuck 74 via the gas supply pipe 76 and between the inner surface of the ruthenium substrate 10. After the switch 78 of the electrostatic chuck 74 is turned on, the ruthenium substrate 10 is occluded and held by the electrostatic chuck 74 by the electrostatic absorbing force generated by the DC voltage from the DC power source 80.

Further, the insulator of the electrostatic chuck 74 is also sealed with the resistor heating element 75 for the heater, and receives electric power from the heater power source 77 to cause the resistor heating body 75 to generate heat.

As a result, the substrate 10 on the mounting table 52 is maintained at a desired set temperature in the range of, for example, 200 ° C to 350 ° C by the balance between the cooling of the heat transfer gas and the heating of the heater 75 .

In the microwave plasma CVD apparatus, as a part of the plasma generating mechanism, a dielectric for introducing microwaves, for example, quartz or alumina, is hermetically mounted on the top surface of the mounting table 52 facing the processing chamber 50. A dielectric window 82 composed of a body. The dielectric window 82 is integrated with the conductor radiation plate 84 having a plurality of slots which are concentrically distributed on or attached thereto to form a disk-shaped RLSA 86. The RLSA 86 is electromagnetically coupled to the microwave transmission line 90 via a dielectric plate 88 composed of a dielectric such as quartz or alumina. The dielectric plate 88 has a function of shortening the wavelength of the microwave propagating inside.

The microwave transmission line 90 transmits the microwave outputted by the microwave generator 92 to the line of the RLSA 86, the waveguide tube 94 and the coaxial tube converter 96 of the waveguide and the coaxial tube 98. The waveguide 94 is, for example, a square waveguide, and transmits the microwave from the microwave generator 92 toward the processing chamber 50 to the coaxial converter 96 of the waveguide in the TE mode as the transmission mode.

The coaxial tube converter 96 of the waveguide will be combined with the terminal end of the square waveguide 94 and the front end of the coaxial tube 98 to convert the transmission mode of the square waveguide 94 into the transmission mode of the coaxial tube 98.

The coaxial tube 98 extends vertically downward from the coaxial tube transducer 96 of the waveguide to the upper central portion of the processing chamber 50, the terminal or lower end of which is coupled to the RLSA 86 via a dielectric plate 88. The outer conductor 100 of the coaxial tube 98 is composed of a cylindrical body that allows microwaves to propagate in the TEM mode at the space between the inner conductor 102 and the outer conductor 100.

The microwave outputted by the microwave generator 92 is transmitted to the microwave transmission line 90 composed of the waveguide 94, the coaxial tube converter 96 of the waveguide, and the coaxial tube 98 as described above, and passes through the dielectric plate 88. Supply to RLSA86. Then, the microwave extending in the radial direction by the dielectric plate 88 is radiated from the slots of the RLSA 86 toward the inside of the processing chamber 50, and the microwave electric power is used to ionize the nearby gas to generate plasma. . When the dielectric of the generated plasma exceeds the cutoff of the microwave, the microwave becomes a surface wave propagating along the boundary of the dielectric window 82 and the plasma.

Above the dielectric body plate 88, an antenna rear panel 104 is provided in a manner similar to that of the processing chamber 50. The antenna rear panel 104 is composed, for example, of aluminum, and serves as a cooling jacket for absorbing (heating) heat generated by the dielectric window 82. The flow path 106 formed therein is constituted by a condenser unit (in the figure) Not shown), a refrigerant having a specific temperature (for example, a fluorine-based liquid CW) is circulated and supplied via the pipes 108 and 110.

In the microwave plasma CVD apparatus, a hollow gas flow path 110 is provided in the inner conductor 102 of the coaxial tube 98 so as to penetrate the inside thereof in the axial direction. Then, a first gas supply pipe 114 from the beaver gas supply source 112 is connected to the upper end of the inner conductor 102, and the gas flow path of the first gas supply pipe 114 and the gas flow path 110 of the coaxial pipe 98 communicate with each other. Further, an ejector portion 116 (conductor) penetrating through the dielectric window 82 is connected to the lower end of the inner conductor 102, and the gas flow path 110 of the coaxial tube 98 and the gas flow path of the ejector portion 116 communicate with each other. The ejector portion 116 is moderately protruded from the top dielectric window 82 in the processing chamber 50, and the processing gas is ejected from the ejection port 116a at the front end thereof.

In the first process gas introduction unit 118 having the above-described configuration, the process gas sent from the process gas supply source 112 at a specific pressure flows through the respective gas flows of the first gas supply pipe 114, the coaxial pipe 110, and the ejector portion 116 in this order. The passage is ejected from the discharge port 116a at the tip end of the ejector portion 116, and a space is generated toward the plasma in the processing chamber 50 to be diffused. Further, an MFC (mass flow controller) 120 and an opening and closing valve 122 are provided in the middle of the first gas supply pipe 114.

In the microwave plasma CVD apparatus, in order to introduce the processing gas into the processing chamber 50, a second processing gas introduction portion 124 that is different from the first processing gas introduction portion 118 is provided. The second processing gas introduction portion 124 has a buffer chamber 126 which is annularly formed in a side wall of the processing chamber 50 at a position lower than the dielectric window 82. A plurality of side wall gas ejection holes 134 are circumferentially The space is generated from the buffer chamber 126 at equal intervals toward the plasma generation space; and the gas supply pipe 128 extends from the process gas supply source 112 to the buffer chamber 126. The MFC 130 and the opening and closing valve 132 are provided in the middle of the gas supply pipe 128.

In the second processing gas introduction unit 124, the processing gas sent by the processing gas supply source 112 at a specific pressure is introduced into the buffer chamber 126 in the side wall of the processing chamber 50 via the second gas supply pipe 128, and is accommodated in the buffer chamber 126. After the pressure is uniformized in the circumferential direction, the side wall gas discharge ports 134 are ejected toward the center of the processing chamber 50 approximately horizontally to diffuse into the plasma processing space.

In addition, the processing gas introduced into the processing chamber 50 by the first processing gas introduction unit 118 and the second processing gas introduction unit 124 may be the same type of gas, but may be different types of gases. Each MFC 120, 130 is introduced at a separate flow rate or at an arbitrary flow ratio.

Figure 11 is a top plan view showing the slot pattern configuration of the RLSA 86. As shown in the figure, a plurality of slots are formed concentrically at the radiation plate 84 of the conductor. More specifically, the slots 84b and 84c which are perpendicular to each other in two directions are arranged in a concentric manner, and are arranged in the radial direction at intervals corresponding to the microwave wavelength (transmitted to the dielectric plate 88). . In the slot arrangement structure, the microwave is a slightly plane wave including a circularly polarized wave of two vertical polarization components, and is radiated from the slot plate. This type of slotted antenna has the advantage of being able to uniformly radiate microwaves from approximately the entire surface of the slotted plate, and is suitable for producing a uniform and stable plasma. Further, a through hole 85 for penetrating the ejector portion 116 is formed at a central portion of the conductor radiation plate 84.

In the microwave plasma CVD apparatus, as described above, when a tantalum oxide film (SiO ₂ film) 18 is formed on the inner wall of the hole 16 in the TSV processing process on the germanium substrate 10, it is supplied from the processing gas supply source 112 to The processing gas or the reaction gas in the processing chamber 50 is used in TEOS (Tetra Ethyl Ortho Silicate) and a mixed gas in which Ar or Kr is added to O ₂ .

Substrate processing is performed using surface wave microwaves transmitted along the boundary between the dielectric window 82 and the plasma as described above. Here, the plasma generation space is defined as a region near the dielectric window 82 (for example, within 10 mm), and a space below is a region where the plasma is diffused, and the substrate 10 on the mounting table 52 is placed. In the plasma diffusion region. Therefore, even if the electron temperature in the plasma generation region is as high as 2 to 4 eV, the vicinity of the crucible substrate 10 is also significantly reduced to the extent of 1 to 2 eV. Preferably, a process gas, particularly TEOS gas, is introduced into the plasma diffusion zone within the processing chamber 50.

Kr is a rare gas with a higher mass than Ar. It discharges at the plasma generation region to generate a large amount of free radicals, which not only improves the step coverage but also inhibits Si-OH bonding or Si-H bonding. The effect of the Dangling bond.

In the microwave plasma CVD apparatus, a preferable process condition (process recipe) for forming a tantalum oxide film (SiO ₂ film) 18 at the inner wall of the hole 16 of the tantalum substrate 10 as described above is exemplified as follows.

Pressure = 350mTorr

Process gas: TEOS/O ₂ /Ar=5:20:75 (flow ratio)

Microwave electric power = 3.5kW

Processing time = 60sec

A microwave plasma CVD apparatus using RLSA for plasma discharge as described above can be formed by a low temperature film formation of 350 ° C or less to have a color which is inferior to a thermal oxide film (ie, less impurities and hygroscopicity). Lower) membranous plasma TEOS membrane.

Here, when it is applied to the post-drilling, a low-temperature film formation of 350 ° C or less is a necessary condition. The thermal oxidation method or the thermal CVD method in which the treatment temperature usually exceeds 700 ° C can damage the fabricated components or wiring on the substrate 10, and thus cannot be applied to the post-drilling method.

Further, the tantalum oxide film 18 on the inner wall of the through-hole has a good film quality with less impurities and less hygroscopicity, which is a very important characteristic of the present embodiment in the wafer thinning step (Fig. 7) by the wet etching method.

That is, the plasma TEOS film formed by the high frequency capacitive coupling type or the inductive coupling type plasma CVD apparatus contains many impurities such as Si-OH or Si-H and is hygroscopic, not only for external stress, but also weak. It can also be easily dissolved into HF, which has the disadvantages of low etching selectivity during wet etching of Si.

Actually, the plasma TEOS film (sample 1) formed by the RLSA type microwave plasma CVD apparatus and the plasma TEOS film (sample 2) formed by a general capacitance coupling type plasma CVD apparatus, The SiO ₂ film (sample 3) formed by a general thermal CVD apparatus at a processing temperature of 700 ° C or higher, and the SiO ₂ film of the sample 3 are further subjected to annealing treatment at about 900 ° C and thermal oxidation treatment of water vapor. The obtained SiO ₂ film (sample 4) was immersed in an HF solution having a concentration of 5% and the respective etching speeds thereof were measured. The experimental results obtained in the experiment were as follows: sample 1 was 45 nm/min, and sample 2 was 75 nm/min. Sample 3 was 60 nm/min, and sample 4 was 30 nm/min.

Mainly, the plasma TEOS film formed by the RLSA type microwave plasma CVD apparatus can wet the Si compared to the plasma TEOS film formed by the low temperature film forming type capacitive coupling type plasma CVD apparatus. The choice is about 17 times higher.

As a result, in the wafer thinning step (FIG. 7) of the present embodiment, not only the inner surface of the tantalum substrate 10 but also the outer surface of the inner surface of the tantalum substrate is not damaged by lattice defects, and the insulating film of the side wall near the bottom of the through hole (SiO) ₂ ) It will not be recessed due to over-etching, which will stabilize the electrical characteristics and reliability of TSV.

The preferred embodiments of the present invention have been described above, but the present invention is not limited to the embodiments described above, and various modifications and changes can be made without departing from the scope of the invention.

For example, a tantalum oxide film (SiO ₂ ) 18 formed on the inner wall of the hole 16 is nitrided by a plasma nitridation method to form a niobium oxide film, which is also a preferred film quality improvement method. At this time, a tantalum oxide film (SiO ₂ ) 18 may be formed by using a capacitive coupling type plasma CVD apparatus, and an inert gas (argon, helium, neon) may be used as the plasma excitation gas, and ammonia may be used as the processing gas. Gas or nitrogen. In other words, in the plasma nitriding process, it is preferable to use the RLSA type microwave plasma CVD apparatus (Fig. 10) as described above, whereby the film quality of the niobium oxynitride film can be further improved.

Alternatively, as another method, a tantalum nitride film (Si ₃ N ₄ ) may be formed on the inner wall of the hole 16 instead of the tantalum oxide film (SiO ₂ ), whereby the selection ratio of the wet etching of Si may also be improved. When the formation of the tantalum nitride film (18) is performed by CVD, decane gas and ammonia gas can be used as the material gas. At this time, it is also preferable to use the RLSA type microwave plasma CVD apparatus (Fig. 10) as described above, whereby the film quality of the tantalum nitride film can be further improved.

Alternatively, a multilayer insulating film composed of a tantalum oxide film (SiO ₂ ) and a tantalum nitride film (Si ₃ N ₄ ) may be formed as the insulating film (18) of the inner wall of the hole 16.

Further, in the microwave plasma CVD apparatus (Fig. 10) used in the TSV processing of the above-described embodiment, metal surface wave excitation plasma (MSEP) may be used instead of the RLSA for plasma excitation.

Further, the configuration of the apparatus of Fig. 10 is merely an example, and various configurations may be made not only for the antenna but also for the structure of the processing gas introduction portion or the periphery of the mounting table.

Further, as the composition of the etching liquid used for the wet etching of Si, a carboxylic acid other than CH ₃ COOH (tannic acid) (for example, oxalic acid or citric acid) may be used. The wet etching apparatus is only an example, and other apparatus structures may be used.

The TSV processing process of the present invention is preferably applied to the above-described post-drilling method, but can also be applied to the first drilling method.

10. . .矽 substrate

12. . . Semiconductor component

14. . . Wiring structure

16. . . hole

18. . . Oxide film

20. . . TiN layer

twenty two. . . Seed layer

twenty four. . . conductor

26, 28. . . Solder ball

30. . . Pedestal

32. . . Turntable

34. . . Drive department

36. . . Rotary axis

38. . . nozzle

40. . . Arm

42. . . Drain port

44. . . exhaust vent

50. . . Processing room

52. . . Mounting table

54. . . Support department

56. . . Support department

58. . . Exhaust passage

60. . . Baffle

62. . . Exhaust gas

64. . . exhaust pipe

66. . . Exhaust

68. . . Refrigerant path

70, 72. . . Piping

74. . . Electrostatic gripper

75. . . heating stuff

76. . . Gas supply pipe

77. . . Heater power supply

78. . . switch

80. . . DC power supply

82. . . Dielectric window

84. . . Radiation board

84b, 84c. . . Slot

85. . . Through hole

86. . . RLSA

88. . . Dielectric plate

90. . . Microwave transmission line

92. . . Microwave generator

94. . . Waveguide

96. . . Coaxial tube converter

98. . . Coaxial tube

100. . . External conductor

102. . . Internal conductor

104. . . Antenna rear panel

106. . . Runner

108, 110. . . Piping

112. . . Process gas supply

114. . . First gas supply pipe

116. . . Ejector section

116a. . . Spray outlet

118. . . First processing gas introduction unit

120. . . MFC

122. . . Open and close valve

124. . . Second processing gas introduction unit

126. . . Buffer chamber

128. . . Gas supply pipe

130. . . MFC

132. . . Open and close valve

134. . . Spout hole

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view showing a stage of a TSV processing process according to an embodiment of the present invention.

Figure 2 is a longitudinal cross-sectional view showing one stage of the TSV processing process of the embodiment.

Figure 3 is a longitudinal cross-sectional view showing one stage of the TSV processing process of the embodiment.

Figure 4 is a longitudinal cross-sectional view showing one stage of the TSV processing process of the embodiment.

Figure 5 is a longitudinal cross-sectional view showing one stage of the TSV processing process of the embodiment.

Figure 6 is a longitudinal cross-sectional view showing one stage of the TSV processing process of the embodiment.

Figure 7 is a longitudinal cross-sectional view showing one stage of the TSV processing process of the embodiment.

Figure 8 is a longitudinal cross-sectional view showing one stage of the TSV processing process of the embodiment.

Fig. 9 is a partial cross-sectional side view showing the main structure of a leaf type wet etching apparatus which can be applied to the aforementioned TSV processing.

Figure 10 is a longitudinal cross-sectional view showing the structure of a microwave plasma CVD apparatus applicable to the aforementioned TSV processing.

Figure 11 is a plan view showing the structure of the RISA equipped with the microwave plasma CVD apparatus.

10. . .矽 substrate

12. . . Semiconductor component

14. . . Wiring structure

16. . . hole

18. . . Oxide film

20. . . TiN layer

twenty two. . . Seed layer

twenty four. . . conductor

Claims (11)

A method of manufacturing a semiconductor device comprising: a first step of forming a hole having a desired depth from a side of an element forming surface of a semiconductor substrate; and a second step of forming a tantalum oxide film at an inner wall of the hole In the third step, a mixed gas containing an inert gas and NH ₃ gas or N ₂ gas is used as a processing gas, and a microwave-excited plasma using a radial slot antenna or a metal surface wave excitation plasma is used due to microwave discharge. Nitriding method to nitride the tantalum oxide film formed on the inner wall of the hole to form a niobium oxide film; in the fourth step, the conductor is buried in the hole; and the fifth step is performed by wet Etching to remove the inner face of the semiconductor substrate until the conductor is exposed. The method of manufacturing a semiconductor device according to claim 1, wherein the second step is to form the tantalum oxide film by a microwave excitation plasma CVD method using microwave discharge to generate a plasma. The method of fabricating a semiconductor device according to claim 2, wherein the microwave-excited plasma CVD method uses a radial slot antenna or a metal surface wave excitation plasma. The method of manufacturing a semiconductor device according to claim 2, wherein the raw material of the tantalum oxide film contains TEOS. The method of manufacturing a semiconductor device according to claim 2, wherein the film formation temperature of the tantalum oxide film is 350 ° C or lower. The method of manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the gas system used for the microwave discharge contains an Ar gas or a Kr gas. The method of manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the fifth step is 20 to 30% by weight of hydrofluoric acid, 40 to 20% by weight of nitric acid, and 5 to 15% of acetic acid. The etching solution of % by weight makes the etching rate 30 μm/min or more. The method of manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the third step of forming the diffusion preventing layer on the niobium oxynitride film is between the third step and the fourth step . A method of manufacturing a semiconductor device comprising: a first step of forming a hole having a desired depth from a side of an element forming surface of a semiconductor substrate; and a second step of using a mixed gas containing a gas of decane and NH _{3 ;} As a film-forming gas, a silicon nitride plasma film is formed on the inner wall of the hole by a microwave-excited plasma CVD method using a radial slot antenna or a metal surface wave excitation plasma due to microwave discharge; The conductor is buried in the hole; and in the fourth step, the inner surface of the semiconductor substrate is removed by wet etching until the conductor is exposed. The method for manufacturing a semiconductor device according to claim 9, wherein the fourth step is an etching solution containing 20 to 30% by weight of hydrofluoric acid, 40 to 20% by weight of nitric acid, and 5 to 15% by weight of acetic acid. The etching rate was made 30 μm/min or more. A method of manufacturing a semiconductor device according to claim 9 or 10, wherein the fifth step of forming the diffusion preventing layer on the germanium nitride film is between the second step and the third step.