JP5857346B2 - Image display processing device - Google Patents

Description

  The present invention relates to an image display processing device, and more particularly to an image display processing device that displays a plurality of images in parallel on a plurality of corresponding displays.

  In recent gaming machines, pachinko machines, and the like, a plurality of display devices (typically liquid crystal display devices) are provided, and in particular, the moving images linked to each other are displayed simultaneously in parallel on these display devices. Things are often done. In image display control having such a configuration and function, of course, a display processing control unit (typically a dedicated processor for image processing) and a display command control unit (typically CPU) corresponding to each of a plurality of displays. It is also possible to realize parallel image display by processing in parallel in parallel while mutually synchronizing and linking the display command control units in the uppermost stage.

  However, the above-described configuration is redundant and has a disadvantage that the circuit scale increases uselessly according to the number of displays. Therefore, recently, in order to eliminate such drawbacks, each image to be displayed on each display device is processed in a connected manner via a single display command control unit and a display processing control unit, and immediately before the display device. A configuration in which the plurality of images are divided and sent to the respective displays has become common (see, for example, Patent Document 1). In this patent document 1, as shown in FIG. 3 and FIG. 4B, the image generation device arranges the image data for A screen and the image data for B screen side by side on the frame memory in the horizontal direction. These are processed and sent to the image dividing device line by line, and the image dividing device performs the dividing process and displays them on each of the A screen display and the B screen display.

JP 2000-003164 A

  In Patent Document 1, as described above, the image generation apparatus arranges and processes the A-screen image data and the B-screen image data in the horizontal direction on the frame memory, and processes them in units of lines. The image dividing apparatus performs the dividing process according to the sending method. However, in general, there are various methods for combining a plurality of images and transmission methods in the image generating apparatus. For example, while Patent Document 1 is connected in the horizontal direction and divided into horizontal lines, each image is divided into vertical lines, and each image is cyclic in the horizontal direction in units of lines. There is also a device that transmits in a configuration linked to the.

  From the viewpoint of the diversity of image data transmission formats on the image generation apparatus (image processor) side as described above, it is convenient that the division processing apparatus side can perform processing uniformly regardless of the diversity. In particular, the effect is great when considering the configuration with hardware.

  On the other hand, there are various kinds of display ratios in the horizontal and vertical directions according to the variety of effects of the gaming machine and the like.

  The present invention has been made for the above-described circumstances, and an object of the present invention is to provide various image data combining methods of an image processor when displaying a plurality of images on a plurality of corresponding display devices in parallel. An object of the present invention is to provide an image display processing apparatus including an image division processing unit that can receive and uniformly perform image data division regardless of the transmission method.

In order to achieve the above object, an image display processing apparatus of the present invention stores n display devices and n image data of each resolution to be displayed in parallel on each of the n display devices. , and divided into at least one direction of the horizontal and vertical directions, or without cutting, horizontal and an image processor for transmitting coupled to at least one direction in the vertical direction, the image transmitted from the image processor An image division processing unit that receives data, divides the image into images corresponding to the n display devices, and sends the divided images to the display devices, the image processing processor including the image data together, said cutting and non-cutting information, and transmits the binding information relating to the horizontal direction and the vertical direction as a parameter, the image dividing unit includes an image transmitted to the tiled, before Symbol parameters The have line processing of division, the parameter indicates to divide each image, the horizontal and vertical offset indicates the position of an image obtained tiles or without cutting, the size of the image tiles based on Tile width and tile height and horizontal and vertical width when not divided, or tile horizontal stride and tile vertical stride corresponding to the horizontal and vertical cyclic repetition period of each image when divided. the gist that there.

Each image typically has a common resolution. Each image is typically a moving image .

In order to achieve the above object, the image display processing apparatus of the present invention includes n displays and n images of each resolution to be displayed in parallel on each of the n displays. An image processing processor that divides data in the horizontal direction, and transmits the combined data in the horizontal direction and the vertical direction, and the image data transmitted from the image processing processor, and each image corresponding to the n displays An image division processing unit that divides the image data and sends the image data to each display device, wherein the image processing processor, along with the image data, the divided / undivided information, the horizontal direction, and the vertical direction The gist of transmitting the information on the coupling relating to the direction as a parameter is that the image division processing unit performs the division process on the image sent in a tile shape based on the parameter .

Contact name at this time, the image processor, it is preferable to divide one pixel.

  Each image typically has a common resolution.

Each image is typically a moving image.

  According to the present invention, the image processor divides n image data of each resolution to be displayed in parallel on each of the n display devices in at least one of the horizontal direction and the horizontal direction. Even when transmitting in various coupling methods by combining in at least one of the horizontal direction and the vertical direction without being divided, the image division processing unit receives the image data uniformly. Split processing can be performed.

It is a figure which shows the structure of the whole image processing apparatus containing one Embodiment in the image display processing apparatus of this invention. It is a figure which shows the case where image [1]-image [4] are each displayed on each indicator. FIG. 5 is a diagram for explaining various coupling modes of data of a plurality of images in the image processor 1. It is a figure for demonstrating the concept for processing various coupling modes uniformly. It is a figure for demonstrating the parameter about combined mode [1]. It is a figure for demonstrating the parameter about combined mode [2]. It is a figure for demonstrating the parameter about combined mode [3]. It is a figure for demonstrating the parameter about combined mode [4]. It is a figure for demonstrating the generalized content.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a diagram showing a configuration of an embodiment of an image display processing apparatus according to the present invention. The apparatus shown in the figure divides the image data PD connected and configured in the image processor 1 by the image division processing unit 2 and displays them on four identical liquid crystal displays 3-1 to 3-4. It has a configuration. Here, the image processing processor 1 has at least a transmission processing unit 11 in which a transmission buffer 111 is built. Further, the image division processing unit 2 receives the image data PD sent from the image processing processor 1 under the control signal CS, and the image data PD received by the reception processing unit 21. An image data sorting unit 22 that sorts and sorts the image data corresponding to each of the liquid crystal displays 3-1 to 3-4, and a buffer 231 that stores the image data sorted by the image data sorting unit 22. 1 to 231-4, which processes each image data stored in the buffers 231-1 to 231-4 and generates signals that can be displayed on the liquid crystal displays 3-1 to 3-4. It has at least signal generators 23-1 to 23-4. Although not shown, an image ROM for compressing and storing image data and an upper CPU are connected to the image processor 1, and the image processor 1 reads from the image ROM in response to a command from the upper CPU. A configuration in which image data is read is common. Therefore, the image processor 1 generally has a data expansion processing function.

  Here, examples of the format of the image data PD sent from the image processor 1 to the image division processing unit 2 include RGB and LVDS (Low Voltage Differential Signaling). Further, as a standard of the control signal CS exchanged between the image processor 1 and the image division processing unit 2, for example, there is I2C (Inter-Integrated Circuit).

  Therefore, as shown in FIG. 2, consider a case where different images [1] to [4] are simultaneously displayed in parallel on the liquid crystal displays 3-1 to 3-4. Here, it is assumed that the images [1] to [4] are images having the sizes of DPW1 × DPH1, DPW2 × DPH2, DPW3 × DPH3, and DPW4 × DPH4, respectively. The image may be a still image, but is typically a moving image.

  Therefore, the image processor 1 reads the data of the image [1] to the image [4] from the image ROM (not shown) in response to a command from the CPU (not shown), performs processing such as decompression, and performs a frame (not shown). After being expanded in the memory, the transmission processing unit 11 reads the data and stores it in the transmission buffer 111 while transmitting to the image division processing unit 2 in units of the capacity of the transmission buffer 111.

  At this time, there are various ways in which the image processor 1 sends the coupled and connected images via the buffer 111. However, on the image division processing unit 2 side, it is convenient if processing can be performed in a unified manner regardless of such various sending methods.

  FIG. 3 is a diagram illustrating an example of how to send an image in which the image processor 1 is connected and coupled. FIG. 3A shows a combination mode [1], which is a system in which images [1] to [4] are simply connected in the horizontal direction. When the transmission buffer 111 has a margin in both the horizontal direction and the vertical direction, it can be transmitted by this method. However, when each of the buffers 231-1 to 231-4 in the liquid crystal signal generation units 23-1 to 23-4 of the image division processing unit 2 is a line buffer, it is necessary to send the data on a line basis on the transmission side.

  FIG. 3B shows a combination mode [2], in which each image [1] to [4] is divided in the vertical direction by a predetermined unit, and they are horizontally arranged so as to be cyclic in each image. It is a method of joining side by side. The predetermined unit is typically one pixel unit.

  FIG. 3C shows a combination mode [3], in which each image [1] to [4] is divided in a predetermined unit in the horizontal direction, and the images are rotated in the vertical direction so as to be cyclic in each image. It is a method of joining side by side. This is a method suitable for displaying an image on a display device having a relatively small capacity in the vertical direction of the transmission buffer 111 and long in the horizontal direction. When the transmission buffer 111 is a line buffer, the unit to be divided is one pixel.

  FIG. 3D shows a combined mode [4], and each image [1] to [4] is displayed in the horizontal direction basically in the same manner as the combined mode [3] shown in FIG. The image data is divided by a predetermined unit, and divided image data in which the image [1] and the image [2] are paired in the horizontal direction is first sent, and then the image [3] and the image [4] are paired in the horizontal direction. The divided image data is sent, and the sending is repeated cyclically. This is a method in which the capacity of the transmission buffer 111 in the vertical direction is relatively small and the capacity of the transmission buffer 111 in the horizontal direction can be maximized regardless of the horizontal size of the display. When the transmission buffer 111 is a line buffer, the unit to be divided is one pixel.

  Therefore, the concept of allowing the image division processing unit 2 to perform unified processing even when image data is transmitted from the image processing processor 1 by various methods as described above will be considered below. FIG. 4 is a diagram for explaining the concept. Specifically, regardless of the method sent from the image processor 1, the image division processing unit 2 side can generalize and understand that the image is sent in a tile shape as shown in FIG. it can. Then, if an appropriate parameter is introduced in the generalized format, and the parameter is individually set to a specific value, the policy can be understood as various modes in FIG.

  Therefore, parameters to be introduced will be described. In FIG. 4, each image tile is an original or undivided image piece in FIG. 3. For example, in the combined mode [1] in FIG. 3A, each image [1] to [4] itself corresponds to an image tile. In each combination mode of FIGS. 3B to 3D, each piece of image data after division corresponds to an image tile. Therefore, in FIG. 4, parameters TOH, TOV, TLW, and TLH are the horizontal offset, vertical offset, width, and height of the tile, respectively. TSH and TSV are called tile horizontal stride and tile vertical stride, respectively. The horizontal direction when not divided, the full width in the vertical direction, or the cyclic repetition of the horizontal and vertical directions of each image when divided. It corresponds to a period.

  In the following, parameters for each image combination mode shown in FIG. 3 will be described with reference to FIGS. 5 (a), 6 (a), 7 (a), and 8 (a), as shown in FIG. 2, the images [1] to [4] are DPW1 × DPH1 and DPW2, respectively. It is a case where it has a size of × DPH2, DPW3 × DPH3, DPW4 × DPH4, and FIGS. 5 (b), 6 (b), 7 (b), and 8 (b) are images [1] to This is a case where the image [4] has the same size of DPW1 × DPH1. Further, in the combination modes [2] to [4], a case where the division unit is a typical one pixel is shown.

  First, in the combination mode [1], as shown in FIG. 5A, the tile width TLW and the tile height TLH match the image size in each image. Further, since four tile horizontal strides TSH are arranged in the horizontal direction, DPW1 + DPW2 + DPW3 + DPW4 is obtained, and the tile vertical stride TSV is the size of each image in the vertical direction. If the offset value of the image [1] is (0, 0), the offset values of the images [2] to [4] are (DPW1, 0), (DPW1 + DPW2, 0), (DPW1 + DPW2 + DPW3, 0), respectively. Become. This can be obtained by adding the tile width TLW. Further, when each image has the same size of DPW1 × DPH1, it is as shown in FIG.

  Next, in the combined mode [2], as shown in FIG. 6A, the tile height TLH matches the vertical size of the image in each image, but the tile width TLW corresponds to each image. It is “1” in common. Further, the tile horizontal stride TSH is “4”, that is, four pixels, and the tile vertical stride TSV is the vertical size of each image for each image. If the offset value of the first divided pixel of the image [1] is (0, 0), the offset value of each image can be obtained by adding ‘1’ of the tile width TLW to the horizontal offset value. That is, the images [2] to [4] are obtained as (1, 0), (2, 0), and (3, 0), respectively. In order to obtain the offset value of the next divided image in each image, the tile horizontal stride TSH × tile width TLW, that is, “4” × “1” in this case, may be added to the horizontal offset value. For example, the image [1] is obtained as (4, 0), (8, 0),. Further, when each image has the same size of DPW1 × DPH1, it is as shown in FIG.

  Next, in the combination mode [3], as shown in FIG. 7A, the tile width TLW matches the horizontal size of the image in each image, but the tile height TLH corresponds to each image. It is “1” in common. The tile horizontal stride TSH is the horizontal size of each image for each image, and the tile vertical stride TSV is ‘4’, that is, four pixels. If the offset value of the first divided pixel of image [1] is (0, 0), the offset value of each image can be obtained by adding ‘1’ of tile height TLH to the vertical offset value. That is, the images [2] to [4] are obtained as (0, 1), (0, 2), and (0, 3), respectively. In order to obtain the offset value of the next divided image in each image, the tile vertical stride TSV × tile height TLH, that is, “4” × “1” in this case, may be added to the vertical offset value. For example, the image [1] is obtained as (0, 4), (0, 8),. Further, when each image has the same size of DPW1 × DPH1, it is as shown in FIG.

  Next, in the combined mode [4], as shown in FIG. 8A, the tile width TLW matches the horizontal size of the image in each image, but the tile height TLH is equal to each image. It is “1” in common. The tile horizontal stride TSH is the sum of the horizontal sizes of the images [1] and [2], that is, DPW1 + DPW2, and the images [3] and [4] are those images. Is the sum of the horizontal sizes, i.e., DPW3 + DPW4. Further, the tile vertical stride TSV is “2”, that is, two pixels in common for each image. If the offset value of the first divided pixel of the image [1] is (0, 0), the offset value of the image [3] is “1” of the tile height TLH to the vertical offset value of the image [1]. The offset values of the image [2] and the image [4] are obtained by adding the horizontal offset values of the image [1] and the image [3], respectively, to the DPW1 of the tile width TLW of the image [1] and the image [3]. And DPW3 may be added. In order to obtain the offset value of the next divided image in each image, the tile vertical stride TSV × the tile height TLH, that is, “2” × “1” in this case, may be added to the vertical offset value. For example, the image [1] is obtained as (0, 2), (0, 4),. Further, when each image has the same size of DPW1 × DPH1, it is as shown in FIG.

  Note that the method of dividing and combining images is not limited to the above four. In any case, the image processor 1 may transmit each parameter as the image data is transmitted. Then, the image division processing unit 2 may receive image data in accordance with each transmitted parameter. As a result, the image processor 1 side can transmit in various connection patterns, and the image division processing unit 2 side can receive image data uniformly regardless of the connection patterns. Further, when there are a plurality of image processing processors 1 having a unique coupling pattern, any of the image processing processors 1 can be replaced.

  In addition, the example shown in FIG. 1 has been described with four liquid crystal displays. However, the present invention is not limited to this, and the gist of the present invention is extended to n liquid crystal displays as shown in FIG. it can. For example, as an example, when nine images [1] to [9] are displayed corresponding to nine liquid crystal teaching devices 3-1 to 3-9, the image processor 1 sends a combined mode [4]. Each parameter in the case of transmitting with a 3 × 3 pattern is described below. It is assumed that each image [1] to [9] has a size of DPWi × DPHi (i = 1 to 9).

  At this time, the tile widths TLW of the images [1] to [9] are DPWi (i = 1 to 9), respectively, and the tile height TLH is “1” common to the images. The tile horizontal stride TSH is the sum of the horizontal sizes of the images [1], [2], and [3], that is, DPW1 + DPW2 + DPW3, and the images [4] and [5]. , And image [6], the sum of the horizontal sizes of these images, that is, DPW4 + DPW5 + DPW6. Further, the tile vertical stride TSV is “3”, that is, three pixels in common for each image. If the offset value of the first divided pixel of the image [1] is (0, 0), the offset value of the image [4] is set to “1” of the tile height TLH as the vertical offset value of the image [1]. The offset value of the image [7] can be obtained by adding “1” of the tile height TLH to the vertical offset value of the image [4]. The offset values of the image [2], the image [5], and the image [8] are the horizontal offset values of the image [1], the image [4], and the image [7], respectively. It is only necessary to add DPW1, DPW4, and DPW7 of tile width TLW of [4] and image [7], and the offset values of image [3], image [6], and image [9] are respectively DPW2, DPW5, and DPW8 of tile width TLW of image [2], image [5], and image [8] should be added to the horizontal offset values of image [2], image [5], and image [8] . Further, in order to obtain the offset value of the next divided image in each image, the tile vertical stride TSV × tile height TLH, that is, “3” × “1” in this case, may be added to the vertical offset value.

  As described above, according to the above-described embodiment, the image processor 1 should display n images of each resolution to be displayed in parallel on each of the n liquid crystal displays 3-1 to 3-n. Various combinations can be made by combining the data of [1] to image [n] in at least one of the horizontal direction and the vertical direction with or without being divided in at least one direction of the horizontal direction and the horizontal direction. Even in the case of transmission by the method, the image division processing unit 2 can uniformly receive the image data and perform division processing.

  The image display processing device of the present invention is employed in gaming machines such as game machines and pachinko machines having a plurality of displays.

DESCRIPTION OF SYMBOLS 1 Image processor 11 Transmission processing part 111 Transmission buffer 2 Image division processing part 21 Reception processing part 22 Image data distribution part 23-1 to 23-4 Liquid crystal signal generation part 231-1 to 231-4 Buffer 3-1 to 3- n Liquid crystal display

Claims (7)

n displays,
Data of n images of each resolution to be displayed in parallel on each of the n displays is divided in at least one of the horizontal direction and the vertical direction with or without being divided horizontally. And an image processor for transmitting in combination in at least one vertical direction;
An image division processing unit that receives the image data transmitted from the image processing processor, divides the image data into images corresponding to the n displays, and sends the images to the displays;
An image display processing device comprising:
The image processing processor transmits, as parameters, the divided / undivided information and the combined information about the horizontal direction and the vertical direction together with the image data,
The image segmentation section, the image transmitted to the tiled, have row processing of the divided based on previous Symbol parameter,
The parameters include horizontal and vertical offsets indicating the positions of image tiles obtained with or without dividing each image, tile widths and tile heights indicating the size of the image tiles, and when the images are not divided. An image display processing apparatus comprising: a tile horizontal stride and a tile vertical stride corresponding to a horizontal repetitive cycle in a horizontal direction and a vertical direction of each image in a horizontal direction, a full width in a vertical direction, or when divided . Each image image display processing apparatus according to claim 1, characterized that you have a common resolution. Each image, the image display processing apparatus according to claim 1 or 2, characterized in motion picture der Rukoto. n displays,
An image processor that transmits data of n images of each resolution to be displayed in parallel on each of the n display units in a horizontal direction and combined and transmitted in the horizontal direction and the vertical direction;
An image division processing unit that receives the image data transmitted from the image processing processor, divides the image data into images corresponding to the n displays, and sends the images to the displays;
An image display processing device comprising:
The image processing processor transmits the segmentation / non-segmentation information and the combination information regarding the horizontal direction and the vertical direction together with the image data as parameters, and the image division processing unit has been sent in a tile shape. pictures, images display processor and performs processing of the divided based on said parameter. The image display processing apparatus according to claim 4, wherein the image processor is divided in units of pixels. 6. The image display processing apparatus according to claim 4 , wherein each image has a common resolution. Each image, the image display processing apparatus according to any one of claims 4 to 6, characterized in that a moving image.

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