JP5843824B2 - Game machine - Google Patents

Description

The present invention relates to a gaming machine such as a pachinko gaming machine, and more particularly to a gaming machine capable of playing a game.

  As a gaming machine, when a game medium such as a game ball is launched into a game area by a launching device, and the game medium wins a prize area such as a prize opening provided in the game area and a start condition is satisfied, a plurality of types of identification are made. There is a pachinko gaming machine in which information (hereinafter referred to as a display symbol) is variably displayed on a variable display device, and the game interest is enhanced by a so-called variable display game that determines whether or not to give a predetermined game value based on the display result. . In such a pachinko gaming machine, a specific game state (big hit game state) advantageous to the player is obtained when the stop symbol mode when the variable display of the display symbol in the variable display game is completely stopped becomes the specific display mode. . For example, a pachinko gaming machine that has become a big hit game state has a special electric accessory called a big prize opening or an attacker opened, and a state where a player can easily win a game ball for a certain period of time continuously. provide.

  In addition, after setting a predetermined number of bets for one game using a game medium such as a medal, a coin, or a game ball similar to a pachinko gaming machine, the player operates the start lever to display on the variable display device. The variable display of the display symbol is started within the range of the maximum delay time determined in advance from the operation timing by starting the variable display of the symbol and the player operating the stop button provided corresponding to each variable display device. And a winning is generated according to the display result derived when the variable display of all the variable display devices is stopped, and a predetermined game medium predetermined according to the winning is paid out, and a specific winning is generated. In some cases, there is a slot machine configured to change the gaming state to a state in which a predetermined gaming value is given to the player.

  Among such gaming machines, particularly in pachinko gaming machines, in response to the turning on of the start opening switch that detects the winning ball that has entered the starting winning opening, a random number determination register that constitutes the random number generating means, for example, a CPU There is a technique in which a predetermined signal such as a latch pulse from an output from the start switch or an output from a start switch is input, and a count value latched in the random number determination register is acquired as a random value (for example, Patent Document 1).

JP 2000-61120 A

  In the technique described in Patent Document 1, after a count value is latched in the random number determination register by inputting a predetermined signal, a new count value is latched by, for example, noise before the count value is acquired. There is a problem that it is impossible to obtain an accurate random number value corresponding to a winning ball or the like that enters the start winning opening. Similar problems can occur not only in pachinko machines but also in gaming machines such as slot machines.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a gaming machine capable of obtaining an accurate random value.

In order to achieve the above object, a gaming machine according to the claims of the present application is a gaming machine capable of playing a game (for example, a pachinko gaming machine 1 or a slot machine 700), and game control in the gaming machine based on a gaming control processing program. A game control microcomputer (for example, the game control microcomputer 100 or the game control microcomputer 810) having a built-in control CPU (for example, the CPU 505), and a built-in or external device in the game control microcomputer And a random number circuit (for example, random number circuit 509) for generating numerical data to be a random value, and the random number circuit updates numerical value data according to a predetermined procedure and outputs it (for example, random number generation). Circuit 553 and random number sequence changing circuit 555) and the numerical value updating means. Random number storage means (for example, random value register 559A (R1D), random value register 559B (R2D), etc.) for capturing and storing numerical data as random values, and the game control microcomputer is generated by the random number circuit Control decision means (for example, the part where the CPU 505 executes the processes of steps S231 and S232) based on the random number value determined by the control CPU and a predetermined signal (for example, the first start winning signal SS1 or the like) It is in the turbulent to the oN state when the numerical data output from the numerical updating means based on the input of the random number, such as a latch signal LL1, LL2) based on the second start winning signal SS2 is stored in the random number storing means while prohibiting change of the numerical data stored in the numerical storage means, stored in said random number storage means Predetermined flag that is turned off to allow the storage of new numerical data when the numerical data is read by the control CPU in read timing of the random number value (e.g. random number latch flag RDFM 0, etc. RDFM 1) A clock signal for defining an update cycle of numerical data by the numerical value update means, and a clock signal for defining an operation cycle of the control CPU, and is built in the game control microcomputer, A non-volatile memory (for example, ROM 506) for storing a control program including the game control processing program is provided, and the game control microcomputer restricts external reading of the non-volatile memory by other than the control CPU. Circuit (for example, internal resource access control circuit 501A).
The predetermined flag may be set to the off state when the game control microcomputer recovers from a power-off state based on a decrease in the power supply voltage value (for example, the CPU 505 determines in step S121). , Execute the process of S123).

According to such a configuration, when the numerical data is stored in the random number storage unit based on the input of the predetermined signal, the predetermined flag is turned on and the numerical data stored in the random value storage unit is changed. There while being prohibited, a predetermined flag when numeric data is read from the random number storage means at a read timing of the random number value stored in the new numerical data are in the oFF state is permitted. Thereby, the numerical data stored in the random number storage means based on the input of the predetermined signal can be acquired as an accurate random value.

  Further, the numerical value updating means cyclically updates the numerical data from a predetermined update initial value to a predetermined update final value within a predetermined range in which the numerical data can be updated (for example, a random number generation circuit 553 or a random number sequence change circuit). 555), the game control microcomputer sets the predetermined update initial value every time the game control microcomputer is system-reset. It includes a random initial value setting means that can be variably set (for example, a portion where the CPU 505 executes the process of step S55, a start value setting circuit 554, etc.).

  In such a configuration, the predetermined update initial value set for the numerical value updating means to cyclically update the numerical data can be variably set every time the game control microcomputer is reset. As a result, it becomes difficult to specify numerical data that becomes a random number value after the occurrence of a system reset, and it is possible to reliably prevent fraudulent acts such as aiming.

  Further, after power supply to the gaming machine is started, the random number initial value setting is provided with counting means (for example, a free-run counter 554A) for counting initial value determination data separately from the operation of the control CPU. The means determines the predetermined update initial value using the initial value determination data counted by the counting means (for example, the start value setting circuit 554 sets the start value based on the processing of step S55 by the CPU 505). Part).

  In such a configuration, the predetermined update initial value is determined using the initial value determination data counted by the counting means separately from the operation of the control CPU. This makes it difficult to specify numerical data that is a random number value from the operation mode of the control CPU, and it is possible to reliably prevent fraudulent acts such as aiming.

  In such a configuration, the game control microcomputer includes a read restriction circuit that restricts external reading of the nonvolatile memory other than by the control CPU. This makes it difficult to read out and analyze the control program stored in the non-volatile memory from the outside of the microcomputer for game control, and to aim at the so-called “hanging board” based on the analysis result of the control program. Unauthorized acts caused by connection can be surely prevented.

  A random number clock generation circuit (for example, the random number clock generation circuit 112) that generates a random number clock signal outside the game control microcomputer and supplies the random number clock signal to the random number circuit and the control CPU. A control clock generation circuit for generating a control clock signal (for example, the control clock generation circuit 111 and the clock circuit 502), and the random number circuit is built in the game control microcomputer, and the game control micro The computer compares the input state of the random number clock signal supplied from the random number clock generation circuit with the control clock signal generated by the control clock generation circuit, thereby obtaining the input state of the random number clock signal. Random number clock abnormality determination means (for example, frequency monitor) for determining whether abnormality has occurred. Circuit 551, and includes a moiety like) CPU 505 is executing the processing in steps S62 to S66.

  In such a configuration, the input state of the random number clock signal is compared by comparing the input state of the random number clock signal supplied from the random number clock generation circuit with the control clock signal generated by the control clock generation circuit. It is determined whether or not an abnormality has occurred in the state. Thereby, it is possible to prevent the game control from being executed in a state in which an abnormality has occurred in the operation of updating the numerical data serving as the random value.

  The control start time processing means is a system reset time processing for turning off the predetermined flag when a system reset of the game control microcomputer is released and execution of game control by the control CPU is started. Means (for example, a portion where the CPU 505 executes the process of step S56).

  In such a configuration, when the system reset of the game control microcomputer is released and the execution of the game control is started, the system reset time processing means turns off the predetermined flag. Thereby, for example, it is possible to prevent the numerical data stored in the random number storage means from being erroneously acquired as a random value in a state where the power supply voltage is unstable when the power is turned on.

  Power supply monitoring means (for example, a power supply monitoring circuit) that monitors a predetermined power supply voltage generated based on power supply to the gaming machine and outputs a detection signal (for example, a power-off signal) based on the decrease in the predetermined power supply voltage 303), and the game control microcomputer repeats the detection signal input state after the detection signal is output from the power source monitoring means until the game control microcomputer is stopped. When the detection determining means (for example, the part where the CPU 505 executes the process of step S119) and the detection determining means determine that the detection signal is not input, the control CPU performs the game. The power failure recovery control means (for example, the CPU 505 is configured to start the game control from the beginning of the control processing program). The control start time processing means has not received the detection signal from the detection determination means. After the determination is made, the power interruption restoration control means turns off the predetermined flag before the control CPU starts execution of game control from the beginning of the game control processing program. It includes a processing unit at the time of restoration (for example, a portion where the CPU 505 executes the processes of steps S121 and S123).

  In such a configuration, after the detection signal is output from the power supply monitoring unit, the input state of the detection signal is repeatedly determined by the detection determination unit until the game control microcomputer is stopped. After the determination that the detection signal is not input, before the execution of the game control is started from the head of the game control processing program by the control CPU, the power failure recovery processing means has a predetermined flag. Is turned off. Thereby, it is possible to prevent the numerical data stored in the random number storage means from being erroneously acquired as a random value when the power supply voltage is unstable, for example, when the predetermined power supply voltage is lowered.

It is a front view of the pachinko gaming machine in this embodiment. It is a block diagram which shows the various control boards etc. which were mounted in the pachinko game machine. It is a block diagram which shows the structural example of a power supply board. It is a timing diagram which shows typically the state of a reset signal and a power-off signal. It is explanatory drawing which shows an example of the content of an effect control command. It is a block diagram which shows the structural example of the microcomputer for game control. It is a figure which shows an example of the address map in the microcomputer for game control. It is a figure which illustrates the main part of a program management area and a built-in register. It is a figure which shows an example of the setting content in a header and function setting. It is a figure which shows an example of the setting content in 1st random number initial setting, 2nd random number initial setting, and interruption initial setting. It is a figure which shows an example of the setting content in security time setting. It is a figure which shows the structural example etc. of an internal information register. It is explanatory drawing which illustrates the random value used as the game random number. It is a block diagram which shows the structural example of a random number circuit. It is a figure which shows the structural example etc. of a random number sequence change register. It is explanatory drawing which shows the change operation | movement of the random number update rule by a random number sequence change circuit. It is explanatory drawing which shows the change operation | movement of the random number update rule by a random number sequence change circuit. It is a figure which shows the structural example etc. of a random value acquisition register. It is a figure which shows the structural example etc. of a random number latch selection register. It is a figure which shows the structural example of a random value register. It is a figure which shows the structural example etc. of a random number latch flag register. It is a figure which shows the structural example etc. of a random number interrupt control register. It is a figure which shows the structural example in case a random number circuit is externally attached to the microcomputer for game control. It is a figure which shows the structural example etc. of an input port register. It is a figure which illustrates a fluctuation pattern. It is a figure which illustrates a variation pattern classification. It is a figure which shows the structural example of a special figure display result determination table. It is a figure which shows the structural example of a big hit classification determination table. It is a figure which shows the structural example of a reach determination table. It is a figure which shows the structural example of a variation pattern classification determination table. It is a figure which shows the structural example of a variation pattern classification determination table. It is a figure which shows the structural example of a fluctuation pattern determination table. It is a figure which shows the structural example of a starting opening prize table. It is a block diagram which shows the structural example of the data holding area for game control. It is a flowchart which shows an example of a security check process. It is a flowchart which shows an example of a game control main process. It is a flowchart which shows an example of a random number circuit setting process. It is a flowchart which shows an example of a random number circuit abnormality test | inspection process. It is a flowchart which shows an example of the timer interruption process for game control. It is a flowchart which shows an example of a power-off process. It is a flowchart which shows an example of a special symbol process process. It is a flowchart which shows an example of a start winning determination process. It is a flowchart which shows an example of a process at the time of starting port passage. It is a flowchart which shows an example of a special symbol normal process. It is a flowchart which shows an example of a fluctuation pattern setting process. It is a flowchart which shows an example of a special symbol stop process. It is a flowchart which shows an example of production control main processing. It is a flowchart which shows an example of production control process processing. It is a timing chart for demonstrating operation | movement in a random number circuit. 7 is a timing chart for explaining a read operation of a random value register, and the like. It is a timing chart for demonstrating the operation | movement etc. at the time of the fall of a power supply voltage. It is a front view of the slot machine to which this invention is applied. It is a block diagram which shows the various control boards etc. which are mounted in a slot machine.

  Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a front view of a pachinko gaming machine according to the present embodiment and shows an arrangement layout of main members. The pachinko gaming machine (gaming machine) 1 is roughly composed of a gaming board (gauge board) 2 constituting a gaming board surface and a gaming machine frame (base frame) 3 for supporting and fixing the gaming board 2. The game board 2 is formed with a substantially circular game area surrounded by guide rails. In this game area, a game ball as a game medium is shot and shot by a ball hitting device including a shooting motor 61 shown in FIG.

  A first special symbol display device 4A and a second special symbol display device 4B are provided at predetermined positions of the game board 2 (in the example shown in FIG. 1, on the right side of the game area). Each of the first special symbol display device 4A and the second special symbol display device 4B is composed of, for example, 7-segment or dot matrix LEDs (light emitting diodes). Special symbols (also referred to as “special graphics”), which are a plurality of types of identification information (special identification information) that can be displayed, are variably displayed (variable display). For example, each of the first special symbol display device 4A and the second special symbol display device 4B variably displays a plurality of types of special symbols composed of numbers indicating "0" to "9", symbols indicating "-", and the like. To do. The special symbols displayed on the first special symbol display device 4A and the second special symbol display device 4B are composed of numbers indicating "0" to "9", symbols indicating "-", and the like. There is no limitation, and for example, a plurality of types of lighting patterns in which the combination of the LED to be turned on and the LED to be turned off in the 7-segment LED may be set in advance as a plurality of types of special symbols. A plurality of special symbols are assigned symbol numbers corresponding thereto. As an example, symbol numbers “0” to “9” are assigned to numbers indicating “0” to “9”, and symbol numbers “10” are assigned to symbols indicating “−”. Just do it. Hereinafter, the special symbol variably displayed by the first special symbol display device 4A is also referred to as "first special symbol", and the special symbol variably displayed by the second special symbol display device 4B is also referred to as "second special symbol". .

  A first hold indicator 25A and a second hold indicator 25B are provided above the first special symbol display device 4A and the second special symbol display device 4B. Each of the first hold indicator 25A and the second hold indicator 25B displays the variable display hold memory number (special figure hold memory number) in the special figure game so that it can be specified (special figure hold memory display). As an example, the first hold indicator 25A displays the variable display hold memory number (first special figure hold memory number) in the special figure game using the first special figure by the first special symbol display device 4A so as to be specified. To do. The second hold indicator 25B displays the variable display hold memory number (second special figure hold memory number) in the special figure game using the second special figure by the second special symbol display device 4B so that it can be specified. The variable display hold memory in the special game is started when the game ball passes (enters) the first start winning opening formed by the normal winning ball apparatus 6A and the second starting winning opening formed by the normal variable winning ball apparatus 6B. Occurs when winning a prize. That is, the start condition (also referred to as “execution condition”) for executing a variable display game such as a special figure game or a variable display of decorative symbols has been established, but a variable display game based on the previously established start condition is being executed. The start that is established when the start condition for starting the variable display game is not satisfied because the game state in the pachinko gaming machine 1 is controlled to the big hit game state or the small hit game state. The variable display holding storage corresponding to the condition is performed. Each of the first hold indicator 25A and the second hold indicator 25B has a number (for example, 4) corresponding to an upper limit value (for example, “4”) in each of the first special figure hold memory number and the second special figure hold memory number, for example. As long as it is configured to include a plurality of LEDs.

  A normal symbol display 20 is provided at a predetermined position of the game board 2 (on the left side of the game area in the example shown in FIG. 1). As an example, the normal symbol display 20 is composed of 7 segments, dot matrix LEDs, and the like, like the first special symbol display device 4A and the second special symbol display device 4B, and a plurality of types of identification information different from the special symbols. Is displayed (variably displayed) in a variable manner. Such variable display of normal symbols is called a general game (also referred to as “normal game”). The normal symbol display 20 variably displays, for example, a plurality of types of normal symbols composed of numbers indicating “0” to “9”, symbols indicating “−”, and the like. A plurality of types of normal symbols are assigned symbol numbers corresponding thereto. As an example, symbol numbers “0” to “9” are assigned to numbers indicating “0” to “9”, and symbol numbers “10” are assigned to symbols indicating “−”. Just do it. The normal symbol display 20 is not limited to the one that variably displays the numbers indicating “0” to “9” or the symbols indicating “−” as normal symbols. For example, “O” and “X” are displayed. Ordinary symbols are variably displayed by alternately lighting the decorative lamps (or LEDs) to be displayed, or by lighting a plurality of decorative lamps (or LEDs) such as “left”, “middle”, and “right” in a predetermined order. It may be a thing.

  Above the normal symbol display 20, a universal figure holding display 25 </ b> C is provided. The general figure hold display unit 25C displays the variable display hold memory number (the general figure hold memory number) in the general game so that it can be specified (the general figure hold memory display). Here, the variable display hold storage in the usual game occurs when the game ball passes through the passing gate 41 provided in the game area. That is, when the condition for executing the variable display of the usual game is established, but the condition for starting the usual game is not established, the pending game is stored. The general-purpose hold display unit 25C may be configured to include, for example, a number (for example, four) of LEDs corresponding to the upper limit value (for example, “4”) of the general-purpose reserved storage number.

  An image display device 5 is provided near the center of the game area on the game board 2. The image display device 5 is composed of, for example, a liquid crystal display (LCD) or the like, and forms a display area for displaying various effect images. In the display area of the image display device 5, the first special symbol variable display by the first special symbol display device 4A and the second special symbol variable display by the second special symbol display device 4B in the special symbol game respectively correspond to the variable display. For example, in a decorative symbol display unit serving as a variable display unit divided into a plurality of parts such as three, decorative symbols that are a plurality of types of identification information (decorative identification information) that can be identified are variably displayed.

  As an example, “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R are arranged in the display area of the image display device 5. Then, in the special symbol game, any one of the variable display of the first special symbol by the first special symbol display device 4A and the variable display of the second special symbol by the second special symbol display device 4B is started. In response to this, variable display of decorative symbols (for example, vertical or horizontal scroll display) is performed in all of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R. Be started. Thereafter, when the fixed special symbol is stopped and displayed as a variable display result in the special symbol game (completely stopped display), the “left”, “middle”, and “right” decorative symbol display portions 5L in the image display device 5 are displayed. At 5C and 5R, the fixed decorative symbol (final stop symbol) that is the variable display result of the decorative symbol is stopped (completely stopped). The “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R are movable within the display area of the image display device 5, and display the decorative symbols in a reduced or enlarged manner. You may be able to do that. When the special symbol or the decorative symbol is completely stopped and displayed, the display result in the variable display of each symbol is definitely displayed, and thereafter, the display state is such that the player can recognize that the current variable display does not proceed. On the other hand, during the variable display from the start of the variable display of the decorative pattern until the fixed decorative pattern that is the variable display result is displayed completely stopped, the variation speed of the decorative pattern becomes “0”. Ornamental symbols may be displayed in a stationary state, for example, in a display state that causes slight shaking or expansion / contraction. Such a display state is also called a temporary stop display, and although the display result in the variable display is not displayed deterministically, the player can recognize that the variation of the decorative pattern due to the scroll display or the update display is not progressing. It becomes. The temporary stop display may include displaying the decorative symbols completely stopped for a time shorter than a predetermined time (for example, 1 second) without causing slight shaking or expansion / contraction. Stopping and displaying the display symbol to the extent that the player can recognize that the variation of the special symbol or the decorative symbol is not progressing like the complete stop display or the temporary stop display is also referred to as a derivation display.

  The decorative symbols variably displayed on the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R include, for example, eight types of symbols (alphanumeric characters “1” to “8” or Chinese characters). Numbers “1” to “8”, English letters “A” to “H”, effect images showing eight characters related to a predetermined motif, effect images combining numbers, characters or symbols and characters, and the like. The effect image indicating the character may include, for example, a person or an animal, an object other than these, a symbol such as a character, or an image indicating any other figure. In addition to these eight types of decorative symbols, a blank symbol (a symbol that does not constitute a jackpot combination) may be included. A corresponding symbol number is assigned to each of the decorative symbols. For example, symbol numbers “1” to “8” are assigned to alphanumeric characters indicating “1” to “8”, respectively. Note that the number of types of decorative symbols that are variably displayed is not limited to eight, but may be any number of decorative symbols.

  While the decorative symbols are changing, in the decorative symbol display portions 5L, 5C, and 5R of “left”, “middle”, and “right”, for example, from the smallest to the largest symbol numbers, for example, from top to bottom. Alternatively, a scrolling display that flows from the right side to the left side is performed. Then, when the decorative symbol having the largest symbol number (for example, “8”) is displayed, the decorative symbol having the smallest symbol number (for example, “1”) is displayed. Alternatively, in at least one of the decorative symbol display portions 5L, 5C, and 5R (for example, the “left” decorative symbol display portion 5L), the symbol number is scrolled from the largest to the smallest, and the symbols are displayed. When the decorative design having the smallest number is displayed, the decorative design having the largest design number may be displayed.

  In the display area of the image display device 5, a start winning storage display 5H is also arranged. The start winning memory display unit 5H displays the variable display holding memory number (special drawing holding memory number) in the special figure game so as to be specified. As an example, the start winning memory display section 5H is provided with a plurality of display parts whose display colors are changed from left to right in order from the variable display game in which the start condition is established based on the occurrence of the start winning. Yes. When the start condition (first start condition) of the special figure game using the first special figure in the first special symbol display device 4A is established based on the game ball entering the first start winning opening, the One of the display parts that are displayed (transparent color) (for example, the leftmost display part among the non-displayed display parts) is changed to blue display. Further, when a special ball game start condition (second start condition) using the second special figure in the second special symbol display device 4B is established based on the game ball entering the second start winning opening, it is normally not One of the displayed display parts is changed to a red display. Thereafter, when one of the start condition (first start condition) of the special figure game using the first special figure and the start condition (second start condition) of the special figure game using the second special figure is established, for example, The display at the leftmost display part is removed and the display at each display part is moved leftward one by one. At this time, one of the display parts that have changed to blue display or red display (for example, the display part at the right end of the display part whose display color has changed) returns to non-display. Here, when the hold memory display is performed, the special figure hold memory number based on the establishment of the variable display game start condition can be specified, but the start condition is the first start condition or the second start condition. If it cannot be specified, the display mode of the special figure reserved memory number may be changed to a predetermined display mode, for example, by changing the number of display parts corresponding to the special figure reserved memory number to gray display. .

  In the start winning memory display section 5H, a number indicating the special figure reserved memory number may be displayed so that the player or the like can recognize the special figure reserved memory number. In the example shown in FIG. 1, a first hold indicator 25A and a second hold indicator 25B are provided above the first special symbol display device 4A and the second special symbol display device 4B together with the start winning memory display unit 5H. It has been. On the other hand, you may make it provide only any one among the start winning memory | storage display part 5H, and the 1st hold | maintenance indicator 25A and the 2nd hold | maintain indicator 25B.

  The display area of the image display device 5 may be provided with a color symbol display unit that variably displays a color symbol as identification information different from the decorative symbol. As an example, when the special symbol game using the first special symbol by the first special symbol display device 4A is started in the color symbol display unit, the variation of the color symbol (for example, display color update display) is started. When the special symbol game using the second special symbol is started by the “left” color symbol display unit and the second special symbol display device 4B, the variation of the color symbol is started. The display part should just be included. Then, when the fixed special symbol that is the variable display result in the special graphic game is completely stopped and displayed, the variation of the color symbol is finished, and the fixed color symbol that is the variable display result of the color symbol is completely stopped and displayed. There are, for example, five types of symbols (“yellow”, “green”, “red”, “blue”, “purple”, etc.) for the color symbols variably displayed on the “left” and “right” color symbol display sections. It is sufficient that a plurality of types of color designs are included. Each of the color symbols is assigned a corresponding symbol number. As an example, the symbol numbers “1” to “5” may be assigned to the color symbols “yellow”, “green”, “red”, “blue”, and “purple”. For example, when the variable symbol display result (special symbol display result) is “losing”, the color symbol variable symbol display result is “yellow”, and the special symbol display result is “big hit”. When the big hit type is “non-probable change”, the fixed color design of “green” is stopped and displayed as the variable display result of the color design, the special figure display result is “big hit” and the big hit type is “probable change” In this case, the fixed color design of “red” is stopped and displayed as the variable symbol display result, and when the special symbol display result is “big hit” and the big hit type is “surprise”, the variable symbol display result is “ When the “blue” fixed color symbol is stopped and the special symbol display result is “small hit”, the “purple” fixed color symbol may be stopped and displayed as the variable symbol display result.

  Below the image display device 5, an ordinary winning ball device 6A and an ordinary variable winning ball device 6B are provided. The normal winning ball device 6A forms a first start winning opening that is always kept in a certain open state by a predetermined ball receiving member, for example. The normal variable winning ball apparatus 6B is an electric tulip type having a pair of movable wing pieces that are changed into a normal open state that is a vertical position and an expanded open state that is a tilt position by a solenoid 81 for a normal electric accessory shown in FIG. An accessory (ordinary electric accessory) is provided to form a second start winning opening. As an example, in the normally variable winning ball apparatus 6B, the movable wing piece is in the vertical position when the solenoid 81 for the ordinary electric accessory is in the off state, so that the game ball is unlikely to enter the second start winning opening. It becomes an open state. On the other hand, in the normal variable winning ball apparatus 6B, the movable wing piece is in the tilting position when the solenoid 81 for the normal electric accessory is in the on state, so that the game ball can easily enter the second start winning opening. Expanded open state. In the normal variable winning ball apparatus 6B, although the game ball can enter the second start winning opening even in the normal open state, there is a possibility that the game ball may enter more than in the expanded open state. You may comprise so that it may become low. Alternatively, the normally variable winning ball apparatus 6B may be configured such that the game ball does not enter the second starting winning opening in the normally open state, for example, by closing the second starting winning opening.

  A game ball that has entered the first start winning opening formed in the normal winning ball apparatus 6A is detected by, for example, a first start opening switch 22A shown in FIG. A game ball that has entered the second start winning opening formed in the normal variable winning ball apparatus 6B is detected by, for example, a second start opening switch 22B shown in FIG. Based on the detection of the game ball by the first start port switch 22A, a predetermined number (for example, three) of game balls are paid out as prize balls, and the first reserved memory number is set to a predetermined upper limit value (for example, “4”). ) If the following, the first start condition is satisfied. Based on the detection of the game ball by the second start port switch 22B, a predetermined number (for example, three) of game balls are paid out as prize balls, and if the second reserved memory number is equal to or less than a predetermined upper limit value, The second start condition is satisfied. The number of prize balls to be paid out based on the detection of the game ball by the first start port switch 22A and the number of prize balls to be paid out based on the detection of the game ball by the second start port switch 22B. May be the same number or different numbers.

  A special variable winning ball device 7 is provided below the normal winning ball device 6A and the normal variable winning ball device 6B. The special variable winning ball apparatus 7 includes a large winning opening door that is opened and closed by a solenoid 82 for the large winning opening door shown in FIG. 2, and is opened (first state) and closed (first state) by the large winning opening door. 2) to form a big prize opening. As an example, in the special variable winning ball apparatus 7, when the solenoid 82 for the special prize opening door is in the off state, the special prize opening door closes the special prize opening. On the other hand, in the special variable winning ball apparatus 7, when the solenoid 82 for the big prize opening door is in the ON state, the big prize opening door opens the big winning opening. A game ball that has entered a special winning opening formed in the special variable winning ball apparatus 7 is detected by, for example, a count switch 23 shown in FIG. Based on the detection of the game ball by the count switch 23, a predetermined number (for example, 13) of game balls are paid out as prize balls.

  In addition to the above-described configuration, the surface of the game board 2 is provided with a windmill for changing the flow direction and speed of the game ball and a number of obstacle nails. In addition, as a winning opening different from the first starting winning opening, the second starting winning opening, and the large winning opening, for example, one or a plurality of general winning openings that are always kept open by a predetermined ball receiving member are provided. May be. In this case, a predetermined number (for example, 10) of game balls may be paid out as a prize ball based on the fact that a game ball that has entered one of the general prize openings is detected by a predetermined general prize ball switch. In the lowermost part of the game area, there is provided an out port through which game balls that have not entered any winning port are taken. Speakers 8L and 8R for reproducing and outputting sound effects and the like are provided at the left and right upper positions of the gaming machine frame 3, and a game effect lamp 9 is provided at the periphery of the game area. A decorative LED may be arranged around each structure (for example, the normal winning ball device 6A, the normal variable winning ball device 6B, the special variable winning ball device 7, etc.) in the game area of the pachinko gaming machine 1.

  At the lower right position of the gaming machine frame 3, there is provided an operation knob 30 serving as a hitting operation handle operated by a player or the like to launch a game ball as a game medium toward the game area. For example, the resilience of the game ball is adjusted according to the operation amount (rotation amount) by the player or the like. The hitting operation handle only needs to be provided with a single shot switch or a touch ring (touch sensor) for stopping the driving of a shooting motor included in the hitting ball shooting device. At a predetermined position of the gaming machine frame 3 below the gaming area, a game ball paid out as a prize ball or a game ball lent out by a predetermined ball lending machine is held (stored) so as to be supplied to a ball hitting device. ) Is provided. For example, an operation button that can be operated by the player by a pressing operation or the like may be provided at a predetermined position in the gaming machine frame 3 of the pachinko gaming machine 1 such as a central position on the front side of the upper surface of the hitting ball supply tray. Further, below the hitting ball supply tray, there is provided an extra ball receiving tray (lower plate) that holds (stores) game balls that cannot be stored in the hitting ball supply tray.

  Furthermore, a prepaid card unit (card unit) for executing processing for enabling ball lending using a prepaid card or the like may be installed at a predetermined position adjacent to the pachinko gaming machine 1. The card unit may not only execute a lending process by taking a prepaid card, but may also execute a lending process by taking a membership card or cash.

  In the normal game with the normal symbol display 20, the normal symbol display 20 shows that the game ball that has passed through the passing gate 41 provided in the game area is detected by the gate switch 21 shown in FIG. After the general chart start condition for executing variable display is established, based on the fact that the general chart start condition for starting variable display of normal symbols, such as the end of the previous general chart game, is established, Be started. In this normal game, after a normal symbol change is started, when a predetermined variable display time (normal symbol change time) elapses, a fixed normal symbol that is a variable symbol display result is displayed in a completely stopped manner. The variable symbol display time may be determined as one of a plurality of variable display times by, for example, extracting numerical data indicating a predetermined random value at the start of each normal game. . If a specific normal symbol (a symbol per symbol) such as a number indicating “7” or a symbol indicating “O” is stopped and displayed as a fixed normal symbol that is a variable display result of the normal symbol in the normal game, The variable display result of the normal symbol is “per standard”. On the other hand, if a normal symbol other than the symbol per symbol such as a number other than the number indicating “7” or a symbol indicating “x” is stopped and displayed as the fixed normal symbol, for example, the variable display result of the normal symbol is “ It will be “usually lost”. Corresponding to the fact that the variable symbol display result of the normal symbol is “per normal symbol”, the expansion / release control is performed in which the movable wing piece of the electric tulip constituting the normal variable winning ball apparatus 6B is tilted, for a predetermined time. When elapses, normal opening control is performed to return to the vertical position.

  The special symbol game by the first special symbol display device 4A is caused by the fact that the game ball that has entered the first starting winning port formed in the normal winning ball device 6A is detected by the first starting port switch 22A shown in FIG. The process starts when the first start condition is satisfied after the first start condition is satisfied. The first start condition is satisfied when the current special figure game using the first special figure can be started, for example, when the previous special figure game, the big hit game state, or the small hit game state is finished. In the special game by the second special symbol display device 4B, a game ball that has entered the second start winning port formed in the normal variable winning ball device 6B is detected by the second start port switch 22B shown in FIG. Is started based on the fact that the second start condition is satisfied after the second start condition is satisfied. The second start condition is satisfied when the current special figure game using the second special figure can be started, for example, when the previous special figure game, the big hit gaming state, or the small hit gaming state is finished.

  In the special symbol game by the first special symbol display device 4A or the second special symbol display device 4B, after a predetermined variable display time (special symbol variation time) elapses after the variable symbol special display is started, the special symbol is displayed. The fixed special symbol that will be the variable display result is displayed as a complete stop. The special symbol variable display time is, for example, numerical data indicating a random value MR4 for determining a variation pattern type as shown in FIG. 14 or numerical data indicating a random value MR5 for determining a variation pattern at the start of each special graphic game. Corresponding to the variation pattern determined based on the above, it is determined as one of a plurality of types of variable display times. The variable display result of the special symbol in the special figure game is also called a special figure display result. If a specific special symbol (big hit symbol) is stopped and displayed as a fixed special symbol that will be the variable display result of the special symbol in the special symbol game, it will be a “big hit” as the specific display result, and a specific special that is different from the big bonus symbol If the symbol (small hit symbol) is stopped and displayed, it will be the “small hit” as the predetermined display result. If the special symbol (losing symbol) other than the big hit symbol or small hit symbol is stopped, the non-specific display result will be displayed. It becomes "losing". After the variable display result in the special figure game becomes “big hit”, the game is controlled to the big hit gaming state as the specific gaming state. Further, after the variable display result in the special figure game becomes “small hit”, the game is controlled to the small hit game state different from the big hit game state. In the pachinko gaming machine 1 in this embodiment, as an example, numbers indicating “1”, “3”, and “7” are jackpot symbols, numbers indicating “5” are jackpot symbols, and “−” is indicated. The symbol is a lost pattern. It should be noted that each symbol such as a big win symbol, a small bonus symbol, or a lose symbol in the special symbol game by the first special symbol display device 4A is different from each symbol in the special symbol game by the second special symbol display device 4B. Alternatively, a special symbol common to both special symbol games may be a big hit symbol, a small bonus symbol, or a lost symbol.

  In this embodiment, among the special symbols indicating the numbers “1”, “3”, and “7” that are jackpot symbols, the special symbols indicating the numbers “3” and “7” are 15 round jackpot symbols, A special symbol indicating the number “1” is a two-round jackpot symbol. In the big hit gaming state (15 round big hit state) as the first specific gaming state controlled after the 15 round big hit symbol is stopped and displayed as a confirmed special symbol in the special figure game, the open / close plate of the special variable winning ball apparatus 7 is The special variable winning ball apparatus 7 is played by opening the large winning opening in a predetermined period (for example, 29 seconds) which is the first period or until a predetermined number (for example, 9) of winning balls are generated. A round is performed that changes to a first state that is advantageous to the user. In this way, the open / close plate that opened the grand prize opening during the round receives the game ball falling on the surface of the game board 2, and then closed the grand prize opening to play the special variable prize ball device 7 as a game. Change to the second state, which is disadvantageous to the person, and finish one round. In the 15 round big hit state, the number of executions of the round, which is the open cycle of the big prize opening, is the first number (for example, “15”). A game in the 15 round big hit state in which the number of round executions is “15” is also referred to as a 15-time open game.

  In the big hit gaming state (two round big hit state) as the second specific gaming state controlled after the two round big hit symbol is stopped and displayed as the confirmed special symbol in the special figure game, the special variable winning ball apparatus 7 is played in each round. The period for changing to the first state that is advantageous to the player (the period in which the big prize opening is opened by the opening / closing plate) is a second period (for example, 0.5 seconds) shorter than the first period in the 15 round big hit state. . In the 2 round big hit state, the number of executions of the round is a second number (for example, “2”) smaller than the first number in the 15 round big hit state. In addition, in the two round big hit state, at least one of the period in which the big winning opening is opened in each round is the second period and the number of executions of the round is the second number is performed. Control other than that may be performed, and other control may be performed in the same manner as in the 15 round big hit state. A game in a round-two big hit state in which the number of round executions is “2” is also referred to as a two-time open game. In the two-round big hit state, the predetermined winning ball device provided separately from the special variable winning ball device 7 in each round is changed from the second state which is disadvantageous to the player to the first state which is advantageous to the player. It is also possible to return to the second state after a predetermined period (first period or second period) has elapsed.

  Further, among the special symbols indicating the numbers “3” and “7” which are the 15-round jackpot symbol, the special symbol indicating the number “3” is stopped and displayed as the confirmed special symbol in the special game 15 After the round big hit state is over, as one of the special game states, the special symbol variation time (special diagram variation time) in the special figure game is controlled to be a short time state as compared with the normal state. Here, the normal state is a game state other than a special game state such as a big hit game state or a special game state such as a short-time state, and an initial setting state of the pachinko gaming machine 1 (for example, when a system reset is performed) Thus, the same control as in the state in which the initialization process is executed after power-on is performed. If the time-short state is terminated when any of the conditions of the special game is executed a predetermined number of times (for example, 100 times) and the variable display result is “big hit” is satisfied first, Good. In addition, after the 15 round big hit state based on the fact that the special symbol indicating the number “3” out of the 15 round big hit symbols is stopped and displayed as a confirmed special symbol in the special figure game, it does not become the short-time state. You may make it be in a normal state. Like the special symbol indicating the number “3”, the 15 round jackpot symbol controlled to the short-time state or the normal state after the jackpot gaming state based on being stopped and displayed as the confirmed special symbol in the special symbol game is This is called a non-probable big hit symbol (also referred to as “normal big hit symbol”). The variable display mode of special symbols and decorative symbols when the confirmed special symbol in the special figure game is a non-probable big hit symbol is "non-probable change" (also called "normal") when the variable display result is "big hit" This is referred to as a variable display mode (also referred to as “big hit type”).

  Out of the special symbols showing the numbers “3” and “7” that will be the 15-round jackpot symbol, the 15-round jackpot is based on the special symbol showing the number “7” being stopped and displayed as a confirmed special symbol in the special game. After the state is over, or after the two round jackpot state is over based on the fact that the special symbol indicating the number “1” that becomes the two-round jackpot symbol is stopped and displayed as the confirmed special symbol in the special figure game, As one of the special game states different from the normal game state, for example, the special figure change time is shortened compared to the normal state, and the probability change state (high probability game state) in which probability change control (probability change control) is continuously performed is controlled. Is done. In this probability change state, the variable display result of each special figure game and the decorative symbol variable display is improved so that the probability that the variable display result becomes “big hit” and is further controlled to the big hit gaming state is higher than in the normal state. Such a probability change state may be continued until the next variable display result becomes “big hit” regardless of the number of executions of the special game. On the other hand, after the certainty change state is reached, any one of the conditions that the special game is executed a predetermined number of times (for example, 100 times) and the variable display result is “big hit” is first. You may make it complete | finish when it is materialized. In addition, even if the special figure game is executed a predetermined number of times in the probability change state or before the variable display result is “big hit”, the probability change state ends at a predetermined rate when the special figure game is started. There may be.

  Like the special symbol indicating the number “7”, the 15-round jackpot symbol controlled to the probable change state after the jackpot gaming state based on being stopped and displayed as the confirmed special symbol in the special symbol game is a probabilistic big hit symbol. It is called. The variable display mode of special symbols and decorative symbols when the confirmed special symbol in the special figure game becomes a probable big hit symbol is variable "probable change" (also called "probable big hit") when the variable display result is "big hit". It is referred to as a display mode (also referred to as “big hit type”). Like the special symbol indicating the number “1”, the two-round big hit symbol controlled to the probable change state after the big hit gaming state based on being stopped and displayed as the confirmed special symbol in the special figure game is a sudden big hit symbol. It is called. The variable display mode of special symbols and decorative symbols when the confirmed special symbol in the special figure game is a sudden big hit symbol is “surprise” (“surprise big hit” or “sudden probability big hit” when the variable display result is “big hit”. ")" As a variable display mode (also referred to as "big hit type").

  In the probabilistic state and the short time state, the normal symbol display unit 20 controls the normal symbol variable display time in the normal symbol game to be shorter than that in the normal state, and the normal symbol variable display result of each time the normal symbol game is “normal”. Control for improving the probability of “per figure” than in the normal state, when the tilt time of the movable blade piece in the normal variable winning ball apparatus 6B based on the fact that the variable display result is “per normal figure” is in the normal state The player can be more likely to satisfy the second start condition by increasing the possibility that the game ball will enter the second start winning opening, such as a control for making it longer and a control for increasing the number of tilts than in the normal state. Control which is advantageous to the user is performed. It should be noted that any one of these controls may be performed in the probability variation state or the short time state, or a plurality of controls may be performed in combination. The control to be performed may be different between the probability variation state and the time-short state, or the combination of the controls to be performed (which may or may not include the same control) may be different.

  After the small hit symbol is stopped and displayed as the confirmed special symbol in the special symbol game, the small hit game state different from the big hit game state is controlled. In this small hit gaming state, a variable winning operation for changing the special variable winning device 7 to the first state advantageous to the player is performed as in the two round big hit state. That is, in the small hit game state, for example, the operation of opening the large winning opening over the second period by the opening / closing plate provided in the special variable winning ball apparatus 7 is repeatedly executed until the second number of times is reached. In the small hit gaming state, similarly to the two round big hit state, the period in which the big prize opening is in the open state is the second period, and the number of executions of the operation in which the big prize opening is in the open state is the second number. It may be controlled so that at least one of them is performed. After the small hit gaming state ends, the gaming state is not changed, and the game state before the variable display result becomes “small hit” is continuously controlled. However, if it is determined to end the short-time state corresponding to the variable display game in which the variable display result is “small hit”, the normal state is controlled after the end of the small hit gaming state. It will be. A game in the small hit gaming state in which the number of times that the big winning opening is opened by the variable winning operation is “2” is also referred to as a two-time open game, similar to the game in the two round big hit state. When the winning ball device provided separately from the special variable winning ball device 7 in each round in the two round big hit state is changed to the first state, the same as the two round big hit state in the small hit gaming state. In the aspect, the winning ball apparatus may be changed to the first state.

  In the display area of the image display device 5, variable display of decorative symbols is performed in response to variable display of special symbols by the first special symbol display device 4A and the second special symbol display device 4B. That is, in the display area of the image display device 5, for example, the “left”, “middle”, or “right” decorative symbol display portion 5 </ b> L based on the fact that either the first start condition or the second start condition is satisfied. In all of 5C and 5R, decorative symbols are displayed in an accelerated manner (all symbols accelerated display). When a predetermined speed is reached, the decorative symbols are displayed at a constant speed (all symbols are displayed at a constant speed). Such all symbols acceleration display and all symbols constant speed display are included in all symbol variations that variably display the ornament symbols in all of the “left”, “middle”, and “right” ornament symbol display portions 5L, 5C, and 5R. . After all the symbols change, for example, display the symbols in a decelerating display (each symbol deceleration display) in a predetermined order such as “Left” → “Right” → “Medium”. While stopping and displaying, for example, temporary stop display that causes slight shaking or expansion / contraction is performed. Then, when the elapsed time from the start of the variable display of the decorative pattern reaches the variable display time determined based on the variation pattern or the like, the fixed decorative pattern that is the variable display result is displayed in a completely stopped state. Note that the procedure for stopping and displaying the confirmed decorative symbols is not limited to displaying the decorative symbols in a predetermined order in the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R. In each of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R, a decorative symbol that is a confirmed decorative symbol at the same time may be displayed in a decelerating display (all symbol decelerating display).

  After all symbols change is started, the decorative symbols are reach-displayed on all or some of the decorative symbol display portions 5L, 5C, and 5R of “left”, “middle”, and “right”. It may be derived and displayed in the state. Here, the reach display state refers to a decorative symbol that has not yet been derived and displayed when the decorative symbol derived and displayed in the display area of the image display device 5 forms a part of the jackpot combination (“reach variation symbol”). ")" Is a display state in which the variation continues, or a display state in which all or part of the decorative symbols change synchronously while constituting all or part of the jackpot combination. Specifically, some of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R (for example, “left” and “right” decorative symbol display portions 5L and 5R, etc.) The remaining decorative symbol display part (for example, “medium”) that has not yet been derived and displayed when the decorative symbol (for example, the decorative symbol indicating the alphanumeric character “7”) constituting the determined jackpot combination is derived and displayed. In the symbol display portion 5C, etc., the decorative symbols are changing, or the decorative symbols are big hits in all or part of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R. This is a display state that changes in synchronization while constituting all or part of the combination. Further, in response to the reach display state, an effect image such as an animation image or a live-action image different from the decorative design is displayed in the display area of the image display device 5, the display mode of the background image is changed, There are times when the variation pattern of the decorative design is changed. Such an effect image display, background image display mode change, and decorative pattern change mode change are referred to as reach effect display (or simply reach effect). Some reach productions are set such that when they appear, a big hit is likely to occur (a high probability is a big win) compared to a normal reach production (normal reach). Such a special reach production is also called a super reach production (or simply “super reach”). As an example, for reach production that becomes super reach, after performing a reach production similar to normal reach until a predetermined time elapses, for example, a decorative pattern such as a background image display mode, a displayed character, a decorative pattern variation direction, etc. The change of the production mode (so-called “development”) by changing at least one of the fluctuation modes before the reach display state or at the time of the normal reach, and the reach production peculiar to the super reach It is sufficient if the introduction part in is started. In addition, in the reach production that becomes super reach, when the decorative design is derived and displayed in the reach display state, the introduction part in the reach production peculiar to super reach is started without performing the reach production similar to the normal reach. Things may be included.

  In addition, during the variable display of decorative symbols, unlike reach production, there is a possibility that the decorative symbols may be derived and displayed in the reach state, and that the variable display result may be a “hit”, There may be a case where a specific effect for informing the player is given in accordance with a variable display mode of the decorative design. In this embodiment, specific effects such as “slip” and “pseudo-run” are set to be executable. In addition, the specific effect in this embodiment should just change a special figure fluctuation time according to whether a corresponding effect operation is performed. For example, when a specific effect is executed, it is only necessary that the special figure change time becomes longer than when the specific effect is not executed.

  In the specific effect of “sliding”, after performing all symbol variations that change the ornament symbols in all of the “left”, “middle”, and “right” ornament symbol display portions 5L, 5C, and 5R, two or more After the decorative symbols are temporarily stopped and displayed on the decorative symbol display portions (for example, the “left” and “right” decorative symbol display portions 5L, 5R, etc.), a predetermined number (for example, of the decorative symbol display portions that are temporarily stopped and displayed) “1” or “2”), the decorative symbol display unit (for example, one or both of the “left” decorative symbol display unit 5L and the “right” decorative symbol display unit 5R) is changed again. The effect display which changes the decorative design to be stopped and displayed by performing the stop display later is performed. In addition, in the temporary stop display of the decorative design in the specific effect, while the decorative design is stopped and displayed, for example, by performing a fluctuation change display or immediately changing the decorative design only by a short stop, etc. What is necessary is just to alert | report that the decoration symbol stopped and displayed to the player is not decided. Alternatively, in the temporary stop display, the decorative design may be re-fluctuated after the decorative design is stopped to the extent that the player recognizes that the decorative design that has been stopped is confirmed.

  In the “pseudo-ream” specific production, all symbol fluctuations are started in response to the first start condition or the second start condition for starting the variable display of special symbols and decorative symbols being established once. , “Left”, “Medium”, “Right” decorative symbols are displayed on all 5 L, 5 C, 5 R sequentially or simultaneously, and then “Left”, “Middle”, “Right” "Revariable display operation (revariation) for changing the decorative symbols again in all of the decorative symbol display portions 5L, 5C, 5R" is performed for a predetermined number of times (for example, up to three times). As an example, in the specific effect of “pseudo train”, the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R have a plurality of types of decorative symbols that are predetermined as pseudo-success chances. One of the combinations is displayed as a temporary stop. Then, it is only necessary to set so that the rate at which the variable display result becomes “big hit” increases as the number of re-variations increases. As a result, the player can recognize that one of the pseudo-continuous chances is temporarily stopped and displayed, so that the specific effect of the “pseudo-continuous” is performed, and the variable display result becomes “ The expectation of becoming a “big hit” is enhanced. In this embodiment, in the specific effect of “pseudo-continuous”, the re-variation is performed once to three times, so that the decorative design can be changed based on the fact that the first start condition or the second start condition is satisfied once. The display can appear as if it has been started 2-4 times in a row.

  During the variable display of the decorative pattern in which the specific effect of “pseudo-continuation” is executed, an effect image showing a character prepared in advance at a predetermined position in the display area of the image display device 5 as the pseudo continuous variation progresses , Displaying a predetermined sound (special sound) from the speakers 8L and 8R, lighting the game effect lamp 9 with a predetermined lighting pattern, for effects provided inside or outside the game area A predetermined effect operation such as operating a plurality of movable members included in the accessory may be executed. As an example, when the decorative symbols are temporarily stopped and displayed on all the decorative symbol display portions 5L, 5C, and 5R, and then the decorative symbols are displayed again on all the decorative symbol display portions 5L, 5C, and 5R, Pseudo continuous variation is performed by performing any one or a combination of a plurality of operations among the display of the displayed effect image, the output of the special sound, the lighting of the lamp, and the operation of the movable member. May be notified in a recognizable manner.

  In addition to “pseudo-continuous” and “slip”, specific effects using such decorative display variable display operations include, for example, “Development opportunity eyes”, “Development opportunity eyes end”, and “Slip after chance eyes stop” Various production operations may be executed. Here, in the specific effect of “Development Opportunity”, “Left”, “Middle”, “Right” from the start of the variable display of the decorative pattern to the display of the fixed decorative pattern resulting in the variable display result. In all of the decorative symbol display portions 5L, 5C, and 5R, the decorative symbols constituting the development chances included in the predetermined special combination are temporarily stopped and displayed, and then the decorative symbol variable display state is set to the reach state. A predetermined reach production is started. As a result, when the decorative symbol constituting the development opportunity is temporarily stopped, the variable display state of the decorative symbol becomes the reach state, and the variable display result becomes “big hit” after the reach state is reached. , The player's expectation is enhanced. Further, in the specific effect of “end of development opportunity”, after the decorative symbol variable display is started, the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, 5R An effect display is performed for deriving and displaying a decorative pattern of a predetermined combination as a development opportunity. In the specific effect of “slip after the chance stop”, as with the variable display effect of “pseudo ream”, after the variable display of the decorative pattern is started, until the fixed decorative pattern that becomes the variable display result is derived and displayed, Temporarily stop display of decorative combinations (special combinations) that are one of a plurality of types of pseudo consecutive chances in the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R. Then, unlike the specific effect of the “pseudo-ream”, an effect display for changing the decorative symbol to be stopped is performed by changing the decorative symbol again in a part of the decorative symbol display portions 5L, 5C, and 5R. Is called.

  Furthermore, during the variable display of the decorative pattern, unlike the reach effect or the specific effect, for example, by displaying a predetermined character image or a message image, a display pattern other than the variable display mode of the decorative pattern is used. A notice effect may be executed to notify the player that the variable display state may become a reach state and that the variable display result may be a “hit”. For example, the notice effect such as “character display”, “step-up image”, and “background change” may be set to be executable. Note that the notice effect may be any one that does not change in the special figure fluctuation time depending on whether or not the corresponding effect operation is executed. In the notice effect of “character display”, two or more decorative symbols are displayed after the decorative symbols are changed in all of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R. The character image prepared in advance in a predetermined position in the display area of the image display device 5 is displayed before the decorative symbols are derived and displayed on the display portion (for example, the “left” and “right” decorative symbol display portions 5L and 5R). An effect display is performed. In the notice effect of “step-up image”, two or more decorative symbols are displayed after changing the decorative symbols in all of the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R. Before the decorative part is derived and displayed on the display unit, there may be an effect display in which a plurality of types of effect images prepared in advance are switched and displayed in a predetermined order in the display area of the image display device 5. In the notice effect of “step-up image”, after any one of a plurality of kinds of effect images prepared in advance (for example, an effect image that is displayed first in a predetermined order) is displayed, the effect image The effect display in the notice effect may be terminated without being switched. In the “background change” notice effect, an effect display that changes the display of the background image in the display area of the image display device 5 to one of a plurality of types is performed.

  If a special symbol that will be a lost symbol is stopped and displayed as a special symbol to be confirmed in the special symbol game, the decorative symbol variable display state will not reach the reach state after the variable symbol variable display starts. There are cases where a fixed decorative symbol that is a non-reach combination or a fixed decorative symbol that is one of a plurality of types of development chances is stopped and displayed. Such a decorative display variable display mode is referred to as a “non-reach” (also referred to as “normal loss”) variable display mode when the variable display result is “losing”.

  When a special symbol that becomes a losing symbol is stopped and displayed as a confirmed special symbol in the special symbol game, it corresponds to the fact that the decorative symbol variable display state has reached the reach state after the decorative symbol variable display has started. Then, after the reach effect is executed, a fixed decorative pattern that becomes a predetermined reach-losing combination (also simply referred to as “reach combination”) may be stopped and displayed. Such a variable display result of the decorative design is referred to as a variable display mode of “reach” (also referred to as “reach lose”) when the variable display result is “losing”.

  When the special symbol indicating the number “3”, which is a non-probable variable jackpot symbol, is stopped and displayed as a special symbol to be confirmed in the special symbol game as a 15-round jackpot symbol, the variable display state of the decorative symbol is changed. Corresponding to the reach state, after a predetermined reach effect is executed, a definite decorative symbol that is a predetermined non-probable variation big hit combination (also referred to as “normal big hit combination”) is stopped and displayed. Here, the confirmed decorative symbols that are non-probable big hit combinations are, for example, symbol numbers that are variably displayed in the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R in the image display device 5. Among the decorative symbols with "1" to "8", any one of the decorative symbols with even numbers "2", "4", "6", "8" is "left", "middle" The “right” decorative symbol display portions 5L, 5C, and 5R may be stopped and displayed on a predetermined effective line. In this way, the decorative symbols having the even number “2”, “4”, “6”, and “8” constituting the non-probable variation big hit combination are referred to as non-probable variation symbols (also referred to as “normal symbols”). . Then, in response to the confirmed special symbol in the special symbol game becoming the non-probable variable big hit symbol, the fixed decorative symbol of the non-probable variable big hit combination is stopped and displayed after the predetermined reach effect is executed. The mode is referred to as a variable display mode (also referred to as a jackpot type) of “non-probable change” (also referred to as “normal”) when the variable display result is “big hit”. Thus, after the variable display result is “big hit” by the variable display mode of “non-probability change”, it is controlled to the 15 round big hit gaming state, and when the 15 round big hit state is finished, it is controlled to the short time state or the normal state. It will be.

  When the special symbol indicating the number “7”, which is the probability variable big hit symbol, is stopped and displayed as a special symbol to be confirmed in the special figure game as a 15-round big hit symbol, the variable display state of the decorative symbol is reached. Corresponding to the situation, after reaching the same reach effect as when the jackpot type is "non-probable change", or the reach effect different from when the jackpot type is "non-probable change" For example, after the process is executed, a fixed decorative symbol that becomes a predetermined probability variation jackpot combination may be stopped and displayed. Here, the confirmed decorative symbols that are the probable big hit combinations are, for example, symbol numbers that are variably displayed on the decorative symbol display portions 5L, 5C, and 5R of “left”, “middle”, and “right” in the image display device 5. Among the decorative symbols “1” to “8”, any one of the decorative symbols whose symbol numbers are odd numbers “1”, “3”, “5”, “7” are “left”, “middle”, What is necessary is just to be stopped and displayed on the predetermined effective line in each of the “right” decorative symbol display portions 5L, 5C, and 5R. In this way, the decorative symbols having odd numbers “1”, “3”, “5”, and “7” constituting the probability variation big hit combination are referred to as probability variation symbols. Then, in response to the confirmed special symbol in the special figure game becoming a probable big hit symbol, after the reach effect is executed, the decorative display variable display mode in which the definite decorative combination of the probable big hit combination is stopped is displayed. This is referred to as a variable display mode of “probability change” (also referred to as a big hit type) when the variable display result is “big hit”.

  When the probability variable big hit symbol is stopped and displayed as a fixed special symbol in the special figure game, the fixed decorative symbol that is a non-probable variable big hit combination may be stopped and displayed as a variable display result of the decorative symbol. In this way, even when the fixed decorative symbol that is a non-probable big hit combination is stopped and displayed, if the probable big hit symbol is stopped and displayed as a fixed special symbol in the special figure game, it is included in the variable display mode of “probable change”. . Thus, after the variable display result becomes “big hit” by the variable display mode of “probability change”, it is controlled to the 15 round big hit state, and when the 15 round big hit state ends, it is controlled to the positive change state. The confirmed decorative symbol that is a non-probable big hit combination and the definite decorative symbol that is a probable big hit combination are also collectively referred to as a definitive decorative symbol of a big winning combination (specific combination).

  A re-lottery effect may be executed during the variable display of the decorative symbols in which the confirmed decorative symbol is a non-probable variable big hit combination or a probable variable big hit combination. In the re-lottery effect, after the decorative symbols that are the non-probable big hit combinations are temporarily stopped and displayed on the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R in the image display device 5, for example, “ The left, middle, and right decorative symbol display portions 5L, 5C, and 5R are varied again with the same decorative symbol in a uniform state, and the decorative symbol (probable variable symbol) that is a probabilistic big hit combination is displayed. One of the decorative symbols (non-probable variable symbols) that is a probable big hit combination is stopped and displayed as a final decorative symbol (final stop display). Here, when the re-lottery effect is executed when the big hit type is “non-probable change”, as the re-lottery effect, the confirmed decoration that becomes the non-probable big hit combination after re-variation of the temporarily stopped display decorative pattern A change promotion promotion effect that derives and displays a symbol is performed. On the other hand, when the re-lottery effect is executed when the big hit type is “probable change”, as the re-lottery effect, the definite decoration that becomes the probable big hit combination after re-variation of the temporarily stopped decorative pattern The changing promotion success effect during the stop display of the symbol may be executed, or the changing promotion failure effect during the change may be executed.

  After the definitive decorative symbol that is a non-probable big hit combination is derived and displayed, the next round will start after one round ends in the big hit gaming state at the start of the big hit gaming state or during the round in the big hit gaming state. During the big hit, which is a notification effect on whether or not to control to the probable change state in the period until the start, the period from the end of the last round in the big hit gaming state to the start of the next variable display game, etc. A promotion effect may be executed. Note that a notification effect similar to the jackpot promotion effect may be executed during the first variable display game after the end of the jackpot gaming state. The jackpot promotion effect that is executed after the final round in the jackpot game state is particularly called “ending promotion effect”.

  In the jackpot promotion effect, there is no jackpot promotion success effect informing that there is a promotion in which the game state becomes a probabilistic state even though the confirmed decoration pattern is a non-probable big hit combination, and there is no promotion in a promiscuous state There is a promotion promotion failure during jackpot. For example, in the jackpot promotion effect, the decorative symbol is variably displayed in the display area of the image display device 5 and either the non-probable variable symbol or the probable variable symbol is stopped and displayed as the effect display result, or the decorative symbol variable display What is necessary is just to alert | report so that a player can recognize the presence or absence of the promotion which will be in a probability change state by displaying the effect image different from.

  As a confirmed special symbol in the special symbol game, a special symbol indicating the number “1” which is a two-round big hit symbol is stopped or displayed, or a special symbol indicating the number “2” which is a small hit symbol is stopped and displayed. In such a case, the variable display state of the decorative symbols may not reach the reach state, and any one of a combination of a plurality of types of fixed decorative symbols that are determined in advance as the second opening chance may be displayed. In addition, when the special symbol indicating the number “1”, which is a two-round jackpot symbol, is stopped and displayed as a confirmed special symbol in the special symbol game, the variable symbol display state of the decorative symbol is changed to the reach state. Then, after a predetermined reach effect is executed, a fixed decorative symbol that becomes a predetermined reach combination may be stopped and displayed. Corresponding to the fact that the confirmed special symbol in the special figure game becomes a special symbol indicating the number of “1” which is a two-round jackpot symbol, the variable display mode of the decorative symbols in which various fixed ornament symbols are stopped and displayed is variable. This is referred to as a variable display mode (also referred to as a jackpot type) of “surprise accuracy” (also referred to as “surprising accuracy hit” or “sudden probability change big hit”) when the display result is “big hit”. Thus, after the variable display result is “big hit” by the variable display mode of “surprise accuracy”, it is controlled to the two round big hit state, and when the two round big hit state is finished, it is controlled to the probability changing state.

  When the variable display result is “big hit” and the big hit type is “accuracy”, the accuracy mode start effect may be executed during variable display of the decorative symbols. In the surprise mode start effect, a predetermined effect operation is performed in response to the big hit type being “Accuracy”. After the surprise mode start effect is performed, an effect mode different from the normal effect mode called the accuracy mode may be started. In addition, the random mode start effect is not limited to the effect operation that is executed during the variable display of special symbols and decorative symbols, and continues from the variable display even during part or all of the period of the two round big hit state. An effect operation may be performed. When the suddenness mode start effect is started, the decorative symbol that is variably displayed may be erased, and after the suddenness mode start effect is executed, the confirmed decorative symbol may not be derived and displayed. In the sudden accuracy mode, for example, until the variable display result is “big hit” and the probability variation state ends, the effect in the sudden accuracy mode is performed. In the effect in the sudden accuracy mode, the display mode of the background image in the display area of the image display device 5 is different from the display mode in the normal rendering mode, and is output from the speakers 8L and 8R in accordance with the variable display of the decorative pattern. The sound to be different from the sound in the normal effect mode, the lighting pattern of the game effect lamp 9 and the decoration LED to be different from the lighting pattern in the normal effect mode, or a part of these Alternatively, by combining all of them, it may be informed so that the player can recognize that the mode is inaccuracy.

  In the probability variation state, for example, an effect image for notifying that the probability variation state is in progress is displayed in the display area of the image display device 5 and / or a background image or a decorative pattern in the display region of the image display device 5. The display mode may be different from the display mode in the normal effect mode, so that the player may be in the effect mode during probability change in which the player can recognize that the probability change state.

  The pachinko gaming machine 1 includes various power supply boards 10, a main board 11, an effect control board 12, an audio control board 13, a lamp control board 14, a payout control board 15, a launch control board 17 as shown in FIG. A control board is mounted. The pachinko gaming machine 1 is also equipped with a relay board 18 for relaying various control signals transmitted between the main board 11 and the effect control board 12. Note that the audio control board 13 and the lamp control board 14 may be configured as independent boards that are separate from the effect control board 12, or may be integrated into the effect control board 12 and configured as one board. In addition, various control boards such as an information terminal board and an interface board are disposed on the back surface of the pachinko gaming machine 1. The interface board is a control board interposed between the payout control board 15 and the card unit when the card unit is installed adjacent to the pachinko gaming machine 1.

  The power supply board 10 is installed independently of each control board such as the main board 11, the effect control board 12, and the payout control board 15, and generates a voltage used by each control board and mechanism component in the pachinko gaming machine 1. . For example, the power supply board 10 generates AC 24 V, VLP (DC +24 V), VSL (DC +30 V), VDD (DC +12 V), VCC (DC +5 V), and VBB (DC +5 V) as shown in FIG. For example, as shown in FIG. 3, the power supply board 10 includes a transformer circuit 301, a DC voltage generation circuit 302, a power supply monitoring circuit 303, and a clear switch 304. Further, the power supply substrate 10 may be provided with a capacitor serving as a backup power supply. For example, this capacitor may be charged from a power supply line of VBB (DC + 5V). In addition, the power supply board 10 may be provided with a power switch for executing or cutting off power supply to each control board and the mechanical components in the pachinko gaming machine 1. Alternatively, the power switch may be provided outside the power supply board 10 in the pachinko gaming machine 1.

  For example, the transformer circuit 301 may be configured to include a transformer to which commercial power is applied to the input side (primary side), a varistor as an overvoltage protection circuit provided on the input side of the transformer, and the like. Here, the transformer included in the transformer circuit 301 may be any one that electrically insulates the commercial power supply from the power supply substrate 10. The transformer circuit 301 generates AC 24V as its output voltage. The DC voltage generation circuit 302 includes, for example, a rectifying / smoothing circuit that generates VSL by rectifying and boosting AC 24V with a rectifying element. VSL is used as a power supply voltage for driving the solenoid. Further, the DC voltage generation circuit 302 includes a rectifier circuit that generates VLP by rectifying AC24V with a rectifier, for example. The VLP is used as a power supply voltage for lighting a light emitter such as the game effect lamp 9. In addition, the DC voltage generation circuit 302 includes a DC-DC converter that generates VDD and VCC based on, for example, VSL. This DC-DC converter includes, for example, one or more switching regulators and a relatively large capacity capacitor connected to the input side of the switching regulator, and power supply to the pachinko gaming machine 1 from the outside is stopped. Sometimes, it may be configured so that the direct current voltage such as VSL, VDD, VBB, etc. decreases relatively slowly. The VDD is supplied to various switches for detecting game media such as the gate switch 21, the first and second start port switches 22A and 22B, and the count switch 23 shown in FIG. 2, and is used to operate these switches. .

  As shown in FIG. 3, AC24V output from the transformer circuit 301 is transmitted to the payout control board 15 via a predetermined connector or a power supply line, for example. The VLP is transmitted to the lamp control board 14 via, for example, a predetermined connector or a power supply line. VSL, VDD, and VCC are transmitted to the main board 11, the lamp control board 14, and the payout control board 15 through, for example, predetermined connectors and power supply lines. The VBB is transmitted to the main board 11 and the payout control board 15 through, for example, a predetermined connector and a power supply line. Note that each voltage may be supplied to the effect control board 12 and the sound control board 13 via the lamp control board 14. Alternatively, each voltage may be directly supplied to the effect control board 12 and the sound control board 13 from the power supply board 10 without going through the lamp control board 14.

  The power monitoring circuit 303 is configured by using, for example, a power failure monitoring reset module IC, and is a circuit that realizes a power monitoring unit that outputs a power interruption signal. For example, when a predetermined power supply voltage (VSL as an example) used in the pachinko gaming machine 1 exceeds a predetermined value (+22 V as an example), the power supply monitoring circuit 303 outputs a power-off signal in an off state (high level). On the other hand, when the period during which the predetermined power supply voltage is equal to or lower than the predetermined value continues for a predetermined time (for example, 56 milliseconds), an on-state (low level) power-off signal is output. Alternatively, the power supply monitoring circuit 303 may output an on-state power-off signal immediately when a predetermined power supply voltage used in the pachinko gaming machine 1 becomes a predetermined value or less. For example, the power-off signal may be a negative logic electric signal that is turned on when it is low and turned off when it is high. The power-off signal output from the power supply monitoring circuit 303 is amplified by, for example, an output driver circuit mounted on the power supply board 10 and then transmitted to the main board 11 or the payout control board 15 via a predetermined connector or signal line. Is done. The power-off signal may be transmitted to the main board 11 via the payout control board 15.

  The predetermined power supply voltage to be monitored for outputting the power-off signal is preferably a voltage higher than a specified value (for example, +12 V) in the power supply voltage VDD for operating the switch, such as the power supply voltage VSL. Thereby, before the power supply voltage VDD for operating the switch is lowered and the operation state of various switches (for example, the gate switch 21, the first and second start port switches 22A and 22B, the count switch 23, etc.) becomes unstable, By outputting the power-off signal (turning on), it is possible to prevent the progress of game control based on erroneous detection by various switches. That is, when the power supply voltage VDD for operating the switch is lowered, the switch output of the negative logic (turned on at a low level) is turned on, but the power supply voltage VSL that drops earlier than the power supply voltage VDD is monitored to supply power By recognizing the stop, it becomes possible to enter a state of waiting for power supply recovery and not detecting the switch output before the switch output is turned on.

  A large capacity capacitor may be connected to the power supply line for transmitting the power supply voltage VSL and the like to the main board 11, the lamp control board 14 and the payout control board 15. On the other hand, such a capacitor may not be connected to the input line that transmits to the power supply monitoring circuit 303 in order to monitor the power supply voltage VSL. In this case, the power supply voltage VSL in the input line to the power supply monitoring circuit 303 to be monitored drops earlier than the power supply voltage VSL in the power supply line to which the capacitor is connected. That is, even after the monitored power supply voltage VSL starts to decrease, the supply state of the power supply voltage VSL in the power supply line supplied to the solenoid, the motor, or the like is maintained for a predetermined period. Therefore, even when the power supply voltage VSL to be monitored starts to decrease, the solenoid, the motor, and the like can be driven for a predetermined period. Further, it is possible to recognize the stop of the power supply before the power supply voltage VSL in the power supply line starts to decrease.

  In place of the solenoid drive power supply voltage VSL, for example, a power cut-off signal is generated by monitoring an arbitrary power supply voltage higher than a specified value in the switch operation power supply voltage VDD, for example, the power supply voltage VLP for lighting the light emitter. You may make it output. In addition, the condition for detecting the stop of the supply of power supplied to the pachinko gaming machine 1 from the outside is not limited to the fact that the predetermined power supply voltage used in the pachinko gaming machine 1 has become a predetermined value or less. Any condition can be used as long as it is possible to detect that the power has been cut off. For example, the AC wave such as AC 24V may be monitored to detect that the AC wave has stopped, or the signal obtained by digitizing the AC wave may be monitored and the AC signal may be generated when the digital signal becomes flat. It may be a detection condition for the interruption.

  For example, the power supply monitoring circuit 303 may output a reset signal when a predetermined power supply voltage (VCC as an example) becomes equal to or lower than a predetermined value (+4.5 V as an example). The reset signal may be an electric signal that is turned on when the reset signal becomes low level, for example. The reset signal output from the power supply monitoring circuit 303 is amplified by, for example, an output driver circuit mounted on the power supply board 10 and then, via a predetermined connector or signal line, the main board 11, the lamp control board 14, and the payout control board. 15 is transmitted. A reset signal may be transmitted to the effect control board 12 via the lamp control board 14. Alternatively, the reset signal may be transmitted directly to the effect control board 12 without going through the lamp control board 14. Furthermore, the circuit that outputs the reset signal may be configured by using a watchdog timer built-in IC provided separately from the power supply monitoring circuit 303, a system reset IC, or the like.

  When the power supply to the pachinko gaming machine 1 is stopped, the power monitoring circuit 303 outputs a reset signal (sets to a low level) when a predetermined period elapses after the power-off circuit 303 outputs a power-off signal (sets to a low level). ) In the predetermined period, for example, the game control microcomputer 100 mounted on the main board 11 and the payout control microcomputer 150 mounted on the payout control board 15 shown in FIG. It is sufficient if the time is sufficient for execution. That is, the power monitoring circuit 303 outputs a power-off signal as a power feeding signal, and after the game control microcomputer 100 and the payout control microcomputer 150 complete execution of predetermined power-off processing, the operation stop signal The reset signal is output (set to low level). The game control microcomputer 100 and the payout control microcomputer 150 that have received the reset signal output from the power supply monitoring circuit 303 are in an operation stop state, and execution of various control processes is stopped. In addition, when the power supply to the pachinko gaming machine 1 is started, for example, when a predetermined power supply voltage (VCC as an example) exceeds a predetermined value (+4.5 V as an example), the power monitoring circuit 303 stops outputting the reset signal (Set to high level).

  FIG. 4 is a timing diagram schematically showing the states of AC 24 V, VSL, VCC, reset signal, and power-off signal when power supply to the pachinko gaming machine 1 is started and when power supply is stopped. is there. As shown in FIG. 4, when power supply to the pachinko gaming machine 1 is started, VSL and VCC gradually reach specified values (DC +30 V and DC +5 V). At this time, when VCC exceeds the first predetermined value, the power supply monitoring circuit 303 stops outputting the reset signal (sets it to a high level) and turns it off. When VSL exceeds the second predetermined value, the power supply monitoring circuit 303 stops outputting the power-off signal (sets it to a high level) and turns it off. On the other hand, when the power supply to the pachinko gaming machine 1 is stopped, VSL and VCC gradually decrease. At this time, when VSL falls to the second predetermined value, the power supply monitoring circuit 303 outputs the power-off signal as an ON state (sets it to a low level). When VCC decreases to the first predetermined value, the power supply monitoring circuit 303 outputs a reset signal as an ON state (sets to a low level).

  The clear switch 304 included in the power supply substrate 10 illustrated in FIG. 3 has a push button structure, for example, and outputs a clear signal in response to an operation such as pressing. The clear signal may be an electrical signal that is turned on when it becomes low level in response to an operation such as pressing. Alternatively, the clear signal may be an electrical signal that is turned on when it becomes high level in response to an operation such as pressing. The clear signal output from the clear switch 304 is transmitted to the main board 11 via a predetermined connector or signal line, for example, and is transmitted from the main board 11 to the payout control board 15. When the clear switch 304 is not operated, the output of the clear signal is stopped (set to high level or low level). Note that the clear switch 304 may have a configuration other than a push button structure (for example, a slide switch structure, a toggle switch structure, a dial switch structure, or the like).

  The main board 11 is a main-side control board, and various circuits for controlling the progress of the game in the pachinko gaming machine 1 are mounted. The main board 11 is a sub-side mainly composed of a random number setting function used in a special game, a function of inputting a signal from a switch arranged at a predetermined position, an effect control board 12, a payout control board 15, and the like. It has a function of outputting and transmitting a control command as an example of command information to the control board as a control signal, a function of outputting various information to the hall management computer, and the like. In addition, the main board 11 performs on / off control of each LED (for example, segment LED) constituting the first special symbol display device 4A and the second special symbol display device 4B, and thereby the first special diagram and the second special diagram. Variable display of a predetermined display pattern such as controlling the variable display of the normal symbol display 20 or controlling the variable symbol display of the normal symbol display 20 by controlling the lighting / extinction / coloring control of the normal symbol display 20. It also has a function to control. As shown in FIG. 2, for example, the main board 11 includes a game control microcomputer 100, a control clock generation circuit 111, a random number clock generation circuit 112, a switch circuit 114, and a solenoid circuit 115. . A game start switch 31 may be installed on the main board 11.

  Here, the control clock generation circuit 111 generates a control clock CCLK that becomes an oscillation signal having a predetermined frequency outside the game control microcomputer 100. The control clock CCLK generated by the control clock generation circuit 111 is supplied to the clock circuit 502 via, for example, a control external clock terminal EXC of the game control microcomputer 100 as shown in FIG. The random number clock generation circuit 112 generates a random number clock RCLK that is an oscillation signal having a predetermined frequency different from the oscillation frequency of the control clock CCLK, outside the game control microcomputer 100. The random number clock RCLK generated by the random number clock generation circuit 112 is supplied to the random number circuit 509 via the random number external clock terminal ERC of the game control microcomputer 100 as shown in FIG. 6, for example. As an example, the oscillation frequency of the random number clock RCLK generated by the random number clock generation circuit 112 may be equal to or lower than the oscillation frequency of the control clock CCLK generated by the control clock generation circuit 111. Alternatively, the oscillation frequency of the random number clock RCLK generated by the random number clock generation circuit 112 may be higher than the oscillation frequency of the control clock CCLK generated by the control clock generation circuit 111.

  The switch circuit 114 takes in detection signals from various switches for detecting game balls and transmits them to the game control microcomputer 100. The solenoid circuit 115 transmits a solenoid drive signal from the game control microcomputer 100 to the solenoids 81 and 82. The game start switch 31 has, for example, a push button structure, and the pachinko gaming machine 1 closes the gaming machine frame 3 so that the player can not normally touch the pachinko gaming machine 1 in a state in which the player plays a normal game. What is necessary is just to be arrange | positioned. Then, for example, when the pachinko gaming machine 1 is turned on or when the system is reset, the pachinko gaming machine 1 is operated to instruct the game start after the initial setting. Note that the game start switch 31 may have a configuration other than the push button structure (for example, a slide switch structure, a toggle switch structure, a dial switch structure, etc.).

  As shown in FIG. 2, wiring for transmitting detection signals from the gate switch 21, the first start port switch 22 </ b> A, the second start port switch 22 </ b> B, and the count switch 23 is connected to the main board 11. The gate switch 21, the first start port switch 22A, the second start port switch 22B, and the count switch 23 have an arbitrary configuration that can detect a game ball as a game medium, such as a sensor. What is necessary is just to have. The main board 11 includes a first special symbol display device 4A, a second special symbol display device 4B, a normal symbol display device 20, a first hold display device 25A, a second hold display device 25B, and a general drawing hold display device 25C. Wiring for transmitting a command signal for performing display control such as is connected. Further, the main board 11 is connected to wiring for transmitting command signals for performing drive control, such as a solenoid 81 for an ordinary electric accessory and a solenoid 82 for a prize winning door.

  Various control commands are transmitted between the main board 11 and the effect control board 12, for example, by performing serial communication only in a single direction from the main board 11 to the effect control board 12 via the relay board 18. Is done. The effect control board 12 is a sub-side control board independent of the main board 11, receives a control command transmitted from the main board 11 via the relay board 18, and receives the image display device 5, speakers 8L, 8R. In addition, various circuits for controlling electric parts (production device) for production such as a light emitter such as a game effect lamp 9 are mounted. That is, the effect control board 12 has a function of controlling the display operation in the image display device 5, the sound output operation from the speakers 8L and 8R, the lighting operation and the extinguishing operation in the light emitter such as the game effect lamp 9 and the like. . The effect control board 12 is connected to wiring for transmitting a control signal to the sound control board 13 and the lamp control board 14, wiring for transmitting an image data signal to the image display device 5, and the like.

  The main board 11 may be provided with a main board side connector corresponding to the relay board 18, for example, and an output buffer circuit may be connected between the main board side connector and the game control microcomputer 100. . This output buffer circuit can pass a control signal only in the direction from the main board 11 to the effect control board 12 via the relay board 18, for example, and prevents the signal input from the relay board 18 to the main board 11. . Therefore, there is no room for signals to be transmitted from the production control board 12 or the relay board 18 side to the main board 11 side. Note that the relay board 18 may not be provided between the main board 11 and the effect control board 12. Thereby, the freedom degree of wiring routing between the main board | substrate 11 and the production | presentation control board 12 can be raised.

  For example, the relay board 18 may be provided with a transmission direction regulating circuit in a wiring for transmitting a control signal from the main board 11 to the effect control board 12. The transmission direction regulating circuit includes a diode having an anode connected to the main board connector corresponding to the main board 11 and a cathode connected to the presentation control board connector corresponding to the presentation control board 12, and one end connected to the cathode of the diode. And the other end of which is connected to the ground (GND). With this configuration, the transmission direction regulating circuit can prevent the signal from being input from the effect control board 12 to the relay board 18 and pass the signal only in the direction from the main board 11 to the effect control board 12. Therefore, there is no room for signals to be transmitted from the production control board 12 side to the main board 11 side. In this embodiment, a transmission direction regulating circuit is provided in the wiring for transmitting a control signal in the relay board 18, and an output buffer circuit is provided between the game control microcomputer 100 and the main board side connector on the main board 11. By providing, illegal signal input to the main board 11 from the outside can be prevented.

  Various control commands and notification signals are transmitted between the main board 11 and the payout control board 15 by, for example, bidirectional serial communication. The payout control board 15 is a sub-side control board independent of the main board 11, receives a control command and a notification signal transmitted from the main board 11, and controls the payout operation of the game ball by the payout motor 51. Various circuits are installed. That is, the payout control board 15 has a function of controlling the award ball payout operation by the payout motor 51. The payout control board 15 may have a function of controlling the ball lending operation by controlling the driving of the payout motor 51 in accordance with the communication result with the card unit via the interface board, for example. The payout control board 15 receives wiring for receiving detection signals from the full tank switch 26 and the ball break switch 27, and detection signals from the payout motor position sensor 71, the payout count switch 72, and the error release switch 73. Wiring for is connected. In addition, a wiring for transmitting a command signal for performing payout control of the game ball in the payout motor 51 and a command signal for performing display control in the error display LED 74 are transmitted to the payout control board 15. Wiring for communication with the card unit is connected via the interface board.

  Here, the full tank switch 26 is installed on the side wall of the surplus ball passage that communicates between the striking ball supply tray and the surplus ball receiving tray, for example, below the back of the game board 2, and detects the full tank of the surplus ball receiving tray. Is. A lot of game balls based on award balls or ball lending requests are paid out, the batting supply tray becomes full, and after the game balls reach the contact port, when game balls are paid out, the game balls pass through the surplus ball passage. It is led to the extra ball tray. When the game ball is further paid out, for example, a predetermined sensing lever presses the full switch 26 to turn on.

  In addition, the ball break switch 27 is installed downstream of the guide rail that guides the game ball to the payout device in which the payout motor 51 is installed, for example, on the back of the game board 2, and via a curve rod downstream of the guide rail. This is for detecting the presence or absence of game balls in two rows of ball passages communicated with each other. As an example, the ball break switch 27 is locked by a locking piece at a position where it can be detected that 27 to 28 game balls are present in the ball path, and the maximum payout number (for example, 100) It is possible to confirm that at least 25 pieces corresponding to a circle are secured. The guide rail guides a game ball from a storage tank that stores a game ball as a supply ball above the back of the game board 2 to a payout device, and a payout motor 51 is provided below the ball passage. The payout device in which is installed is fixed.

  The error release switch 73 is a switch for releasing the error state by software reset when the payout control microcomputer 150 is controlled to a predetermined error state. The error display LED 74 is composed of, for example, a 7-segment LED, and is used to display error codes corresponding to various errors based on an error flag set by the payout control microcomputer 150.

  The launch control board 17 shown in FIG. 2 is for controlling the launch operation of the game ball by a predetermined launch device in accordance with the operation amount of the operation knob 30. For example, the firing control board 17 has wiring for transmitting a drive signal from the power supply board 10 or the main board 11, wiring for transmitting a connection signal from the card unit via the payout control board 15 and the interface board, and an operation knob 30. Are connected to the firing motor 61. Note that the connection signal from the card unit may be branched at the dispensing control board 15 and transmitted to the firing control board 17, or the launch control may be performed from the card unit via the interface board and not via the dispensing control board 15. It may be transmitted to the substrate 17. The firing control board 17 adjusts the driving force of the firing motor 61 in accordance with the operation amount of the operation knob 30. For example, the launch motor 61 elastically deforms the launch spring by a driving force adjusted by the launch control board 17, and transmits the biasing force of the launch spring to the hitting hammer to hit the game ball, thereby operating the game ball on the operation knob 30. It is fired toward the game area at a speed corresponding to the operation amount.

  The control command transmitted from the main board 11 to the effect control board 12 via the relay board 18 is, for example, an effect control command transmitted as an electric signal. In this embodiment, the effect control command is set for transmission by the CPU 505 (see FIG. 6) included in the game control microcomputer 100 mounted on the main board 11, and the game control microcomputer 100 is based on the setting. Is transmitted to the effect control board 12 by the second channel transmission circuit of the serial communication circuit 511 (see FIG. 6). In the following description, the transmission operation of the effect control command from the main board 11 to the effect control board 12 includes a series of operations by the CPU 505 and the serial communication circuit 511 provided in the game control microcomputer 100. To do. In this case, on the side of the effect control board 12, for example, the CPU of the effect control microcomputer 120 performs an interrupt process based on a reception interrupt request generated when communication data in the serial signal format transmitted from the main board 11 is received. By executing, the effect control command may be captured and stored in a predetermined buffer (for example, a reception command buffer for effect). The effect control command may be transmitted from the main board 11 to the effect control board 12 via the relay board 18 by a plurality of signal lines (for example, eight effect control signal lines). In this case, in addition to the signal line for transmitting the effect control command, a signal line for transmitting the capture signal (effect control INT signal) for requesting the capture of the effect control command may be wired.

  The effect control command includes, for example, a display control command used for controlling an image display operation in the image display device 5, a voice control command used for controlling sound output from the speakers 8L and 8R, and a game effect lamp 9. The lamp control command used for controlling the lighting operation of the light emitter is included. FIG. 5A is an explanatory diagram showing an example of the contents of a display control command used in this embodiment. The display control command has, for example, a 2-byte structure, and the first byte indicates MODE (command classification), and the second byte indicates EXT (command type). The first bit of the MODE data (bit number [7]) is always “1”, and the first bit of the EXT data is “0”. The form of the display control command shown in FIG. 5A is an example, and other command forms may be used. In this example, the display control command has a 2-byte configuration, but the number of bytes constituting the display control command may be 1 or a plurality of 3 or more.

  In the example shown in FIG. 5A, a command 8001H is a first change start command for designating the start of change of the first special figure in the special figure game by the first special symbol display device 4A. The command 8002H is a second change start command for designating the start of change of the second special figure in the special figure game by the second special symbol display device 4B. The command 81XXH is a decoration that is variably displayed on the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R in the image display device 5 in response to the variable display of the special symbol in the special graphic game. This is a variation pattern designation command for designating a variation pattern such as a symbol. Here, XXH indicates an unspecified hexadecimal number, and may be a value arbitrarily set according to the instruction content by the effect control command. In the variation pattern designation command, different EXT data is set according to the variation pattern to be designated.

  In this embodiment, the first and second variation start commands and the variation pattern designation command are prepared as separate production control commands. On the other hand, the designation content indicating which of the first special figure and the second special figure is to be changed and the designated content of the fluctuation pattern are configured to be specified by one effect control command. Also good. As an example, an effect control command in which EXT data is set corresponding to a combination of a special symbol (first special figure or second special figure) that starts change and a change pattern is prepared. You may enable it to specify the special symbol and fluctuation pattern which become a fluctuation start. Here, when the special symbol and the variation pattern that start the variation can be specified by one effect control command, the special symbol (the first special feature that starts the variation) for one variation pattern. There are cases where it is necessary to prepare two types of effect control commands according to the figure or the second special figure). On the other hand, if an effect control command for designating a special symbol for starting variation and an effect control command for designating a variation pattern are prepared separately, two types of effect control commands corresponding to the special symbol for starting variation are prepared. And the number of effect control commands corresponding to the number of types of variation patterns may be prepared, and the types of commands prepared in advance, the storage capacity of the command table, and the like can be reduced.

  Command 8CXXH is a variable display result notification command for designating a variable display result such as a special symbol or a decorative symbol. In the variable display result notification command, for example, as shown in FIG. 5 (B), the prior determination result of whether the variable display result is “lost”, “big hit”, or “small hit”, and the variable display result is Different EXT data is set corresponding to the big hit type determination result of whether the big hit type is “non-probable change”, “probability change”, or “surprise change” in the case of “big hit”. More specifically, the command 8C00H is a first variable display result notification command indicating a pre-determined result indicating that the variable display result is “lost”. The command 8C01H is a second variable display result notification command indicating a pre-determined result and a big hit type determination result that the big hit type is “non-probable change” when the variable display result is “big hit”. The command 8C02H is a third variable display result notification command indicating a pre-determined result and a big hit type determination result that the big hit type is “probable change” when the variable display result is “big hit”. The command 8C03H is a fourth variable display result notification command indicating a pre-determined result and a big hit type determination result that the big hit type is “surprise” when the variable display result is “big hit”. The command 8C04H is a fifth variable display result notification command indicating a predetermined result indicating that the variable display result is “small hit”.

  In this embodiment, the variation pattern designation command and the variable display result notification command are prepared as separate presentation control commands. On the other hand, the variation pattern indicated in the variation pattern designation command and the variable display result indicated in the variable display result notification command may be configured to be specified by one effect control command. As an example, an effect in which EXT data is set corresponding to a combination of a variation pattern and a variable display result (one of “losing”, “big hit”, “small hit”, and a big hit type in the case of “big hit”). A control command may be prepared, and information that can specify the variation pattern and the variable display result may be transmitted by the effect control command. Alternatively, the variation pattern and the variable display result may be specified by three or more effect control commands. Here, when the variation pattern and the variable display result are configured to be specified by a single effect control command, a plurality of types of effects corresponding to a plurality of types of variable display results for one variation pattern. You may need to provide control commands. On the other hand, if the production control command for designating the variation pattern and the production control command for notifying the variable display result are prepared separately, the number of production control commands corresponding to the number of types of the variation pattern and the variable display result are provided. The number of effect control commands corresponding to the number of types may be prepared, and the types of commands prepared in advance, the storage capacity of the command table, and the like can be reduced.

  The command 8F00H is a decorative symbol stop command for designating stop of variable display of decorative symbols in the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R in the image display device 5. The decoration symbol stop command may not be transmitted from the main board 11 to the effect control board 12. In this case, the variable display time corresponding to the variation pattern designated by the variation pattern designation command is specified on the side of the effect control board 12, and the elapsed time from the start of variable display of the decorative design is variable display time. Even if the production control command from the main board 11 is not received, the determined decorative design may be displayed in a completely stopped state to confirm the variable display result.

  A0XXH is a hit start designation command (also referred to as a “fanfare command”) for designating display of an effect image indicating the start of a big hit gaming state or a small hit gaming state. In the hit start designation command, for example, EXT data similar to that of the variable display result notification command is set, so that different EXT data is set according to the pre-determined result or the big hit type determined result. Alternatively, in the hit start designation command, the correspondence relationship between the predetermined determination result or the big hit type determination result and the set EXT data may be different from the correspondence relationship in the variable display result notification command.

  The command A1XXH is a command for specifying the opening of the big prize opening that designates the display of the effect image during the period in which the big prize opening is open in each round or variable winning action corresponding to the big winning game state or the small winning game state. It is. The command A2XXH is an effect image (for example, an effect in the interval between rounds) corresponding to the big win game state or the small win game state in the period when the big prize opening is changed from the open state to the closed state by the end of each round or variable winning operation. This is a designation command after opening the big prize opening that designates display of (image). In the command for opening the big prize opening and the designation command after opening the big prize opening, for example, the number of round executions (for example, “1” to “15”) in the 15 round big hit state, the round in the big round and the small hit game state Different EXT data is set corresponding to the number of executions of the variable winning operation at (for example, “1” or “2”). Depending on whether it is a 15-round big hit state, a two-round big hit state, or a small-hit gaming state, a special command during opening of the big prize opening or a designated command after opening the big prize opening may be prepared separately. On the other hand, the number of types of effect control commands is reduced by using the common command during opening of the big prize opening and the designation command after opening the big prize opening, which are common to the 15 round big hit state, the 2 round big hit state, and the small hit game state. can do. Also, in the big hit gaming state and the small hit gaming state, it is a period in which the big winning opening is open in each round or variable winning action, or the big winning opening is released from the open state by the end of each round or variable winning action. Regardless of whether the period has changed to the closed state, a continuous presentation operation may be executed from the start point to the end point of the big hit gaming state or the small hit gaming state. Further, in the small hit gaming state, the designation command during opening of the big prize opening and the designation command after opening the big prize opening may not be transmitted.

  The command A3XXH is a hit end designation command for designating display of an effect image at the end of the big hit gaming state or the small hit gaming state. In the winning end designation command, for example, EXT data similar to that of the variable display result notification command or the winning start designation command is set, so that different EXT data is set according to the predetermined determination result or the big hit type determination result. Alternatively, in the hit end designation command, the correspondence relationship between the pre-determined result or the big hit type decision result and the set EXT data may be different from the correspondence relationship in the variable display result notification command or the hit start designation command. .

  The command B001H is for executing a special game using the first special figure by the first special symbol display device 4A based on the fact that the game ball has won the first start winning opening formed by the normal winning ball apparatus 6A. This is a first start port winning designation command for notifying that the first start condition is satisfied. The command B002H is for executing a special figure game using the second special figure by the second special symbol display device 4B based on the fact that the game ball has won the second starting prize opening formed by the normally variable winning ball apparatus 6B. This is a second start opening prize designation command for notifying that the second start condition is established.

  The command C0XXH displays the first special figure reserved memory number and the second special figure in order to display the special figure reserved memory number in a start winning memory display unit 5H provided in the display area of the image display device 5 in an identifiable manner. This is a pending storage count notification command for notifying the total pending storage count that is the total value with the pending storage count. In response to the fact that either the first start condition or the second start condition is satisfied, for example, either the first start opening prize designation command or the second start opening prize designation command is transmitted as the reserved storage number notification command. Following this, it is transmitted from the main board 11 to the effect control board 12. In the hold memory number notification command, for example, the total number of hold data (for example, “1” to “8”) of the hold data in the first special figure hold storage unit 591A and the hold data in the second special figure hold storage unit 591B shown in FIG. Alternatively, different EXT data is set corresponding to the total number of start data stored in the start data storage unit 591C (for example, “1” to “8”). Thereby, on the side of the production control board 12, when either the first start condition or the second start condition is satisfied, the reserved memory number notification command transmitted from the main board 11 is received, and the first special drawing is received. The total number of stored hold data in the hold storage unit 591A and the second special figure hold storage unit 591B can be specified.

  In this embodiment, the first and second start opening winning designation commands and the reserved memory number designation command are prepared as separate presentation control commands. On the other hand, the notification content indicating which of the first start condition and the second start condition is satisfied and the notification content of the total reserved storage number are configured to be specified by one effect control command. Also good. As an example, an effect control command in which EXT data is set corresponding to the combination of the established start condition (first start condition or second start condition) and the total number of reserved memories is prepared. The established start condition and the total number of reserved memories may be specified. Here, when it is possible to specify which one of the first start condition and the second start condition is satisfied by one effect control command together with the total reserved memory number, for example, the upper limit value of the total reserved memory number is “8”. ”, It is necessary to prepare a total of 16 types of effect control commands of 8 types corresponding to the case where the first start condition and the second start condition are satisfied. On the other hand, if an effect control command that can specify which of the first start condition and the second start condition is established and an effect control command that can specify the total number of reserved memories are prepared separately, the first If there are prepared a total of 10 types of effect control commands comprising two types of effect control commands that can specify each of the start condition and the second start condition and eight types of effect control commands that can specify the total number of reserved memories. It is often possible to reduce the types of commands prepared in advance and the storage capacity of the command table.

  The control command transmitted from the main board 11 to the payout control board 15 is, for example, a payout control command transmitted as an electrical signal. The payout control command is set to transmit the payout control command by the CPU 505 (see FIG. 6) included in the game control microcomputer 100 mounted on the main board 11, and based on the setting, the game control use is made. It is transmitted to the payout control board 15 by the first channel transmission / reception circuit of the serial communication circuit 511 (see FIG. 6) provided in the microcomputer 100. In the following description, the transmission operation of the payout control command from the main board 11 to the payout control board 15 includes a series of operations by the CPU 505 and the serial communication circuit 511 provided in the game control microcomputer 100. To do. Also, for example, a payout notification command as an electrical signal is transmitted from the payout control board 15 to the main board 11. The payout notification command is set so that the payout notification command is transmitted by the CPU of the payout control microcomputer 150 mounted on the payout control board 15, and the payout control microcomputer 150 is set based on the setting. It is transmitted to the main board 11 by a serial communication circuit provided. In the following description, it is assumed that the transmission operation of the payout notification command from the payout control board 15 to the main board 11 includes a series of operations by the CPU and serial communication circuit provided in the payout control microcomputer 150. . In addition, in the following description, not only a command for a predetermined operation from one of the main board 11 and the payout control board 15 to the other, but also a notification signal for notifying the other of the operation state of the other is a payout control command or a payout It shall be included in the notification command.

  The payout control command transmitted from the main board 11 to the payout control board 15 may include a payout number designation command and an ACK feedback command. The payout number designation command is a command indicating the number of prize balls to be paid out. The ACK feedback command becomes a reception confirmation acceptance signal indicating that the prize ball ACK command transmitted from the payout control board 15 to the main board 11 is received on the main board 11 side.

  The payout notification command transmitted from the payout control board 15 to the main board 11 may include a prize ball ACK command, a payout error notification command, and a payout error cancel command. The winning ball ACK command is a reception confirmation signal indicating that the payout number specifying command transmitted from the main board 11 to the payout control board 15 is received on the payout control board 15 side. The payout error notification command is a command for notifying the main board 11 that an abnormality relating to the payout of the game ball has occurred on the payout control board 15 side. The payout error cancel command is a command for notifying the main substrate 11 side that the error that has occurred on the payout control board 15 side has been cancelled.

  In addition, between the main board | substrate 11 and the payout control board 15, it is not limited to what transmits / receives a command by serial communication, You may transmit / receive a command by parallel communication using a several signal wire | line. Further, instead of the payout error notification command and the payout error cancel command transmitted from the payout control board 15 to the main board 11, a payout error state signal indicating an error occurrence state in the payout control board 15 is sent to the main board 11. You may input into one of the provided input ports. For example, the payout error state signal is turned on when an error occurs in the payout control board 15, and is turned off when no error occurs or when the error is released. In this case, on the main board 11 side, a payout error state signal is fetched every time a timer interrupt occurs, and the fetch result is stored. The payout error state signal has changed from the off state to the on state by taking the exclusive OR of the signal state captured by the current timer interrupt and the signal state captured and stored by the previous timer interrupt. It may be possible to detect that the error has been changed from the on state to the off state (indicating the time when the error is released). When an error occurs in the payout control board 15 or when the error is released, an error has occurred in the payout operation by transmitting an effect control command prepared for each from the main board 11 to the effect control board 12 It may be instructed to start or end the notification operation for notifying the user. The payout error state signal is not limited to one input to one of the input ports provided on the main board 11, and for example, a payout control board 15 such as a full signal, a ball out signal, a prize ball case error signal, or a door open signal. May be input to the main board 11 to detect when an error occurs or when an error is released as in the case of the payout error state signal. Then, by transmitting an effect control command corresponding to the type of the detected error from the main board 11 to the effect control board 12, the start or end of the notification operation corresponding to the detected error is instructed. It may be.

  FIG. 6 shows a configuration example of the game control microcomputer 100 mounted on the main board 11. A game control microcomputer 100 shown in FIG. 6 is, for example, a one-chip microcomputer, and includes an external bus interface 501, a clock circuit 502, a specific information storage circuit 503, a reset / interrupt controller 504, a CPU (Central Processing Unit). ) 505, ROM (Read Only Memory) 506, RAM (Random Access Memory) 507, CTC (Counter / Timer Circuit) 508, random number circuit 509, PIP (Parallel Input Port) 510, and serial communication circuit 511 And an address decoding circuit 512.

  FIG. 7 shows an example of an address map in the game control microcomputer 100. As shown in FIG. 7, the area from address 0000H to address 1FFFH is allocated to the ROM 506 and includes a user program area and a program management area. FIG. 8A shows an example of the usage and contents of the main part of the program management area in the ROM 506. The area from address 2000H to address 20FFH is a built-in register area assigned to the built-in register of the game control microcomputer 100. FIG. 8B shows an example of the usage and contents of the main part of the built-in register area. An area from address 7E00H to address 7FFFH is a work area assigned to the RAM 507, and can be assigned to an I / O map or a memory map. An area from address FDD0H to address FDFBH is an XCS decode area allocated to the address decode circuit 512.

  The program management area is a storage area for storing information necessary for the CPU 505 to execute the user program. As shown in FIG. 8A, the program management area includes a header KHDR, a function setting KFCS, a first random number initial setting KRS1, a second random number initial setting KRS2, an interrupt initial setting KIIS, a security time setting KSES, and the like. It is.

  The header KHDR stored in the program management area indicates the internal data read setting in the game control microcomputer 100. FIG. 9A illustrates the correspondence between setting data and operation in the header KHDR. Here, in the game control microcomputer 100, the ROM read prevention function and the bus output mask function can be set. The ROM read prevention function is a function for permitting or prohibiting a read operation for the data stored in the ROM 506 provided in the game control microcomputer 100, and the data stored in the ROM 506 cannot be read when the read prohibition is set. The bus output mask function is an address bus output, data bus output, and control signal in the external bus interface 501 when an external device connected to the external bus interface 501 makes a read request for internal data of the game control microcomputer 100. This function makes it impossible to read internal data from an external device by masking the output. As shown in FIG. 9A, the operation combination of the ROM read prevention function and the bus output mask function is set differently in accordance with the setting data of the header KHDR. Of the setting data shown in FIG. 9A, the setting data for which ROM reading is permitted and the bus output mask is valid is also referred to as bus output mask valid data. Further, the setting data (all “00H”) in which ROM reading is prohibited and the bus output mask is valid is also referred to as ROM reading prohibiting data. The setting data for which ROM reading is permitted and the bus output mask becomes invalid is also referred to as bus output mask invalid data.

  The function setting KFCS stored in the program management area indicates the operation setting of the watch dog timer (WDT) in the game control microcomputer 100 and the use setting of various function shared terminals. FIG. 9B shows an example of setting contents in the function setting KFCS.

  The bit number [7-5] of the function setting KFCS indicates, for example, the operation permission / prohibition of the watchdog timer that can be set as an interrupt factor in the reset / interrupt controller 504, and the cycle when it is permitted. The bit number [4] of the function setting KFCS indicates whether the predetermined function shared terminal (first shared terminal) in the game control microcomputer 100 is the second channel transmission terminal TXB used by the serial communication circuit 511 or the address decoding This is a TXB terminal setting that designates whether the circuit 512 uses the chip select output terminal XCS13. In the example shown in FIG. 9B, if the bit value in the bit number [4] of the function setting KFCS is “0”, the first shared terminal is used for the second channel transmission in the serial communication circuit 511. This is the setting for the 2-channel transmission terminal TXB. On the other hand, if the bit value is “1”, the first dual-purpose terminal is set to the chip select output terminal XCS13 used in the address decode circuit 512. In this embodiment, by setting the bit number [4] of the function setting KFCS to “0” and setting the first shared terminal to the second channel transmission terminal TXB, serial communication with the effect control board 12 is performed. to enable.

  The bit number [3] of the function setting KFCS indicates whether the predetermined function shared terminal (second shared terminal) in the game control microcomputer 100 is the first channel transmission terminal TXA used by the serial communication circuit 511 or the address decoding This is a TXA terminal setting that indicates whether the circuit 512 uses the chip select output terminal XCS12. In the example shown in FIG. 9B, if the bit value in the bit number [3] of the function setting KFCS is “0”, the second shared terminal is used for the first channel transmission in the serial communication circuit 511. 1 channel transmission terminal TXA is set. On the other hand, if the bit value is “1”, the second dual-purpose terminal is set to the chip select output terminal XCS12 used in the address decode circuit 512. In this embodiment, by setting the bit number [3] of the function setting KFCS to “0” and setting the second shared terminal to the first channel transmission terminal TXA, serial communication with the payout control board 15 is performed. to enable.

  The bit number [2] of the function setting KFCS indicates that the predetermined function shared terminal (third shared terminal) in the game control microcomputer 100 is the first channel reception terminal RXA used by the serial communication circuit 511 or the PIP 510 This is an RXA terminal setting indicating whether to use the input port P5. In the example shown in FIG. 9B, if the bit value in the bit number [2] of the function setting KFCS is “0”, the third shared terminal is used for the first channel reception in the serial communication circuit 511. 1 channel receiving terminal RXA is set. On the other hand, if the bit value is “1”, the third shared terminal is set to the input port P5 used in the PIP 510. In this embodiment, by setting the bit number [2] of the function setting KFCS to “0” and setting the third shared terminal to the first channel receiving terminal RXA, serial communication with the payout control board 15 is performed. to enable.

  The bit number [1] of the function setting KFCS is used by the PIP 510 as the external non-maskable interrupt terminal XNMI connected to the CPU 505 or the like as a predetermined function shared terminal (fourth shared terminal) in the game control microcomputer 100 This is an NMI connection setting indicating whether to set the input port P4. In the example shown in FIG. 9B, if the bit value in the bit number [1] of the function setting KFCS is “0”, the external non-maskable interrupt terminal XNMI connected to the CPU 505 or the like is set to the fourth shared terminal. (CPU connection). On the other hand, if the bit value is “1”, the fourth shared terminal is set for the input port P4 used in the PIP 510 (CPU disconnected).

  The bit number [0] of the function setting KFCS is a predetermined function shared terminal (fifth shared terminal) in the game control microcomputer 100 is used as an external maskable interrupt terminal XINT connected to the CPU 505 or the like, or is used by the PIP 510 The XINT connection setting indicates whether the input port is P3. In the example shown in FIG. 9B, if the bit value at the bit number [0] of the function setting KFCS is “0”, the external maskable interrupt terminal XINT connected to the CPU 505 or the like is set to the fifth shared terminal. (CPU connection). On the other hand, if the bit value is “1”, the fifth shared terminal is set for the input port P3 used in the PIP 510 (CPU disconnected).

  The first random number initial setting KRS1 and the second random number initial setting KRS2 stored in the program management area indicate the initial setting of the random number circuit 509. FIG. 10A shows an example of setting contents in the first random number initial setting KRS1. FIG. 10B shows an example of setting contents in the second random number initial setting KRS2.

  The bit number [3] of the first random number initial setting KRS1 is a random number circuit use setting indicating whether to use the random number circuit 509 or not. In the example shown in FIG. 10A, if the bit value in the bit number [3] of the first random number initial setting KRS1 is “0”, the random number circuit 509 is not used (unused), but “1”. "Is set to use the random number circuit 509 (use). In this embodiment, the bit number [3] of the first random number initial setting KRS1 is set to “1”, and the random number circuit 509 is set to be usable.

  The bit number [2] of the first random number initial setting KRS1 uses the random number update clock RGK (see FIG. 15) used for updating the numerical data that becomes the random number value in the random number circuit 509 as the internal system clock SCLK or for the random number. This is a random number update clock setting indicating whether the clock RCLK is divided by two. In the example shown in FIG. 10A, if the bit value in the bit number [2] of the first random number initial setting KRS1 is “0”, the internal system clock SCLK is set to be used as the random number update clock RGK. If it is 1 ″, the random number clock RCLK is divided by two and used as the random number update clock RGK. In this embodiment, the bit number [2] of the first random number initial setting KRS1 is set to “1”, and the random number clock RCLK is divided by two to be used as the random number update clock RGK.

  The bit number [1-0] of the first random number initial setting KRS1 is a random number update rule setting indicating whether or not to change the random number update rule in the random number circuit 509 and the change method in the case of the change. In the example shown in FIG. 10A, if the bit value in the bit number [1-0] of the first random number initial setting KRS1 is “00”, the random number update rule is not changed, and if it is “01”. The setting for changing the random number update rule by software is made after the second round, and if it is “10”, the random number update rule is automatically changed after the second round.

  The bit number [3-2] of the second random number initial setting KRS2 is set to a fixed bit value “00”. Note that “B” of “00B” in FIG. 10B indicates binary display. The bit number [1-0] of the second random number initial setting KRS2 indicates the setting relating to the start value in the numerical data that becomes the random value in the random number circuit 509. In the example shown in FIG. 10B, if the bit value in the bit number [1] of the second random number initial setting KRS2 is “0”, the start value is set to a predetermined default value 0000H, while “1”. In this case, a value based on the ID number, which is unique identification information assigned to each game control microcomputer 100, is set as the start value. In the example shown in FIG. 10B, if the bit value in the bit number [0] of the second random number initial setting KRS2 is “0”, the start value is not changed every time the system is reset. When it is 1 ″, the start value is changed every time the system is reset. In addition, when setting the start value to a value based on the ID number, a part or all of the calculation for performing a predetermined scramble process on the ID number and the calculation such as addition / subtraction / multiplication / division using the ID number are performed. It is only necessary to execute and use the calculated value as the start value. When the bit value [0] of the second random number initial setting KRS2 is “1”, the count value in a predetermined free-run counter (for example, the free-run counter 554A shown in FIG. 14) every system reset. A value set based on the above may be used as the start value. Further, when both the bit values [1] and [0] of the second random number initial setting KRS2 are “1”, a value set based on the ID number and the count value in the free run counter is set. It may be used as a start value.

  In the case where two systems (corresponding to the first and second channels) for generating numerical data to be random values in the random number circuit 509 are provided, the first shown in FIGS. 10A and 10B. The bit number [3-0] of the random number initial setting KRS1 and the bit number [3-0] of the second random number initial setting KRS2 are used to indicate the initial setting in the first channel. On the other hand, the bit number [7-4] of the first random number initial setting KRS1 and the bit number [7-4] of the second random number initial setting KRS2 (omitted in FIGS. 10A and 10B), the second It may be used as an indication of the initial setting in the channel.

  Interrupt initial settings KIIS stored in the program management area indicate initial settings related to handling of maskable interrupts generated in the game control microcomputer 100. FIG. 10C shows an example of setting contents in the interrupt initial setting KIIS.

  In the bit number [7-4] of the interrupt initial setting KIIS, the upper 4 bits of the interrupt vector are set. In the bit number [3-0] of the interrupt initial setting KIIS, a combination of maskable interrupt factor priorities is set. In the example shown in FIG. 10C, if any of “00H” to “02H” and “06H” is specified by the bit number [3-0] of the interrupt initial setting KIIS, the maskable interrupt factor from the CTC 508 is determined. A combination of priorities to be given the highest priority is set. On the other hand, if any one of “03H” and “07H” is designated, a combination of priorities with the highest priority given to the maskable interrupt factor from the random number circuit 509 is set. If either “04H” or “05H” is specified, a combination of priorities that sets the maskable interrupt factor from the serial communication circuit 511 as the highest priority is set. Note that even if the priority combination has the highest priority for maskable interrupt factors from the same circuit, if the specified value is different, the type of maskable interrupt factor that has the highest priority, the priority combination in the second or lower order, etc. will differ. ing.

  The security time setting KSES stored in the program management area is the frequency at which an abnormality is detected when monitoring the frequency of the random number clock RCLK, the time of the security mode that is shifted to when the operation of the game control microcomputer 100 starts ( Indicates settings related to (security time). Here, when the operation mode of the game control microcomputer 100 is the security mode, a predetermined security check process is executed to check whether or not the content stored in the ROM 506 has been changed. FIG. 11A shows an example of setting contents in the security time setting KSES.

  Bit number [7-6] of security time setting KSES is a random number clock abnormality detection setting indicating a frequency at which an abnormality is detected when the frequency of random number clock RCLK is monitored. FIG. 11B shows an example of setting contents in the bit number [7-6] of the security time setting KSES. The bit number [7-6] of the security time setting KSES specifies a reference value (determination value) at which the frequency of the random number clock RCLK is detected as abnormal based on the frequency of the internal system clock SCLK. Whether or not an abnormality has occurred in the input state of the random number clock RCLK by comparing the input state of the random number clock RCLK with the internal system clock SCLK based on the setting of the security time setting KSES in the bit number [7-6]. It is possible to determine whether. The bit number “5” of the security time setting KSES is set to a fixed bit value “0”.

  The bit number [4-3] of the security time setting KSES indicates a time setting when the security time is extended by a random time every system reset. FIG. 11C shows an example of setting contents in the bit number [4-3] of the security time setting KSES. In the example shown in FIG. 11C, if the bit value in the bit number [4-3] of the security time setting KSES is “00”, the random time extension is not performed. On the other hand, if the bit value is “01”, the short mode is set, and if the bit value is “10”, the long mode is set. Here, when the short mode or the long mode is designated, for example, the count value of the free-run counter incorporated in the game control microcomputer 100 is set to a predetermined value provided in the game control microcomputer 100 when a system reset occurs. Store in the built-in register (variable security time register). Then, the security time can be reduced by using the stored value of the variable security time register as it is at the time of initial setting, or by using the value obtained by substituting the stored value into a predetermined arithmetic function (for example, a hash function). What is necessary is just to determine the extension time at the time of extending at random. As an example, when the frequency of the internal system clock SCLK is 6.0 MHz, the extension time is randomly determined in the range of 0 to 680 μs (microseconds) in the short mode, and in the range of 0 to 348, 160 μs in the long mode. The extension time is determined at random. As another example, when the frequency of the internal system clock SCLK is 10.0 MHz, the extension time is randomly determined in the range of 0 to 408 μs in the short mode, and in the range of 0 to 208,896 μs in the long mode. The extension time is determined at random. The variable security time register only needs to be backed up using a backup power source common to the backup location on the main board 11, such as a backup area in the RAM 507 of the game control microcomputer 100. Alternatively, the variable security time register may be backed up by a power source provided separately from a backup power source used for a backup area in the RAM 507 or the like. In this way, the variable security time register is backed up by the backup power supply, so that the stored value of the variable security time register is saved for a predetermined period even when the power supply is stopped. Note that the timing at which the count value in the free-run counter is read and stored in the variable security time register is not limited to when a system reset occurs, and may be any predetermined timing. Alternatively, the free run counter may be backed up by a backup power source, and the extension time for extending the security time using the stored value read from the free run counter at the initial setting may be determined at random.

  Further, the short mode or the long mode is set by the bit value [4-3] of the security time setting KSES, and the bit value in the bit number [2-0] of the security time setting KSES is set to other than “000”. Thus, it is possible to set an extension time to be added to the fixed time. In this case, both the extension time corresponding to the bit value in the bit number [2-0] and the extension time randomly determined based on the bit value in the bit number [4-3] are fixed times. By adding, the security time during which the game control microcomputer 100 is in the security mode is determined.

  The external bus interface 501 provided in the game control microcomputer 100 shown in FIG. 6 is an interface function between the external bus and the internal bus of the chip constituting the game control microcomputer 100, an address bus, a data bus, and each control signal. A bus interface having a direction control function and the like. For example, the external bus interface 501 is connected to an external memory, an external input / output device or the like externally attached to the game control microcomputer 100, and address signals, data signals, various control signals, etc. with these external devices As long as it transmits and receives. In this embodiment, the external bus interface 501 includes an internal resource access control circuit 501A.

  The internal resource access control circuit 501A controls access to the internal data of the game control microcomputer 100 from an external device via the external bus interface 501, and for example, a game control program (game control processing program) stored in the ROM 506 And a circuit for limiting inappropriate external reading of internal data such as fixed data. Here, a circuit analysis device such as an in-circuit emulator (ICE; InCircuit Emulator) may be connected to the external bus interface 501 as an external device.

  As an example, according to the contents of the header KHDR stored in the program management area of the ROM 506, it is possible to switch between prohibiting or permitting reading of stored data in the ROM 506. For example, when the header KHDR is bus output mask invalid data, the ROM 506 can be read by an external device, and external reading of internal data is permitted. On the other hand, if the header KHDR is the bus output mask valid data, the ROM 506 can be read from the external device by masking the address bus output, data bus output and control signal output in the external bus interface 501, for example. Is disabled, and external reading of internal data is prohibited. In this case, when reading of internal data is requested from an external device connected to the external bus interface 501, a predetermined fixed value is output so that internal data cannot be read from the external device. . Further, when the header KHDR is ROM read prohibition data, the ROM 506 itself may not be read, and reading of stored data in the ROM 506 may be prevented. For example, in a ROM at the manufacturing stage, by making the header KHDR ROM read prohibition data, the ROM itself is made unreadable, and if it is a development ROM, bus output mask invalid data is written in the header KHDR, Allows verification of internal data by an external device. On the other hand, if the ROM for mass production is used, the bus output mask valid data is written in the header KHDR, so that the ROM 506 can be read by the CPU 505 and the like inside the game control microcomputer 100, while the external device It is only necessary to prevent the ROM 506 from being read.

  As another example, the internal resource access control circuit 501A is requested by an external device connected to the external bus interface 501 to read out internal data of the game control microcomputer 100 such as all or part of data stored in the ROM 506. Detect that. When this read request is detected, the internal resource access control circuit 501A determines whether or not reading of the internal data of the game control microcomputer 100 is permitted. For example, it is assumed that all or part of the stored data in the ROM 506 has been encrypted. In this case, if the read request from the external device is a read request for the encryption processing program or key data stored in the ROM 506, the internal resource access control circuit 501A rejects the read request, and the game control micro Reading of the internal data of the computer 100 is prohibited. In the external bus interface 501, a switch element is provided between the output port from which data stored in the ROM 506 is output and the internal bus. When the internal resource access control circuit 501 A prohibits reading of the internal data, the switch element May be controlled to be turned off. As described above, the internal resource access control circuit 501A reads the internal data depending on whether or not the read request from the external device requests reading of predetermined internal data (for example, a predetermined area of the ROM 506). You may make it determine whether it prohibits or permits.

  Alternatively, the internal resource access control circuit 501A may determine whether or not a predetermined authentication code has been input from an external device when detecting a read request for internal data. In this case, for example, a predetermined code pattern serving as an authentication code may be stored in advance in the internal resource access control circuit 501A or in a predetermined area of the ROM 506. When an authentication code is input from the external device, the authentication code is compared with the authentication code stored in the internal device. If they match, a read request is accepted and the internal data of the game control microcomputer 100 is read. To give permission. On the other hand, if the authentication code input from the external device does not match the authentication code stored internally, the read request is rejected and reading of the internal data of the game control microcomputer 100 is prohibited. As described above, the internal resource access control circuit 501A determines whether to prohibit or permit reading of the internal data depending on whether or not the authentication code input from the external device matches the authentication code stored internally. You may make it do. Thereby, it is possible to read out the internal data of the game control microcomputer 100 using a correct authentication code known in advance by an inspection organization or the like, and to properly inspect the validity of the internal data. become.

  As yet another example, a read prohibition flag is provided in the internal resource access control circuit 501A, and reading of the ROM 506 by an external device is prohibited if the read prohibition flag is on. On the other hand, when the reading prohibition flag is in the off state, reading of the ROM 506 by the external device is permitted. Here, the read prohibition flag is off in the initial state, but once the read prohibition flag is turned on, the read prohibition flag cannot be cleared and returned to the off state. That's fine. That is, the read prohibition flag can be irreversibly changed from the off state to the on state. For example, the internal resource access control circuit 501A does not have a function of clearing the read prohibition flag to turn it off, and is set so that the read prohibition flag cannot be cleared by any instruction. Just do it. Then, the internal resource access control circuit 501A determines whether or not the read prohibition flag is on when the external device requests to read internal data of the game control microcomputer 100 such as data stored in the ROM 506. At this time, if the reading prohibition flag is on, the reading request from the external device is rejected, and reading of the internal data of the gaming control microcomputer 100 is prohibited. On the other hand, if the read prohibition flag is OFF, a read request from an external device is accepted and reading of the internal data of the game control microcomputer 100 is permitted. With such a configuration, a provider who creates a game control processing program for game control and stores it in the ROM 506 can load a program that has been debugged from the ROM 506 with the read prohibition flag off. Can be read. Then, when shipping after the debugging work is completed, by setting the read prohibition flag to the on state, external reading of the ROM 506 can be restricted thereafter, and by the user of the pachinko gaming machine 1 or the like Reading of the ROM 506 can be prevented. As described above, the internal resource access control circuit 501A may determine whether to prohibit or permit reading of internal data depending on whether an internal flag such as a read prohibition flag is off or on. .

  Note that the read prohibition flag is not set irreversibly but can be changed from the on state to the off state, while the read prohibition flag is changed from the on state to the off state to permit reading of internal data. In this case, external reading of the ROM 506 may be restricted by erasing the data stored in the ROM 506 (for example, flash erasure).

  The clock circuit 502 included in the game control microcomputer 100 is a circuit that generates the internal system clock SCLK by, for example, dividing the oscillation signal input to the control external clock terminal EXC by two. In this embodiment, the control clock CCLK generated by the control clock generation circuit 111 is input to the control external clock terminal EXC. The internal system clock SCLK generated by the clock circuit 502 is supplied to various circuits such as the CPU 505 that control the progress of the game in the game control microcomputer 100. The internal system clock SCLK is also supplied to the random number circuit 509 and used to monitor the frequency of the random number clock RCLK supplied from the random number clock generation circuit 112. Furthermore, the internal system clock SCLK may be output from the system clock output terminal CLKO connected to the clock circuit 502 to the outside of the game control microcomputer 100. It is desirable that the internal system clock SCLK is not output to the outside of the game control microcomputer 100. As described above, by limiting the external output of the internal system clock SCLK, it becomes difficult to specify the operation cycle of the internal circuit (such as the CPU 505) of the game control microcomputer 100 from the outside, and numerical data that becomes a random value Can be prevented from being specified from the outside when the software is updated by software.

  The unique information storage circuit 503 included in the game control microcomputer 100 is a circuit that stores a plurality of types of unique information that is internal information of the game control microcomputer 100, for example. As an example, the unique information storage circuit 503 stores three types of unique information such as a ROM code, a chip individual number, and an ID number. The ROM 506 code is a 4-byte numerical value generated from stored data in a predetermined area of the ROM 506, and four numerical values with different generation methods may be prepared. The chip individual number is a 4-byte number assigned when the game control microcomputer 100 is manufactured, and represents a different numerical value for each chip constituting the game control microcomputer 100. The ID number is an 8-byte number assigned when the game control microcomputer 100 is manufactured, and indicates a different numerical value for each chip constituting the game control microcomputer 100. Here, the chip individual number may be read from the user program, while the ID number may be set so as not to be read from the user program. The unique information storage circuit 503 may be included in the ROM 506 by using a predetermined area of the ROM 506, for example. Alternatively, the unique information storage circuit 503 may be included in the CPU 505 by using a built-in register of the CPU 505, for example.

  The reset / interrupt controller 504 provided in the game control microcomputer 100 is for controlling various reset and interrupt requests generated inside or outside the game control microcomputer 100. Resets controlled by the reset / interrupt controller 504 include system resets and user resets. The system reset is a reset that occurs when a low level signal is input to the external system reset terminal XSRST for a certain period. The user reset is a reset that occurs due to a predetermined factor, such as a watchdog timer (WDT) time-out signal or a non-designated area travel prohibition (IAT).

  Interrupts controlled by the reset / interrupt controller 504 include a non-maskable interrupt NMI and a maskable interrupt INT. The non-maskable interrupt NMI is an interrupt that is unconditionally accepted even when the CPU 505 is in an interrupt-disabled state, and is an interrupt that is generated when a low-level signal is input to the external non-maskable interrupt terminal XNMI (also used as the input port P4) for a certain period. is there. The maskable interrupt INT is an interrupt that can permit / prohibit acceptance of an interrupt request by a setting instruction of the CPU 505, and multiple interrupts can be executed by setting priority. The cause of the maskable interrupt INT is that a low level signal has been input to the external maskable interrupt terminal XINT (also used as the input port P3) for a certain period of time, a time-out has occurred in the timer circuit included in the CTC 508, A plurality of types of interrupt factors are determined in advance, such as the occurrence of an interrupt factor due to data reception or data transmission in the serial communication circuit 511 and the occurrence of an interrupt factor due to the acquisition of numerical data as a random value in the random number circuit 509. It only has to be done.

  The reset / interrupt controller 504 includes an interrupt mask register IMR (address 2028H), an interrupt wait monitor register IRR (address 2029H), among interrupted registers included in the game control microcomputer 100 as shown in FIG. The monitor register ISR (address 202AH), the internal information register CIF (address 208CH), etc. are used to control interrupts and manage resets. The interrupt mask register IMR is a register that sets what is used and what is not used among maskable interrupts INT caused by a plurality of different factors. The interrupt wait monitor register IRR is a register for confirming the generation state of a maskable interrupt request signal for each maskable interrupt factor set by the interrupt initial setting KIIS. The in-interrupt monitor register ISR is a register for confirming the processing state of the maskable interrupt request signal for each maskable interrupt factor set by the interrupt initial setting KIIS. The internal information register CIF is a register for managing the reset factor generated immediately before and recording the frequency abnormality of the random number clock RCLK.

  FIG. 12A shows a configuration example of the internal information register CIF. FIG. 12B shows an example of setting contents in each bit of the internal information data stored in the internal information register CIF. The internal information data CIF4 stored in the bit number [4] of the internal information register CIF is a random number clock abnormality instruction indicating the presence or absence of a frequency abnormality in the random number clock RCLK. In the example shown in FIG. 12B, when the frequency abnormality of the random number clock RCLK is not detected, the bit value of the internal information data CIF4 becomes “0”, whereas when the frequency abnormality is detected, the bit value is “1”. The internal information data CIF2 stored in the bit number [2] of the internal information register CIF is a system reset instruction indicating whether or not the reset factor generated immediately before is a system reset. In the example shown in FIG. 12B, when the immediately preceding reset factor is not a system reset (system reset has not occurred), the bit value of the internal information data CIF2 is “0”, whereas when the system reset is a system reset (system When the reset occurs), the bit value becomes “1”. As a first example of the operation using the internal information data CIF2, the CPU 505 of the game control microcomputer 100 checks the bit value of the internal information data CIF2 when the power is turned on, and the bit value is “1” (set). If not, it is determined that the power is not turned on normally. At this time, for example, by transmitting a predetermined effect control command toward the effect control board 12, an illegal signal input action is performed aiming at a big hit gaming state immediately after the power is turned on in the pachinko gaming machine 1. You may notify that there exists possibility with a production | presentation apparatus etc. Further, as a second example of the operation using the internal information data CIF2, when the pachinko gaming machine 1 notifies the probability variation state only when the power is turned on and does not inform the probability variation state normally, the game control microcomputer 100 when the power is turned on. The CPU 505 or the like may check the bit value of the internal information data CIF2, and if the bit value is not “1” (set), the gaming state may not be notified.

  The internal information data CIF1 stored in the bit number [1] of the internal information register CIF is a WDT timeout instruction indicating whether or not the reset factor generated immediately before is a user reset due to a watchdog timer (WDT) timeout. . In the example shown in FIG. 12B, when the previous reset factor is not a user reset due to a watchdog timer timeout (timeout has not occurred), the bit value of the internal information data CIF1 becomes “0”, while the watchdog When a user reset is caused by a timer timeout (timeout occurs), the bit value becomes “1”. The internal information data CIF0 stored in the bit number [0] of the internal information register CIF is an IAT generation instruction indicating whether or not the reset factor generated immediately before is a user reset due to prohibition of travel outside the designated area (IAT). . In the example shown in FIG. 12B, when the reset factor immediately before is not a user reset due to the occurrence of travel outside the designated area (no IAT occurrence), the bit value of the internal information data CIF0 is “0”, while When the user reset is caused by the occurrence of out-of-area travel (the occurrence of IAT), the bit value becomes “1”.

  The CPU 505 provided in the game control microcomputer 100 executes a user program (game control processing program for game control) based on a control code read from the ROM 506, thereby executing a game control in the pachinko gaming machine 1. CPU. When such game control is executed, a fixed data reading operation in which the CPU 505 reads fixed data from the ROM 506, a variable data writing operation in which the CPU 505 writes various variable data to the RAM 507 and temporarily stores the data, and the CPU 505 is temporarily stored in the RAM 507. The CPU 505 receives the various data from the outside of the game control microcomputer 100 via the external bus interface 501, the PIP 510, the serial communication circuit 511, and the like. A transmission operation for outputting various signals to the outside of the game control microcomputer 100 via the external bus interface 501 and the serial communication circuit 511 is also performed.

  As described above, in the game control microcomputer 100, the CPU 505 executes control according to the program stored in the ROM 506. Therefore, the game control microcomputer 100 (or CPU 505) is hereinafter referred to as executing (or performing processing). Specifically, the CPU 505 executes control according to a program. The same applies to microcomputers mounted on substrates other than the main substrate 11.

  The ROM 506 provided in the game control microcomputer 100 stores a control code indicating a user program (game control processing program for game control), fixed data, and the like. The ROM 506 stores a security check program 506A. The CPU 505 reads the security check program 506A stored in the ROM 506 when the game control microcomputer 100 shifts to the security mode in response to the power-on of the pachinko gaming machine 1 or the occurrence of a system reset. A security check process is executed to check whether or not the change has been made. Note that the security check program 506A may be stored in a built-in memory different from the ROM 506. Further, the security check program 506A may correspond to a security check process for inspecting the storage content of an external memory externally attached to the game control microcomputer 100 via the external bus interface 501, for example.

  A RAM 507 provided in the game control microcomputer 100 provides a work area for game control. Here, at least a part of the RAM 507 may be a backup RAM that is backed up by a backup power source created in the power supply substrate 10. That is, even if the power supply to the pachinko gaming machine 1 is stopped, at least a part of the contents of the RAM 507 is stored for a predetermined period.

  The CTC 508 provided in the game control microcomputer 100 is configured, for example, by incorporating three channels (PTC0-PTC2) of 8-bit programmable timers, and includes a timer circuit that enables real-time interrupt generation and time measurement. Each programmable timer PTC0-PTC2 has a timer value that is updated in response to a change in the count clock signal generated based on the internal system clock SCLK (for example, a falling timing that changes from a high level to a low level). If it is. The CTC 508 may incorporate, for example, an 8-bit programmable counter with 4 channels (PCC0 to PCC3). Each of the programmable counters PCC0 to PCC3 only needs to have its count value updated in response to a signal change of the internal system clock SCLK or occurrence of a timeout in any of the programmable counters PCC0 to PCC3. The CTC 508 may include a free-run counter used for randomly determining an extension time (variable setting time) for extending the security time for each system reset. Alternatively, such a free-run counter may be included in an internal circuit of the game control microcomputer 100 different from the CTC 508, such as a backup area of the RAM 507, for example.

  The random number circuit 509 provided in the game control microcomputer 100 is a circuit that generates numerical data that is a random value having a predetermined update range, such as a 16-bit random number. In this embodiment, on the main board 11 side, for example, a random number value MR1 for determining a special figure display result, a random value MR2 for determining a jackpot type, a random value MR3 for determining a reach, a variation pattern, as shown in FIG. The numerical data indicating the random number value MR4 for determining the type and the random value MR5 for determining the variation pattern are controlled so that they can be counted (updated). In addition, in order to improve a game effect, random numbers other than these may be used. Such random numbers used to control the progress of the game are also referred to as game random numbers. Based on the numerical data extracted from the random number circuit 509, the CPU 505 uses a random counter different from the random number circuit 509, such as a random counter provided in the game control counter setting unit 594 shown in FIG. Numerical data indicating all or part of the random number values MR1 to MR5 may be counted by processing or updating the data. Alternatively, the CPU 505 counts (updates) a part of numerical data indicating the random number values MR1 to MR5 by software using only the random counter provided in the game control counter setting unit 594, for example, without using the random number circuit 509. You may make it do. As an example, numerical data extracted by the CPU 505 from the random number circuit 509 serving as hardware is processed by software to update the numerical data indicating the random value MR1 for determining the special figure display result, and other random values The numerical data indicating MR2 to MR5 may be updated by software by the CPU 505 using a random counter or the like.

  The random value MR1 for determining the special figure display result is determined whether the variable display result of the special symbol or the like in the special figure game is controlled as a big hit game state, whether the variable display result is "small hit" or not. This is a random value used to determine whether or not to control the gaming state. For example, the random number value MR1 for determining the special figure display result takes a value in the range of “0” to “65535”. The random value MR2 for determining the big hit type is a random value used for determining the big hit type as one of a plurality of types when the variable display result is “big hit”. For example, the random value MR2 for determining the big hit type takes a value in the range of “0” to “99”.

  The reach determination random number MR3 is used to determine whether or not to use the “reach” variable display mode in which the decorative symbols are derived and displayed in the reach display state when the variable display result is “lost”. It is a random value. For example, the reach determination random number MR3 takes a value in the range of “0” to “239”.

  The random number value MR4 for determining the variation pattern type is a random value used for determining the variation pattern type of the decorative design as one of a plurality of types prepared in advance. For example, the random value MR4 for determining the variation pattern type takes a value in the range of “0” to “241”. Here, each variation pattern type may be configured to include one or a plurality of variation patterns classified based on, for example, a rendering operation executed during variable display of decorative symbols. Note that some of the plurality of variation pattern types may be configured to include a common variation pattern, and all of the variation patterns included in one variation pattern type may be the other variation pattern. Some may be configured to be included in the type. The random number value MR5 for determining the variation pattern is a random value used for determining the variation pattern of the decorative design as one of a plurality of types prepared in advance. For example, the random number MR5 for determining the variation pattern takes a value in the range of “0” to “997”.

  FIG. 14 is a block diagram illustrating a configuration example of the random number circuit 509. As shown in FIG. 14, the random number circuit 509 includes a frequency monitoring circuit 551, a clock flip-flop 552, a random number generation circuit 553, a start value setting circuit 554, a free-run counter 554A, a random number sequence change circuit 555, and a random number sequence change setting circuit. 556, latch flip-flops 557A and 557B, random number latch selectors 558A and 558B, and random number value registers 559A and 559B. The random value register 559A and the random value register 559B are respectively a random value register R1D (address 2038H-2039H) and a random value register R2D included in the built-in registers of the game control microcomputer 100 as shown in FIG. 8B. (Addresses 203AH-203BH).

  The frequency monitoring circuit 551 is a circuit for monitoring the input state of the random number clock RCLK generated by the random number clock generation circuit 112 to the random number circuit 509 and detecting the occurrence of an abnormality. The frequency monitoring circuit 551 monitors, for example, an oscillation signal input to the random number external clock terminal ERC, and compares it with the internal system clock SCLK. 11 (B)), the bit number [4] of the internal information register CIF is set to “1”. In this embodiment, the random number clock RCLK generated by the random number clock generation circuit 112 is input to the random number external clock terminal ERC.

  The clock flip-flop 552 is configured using, for example, a D-type flip-flop, and the random number clock RCLK from the random number external clock terminal ERC is input to the clock terminal CK. Further, in the clock flip-flop 552, the negative phase output terminal (inverted output terminal) Q bar is connected to the D input terminal. The random number update clock RGK is output from the positive phase output terminal (non-inverted output terminal) Q, while the latch clock RC0 is output from the negative phase output terminal (inverted output terminal) Q bar. In this case, when the signal state of the random number clock RCLK input to the clock terminal CK changes a predetermined state, the clock flip-flop 552 has a positive phase output terminal (non-inverted output terminal) Q and a negative phase output terminal ( Inverted output terminal) Changes the signal state in the output signal from the Q bar. For example, the clock flip-flop 552 rises when the signal state of the random number clock RCLK changes from a low level to a high level, or rises when the signal state of the random number clock RCLK changes from a high level to a low level. The input signal at the D input terminal is captured at any one of the falling timings. At this time, from the positive phase output terminal (non-inverted output terminal) Q, the input signal captured at the D input terminal is output without being inverted, while the negative phase output terminal (inverted output terminal) Q bar is output. From the input signal captured by the D input terminal is inverted and output. Thus, the random number update clock RGK having an oscillation frequency (for example, 10 MHz) that is ½ of the oscillation frequency (for example, 20 MHz) of the random number clock RCLK from the positive phase output terminal (non-inverted output terminal) Q of the clock flip-flop 552. Is output from the negative phase output terminal (inverted output terminal) Q bar, that is, the reverse phase signal (inverted signal) of the random number update clock RGK, that is, the same frequency as the random number update clock RGK and the phase of the random number update clock RGK is π. A different latch clock RC0 is output by (= 180 °).

  The random number update clock RGK output from the clock flip-flop 552 is input to the clock terminal of the random number generation circuit 553 and used for incrementing the count value in the random number generation circuit 553. The latch clock RC0 output from the clock flip-flop 552 is branched into the latch clock RC1 and the latch clock RC2 at the branch point BR1. Therefore, the latch clock RC1 and the latch clock RC2 have the same oscillation frequency, and the signal state changes with a common cycle. Here, examples of changes in the signal state in the latch clock RC1 and the latch clock RC2 include a rising edge that changes from a low level to a high level and a falling edge that changes from a high level to a low level. The latch clock RC1 is input to the clock terminal CK of the latch flip-flop 557A, and becomes a random number acquisition clock used to generate the start winning latch signal SL1. The latch clock RC2 is input to the clock terminal CK of the latch flip-flop 557B and becomes a random number acquisition clock used to generate the start winning latch signal SL2.

  Here, the oscillation frequency of the random number clock RCLK and the oscillation frequency of the control clock CCLK generated by the control clock generation circuit 111 are different from each other, and one of the oscillation frequencies is the other. It is never an integral multiple of the oscillation frequency. As an example, while the oscillation frequency of the control clock CCLK is 11.0 MHz, the oscillation frequency of the random number clock RCLK may be 9.7 MHz. Therefore, both the random number update clock RGK and the latch clocks RC1 and RC2 are oscillation signals whose signal states change at a different period from the control clock CCLK supplied to the CPU 505. That is, the clock flip-flop 552 is based on the random number clock RCLK generated by the random number clock generation circuit 112, and the random number update clock RGK for updating the count value, and the latch clock that serves as a plurality of random number acquisition clocks. As RC1 and RC2, oscillation signals whose signal states change with a period different from the control clock CCLK and the internal system clock SCLK (the control clock CCLK divided by two) are generated.

  The random number generation circuit 553 is composed of, for example, a 16-bit counter and the like, and based on an input such as a random number update clock RGK output from the clock flip-flop 552, a predetermined initial value within a predetermined range in which numerical data can be updated. It is a circuit that cyclically updates to a predetermined final value. For example, the random number generation circuit 553 responds to the falling edge of the random number update clock RGK, which is an input signal to a predetermined clock terminal, from the initial value set within the range from “0” to “65535” to “65535”. The numerical data is counted up so that "1" is added to "." Then, after counting up to “65535”, the numerical data is updated cyclically by counting up from “0” to a numerical value that becomes a final value that is 1 smaller than the initial value.

  The start value setting circuit 554 sets the start value in the count value generated by the random number generation circuit 553 according to the bit value (see FIG. 10B) in the bit number [1-0] of the second random number initial setting KRS2. Set. For example, the start value setting circuit 554 sets the start value to the default value “0000H” if the bit number [1-0] of the second random number initial setting KRS2 is “00”, and if it is “10”. The value is set based on the ID number. If “01”, the value is set based on the count value in the free-run counter 554A that is changed every time the system is reset. If “11”, the ID number and the free-run counter 554A are set. Set to a value based on the count value. In the configuration example illustrated in FIG. 14, the random number circuit 509 includes a free-run counter 554A. When the start value is changed at every system reset, the count value of the free-run counter 554A is used as it is at the initial setting, or the count value is substituted into a predetermined arithmetic function (for example, a hash function). The start value may be determined at random by using the obtained value. The free-run counter 554A only needs to be backed up using a backup power source common to the backup location on the main board 11, such as a backup area in the RAM 507 of the game control microcomputer 100. Alternatively, the free-run counter 554A may be backed up by a power source provided separately from a backup power source used for a backup area or the like in the RAM 507. In this way, the free-run counter 554A is backed up by the backup power source, so that the count value in the free-run counter 554A is stored for a predetermined period even when the power supply is stopped.

  The free-run counter 554A is not limited to the one backed up by the backup power supply. For example, when a system reset occurs, the count value of the free-run counter 554A is stored in a predetermined internal register (for example, a random number start value register). May be backed up by a backup power source. Then, the initial value is randomly determined by using the stored value of the random number start value register as it is or by using the value obtained by substituting the stored value into a predetermined arithmetic function. Also good. In this case, the timing at which the count value in the free-run counter 554A is read and stored in the random number start value register is not limited to when a system reset occurs, but may be any predetermined timing. The free-run counter 554A may be a dedicated free-run counter built in the random number circuit 509 and used to randomly determine the start value of numerical data. That is, the free-run counter 554A may be provided as a separate configuration from the free-run counter used for random determination of the extension time when extending the security time. Alternatively, as a free-run counter 554A, a free-run counter incorporated in the game control microcomputer 100 but provided outside the random number circuit 509 and used for random determination of the extension time when extending the security time. A common one may be used. In this case, in the process of determining the start value of the numerical data and the process of randomly determining the extension time in the security time, for example, the calculation function for substituting the count value is different from each other, or one of the determinations is made In the process, the count value is used as it is, while in the other determination process, the value obtained by substituting the count value into a predetermined arithmetic function is used. It may be different.

  Thus, the free-run counter 554A is not limited to the one built in the random number circuit 509, and may be included in the CTC 508, for example. Alternatively, it may be included in an internal circuit of the game control microcomputer 100 different from the CTC 508, for example, a backup area of the RAM 507. In addition, the free-run counter 554A may be the same counter as the free-run counter used for randomly determining the extension time for extending the security time for each system reset, or provided separately. It may be a counter.

  The random number sequence change circuit 555 is a circuit that allows the permutation of numerical data generated by the random number generation circuit 553 to be changed to a permutation according to a predetermined random number update rule. For example, the random number sequence change circuit 555 executes bit scramble processing such as bit replacement or transposition in numerical data output from the random number generation circuit 553. Further, the random number sequence change circuit 555 can change the permutation of numerical data, for example, by changing a bit scramble key or a bit scramble table used for bit scramble processing.

  The random number sequence change setting circuit 556 changes the random number update rule in the random number sequence change circuit 555 according to the bit value (see FIG. 10A) in the bit number [1-0] of the first random number initial setting KRS1. It is a circuit for setting. For example, if the bit number [1-0] of the first random number initial setting KRS1 is “00”, the random number sequence change setting circuit 556 sets the random number update rule not to change after the second round, while “01” If so, the random number update rule is changed in response to a change request by software after the second round, and if it is “10”, the random number update rule is automatically changed.

  When the random number update circuit 556 changes the random number update rule by software in response to the bit number [1-0] of the first random number initial setting KRS1 being “01”, FIG. Among the built-in registers included in the game control microcomputer 100 as shown, the random number update rule RDSC (address 2034H) is used to control the change of the random number update rule. FIG. 15A shows a configuration example of the random number sequence change register RDSC. FIG. 15B shows an example of setting contents in each bit of random number sequence change request data stored in the random number sequence change register RDSC. The random number sequence change request data RDSC0 stored in the bit number [0] of the random number sequence change register RDSC indicates the presence / absence of a random number sequence change request when the random number update rule is changed by software. In the example shown in FIG. 15B, when there is no random number sequence change request by software, the bit value of the random number sequence change request data RDSC0 is “0”, but when there is a random number sequence change request, The bit value is “1”.

  FIG. 16 shows an operation example when the random number update rule is changed by software. In this case, when the count value permutation RCN output from the random number generation circuit 553 is cyclically updated from a predetermined initial value to a predetermined final value, the response is that the random number sequence change request data RDSC0 is “1”. Then, change the random number update rule. In the operation example shown in FIG. 16, the random number sequence RSN output from the random number sequence change circuit 555 first is “0 → 1 →... → 65535”. Thereafter, it is assumed that “1” is written to the bit number [0] of the random number sequence change register RDSC at a predetermined timing by the CPU 505 executing the user program stored in the ROM 506.

  In response to the bit number [1-0] of the first random number initial setting KRS1 being “01”, the random number sequence change setting circuit 556 reads the random number sequence change request data RDSC0 and the bit value is “1”. In response to "," a setting for changing the random number update rule is made. At this time, the random number sequence change setting circuit 556, according to the count value permutation RCN output from the random number generation circuit 553 reaching a predetermined final value, for example, any one of a plurality of types of random number update rules prepared in advance. The random number update rule is changed, for example, by selecting. In the operation example shown in FIG. 16, the random number sequence change circuit 555 outputs numerical data “65535” corresponding to the final value in the count value permutation RCN output from the random number generation circuit 553, and then responds to the random number sequence change request data RDSC0. Change the random number update rule. Thereafter, the random number sequence change circuit 555 outputs “65535 → 65534 →... → 0” as the random number sequence RSN according to the changed random number update rule. The random number sequence change register RDSC is initialized when the random number sequence change setting circuit 556 reads the random number sequence change request data RDSC0. Therefore, until the bit value “1” is written to the bit number [0] of the random number sequence change register RDSC again, the random number sequence RSN output from the random number sequence change circuit 555 is “65535 → 65534 →... → 0”. Become.

  When the CPU 505 executes the user program stored in the ROM 506 and the bit value “1” is written again to the bit number [0] of the random number sequence change register RDSC, the random number update rule is changed again. In the operation example shown in FIG. 16, when the random number sequence change circuit 555 outputs numerical data “0” corresponding to the final value in the random number sequence RSN, the bit value “1” is written as the random number sequence change request data RDSC0. Change the random number update rule accordingly. Thereafter, the random number sequence changing circuit 555 outputs “0 → 2 →... → 65534 → 1 →... → 65535” as the random number sequence RSN according to the changed random number update rule.

  FIG. 17 shows an operation example when the random number update rule is automatically changed. In this case, in response to the count value permutation RCN output from the random number generation circuit 553 being cyclically updated from a predetermined initial value to a predetermined final value, the random number sequence change setting circuit 556 automatically changes the random number update rule. To change. In the operation example illustrated in FIG. 17, the random number sequence RSN output from the random number sequence change circuit 555 is “0 → 1 →... → 65535”.

  When the random number sequence RSN output from the random number change circuit 555 reaches a predetermined final value, the random number sequence change setting circuit 556 follows a predetermined order from among a plurality of types of update rules prepared in advance. The update rule may be changed by selecting the update rule. Alternatively, the random number sequence change setting circuit 556 may change the update rule by selecting an arbitrary update rule from among a plurality of types of update rules. In the operation example shown in FIG. 17, the random number sequence RSN output from the random number sequence change circuit 555 becomes “65535 → 65534 →... → 0” due to the first change of the random number update rule. Thereafter, due to the second change in the random number update rule, the random number sequence RSN output from the random number sequence change circuit 555 becomes “0 → 2 →... → 65534 → 1 →. In the operation example illustrated in FIG. 17, the random number sequence RSN output from the random number sequence change circuit 555 is “65534 → 0 →... → 32768” due to the third change in the random number update rule. When the fourth random number update rule change is performed, the random number sequence RSN output from the random number sequence change circuit 555 becomes “16383 → 49151 →... → 49150”. When the fifth random number update rule change is performed, the random number sequence RSN output from the random number sequence change circuit 555 becomes “4 → 3 →... → 465553”.

  Thus, the random number sequence change circuit 555 changes the count value permutation RCN output from the random number generation circuit 553 based on a random number update rule predetermined by the setting of the random number sequence change setting circuit 556, thereby A random number sequence RSN in which data is updated by a predetermined procedure can be output.

  Each of the latch flip-flops 557A and 557B is configured using, for example, a D-type flip-flop. In the latch flip-flop 557A, a wiring from the input port P0 included in the PIP 510 is connected to the D input terminal, and a wiring for transmitting the latch clock RC1 is connected to the clock terminal CK. In this embodiment, the first start winning signal SS1 from the first start port switch 22A is input to the input port P0. The latch flip-flop 557A takes in the first start winning signal SS1 in response to the falling edge of the latch clock RC1, and outputs it as the start winning latch signal SL1. Accordingly, in the latch flip-flop 557A, the first start winning signal SS1 is output as the start winning latch signal SL1 in synchronization with the falling edge of the latch clock RC1. In the latch flip-flop 557B, a wiring from the input port P1 included in the PIP 510 is connected to the D input terminal, and a wiring for transmitting the latch clock RC2 is connected to the clock terminal CK. In this embodiment, the second start winning signal SS2 from the second start port switch 22B is input to the input port P1. The latch flip-flop 557B takes in the second start winning signal SS2 in response to the falling edge of the latch clock RC2, and outputs it as the start winning latch signal SL2. As a result, the latch flip-flop 557B outputs the second start winning signal SS2 as the start winning latch signal SL2 in synchronization with the falling edge of the latch clock RC2.

  The first start winning signal SS1 and the second start winning signal SS2 are not limited to those directly transmitted from the first start port switch 22A and the second start port switch 22B. As an example, the time during which the output signal from the first start port switch 22A and the output signal from the second start port switch 22B are in the ON state is measured, and the measured time becomes a predetermined time (for example, 3 ms). Sometimes, a timer circuit for outputting the first start winning signal SS1 and the second starting winning signal SS2 may be provided.

  The random number latch selector 558A is a circuit that takes in the start winning latch signal SL1 transmitted from the latch flip-flop 557A and the random number latch request signal by software, and selectively outputs one as the random number latch signal LL1. The random number latch selector 558B is a circuit that takes in the start winning latch signal SL2 transmitted from the latch flip-flop 557B and the random number latch request signal by software, and selectively outputs one as the random number latch signal LL1. The random number latch selector 558A and the random number latch selector 558B are a random value fetch register RDLT (address 2032H) and a random number latch selection register RDLS among the built-in registers included in the game control microcomputer 100 as shown in FIG. (Address 2030H) is used to control the output of the random number latch signal LL1 and the random number latch signal LL2. The random value acquisition register RDLT is a register used for acquiring numerical data in the random number sequence RSN output from the random number sequence change circuit 555 into the random value register 559A or the random value register 559B by software. The random number latch selection register RDLS receives the numerical data in the random number sequence RSN output from the random number sequence change circuit 555 into the random number value register 559A or the random number value register 559B by software, or by signal input to the input ports P0 and P1. It is a register which shows the taking-in method of taking-in.

  FIG. 18A shows a configuration example of the random value fetch register RDLT. FIG. 18B shows an example of the setting contents in each bit of the random number acquisition specification data stored in the random value acquisition register RDLT. The random value acquisition specification data RDLT1 stored in the bit number [1] of the random value acquisition register RDLT indicates whether or not the random value acquisition specification for the random value register 559B serving as the random value register R2D is present. In the example shown in FIG. 18B, when there is no specification of random number acquisition to the random value register R2D by software, the bit value of the random value acquisition specification data RDLT1 is “0”, while the random value acquisition is not performed. The bit value is “1” when an instruction is included. The random value acquisition specification data RDLT0 stored in the bit number [0] of the random value acquisition register RDLT indicates whether or not the random value acquisition specification is specified for the random value register 559A serving as the random value register R1D. In the example shown in FIG. 18B, when the software does not specify the acquisition of the random number value to the random number register R1D, the bit value of the random value acquisition specification data RDLT0 is “0”, while the random value acquisition is not performed. The bit value is “1” when an instruction is included.

  FIG. 19A shows a configuration example of the random number latch selection register RDLS. FIG. 19B shows an example of setting contents in each bit of random number latch selection data stored in the random number latch selection register RDLS. The random number latch selection data RDLS1 stored in the bit number [1] of the random number latch selection register RDLS indicates a method of taking in the random number value register 559B serving as the random number value register R2D. In the example shown in FIG. 19B, the bit value of the random number latch selection data RDLS1 is “ 0 ”. On the other hand, when the numerical value data to be a random number value is taken into the random value register R2D in response to the signal input to the input port P1, the bit value of the random number latch selection data RDLS1 is set to “1”. The random number latch selection data RDLS0 stored in the bit number [0] of the random number latch selection register RDLS indicates a method of taking in the random number value register 559A serving as the random number value register R1D. In the example shown in FIG. 19B, the bit value of the random number latch selection data RDLS0 is “ 0 ”. On the other hand, when the numerical value data to be a random number value is taken into the random value register R1D in response to the signal input to the input port P0, the bit value of the random number latch selection data RDLS0 is set to “1”.

  The random value registers 559A and 559B are registers for storing numerical data in the random number sequence RSN output from the random number sequence changing circuit 555 as random number values. FIGS. 20A and 20B show a configuration example of a random value register 559A serving as the random value register R1D. 20A shows the lower byte R1D (L) of the random value register R1D, and FIG. 20B shows the upper byte R1D (H) of the random value register R1D. 20C and 20D show a configuration example of a random value register 559B serving as the random value register R2D. 20C shows the lower byte R2D (L) of the random value register R2D, and FIG. 20D shows the upper byte R2D (H) of the random value register R2D. Each of the random value registers 559A and 559B is a 16-bit (2-byte) register and can store a 16-bit random value.

  The random value register 559A takes in the numerical data in the random number sequence RSN output from the random number sequence change circuit 555 as a random value in response to the random number latch signal LL1 supplied from the random number latch selector 558A being turned on. Store with. When the register read signal RRS1 supplied from the CPU 505 is turned on, the random value register 559A is in a readable (enable) state and outputs stored numerical data to an internal bus or the like. On the other hand, when the register read signal RRS1 is in the off state, the same value (for example, “65535H” or the like) is always output, and the reading is disabled (disabled). Further, the random value register 559A may be in a state in which the register read signal RRS1 cannot be received when the random number latch signal LL1 is in the ON state. Further, the random number register 559A may be configured to be in a state in which the random number latch signal LL1 cannot be received when the register read signal RRS1 is in the on state before the random number latch signal LL1 is in the on state. Good.

  The random value register 559B takes in the numerical data in the random number sequence RSN output from the random number sequence change circuit 555 as a random value in response to the random number latch signal LL2 supplied from the random number latch selector 558B being turned on. Store with. When the register read signal RRS2 supplied from the CPU 505 is turned on, the random value register 559B enters a readable (enable) state and outputs stored numerical data to an internal bus or the like. On the other hand, when the register read signal RRS2 is in the OFF state, the same value (for example, “65535H” or the like) is always output, and the reading is disabled (disabled). Further, the random value register 559B may be in a state in which the register read signal RRS2 cannot be received when the random number latch signal LL2 is in the ON state. Further, the random value register 559B may be configured to be in a state in which the random number latch signal LL2 cannot be received when the register read signal RRS2 is in the on state before the random number latch signal LL2 is in the on state. Good.

  The random value register 559A and the random value register 559B are a random number latch flag register RDFM (address 2033H) and a random number interrupt control register RDIC (of the built-in registers included in the game control microcomputer 100 as shown in FIG. 8B). Address 2031H) and enable operation management and interrupt control at the time of random number latching. The random number latch flag register RDFM is a register for storing a random number latch flag indicating whether or not numerical data to be a random number value is latched corresponding to each of the random number value register 559A and the random number value register 559B. For example, in the random number latch flag register RDFM, data indicating the state (ON or OFF) of the random number latch flag corresponding to each of the random number value register 559A and the random number value register 559B is stored. When the data is fetched and stored, the corresponding random number latch flag is turned on and storage of new numerical data is restricted, while the numerical data stored in the random value register 559A or the random value register 559B is read. The corresponding random number latch flag is turned off, and storage of new numerical data is permitted. The random number interrupt control register RDIC is a register that sets permission / prohibition of an interrupt that occurs when numerical data that becomes a random value is latched in the random value register 559A or the random value register 559B.

  FIG. 21A shows a configuration example of the random number latch flag register RDFM. FIG. 21B shows an example of setting contents in each bit of the random number latch flag data stored in the random number latch flag register RDFM. The random number latch flag data RDFM1 stored in the bit number [1] of the random number latch flag register RDFM becomes a random number latch flag indicating whether or not numerical data has been taken into the random number value register 559B serving as the random number value register R2D. In the example shown in FIG. 21B, when the numerical value data is not taken into the random value register R2D (no random value is taken), the bit value of the random number latch flag data RDFM1 becomes “0” and the random number latch flag is set. On the other hand, when the numerical data is fetched (with random number fetching), the bit value becomes “1” and the random number latch flag is set to the on state while clearing to the off state. The random number latch flag data RDFM0 stored in the bit number [0] of the random number latch flag register RDFM becomes a random number latch flag indicating whether or not numerical data has been taken into the random number value register 559A serving as the random number value register R1D. In the example shown in FIG. 21B, when the numerical value data is not taken into the random value register R1D (no random value is taken), the bit value of the random number latch flag data RDFM0 becomes “0” and the random number latch flag is set. On the other hand, when the numerical data is fetched (with random number fetching), the bit value becomes “1” and the random number latch flag is set to the on state while clearing to the off state.

  When each random number latch flag is on, storage of new numerical data in the random number value register R1D or the random number value register R2D associated with each random number latch flag is restricted (prohibited). That is, when the bit value of the random number latch flag data RDFM0 indicating whether or not the numerical value data is taken into the random number value register R1D is “1” and the random number latch flag is in the ON state, the numerical value stored in the random number value register R1D Data cannot be changed, and storage (import) of new numerical data is restricted (prohibited). Further, when the bit value of the random number latch flag data RDFM1 indicating whether or not the random number value data has been taken into the random number value register R2D is “1” and the random number latch flag is in the ON state, the random number value register R2D stores the random number value data. Numerical data cannot be changed, and storage (import) of new numerical data is restricted (prohibited). On the other hand, when each random number latch flag is off, storage of new numerical data in the random number value register R1D or the random number value register R2D associated with each random number latch flag is permitted. That is, when the bit value of the random number latch flag data RDFM0 is “0” and the random number latch flag is in the OFF state, the numerical data stored in the random value register R1D can be changed, and new numerical data is stored ( Import) is allowed. Further, when the bit value of the random number latch flag data RDFM1 is “0” and the random number latch flag is in the OFF state, the numerical data stored in the random value register R2D can be changed, and new numerical data can be stored ( Import) is allowed.

  Note that the bit values of the random number latch flag data RDFM0 and the random number latch flag data RDFM1 are set to "0" to clear the corresponding random number latch flag to the off state, while being set to "1" to the on state. It is not limited to a positive logic type, and may be a negative logic type that turns on when the corresponding random number latch flag is turned off when it is “1”. That is, each random number latch flag is turned on when numerical data is stored in the corresponding random value register R1D or random value register R2D, and the storage of new numerical data is restricted (prohibited), while the corresponding random value Any register may be used as long as the register R1D or the random number register R2D is read and turned off and storage of new numerical data is permitted.

  FIG. 22A shows a configuration example of the random number interrupt control register RDIC. FIG. 22B shows an example of setting contents in each bit of random number interrupt control data stored in the random number interrupt control register RDIC. The random number interrupt control data RDIC1 stored in the bit number [1] of the random number interrupt control register RDIC permits or prohibits an interrupt that occurs when numerical data is taken into the random number value register 559B serving as the random number value register R2D. Indicates the interrupt control setting for In the example shown in FIG. 22 (B), when interrupting at the time of fetching into the random value register R2D is prohibited (interrupt disabled), the bit value of the random number interrupt control data RDIC1 is set to “0”, while this interrupt is When enabling (interrupt enabled), the bit value is set to “1”. The random number interrupt control data RDIC0 stored in the bit number [0] of the random number interrupt control register RDIC allows or prohibits an interrupt that occurs when numerical data is taken into the random number value register 559A serving as the random number value register R1D. Indicates the interrupt control setting for In the example shown in FIG. 22 (B), when interrupting at the time of fetching into the random value register R1D is prohibited (interrupt disabled), the bit value of the random number interrupt control data RDIC0 is set to “0”, while this interrupt is When enabling (interrupt enabled), the bit value is set to “1”.

  In the configuration example shown in FIG. 6, a random number circuit 509 is built in the game control microcomputer 100. On the other hand, for example, as shown in FIG. 23, the random number circuit 509 may be externally attached to the game control microcomputer 100 as a random number circuit chip different from the game control microcomputer 100. In this case, the first start winning signal SS1 from the first start port switch 22A is branched inside the switch circuit 114, and one is input to the input port P0 of the PIP 510 provided in the game control microcomputer 100, and the other May be input to the D input terminal of the latch flip-flop 557A included in the random number circuit 509. Further, the second start winning signal SS2 from the second start port switch 22B is branched inside the switch circuit 114, and one is input to the input port P1 of the PIP 510 provided in the game control microcomputer 100, and the other is input. What is necessary is just to make it input into D input terminal of the flip-flop 557B for latch with which the random number circuit 509 is provided. Between the game control microcomputer 100, for example, the frequency monitor circuit 551 provided in the random number circuit 509 includes the internal system clock SCLK output from the clock circuit 502 provided in the game control microcomputer 100 via the system clock output terminal CLKO. The random value register R1D and the random value register R2D are input to the clock flip-flop 552 or via an address bus, a data bus, a control signal line, etc. connected to the external bus interface 501 provided in the game control microcomputer 100. The numerical data stored in the data may be read out.

  Also, as shown in FIG. 23, when the random number circuit 509 is externally attached to the game control microcomputer 100, the random number value register R1D and the random number value register R2D are selected according to the state (ON / OFF) of each random number latch flag. It is only necessary to limit (prohibit) or permit storage of new numerical data in the. Among the built-in registers shown in FIG. 8B, for example, the random number latch selection register RDLS, the random number interrupt control register RDIC, the random number value fetch register RDLT, the random number latch flag register RDFM, the random number sequence change register RDSC, the random number value register R1D, random Various registers used by the random number circuit 509, such as the numerical register R2D, may not be built in the game control microcomputer 100, but may be built in the random number circuit 509 externally attached to the game control microcomputer 100. . In this case, the CPU 505 of the game control microcomputer 100 may write and read various registers built in the random number circuit 509 via, for example, the external bus interface 501 or the like.

  A PIP 510 provided in the game control microcomputer 100 shown in FIG. 6 is, for example, a 6-bit input dedicated port, and an input port P0 to input port P2 serving as a dedicated terminal, and an input port P3 to input port serving as a function shared terminal. P5 is included. The input port P3 is also used as an external maskable interrupt terminal XINT connected to the CPU 505 or the like. The input port P4 is also used as an external non-maskable interrupt terminal XNMI connected to the CPU 505 or the like. The input port P5 is also used as the first channel reception terminal RXA used by the serial communication circuit 511. The use setting of the input port P3 to the input port P5 is instructed by the function setting KFCS stored in the program management area.

  The PIP 510 uses the input port register PI (address 2090H) among the built-in registers included in the game control microcomputer 100 as shown in FIG. Do. The input port register PI is a register that stores a bit value indicating the input state of the external signal corresponding to each of the input port P0 to the input port P5.

  FIG. 24A shows a configuration example of the input port register PI. FIG. 24B shows an example of setting contents in each bit of the input port data stored in the input port register PI. The input port data PI5 stored in the bit number [5] of the input port register PI indicates the terminal state (ON / OFF) at the input port P5 that is also used as the first channel receiving terminal RXA. The input port data PI4 stored in the bit number [4] of the input port register PI indicates the terminal state (ON / OFF) at the input port P4 that is also used as the external non-maskable interrupt terminal XNMI. The input port data PI3 stored in the bit number [3] of the input port register PI indicates the terminal state (ON / OFF) at the input port P3 that is also used as the external maskable interrupt terminal XINT. The input port data PI2 stored in the bit number [2] of the input port register PI indicates the terminal state (ON / OFF) at the input port P2. The input port data PI1 stored in the bit number [1] of the input port register PI indicates the terminal state (ON / OFF) at the input port P1. The input port data PI0 stored in the bit number [0] of the input port register PI indicates the terminal state (ON / OFF) at the input port P0.

  The serial communication circuit 511 provided in the game control microcomputer 100 is a circuit that handles communication data in, for example, full duplex, asynchronous, standard NRZ (Non Return to Zero) format. As an example, the serial communication circuit 511 can only transmit serial data in a single direction between the external communication circuit and the first channel transmission / reception circuit capable of transmitting and receiving serial data bidirectionally with the external circuit. And a second channel transmission circuit. The first channel transmission / reception circuit included in the serial communication circuit 511 may be used for bidirectional serial communication with the payout control microcomputer 150 mounted on the payout control board 15. The second channel transmission circuit included in the serial communication circuit 511 may be used for unidirectional (only transmission) serial communication with the effect control microcomputer 120 mounted on the effect control board 12. Thereby, the signal input with respect to the main board | substrate 11 from the production control board | substrate 12 side can be prohibited, and an improper act can be prevented.

  In the serial communication circuit 511, for example, four types of errors such as an overrun error, break code error, framing error, and parity error may occur when communication data is received. As long as it can be generated. The overrun error is an error that occurs when the next communication data is received before the received communication data is read by the user program. A break code error is an error that occurs when a predetermined break code is detected during reception of communication data. The framing error is an error that occurs when the stop bit in the received communication data is “0”. The parity error is an error that occurs when the parity of the received communication data does not match a predetermined parity when the parity function is set to be used.

  The serial communication circuit 511 may include a first interrupt control circuit and a second interrupt control circuit. The first interrupt control circuit is a circuit for managing an interrupt generation factor in the first channel transmission / reception circuit included in the serial communication circuit 511 and controlling a communication interrupt request. Interrupts controlled by the first interrupt control circuit include a first channel transmission interrupt and a first channel reception interrupt. The first channel transmission interrupt includes an interruption due to transmission completion and an interruption due to transmission data empty. The first channel reception interrupt includes an interruption due to reception data full and an interruption due to the occurrence of a reception error such as a break code error, an overrun error, a framing error, and a parity error. The second interrupt control circuit is a circuit for managing an interrupt generation factor in the second channel receiving circuit included in the serial communication circuit 511 and controlling a communication interrupt request. The interrupt controlled by the second interrupt control circuit is a second channel transmission interrupt. The second channel transmission interrupt includes an interruption due to transmission completion and an interruption due to transmission data empty.

  The address decoding circuit 512 provided in the game control microcomputer 100 is a circuit for decoding each functional block in the game control microcomputer 100 and decoding a chip select signal that is a decode signal for an external device. . By the chip select signal, an internal circuit of the game control microcomputer 100 or an external device as a peripheral device is selectively operated effectively and can be accessed from the CPU 505.

  In the ROM 506 provided in the game control microcomputer 100, in addition to the game control user program and the control code to be the security check program 506A, various selection data and table data used for controlling the progress of the game, etc. Is stored. For example, the ROM 506 stores data constituting a plurality of determination tables, determination tables, setting tables, and the like prepared for the CPU 505 to perform various determinations, determinations, and settings. The ROM 506 also has a variation pattern in which the CPU 505 stores a plurality of types of table data constituting a plurality of command tables used for transmitting control signals serving as various control commands from the main board 11 and a plurality of types of decorative pattern variation patterns. Table data constituting the table is stored.

  FIG. 25 is an explanatory diagram illustrating a variation pattern of a decorative design. In this embodiment, among the cases where the variable display result is “losing”, the variable display mode of the decorative design is “non-reach” and “reach”, respectively. When the display result is “big hit”, when the big hit type is “non-probability change” or “probability change” or “surprise change”, or when the variable display result is “small hit” Correspondingly, a plurality of variation patterns are prepared in advance. The variation pattern corresponding to the case where the variable display result is “losing” and the decorative symbol variable display mode is “non-reach” is called a non-reach variation pattern (also referred to as “non-reach loss variation pattern”) and is variable. The variation pattern corresponding to the case where the display result is “losing” and the decorative symbol variable display mode is “reach” is referred to as a reach variation pattern (also referred to as “reach loss variation pattern”). Further, the non-reach variation pattern and the reach variation pattern are included in the loss variation pattern corresponding to the case where the variable display result is “lost”. The variation pattern corresponding to the case where the variable display result is “big hit” or “small hit” is referred to as a hit variation pattern.

  As shown in FIG. 25, in this embodiment, fluctuation patterns PA1-1 to PA1-4 are prepared in advance as non-reach fluctuation patterns. Further, as the reach variation pattern, variation pattern PA2-1, variation pattern PA2-2, variation pattern PB2-1, variation pattern PB2-2, variation pattern PA3-1, variation pattern PA3-2, variation pattern PB3-1, variation A pattern PB3-2 is prepared in advance. The hit fluctuation patterns corresponding to the case where the variable display result is “big hit” and the big hit type is “non-probable change” or “probable change” include the change pattern PA4-1, change pattern PA4-2, change pattern PB4-1, change A pattern PB4-2, a fluctuation pattern PA5-1, a fluctuation pattern PA5-2, a fluctuation pattern PB5-1, and a fluctuation pattern PB5-2 are prepared in advance. As variation patterns corresponding to the case where the variable display result is “big hit” and the big hit type is “surprise”, or the variable display result is “small hit”, the variation patterns PC1-1 to PC1-3 are the variation patterns. Are prepared in advance. Further, a fluctuation pattern PC1-4 and a fluctuation pattern PC1-5 are prepared in advance as hit fluctuation patterns corresponding only to the case where the variable display result is “big hit” and the big hit type is “surprise”.

  FIG. 26 shows the decorative pattern variation pattern type in this embodiment. Each variation pattern shown in FIG. 25 is included in at least one variation pattern type among the plurality of variation pattern types shown in FIG. That is, each variation pattern type may be configured to include one or a plurality of variation patterns classified (grouped) based on, for example, an effect operation performed during variable display of decorative symbols. As an example, a variation pattern type that includes a variation pattern in which a variable display state of a decorative design does not become a reach state by classifying (grouping) a plurality of variation patterns according to the type of reach effect (effect mode), and a variation with normal reach What is necessary is just to divide into the fluctuation pattern classification in which the pattern is included, and the fluctuation pattern classification in which the fluctuation pattern with a super reach (super reach α or super reach β) is included. As another example, categorizing (grouping) multiple variation patterns according to the presence or absence of “pseudo-continuous” variable display effects and the number of executions of pseudo-continuous variation (re-variation) to execute “pseudo-continuous” variable display effects A variation pattern type that includes a variation pattern that is not included, a variation pattern type that includes a variation pattern in which the number of executions of the pseudo-continuous variation (re-variation) is 1 in the variable display effect of “pseudo-continuous”, and “pseudo-continuous” What is necessary is just to divide into the variation pattern classification in which the variation pattern which makes the frequency | count of execution of a pseudo | simulation continuous variation (revariation) 2 or more is included in the variable display effect of this. As another example, a plurality of variation patterns may be classified (grouped) according to the presence / absence of a specific effect such as “pseudo ream” or “slip”, or the variable display time of a decorative design. Among the plurality of variation pattern types, there may be one configured to include a common variation pattern.

  In the example illustrated in FIG. 26, the variation pattern types CA1-1 to CA1-3 are prepared in advance in response to the case where the variable display result is “losing” and the variable display mode is “non-reach”. Yes. Corresponding to the case where the variable display result is “losing” and “variable” variable display mode, variation pattern types CA2-1 to CA2-4 are prepared in advance. Corresponding to the variable display result (big hit type) of “big hit” when the variable display result is “big hit”, the variable pattern type CA 3-1 to the variable pattern type CA 3-3 are prepared in advance. Corresponding to the case where the variable display result is “big hit” and the variable display mode (big hit type) of “surprise” or the variable display result is “small hit”, the variation pattern type CA4-1 is prepared in advance. ing. Furthermore, the variation pattern type CA4-2 is prepared in advance only in the case where the variable display result is the “big hit” and “variable display type” (big hit type).

  The variation pattern type CA1-1 is a variation pattern type of “no shortening” in which the variable display time of special symbols and decorative symbols is not shortened and variable display effects such as “pseudo-ream” and “slip” are not executed. , A variation pattern previously associated with “no shortening” is included. The variation pattern type CA1-2 corresponds to, for example, that the total number of reserved memories is “3” or more in the normal state, or that the total number of reserved memories is “2” or more in the probability change state or the short time state. This is a variation pattern type of “with shortening” in which the special display such as “pseudo-ream” and “slip” is not executed because the variable display time of special symbols and decorative symbols is shortened, and is associated with “with shortening” in advance. Variation patterns are included. The variation pattern type corresponding to the case where the variable display time is shortened in the normal state and the variation pattern type corresponding to the case where the variable display time is shortened in the probability variation state or the short time state, It may be provided separately. In the normal state, the variable display type corresponding to the case where the total display memory number is “3” and the variable display time is shortened, and the variable display time is shortened when the total memory number is “4”. A variation pattern type corresponding to the case may be provided separately. The variation pattern type CA1-3 is a variation pattern type of “slide, pseudo-continuity” in which a specific effect of “pseudo-run” or “slip” is executed when the variable display mode is “non-reach”. , A pseudo-ream ”is included in advance.

  The variation pattern type CA2-1 includes a normal reach that is a normal reach effect after the variable display state of the decorative symbol is set to the reach state without executing the “pseudo-ream” specific effect, and the reach effect ends. A variation pattern type of “no normal reach (losing) pseudo-ream” that derives and displays a definite decorative symbol of a reach combination, and includes a variation pattern that is previously associated with “no normal reach (losing) pseudo-ream”. In the variation pattern type CA2-2, the number of executions of the pseudo continuous variation (revariation) in the specific effect of “pseudo ream” is one, and the reach display is performed after the variable display state of the decorative symbol is changed to the reach state. Is the variation pattern type of “normal reach (losing) pseudo-continuous variation once” that derives and displays a definite decorative symbol of the reach combination, and is associated with “normal reach (losing) pseudo-continuous variation once” in advance. Includes variation patterns.

  In the variation pattern type CA2-3, the number of executions of the pseudo-continuous variation (re-variation) in the “pseudo-ream” specific rendering is two times, and the reach display is performed with the normal reach after the variable display state of the decorative symbol is set to the reach state. Is a variation pattern type of “normal reach (losing) quasi-continuous variation 2 times” for deriving and displaying a definite decorative symbol of the reach combination, and is associated with “normal reach (losing) quasi-continuous variation 2 times” in advance. Includes variation patterns. Fluctuation pattern types CA2-4 are accompanied by super reach (super reach α or super reach β) after the decorative symbol variable display state is set to the reach state, and when the reach production ends, the definite decorative symbols of the reach combination are derived and displayed. The variation pattern type of “Super Reach (Lose)” is included, and includes a variation pattern associated with “Super Reach (Lose)” in advance.

  In the variation pattern type CA3-1, the variable display effect of “pseudo-continuous” is not executed, but the normal display is performed after the variable symbol display state of the decorative pattern is set to the reach state, and when the reach effect ends, the definite decoration of the jackpot combination is determined. It is a variation pattern type of “no normal reach (big hit) quasi-continuous” for deriving and displaying a symbol, and includes a variation pattern previously associated with “no normal reach (big hit) quasi-continuous”. In the variation pattern type CA3-2, the variable display effect of “pseudo-continuous” is executed, the variable display state of the decorative symbol is set to the reach state, and then the normal reach is involved. Is a variation pattern type of “normal reach (big hit) pseudo-relation” and includes a variation pattern previously associated with “normal reach (big hit) pseudo-ream”. Fluctuation pattern type CA3-3 is a “super reach (big hit)” that displays a definite decorative symbol of a big hit combination when super reach is included after the variable symbol display state of the decorative symbol is set to the reach state, and the reach effect is finished. It is a variation pattern type, and includes a variation pattern previously associated with “super reach (big hit)”.

  The variation pattern type CA4-1 is a variation pattern type of “2nd release chance stop” that derives and displays a confirmed decorative pattern that becomes the 2nd release chance, and is associated with “2nd release chance stop” in advance. Variation patterns are included. In the example of the variation pattern shown in FIG. 25, the variation pattern PC1-1 to variation pattern PC1-3 is a variation pattern in which the determined decorative design is one of a plurality of types of second chances of opening, and the variation pattern type CA4. −1. The variation pattern type CA4-2 is a method of deriving and displaying a definite decorative pattern of reach combination after setting the variable display state of the decorative symbol to the reach state when the variable display result is “big hit” and the big hit type is “surprise”. It is a variation pattern type of “open reach reach loss”, and includes a variation pattern that is associated in advance with “2 times open reach loss”. In the example of the variation pattern shown in FIG. 25, the variation pattern PC1-4 and the variation pattern PC1-5 are variation patterns having a fixed decorative design as a reach combination, and are included in the variation pattern type CA4-2. .

  FIG. 27 shows a configuration example of the special figure display result determination table stored in the ROM 506. In this embodiment, as the special figure display result decision table, a first special figure display result decision table 130A shown in FIG. 27A and a second special figure display result decision table 130B shown in FIG. Are prepared in advance. The first special figure display result determination table 130A has a variable display result before a fixed special symbol that is a variable display result is derived and displayed in the special figure game using the first special figure by the first special symbol display device 4A. Whether or not to control the big hit gaming state as "big hit" and whether to control the small hit game state as "small hit" based on the random value MR1 for determining the special figure display result It is a table that is referenced to determine. The second special figure display result determination table 130B shows the variable display result before the fixed special symbol that becomes the variable display result is derived and displayed in the special figure game using the second special figure by the second special symbol display device 4B. Whether or not to control the big hit gaming state as "big hit" and whether to control the small hit game state as "small hit" based on the random value MR1 for determining the special figure display result It is a table that is referenced to determine.

  In the first special figure display result determination table 130A, the random value MR1 for determining the special figure display result is determined depending on whether the probability change flag provided in the game control flag setting unit 592 shown in FIG. 34 is OFF or ON. A numerical value (determined value) to be compared with is assigned to the special figure display results of “big hit”, “small hit”, and “losing”. In the second special figure display result determination table 130B, the numerical value (determination value) to be compared with the random value MR1 for determining the special figure display result is “big hit” depending on whether the probability variation flag is off or on. And “Lose” special map display results. In the first special figure display result decision table 130A and the second special figure display result decision table 130B, the table data indicating the decision value to be compared with the random value MR1 for special figure display result decision indicates the special figure display result as “big hit”. ”Is data for determination assigned to the determination result as to whether or not to control to the big hit gaming state. In each of the first special figure display result determination table 130A and the second special figure display result determination table 130B, when the probability variation flag is on, a larger number of determination values are obtained than when the probability variation flag is off. It is assigned to the special figure display result of "Big hit". Here, when the gaming state in the pachinko gaming machine 1 is the probability variation state, the probability variation flag is turned on. On the other hand, when the gaming state in the pachinko gaming machine 1 is a normal state or a short time state, the probability variation flag is turned off. As a result, when the gaming state in the pachinko gaming machine 1 is in the probabilistic state, the probability that it will be determined to control the big hit gaming state with the special figure display result as “big hit” is higher than in the normal state or the short time state. Become. That is, in each of the first special figure display result determination table 130A and the second special figure display result determination table 130B, when the gaming state in the pachinko gaming machine 1 is a probabilistic state, compared to when it is a normal state or a short time state Therefore, the determination data is assigned to the determination result as to whether or not to control the jackpot gaming state so that the probability of being determined to control the jackpot gaming state increases.

  Further, in the setting example of the first special figure display result determination table 130A shown in FIG. 27A, a special figure display in which the determined value of the predetermined range (value in the range of “30000” to “30099”) is “small hit”. Assigned to the result. On the other hand, in the setting example of the second special figure display result determination table 130B shown in FIG. With such a setting, the variable display result is determined based on the fact that the first start condition for starting the special figure game using the first special figure by the first special symbol display device 4A is satisfied, The case where the variable display result is determined based on the fact that the second start condition for starting the special figure game using the second special figure by the second special symbol display device 4B is established. The ratio determined to be controlled in the small hit gaming state as “small hit” can be varied. In particular, in the special figure game using the second special figure, it is not determined that the special figure display result is “small hit” and the game is controlled to the small hit game state. In the game state where the game ball is likely to enter the second start winning opening formed by the device 6B, the frequent play of the small hit game state in which it is difficult to obtain the prize ball is avoided, and the deterioration of the game interest due to the extended game is prevented. it can.

  In the second special figure display result determination table 130B, a predetermined range of determination values different from the settings in the first special figure display result determination table 130A are assigned to the special chart display result of “small hit”. Also good. Alternatively, regardless of which of the first start condition and the second start condition is satisfied, the special figure display result may be determined with reference to the common special figure display result determination table.

  In the setting example of the second special figure display result determination table 130B shown in FIG. 27B, among the determination values compared with the random value MR1 for determining the special figure display result, the value indicating “0” is “big hit”. Assigned to the special map display result. On the other hand, the determination value indicating “0” may not be assigned to the special figure display result of “big hit”, but may be assigned to the special figure display result of “losing”. Thus, for example, the second start winning signal SS1 is intentionally set at the setting timing of the default value “0000H” that becomes the start value when the bit value in the bit number [1] of the second random number initial setting KRS2 is set to “0”. Numeric data indicating “0”, which is input and becomes the random value MR1 for determining the special figure display result, is stored in the random value register R2D and read, or the special figure is displayed by utilizing the destruction or failure of the random value register R2D. It is possible to prevent the special figure display result from being “big hit” by extracting numerical data indicating “0” which is the random number MR1 for determining the result. In the second special figure display result determination table 130B, the same determination value as that of the first special figure display result determination table 130A may be assigned to the special figure display result of “big hit”.

  FIG. 28 shows a configuration example of the jackpot type determination table 131 stored in the ROM 506. The jackpot type determination table 131 determines the jackpot type as one of a plurality of types based on the random number MR2 for determining the jackpot type when it is determined that the special figure display result is “big hit” and the game state is controlled to the jackpot game state. This is a table to be referred to. In the jackpot type determination table 131, whether the value of the variation special figure designation buffer (variation special figure designation buffer value) provided in the game control buffer setting unit 595 shown in FIG. 34 is “1” or “2”. Accordingly, a numerical value (decision value) to be compared with the random value MR2 for determining the big hit type is assigned to a plurality of types of big hit types such as “non-probability change”, “probability change”, and “surprise change”. Here, the variable special figure designation buffer value is set to “1” when the special figure game using the first special figure is started on the first special symbol display device 4A when the first start condition is satisfied. Thus, “2” is set when the second special symbol display device 4B starts the special figure game using the second special figure when the second start condition is satisfied. Further, the jackpot type determination table 131 corresponds to the jackpot type determined based on the random number MR2 for determining the jackpot type by using the value of the jackpot type buffer provided in the game control buffer setting unit 595 (the jackpot type buffer value). Thus, table data (setting data) for setting to any one of “0” to “2” is included.

  In the setting example of the jackpot type determination table 131 shown in FIG. 28, the allocation of the determination value to the jackpot type of “surprise” differs depending on whether the fluctuation special figure designation buffer value is “1” or “2”. ing. That is, when the fluctuation special figure designation buffer value is “1”, the determined value of the predetermined range (value in the range of “82” to “99”) is assigned to the jackpot type of “surprise”, while the fluctuation When the special figure designation buffer value is “2”, the decision value is not assigned to the big hit type of “surprise”. With such a setting, the jackpot type is determined as one of a plurality of types based on the fact that the first start condition for starting the special figure game using the first special figure by the first special symbol display device 4A is satisfied. And determining the jackpot type as one of a plurality of types based on the fact that the second start condition for starting the special figure game using the second special figure by the second special symbol display device 4B is satisfied. Thus, the rate at which the jackpot type is determined to be “surprising” can be varied. In particular, in the special figure game using the second special figure, it is not determined that the big hit type is “surprise” and controlled to the two round big hit state. In a gaming state in which a game ball is likely to enter the second start winning opening to be formed, frequent occurrence of a two-round big hit state in which it is difficult to obtain a prize ball can be avoided, and a decrease in game entertainment due to a prolonged game can be prevented. Even when the fluctuation special figure designation buffer value is “2”, a predetermined range of determination values different from those when the fluctuation special figure designation buffer value is “1” are assigned to the “surprise” jackpot type. You may do it.

  FIG. 29 shows a configuration example of the reach determination table 132 stored in the ROM 506. The reach determination table 132 determines whether or not the variable display state of the decorative symbols is set to the reach state based on the reach determination random value MR3 when it is determined that the special figure display result is “lost”. It is a table that is referred to. In the reach determination table 132, a numerical value (determination value) to be compared with the random number MR3 for reach determination according to whether the gaming state is a normal state, a short-time state or a probable change state, and the total reserved memory number, It is assigned to the reach determination result indicating “non-reach” in which the decorative symbol variable display state is not in the reach state or “reach” in which the reach state is set.

  In the setting example of the reach determination table 132 shown in FIG. 29, the allocation of the determination value to the reach determination result differs depending on whether the gaming state in the pachinko gaming machine 1 is the normal state, the short time state, or the probability variation state. . Further, in the setting example shown in FIG. 29, the assignment of the decision value to the reach decision result differs depending on the total number of reserved memories. For example, when the gaming state is the normal state, the determination value in the range of “0” to “204” is assigned to the determination result of “non-reach”, corresponding to the case where the total number of reserved memories is “0”. , “205” to “239” are assigned to the determination result of “reach”. When the total number of reserved memories is “1”, the determined value in the range of “0” to “217”, which is larger than when the total number of reserved memories is “0”, is assigned to the determination result of “non-reach”. It has been. When the total number of reserved memories is “2”, the determined value in the range of “0” to “220”, which is larger than when the total number of reserved memories is “0” or “1”, is “non-reach”. Assigned to the decision result. When the total number of reserved memories is “3” or “4”, the determined value in the range of “0” to “230” is assigned to the determination result of “non-reach”, and the total number of reserved memories is “5”. In the case of “8”, the determined value in the range of “0” to “233” is assigned to the determination result of “non-reach”. With such a setting, when the number of stored special graphics games (total number of stored memories) is equal to or greater than a predetermined number (for example, “3”), the decorative symbol variable display state is changed as compared to when the number is less than the predetermined number. The percentage determined when the reach state is reached. If the average special figure fluctuation time in the non-reach fluctuation pattern is set to be shorter than the average special figure fluctuation time in the reach fluctuation pattern, the total number of reserved memories is equal to or greater than a predetermined number. Compared to when the number is less than the predetermined number, the average special figure fluctuation time can be shortened.

  30 and 31 show a configuration example of the variation pattern type determination table stored in the ROM 506. In this embodiment, as the variation pattern type determination table, the big hit variation pattern type determination table 133A shown in FIG. 30A, the small hit variation pattern type determination table 133B shown in FIG. 30B, and FIG. ) And a reach variation pattern type determination table 133D shown in FIG. 31 are prepared in advance. Each variation pattern type determination table is a table that is referred to in order to determine one of a plurality of variation pattern types based on the random value MR4 for determining the variation pattern type.

  The big hit variation pattern type determination table 133A shown in FIG. 30A is selected as a use table when it is determined that the special figure display result is “big hit”. In the jackpot variation pattern type determination table 133A, a numerical value to be compared with the random value MR4 for determining the variation pattern type depending on whether the determination result of the jackpot type is “non-probability change”, “probability change”, or “surprise change”. (Determined value) is assigned to the variation pattern type CA3-1 to the variation pattern type CA3-3, the variation pattern type CA4-1, the variation pattern type CA4-2, and the like.

  In the setting example of the jackpot variation pattern type determination table 133A shown in FIG. 30A, the determination value is set so that the ratio determined for each variation pattern type differs depending on which of the plurality of types of jackpot types is determined. Is assigned to each variation pattern type. For example, depending on whether the big hit type is “non-probable change” or “probability change”, the assignment of the decision value to the variation pattern type CA3-1 to variation pattern type CA3-3 differs. When the big hit type is “non-probable change” or “probability change”, the decision value is assigned to the variation pattern type CA3-1 to the variation pattern type CA3-3, while the variation pattern type CA4- No determination value is assigned to 1 and the variation pattern type CA4-2. On the other hand, when the big hit type is “surprise”, the decision value is assigned to the variation pattern type CA4-1 and the variation pattern type CA4-2, while the variation pattern type CA3-1 to the variation pattern type. No decision value is assigned to CA3-3.

  Thus, the allocation of the decision value to each variation pattern type differs depending on the jackpot type. In addition, a determined value may be assigned to a different variation pattern type depending on the jackpot type. In this way, different variation pattern types can be determined according to the determination result of whether the jackpot type is a plurality of types, and the ratios determined for the same variation pattern type can be made different. Note that a variation pattern type determination table in which determination values are assigned to different variation pattern types may be referred to depending on whether the gaming state in the pachinko gaming machine 1 is a normal state, a probability variation state, or a short time state. As a result, depending on whether the gaming state is a plurality of types, it is possible to determine different variation pattern types, and it is possible to vary the ratios determined for the same variation pattern type.

  The small hit variation pattern type determination table 133B shown in FIG. 30B is selected as a use table when it is determined that the special figure display result is “small hit”. In the small hit variation pattern type determination table 133B, all the numerical values (determination values) to be compared with the random value MR4 for determining the variation pattern type are assigned to the variation pattern type CA4-1. In the big hit fluctuation pattern type determination table 133A shown in FIG. 30A, a part of the determined value is assigned to the fluctuation pattern type CA4-1 depending on the case where the big hit type is “surprise”. As described above, the variation pattern type CA4-1 is a common variation pattern type in the case where the big hit type is “surprise” and the special figure display result is “small hit”. That is, the table data corresponding to the big hit type “surprise” in the big hit variation pattern type determination table 133A and the table data constituting the small hit variation pattern type determination table 133B include a common variation pattern type. Is set to With this setting, when the variable display of the decorative pattern is executed with the variation pattern included in the variation pattern type CA4-1, the special figure display result is “big hit” and the big hit type is “surprise”, and two rounds big hit It becomes difficult for the player to recognize whether the game is controlled to the state or whether the special figure display result is “small hit” and is controlled to the small hit game state. And opening / closing operation of the big prize opening in the small hit game state), it is possible to improve the interest of the game by increasing the player's expectation that it will be in a probable change state (the big hit type will be "surprising") .

  In the non-reach variation pattern type determination table 133C shown in FIG. 30C, a determination is made that the special figure display result is “lost”, and a determination “non-reach” is made that the variable display state of the decorative symbols is not changed to the reach state. Is selected as the usage table. In the non-reach variation pattern type determination table 133C, it is compared with the random value MR4 for determining the variation pattern type depending on whether the gaming state is a normal state, a short-time state or a probable variation state, the total number of reserved memory, etc. Numerical values (determined values) are assigned to the variation pattern types CA1-1 to CA1-3 and the like. In the setting example of the non-reach variation pattern type determination table 133C shown in FIG. 30C, depending on whether the gaming state in the pachinko gaming machine 1 is a normal state, a short-time state or a certain variation state, Assignment of decision values is different. In the setting example shown in FIG. 30C, the assignment of the decision value to each variation pattern type differs according to the total number of reserved storage. In this manner, the determination ratio of each variation pattern type is varied according to the gaming state and the total number of reserved memories in the pachinko gaming machine 1. Here, it is only necessary to assign a decision value to each variation pattern type so that the average special figure variation time is shorter when the gaming state is in the short-time state or the probability variation state than in the normal state. . In addition, when the total number of reserved memories is equal to or greater than the predetermined number, a determination value may be assigned to each variation pattern type so that the average special figure variation time is shorter than when the total number is less than the predetermined number.

  The reach variation pattern type determination table 133D shown in FIG. 31 is used when it is determined that the special figure display result is “lost” and “reach” is selected to change the variable display state of the decorative symbols to the reach state. Selected as a table. In the reach variation pattern type determination table 133D, a numerical value to be compared with the random number value MR4 for determining the variation pattern type according to whether the gaming state is a normal state, a short time state, a probability variation state, the total number of reserved storage, etc. (Determined value) is assigned to the variation pattern type CA2-1 to variation pattern type CA2-4.

  FIG. 32 shows a configuration example of a variation pattern determination table stored in the ROM 506. In this embodiment, as the variation pattern determination table, a hit variation pattern determination table 134A shown in FIG. 32A and a loss variation pattern determination table 134B shown in FIG. 32B are prepared in advance. Each variation pattern determination table is a table that is referred to in order to determine a variation pattern as one of a plurality of types based on a random number MR5 for variation pattern determination. In each variation pattern determination table, a numerical value (decision value) to be compared with the random value MR5 for determining the variation pattern is assigned to a single type or a plurality of types of variation patterns according to the determination result of the variation pattern type. .

  FIG. 33 shows an example of the structure of the start opening prize table stored in the ROM 506. In this embodiment, a first start opening winning table 135A shown in FIG. 33 (A) and a second starting opening winning table 135B shown in FIG. 33 (B) are prepared in advance as start opening winning tables. . In each start opening winning table, the game ball passes (enters) through the first starting winning opening formed by the normal winning ball apparatus 6A and the second starting winning opening formed by the normal variable winning ball apparatus 6B, and the start winning is generated. This table is sometimes referred to for performing various settings.

  The first start opening winning table 135A shown in FIG. 33A is selected as a use table when the game ball passes (enters) through the first starting winning opening and a start winning is generated. The first start opening prize table 135A designates a first reserved memory counter address, a random value register R1D address, a first special figure reserved memory section address, a first start prize designation command table address, start data (first), and the like. Consists of table data. The first reserved memory counter address is an address assigned to the first reserved memory counter. The first reserved memory counter is provided in the game control counter setting unit 594 shown in FIG. 34 and counts the first special figure reserved memory number. The random value register R1D address is an address (for example, the start address 2038H) assigned to the random value register R1D in the built-in register area shown in FIG. 8B. The first special figure reservation storage unit address is an address (for example, a head address) assigned to the first special figure reservation storage unit 591A shown in FIG. The first start winning designation command table address is the address (for example, the top address) of the first starting winning designation command table stored in the ROM 506. The start data (first) is “first” start data stored in the start data storage unit 591C shown in FIG. 34 and indicating that the game ball has passed (entered) through the first start winning opening.

  The second start opening winning table 135B shown in FIG. 33 (B) is selected as a use table when a game ball passes through (enters) the second start winning opening and a start winning occurs. The second starting entry winning table 135B specifies a second reserved storage counter address, a random value register R2D address, a second special figure holding storage section address, a second starting winning designation command table address, start data (second), and the like. Consists of table data. The second reserved memory counter address is an address assigned to the second reserved memory counter. The second reserved memory counter is provided in the game control counter setting unit 594 shown in FIG. 34 and counts the second special figure reserved memory number. The random value register R2D address is an address (for example, the start address 203AH) assigned to the random value register R2D in the built-in register area shown in FIG. The second special figure reservation storage unit address is an address (for example, a head address) assigned to the second special figure reservation storage unit 591B shown in FIG. The second start winning designation command table address is an address (for example, the top address) of the second starting winning designation command table stored in the ROM 506. The start data (second) is “second” start data stored in the start data storage unit 591C shown in FIG. 34 and indicating that the game ball has passed (entered) through the second start winning opening.

  In the RAM 507 provided in the game control microcomputer 100, for example, a game control data holding area as shown in FIG. 34 is provided as an area for holding various data used for controlling the progress of the game in the pachinko gaming machine 1. 590 is provided. The game control data holding area 590 shown in FIG. 34 includes a first special figure hold storage unit 591A, a second special figure hold storage unit 591B, a start data storage unit 591C, a game control flag setting unit 592, and a game control. A timer setting unit 593, a game control counter setting unit 594, and a game control buffer setting unit 595 are provided.

  The first special figure storage unit 591A satisfies the first start condition in response to the occurrence of the start winning due to the game ball passing (entering) through the first start winning opening formed by the normal winning ball apparatus 6A. The holding data of the special figure game (the special figure game using the first special figure by the first special symbol display device 4A) in which the first start condition is not established is stored. As an example, the first special figure holding storage unit 591A determines the special figure display result obtained by the CPU 505 based on the establishment of the first starting condition by the winning in association with the holding number in the order of winning in the first starting winning opening. The numerical data indicating the random number value MR1 for use and the numerical data indicating the random number value MR2 for determining the big hit type are reserved data and stored until the number reaches a predetermined upper limit value (eg, “4”).

  The second special figure holding storage unit 591B satisfies the second start condition in response to the occurrence of the start winning due to the game ball passing (entering) the second starting winning opening formed by the normally variable winning ball apparatus 6B. However, the hold data of the special figure game (the special figure game using the second special figure by the second special symbol display device 4B) in which the second start condition is not established is stored. As an example, the second special figure holding storage unit 591B determines the special figure display result obtained by the CPU 505 based on the establishment of the second starting condition by the winning in association with the holding number in the order of winning in the second starting winning opening. The numerical data indicating the random number value MR1 for use and the numerical data indicating the random number value MR2 for determining the big hit type are reserved data and stored until the number reaches a predetermined upper limit value (eg, “4”).

  The start data storage unit 591C stores start data indicating which of the first start winning opening and the second starting winning opening the game ball has won, so that the order of winning of each game ball can be specified. As an example, an area corresponding to the upper limit value (for example, “8”) of the total reserved storage number is secured in the start data storage unit 591C, and “first” start data corresponding to winning in the first start winning opening is obtained. Alternatively, the “second” start data corresponding to the winning at the second start winning opening is stored in association with the holding number according to the winning order of each game ball.

  The first special figure reservation storage unit 591A, the second special figure reservation storage unit 591B, and the start data storage unit 591C may be provided separately, or a storage area combining them may be provided. . As an example, a storage area including eight areas obtained by combining the start data storage area and the random value storage area may be provided. In such a configuration, continuous addresses in the RAM 507 may be assigned to the start data storage area and the random value storage area. In this case, for example, the start data is set in the start data storage area at the head of the empty area by updating the value of the pointer that specifies the address of the data storage destination based on the total number of reserved storage. At this time, in order to specify the head of the free space, for example, a value obtained by adding 1 to the value obtained by multiplying the total number of reserved memories by the number of data in one piece of reserved data (starting data and numerical data indicating a random value) (starting data storage A value obtained by adding one area) is specified as an address offset value. The pointer value may be updated in accordance with the offset value thus specified. In this configuration, a total of two data storage areas, one start data storage area and one random value storage area, are provided corresponding to one hold data. Therefore, a value obtained by adding 1 to a value obtained by doubling the total number of reserved memories is specified as an address offset value. As an example, when the total number of reserved memories is “3”, “+7” (a value obtained by doubling the total number of reserved memories “3” and adding 1) is specified and corresponds to this offset value. The start data is set in the start data storage area. If a total of three data storage areas including one start-up data storage area and two random number value storage areas are provided corresponding to one reserved data, the total number of reserved memories is tripled. A value obtained by adding 1 (a value obtained by adding one start data storage area) may be specified as the offset value of the address.

  Further, when the initial position of the pointer for designating the data storage destination address is used as the start data storage area corresponding to the hold number “1”, a value obtained by multiplying the total hold storage number by the number of data in one hold data is The address offset value may be specified. For example, when two data storage areas, one start data storage area and one random value storage area, are provided corresponding to one hold data, the value obtained by doubling the total hold storage number is The address offset value may be specified. When a total of three data storage areas including one start-up data storage area and two random number value storage areas are provided corresponding to one hold data, a value obtained by multiplying the total hold storage number by three is obtained. The address offset value may be specified. After the start data is set in the start data storage area in this way, 1 is added to the value of the pointer specifying the address, and numerical data indicating the random number value is stored in the random value storage area of the address pointed to by the pointer after the addition. That's fine.

  The game control flag setting unit 592 is provided with a plurality of types of flags that can be updated in accordance with the progress of the game in the pachinko gaming machine 1. For example, the game control flag setting unit 592 stores data indicating the flag value and data indicating the on state or the off state for each of the plurality of types of flags. As an example, the game control flag setting unit 592 only needs to be provided with a special figure process flag, a common figure process flag, a big hit flag, a small hit flag, a probability change flag, a time reduction flag, and the like.

  The special figure process flag indicates the progress of the special figure game using the first special figure by the first special symbol display device 4A, the progress of the special figure game using the second special figure by the second special symbol display device 4B, and the like. In step S96 of FIG. 39 executed for control and the special symbol process shown in FIG. 41, which process is to be selected and executed is instructed. The ordinary symbol process flag is selected and executed in the ordinary symbol process shown in step S97 of FIG. 39 executed to control the progress of the ordinary symbol game using the ordinary symbol by the ordinary symbol display 20. Tell what to do.

  The big hit flag is set to an on state corresponding to the determination result that the special figure display result is “big hit” when the special figure game is started. On the other hand, it is cleared and turned off in response to, for example, that the jackpot symbol is stopped and displayed as a confirmed special symbol in the special symbol game. The small hit flag is set to an on state corresponding to the determination result that the special figure display result is “small hit” when the special figure game is started. On the other hand, it is cleared and turned off in response to, for example, the small hit symbol being stopped and displayed as the confirmed special symbol in the special symbol game. The probability change flag is set to the on state in response to the gaming state in the pachinko gaming machine 1 being controlled to the probability change state, and is cleared to the off state in response to the end of the probability change state. . The time reduction flag is set to the on state in response to the gaming state in the pachinko gaming machine 1 being controlled to the time reduction state, and is cleared to the off state in response to the completion of the time reduction state. .

  The game control timer setting unit 593 is provided with various timers used for controlling the progress of the game in the pachinko gaming machine 1. For example, the game control timer setting unit 593 stores data indicating timer values in each of a plurality of types of timers. As an example, the game control timer setting unit 593 may be provided with a game control process timer, a special figure variation timer, a common figure variation timer, a backup monitoring timer, and the like.

  The game control process timer is for measuring, for example, a time for controlling the progress of the big hit game state or the small hit game state on the main board 11 side. As a specific example, the game control process timer stores, as a game control process timer value, data indicating a timer value corresponding to the time measured to control the progress of the big hit game state or the small hit game state. It is used as a down counter that counts down automatically. Alternatively, the game control process timer is used as an up-counter that stores data indicating a timer value corresponding to an elapsed time from a predetermined time point, such as a big hit game state or a small hit game state start point, and periodically counts up. May be.

  The special figure variation timer is for measuring, on the main board 11 side, a time for controlling the progress of the special figure game such as a special figure fluctuation time which is the execution time of the special figure game. As a specific example, the special figure variation timer stores data indicating a timer value corresponding to the time measured in order to control the progress of the special figure game as a special figure fluctuation timer value and periodically counts down. Used as a counter. Alternatively, the special figure variation timer may be used as an up counter that stores data indicating a timer value corresponding to the elapsed time from the start time of the special figure game and periodically counts up.

  The universal map change timer is for measuring, on the main board 11 side, a time for controlling the progress of the normal game, such as the normal map change time which is the execution time of the normal game. As a specific example, the normal fluctuation timer stores data indicating a timer value corresponding to the time measured to control the progress of the normal figure game as a normal fluctuation timer value, and periodically counts down. Used as a counter. Alternatively, the normal time variation timer may be used as an up counter that stores data indicating a timer value corresponding to the elapsed time from the start time of the normal time game and periodically counts up.

  The backup monitoring timer is for measuring an elapsed time after the power-off signal transmitted from the power monitoring circuit 303 mounted on the power board 10 is turned on. As an example, when the main board 11 detects a power-off signal output based on a decrease in the power supply voltage VSL supplied from the power supply monitoring circuit 303, measurement of the elapsed time by the backup monitoring timer is started. . The measurement by the backup monitoring timer is continued until the output of the power-off signal is stopped. When the elapsed time measured by the backup monitoring timer reaches a predetermined time, a predetermined preparation process corresponding to the stop of power supply, such as a process for protecting data in the backup area in the RAM 507, is executed.

  The game control counter setting unit 594 is provided with a plurality of types of counters for counting the count values used for controlling the progress of the game in the pachinko gaming machine 1. For example, the game control counter setting unit 594 stores data indicating the count value in each of a plurality of types of counters. As an example, the game control counter setting unit 594 may be provided with a random counter, a first reserved memory counter, a second reserved memory counter, a round number counter, and the like.

  The random counter of the game control counter setting unit 594 counts a part of numerical data indicating a random value used for controlling the progress of the game separately from the random number circuit 509 so that the CPU 505 can be updated by software. belongs to. For example, the random counter of the game control counter setting unit 594 stores numerical data indicating the random number values MR1 to MR5 as random count values. As for the random number values MR2 to MR5, numerical data indicating each random number value is updated regularly or irregularly according to the execution of software by the CPU 505.

  The first reserved memory counter is for counting the first special figure reserved memory number that is the number of stored reserved data in the first special figure reserved memory unit 591A. For example, in the first reserved memory counter, data indicating the count value corresponding to the first special figure reserved memory number is stored as the first reserved memory count value, and corresponding to the increase or decrease of the first special figure reserved memory number Updated (for example, 1 addition or 1 subtraction). The second reserved memory counter is for counting the second special figure reserved memory number, which is the number of stored reserved data in the second special figure reserved memory unit 591B. For example, in the second reserved memory counter, data indicating a count value corresponding to the second special figure reserved memory number is stored as a special figure reserved memory count value, and updated in accordance with an increase or decrease in the special figure reserved memory number ( For example, 1 addition or 1 subtraction). A total reserved memory counter for counting the total number of reserved memories may be provided separately from the first and second reserved memory counters. Alternatively, the total number of reserved memories may be specified by adding the first reserved memory count value and the second reserved memory count value.

  The round number counter is for counting the number of rounds executed in the big hit gaming state. For example, in the round number counter, data indicating a count initial value “1” at the start of the big hit gaming state is set as the round number count value. When one round is completed and the next round is started, the round count value is incremented by 1 and updated. The round number counter may also count the number of executions of the variable winning operation in the small hit gaming state.

  The game control buffer setting unit 595 is provided with various buffers that temporarily store data used for controlling the progress of the game in the pachinko gaming machine 1. For example, the game control buffer setting unit 595 stores data indicating buffer values in each of a plurality of types of buffers. As an example, the game control buffer setting unit 595 may be provided with a transmission command buffer, a variable special figure designation buffer, a big hit type buffer, a switch-on buffer, and the like.

  The transmission command buffer is used to temporarily store setting data for transmitting a control command from the main board 11 to the sub-side control board. For example, the transmission command buffer is configured to include a plurality of (for example, “12”) buffer areas, and setting data indicating the storage address in the ROM 506 of the command table corresponding to the control command to be transmitted is stored in each buffer area. The In addition, a buffer area where setting data is written and read in the transmission command buffer may be specified by a transmission command pointer or the like, and a plurality of buffer areas may be used as a ring buffer.

  The variable special symbol designation buffer includes a special symbol game using the first special symbol by the first special symbol display device 4A and a special symbol game using the second special symbol by the second special symbol display device 4B. A buffer value indicating whether the special figure game is executed is stored. As an example, the value of the fluctuation special figure designation buffer (fluctuation special figure designation buffer value) is “1” in response to the execution of the special figure game using the first special figure by the first special symbol display device 4A. Set to Further, the variable special figure designation buffer value is set to “2” in response to the execution of the special figure game using the second special figure by the second special symbol display device 4B. Then, the variable special figure designation buffer value is set to “0” in response to the completion of the special figure game.

  In the big hit type buffer, the variable display form of the decorative pattern when the variable display result is “big hit” is set to one of a plurality of types of big hit types such as “non-probable change”, “probable change”, and “surprise change”. The corresponding value is stored as a jackpot type buffer value. As an example, based on the setting in the jackpot type determination table 131 as shown in FIG. 28, when the jackpot type is “non-probable change”, the jackpot type buffer value is set to “0” and the jackpot type is “probable change”. In this case, the big hit type buffer value is set to “1”, and when the big hit type is “surprise”, the big hit type buffer value is set to “2”.

  The switch-on buffer stores a plurality of bit values corresponding to each switch such as the gate switch 21, the first and second start opening switches 22 </ b> A and 22 </ b> B, and the count switch 23, and the state (ON) of the detection signal transmitted from each switch (Or “OFF”), each bit value (for example, “0” corresponding to OFF or “1” corresponding to ON) is set to be changeable. That is, each bit value of the switch-on buffer is set to “1” when the on-state of a switch associated with the switch is detected in advance, and is set to “0” when the off-state of the switch is detected.

  As shown in FIG. 2, an effect control microcomputer 120 is mounted on the effect control board 12. The effect control board 12 includes a VDP (Video Display Processor) 121 that generates image data in response to a drawing command from the effect control microcomputer 120, the image display device 5, speakers 8L and 8R, and a game effect lamp 9. An effect data memory 122 for storing various data used for controlling the effect operation by the effect device such as a light emitter is also mounted. The effect control microcomputer 120 is a one-chip microcomputer having the same configuration as the game control microcomputer 100, for example, and includes an external bus interface, a clock circuit, a unique information storage circuit, a reset / interrupt controller, a CPU, a ROM, and a RAM. , CTC, random number circuit, PIP, serial communication circuit, address decoding circuit, and the like. Further, all or part of the configuration of the effect control microcomputer 120 may be different from the configuration of the game control microcomputer 100. As an example, in the case where all the numerical data serving as random number values used on the side of the effect control board 12 are updated by software, the effect control microcomputer 120 may not include the random number circuit. Further, the serial communication circuit only needs to be provided with a receiving circuit capable of receiving at least an effect control command transmitted from the main board 11, and data and commands for the image display device 5, the audio control board 13, and the lamp control board 14 are provided. Signal transmission may be performed using an external bus interface or an address decoding circuit.

  In the effect control microcomputer 120, the CPU executes the effect control program read from the ROM, thereby executing a process for controlling the effect operation by the effect electrical component (effect device). At this time, a fixed data reading operation in which the CPU reads fixed data from the ROM, a variable data writing operation in which the CPU writes various fluctuation data in the RAM and temporarily stores the data, and various fluctuation data in which the CPU is temporarily stored in the RAM. Fluctuating data reading operation for reading out, receiving operation for receiving various signals input from the outside of the production control microcomputer 120 via the external bus interface, PIP, serial communication circuit, etc., CPU for external bus interface, serial communication circuit, etc. A transmission operation for outputting various signals to the outside of the effect control microcomputer 120 is also performed. It should be noted that the one-chip microcomputer constituting the production control microcomputer 120 only needs to incorporate a RAM in addition to at least the CPU, and the ROM, random number circuit, PIP, and the like are incorporated even if they are externally attached. May be used. A control signal, which is an effect control command transmitted from the main board 11 via the relay board 18, is supplied to a predetermined serial reception terminal provided in the effect control microcomputer 120, and the serial signal built in the effect control microcomputer 120. What is necessary is just to receive in a communication circuit. Or the control signal used as an effect control command may be transmitted / received in parallel in a direction from the main board 11 to the effect control board 12 via a plurality of signal lines (for example, eight effect control signal lines). .

  The VDP 121 has an image data processing function such as a high-speed drawing function and a moving image decoding function for displaying various images in the display area of the image display device 5, and an image according to a display control command from the effect control microcomputer 120. An image processor that executes data processing. Note that the VDP 121 may be a graphics processing unit (GPU), a graphics controller LSI (GCL), or a microprocessor for image processing, more commonly referred to as a digital signal processor (DSP). The effect data memory 122 may be configured using a non-volatile recording medium such as a semiconductor memory such as a flash memory, a magnetic memory, or an optical memory.

  On the voice control board 13, for example, an input / output driver, a voice synthesis IC, a voice data ROM, an amplifier circuit, a volume, and the like are mounted. As an example, in the voice control board 13, the sound number data indicated in the sound effect signal transmitted from the effect control board 12 is input to the voice synthesis IC via the input / output driver. The voice synthesis IC generates voice and sound effects corresponding to the sound number data and outputs them to the amplifier circuit. The amplifier circuit outputs an audio signal obtained by amplifying the output level of the speech synthesis IC to a level corresponding to the volume set by the volume to the speakers 8L and 8R. The voice data ROM stores control data corresponding to the sound number data, and the voice synthesis IC reads out the control data corresponding to the sound number data to generate voice and sound effects. The data stored in the audio data ROM may be composed of data indicating the output mode of audio and sound effects in a predetermined period in time series.

  For example, an input / output driver and a lamp driver are mounted on the lamp control board 14. As an example, in the lamp control board 14, the electrical decoration signal transmitted from the effect control board 12 is input to the lamp driver via the input / output driver. The lamp driver amplifies the electric decoration signal and supplies it to the game effect lamp 9 and the like.

  On the payout control board 15, a payout control microcomputer 150, a switch circuit 151, and the like are mounted. The switch circuit 151 receives detection signals from various switches and sensors, such as the full tank switch 26, the ball-out switch 27, the payout motor position sensor 71, the payout count switch 72, and the error release switch 73. The switch circuit 151 takes these detection signals and transmits them to the payout control microcomputer 150. The payout control microcomputer 150 is, for example, a one-chip microcomputer similar to the game control microcomputer 100, and includes an external bus interface, a clock circuit, a specific information storage circuit, a reset / interrupt controller, a CPU, a ROM, a RAM, a CTC, A random number circuit, PIP, serial communication circuit, address decoding circuit, and the like may be provided. Further, all or part of the configuration of the payout control microcomputer 150 may be different from the configuration of the game control microcomputer 100. As an example, when numerical data that is a random number value is not used on the payout control board 15 side, the payout control microcomputer 150 may not include a random number circuit. Further, in the serial communication circuit, it is only necessary to provide at least one transmission / reception circuit capable of bidirectional serial communication with the main board 11, and data for the payout motor 51, the error display LED 74, and the launch control board 17. The command signal may be transmitted using an external bus interface or an address decoding circuit.

  In the payout control microcomputer 150, the CPU executes a payout control program read from the ROM, thereby executing processing for controlling the payout operation by the payout device including the payout motor 51 and the like. At this time, a fixed data reading operation in which the CPU reads fixed data from the ROM, a variable data writing operation in which the CPU writes various fluctuation data in the RAM and temporarily stores the data, and various fluctuation data in which the CPU is temporarily stored in the RAM. Data reading operation for reading out, receiving operation for receiving various signals input from the outside of the payout control microcomputer 150 via the external bus interface, PIP, serial communication circuit, etc., CPU for external bus interface, serial communication circuit, etc. A transmission operation for outputting various signals to the outside of the payout control microcomputer 150 is also performed. It should be noted that the one-chip microcomputer constituting the payout control microcomputer 150 may include at least RAM in addition to the CPU, and ROM, PIP, and the like may be externally attached or incorporated. Good.

  Next, the operation (action) of the pachinko gaming machine 1 in this embodiment will be described. In the main board 11, when the power supply from the power supply board 10 is started and the reset signal to the game control microcomputer 100 becomes high level (off state), the game control microcomputer 100 is activated, Based on the security check program 506A read from the ROM 506 by the CPU 505, a security check process as shown in the flowchart of FIG. 35 is executed. At this time, the game control microcomputer 100 is in the security mode, and the game control user program stored in the ROM 506 is not yet executed.

  When the security check process shown in FIG. 35 is started, the CPU 505 first executes a process for determining a time (security time) in which the game control microcomputer 100 is in the security mode by executing the security check process. . At this time, the CPU 505 reads the bit value in the bit number [2-0] of the security time setting KSES stored in the program management area of the ROM 506 (step S1). Then, it is determined whether or not the read value is “000” (step S2).

If it is determined in step S2 that the read value is “000” (step S2; Yes), the steady set time is set to a predetermined fixed time (step S3). Here, the constant setting time of the security time, regardless of the number of times the execution of the security check process based on the system reset occurrence in the pachinko game machine 1 (the number of times the player control microcomputer 100 becomes security mode) The time component is constant. The fixed time is an invariant time component that is predetermined based on the specifications of the game control microcomputer 100 in the security time, and may be any minimum value that can be set as the security time, for example.

  If it is determined in step S2 that the read value is other than “000” (step S2; No), it is selected according to the set value shown in FIG. 11D in addition to the fixed time corresponding to the read value. The extended time is set to the steady set time (step S4). In this way, when the bit value in the bit number [2-0] of the security time setting KSES is a value other than “000”, the security time as the execution time of the security check process can be selected in advance in addition to the fixed time. It can be set to any one of a plurality of extension times.

  After executing one of the processes of steps S3 and S4, the bit value in the bit number [4-3] of the security time setting KSES is read (step S5). Then, it is determined whether or not the read value is “00” (step S6).

  If it is determined in step S6 that the read value is “00” (step S6; Yes), the steady setting time is set as the security time (step S7). On the other hand, when it is determined that the read value is other than “00” (step S6; No), the variable setting time determined in accordance with the read value is added to the steady setting time to obtain the security time. (Step S8). Here, the variable setting time is a time component that changes every time the security check process is executed, and the bit value in the bit number [4-3] of the security time setting KSES is “01” (short). Mode) or “10” (long mode), and changes in different predetermined time ranges. For example, when a count value in a predetermined free-run counter is stored in a variable security time register built in the game control microcomputer 100 when a system reset occurs, in the process of step S8, for the variable security time By using the stored value of the register as it is, or by using the value obtained by substituting the stored value for a predetermined arithmetic function (for example, a hash function), the variable setting time is within a predetermined time range for each system reset. It may be determined so as to change randomly. Thus, when the bit value in the bit number [4-3] of the security time setting KSES is a value other than “00”, the security time that is the execution time of the security check process is set as the security based on the occurrence of the system reset or the like. Each time the check process is executed, it can be changed within a predetermined time range.

  Here, the bit value in the bit number [2-0] of the security time setting KSES is a value other than “000”, and the bit value in the bit number [4-3] of the security time setting KSES is other than “00”. In this case, both the extension time set in step S4 and the variable setting time set in step S8 are added to the fixed time, and the security time is determined. .

  After executing one of the processes in steps S7 and S8, the security code stored in the predetermined area of the ROM 506 is read (step S9). Here, in a predetermined area of the ROM 506, a security code of a calculation result obtained by calculating the data of the stored content by a predetermined calculation formula is stored in advance. As a security code generation method, for example, a hash value is generated using a hash function, an error detection code (CRC code) is used, or an error correction code (ECC code) is used. A generation method may be used. In a predetermined area different from the security code storage area of the ROM 506, an arithmetic expression for specifying the security code by calculation is encrypted and stored in advance.

  Following the processing in step S9, the encrypted arithmetic expression is decrypted and restored (step S10). Thereafter, the storage code in the predetermined area of the ROM 506 is calculated by the arithmetic expression decrypted in step S10 to specify the security code (step S11). At this time, the storage data used for the calculation for specifying the security code is, for example, program data corresponding to all or part of the user program different from the security check program 506A among the storage data of the ROM 506, or predetermined table data May be all or a part of the fixed data constituting the. Then, the security code read in step S9 is compared with the security code specified in step S11 (step S12). At this time, it is determined whether or not the security codes match in the comparison result (step S13).

  If the security codes do not match in step S13 (step S13; No), it is determined that an unauthorized change has been made to the ROM 506, and the operation of the CPU 505 is shifted to a halt state (HALT). On the other hand, if the security codes match in step S13 (step S13; Yes), it is determined whether or not the security time set in the processing of step S7 or step S8 has elapsed (step S14). . If the security time has not elapsed (step S14; No), the process of step S14 is repeatedly executed, and the process waits until the security time elapses. On the other hand, if it is determined in step S14 that the security time has elapsed (step S14; Yes), for example, the value of the program counter built in the CPU 505 is set to the start address (address 0000H) of the user program in the ROM 506. The execution of the game control main process is started by setting or the like. At this time, the execution of the game control is started from the beginning of the control code constituting the user program stored in the ROM 506, so that the operation state of the game control microcomputer 100 shifts from the security mode to the user mode, and the game Execution of the control main process is started.

  FIG. 36 is a flowchart showing an example of a game control main process executed by the CPU 505 of the game control microcomputer 100. Each process described below is executed by the CPU 505 provided in the game control microcomputer 100. An interrupt request based on various interrupt factors generated by the CTC 508, the random number circuit 509, the serial communication circuit 511, etc. provided in the game control microcomputer 100 is for causing the CPU 505 to execute predetermined interrupt processing. The concept including the CPU 505 and various circuits other than the CPU 505 is sometimes referred to as a game control microcomputer 100. When the game control main process shown in FIG. 36 is started, the CPU 505 first sets the interrupt prohibition (step S21), and sets the interrupt mode (step S22). For example, in step S22, the value (1 byte) of the specific register (I register) of the game control microcomputer 100 and the interrupt vector (1 byte: the least significant bit is “0”) output from the built-in device are synthesized. As a result, the interrupt mode [2] of the maskable interrupt in which the interrupt address is generated is set. When an interrupt that can be masked occurs, the CPU 505 performs a setting for automatically disabling the interrupt, and the contents of the program counter may be saved in the stack.

  Subsequently, settings relating to the stack pointer, such as setting of a stack pointer designation address, are performed (step S23). Further, the internal register is set (initialized) as shown in FIG. 8B (step S24). As an example, in the process of step S24, the operation setting in the serial communication circuit 511 may be performed by setting the first channel communication setting register SAFM, the second channel communication setting register SBFM, and the like. Subsequent to step S24, the CTC 508 and PIP 510 are set (step S25). After the process of step S25 is executed, it may be determined whether or not the power-off signal is in an off state, for example, by checking a terminal state at a predetermined input port included in the PIP 510.

  Thereafter, the RAM 507 is set to be accessible (step S26). Subsequently, based on the signal state of the switch signal (clear signal) transmitted from the clear switch 304 installed on the power supply board 10, it is determined whether the clear switch 304 is turned on (step S27). In the process of step S27, the clear signal transmitted from the clear switch 304 may be checked a plurality of times, and it may be determined that the clear switch 304 has been turned on when the clear signal is continuously turned on. For example, once it is confirmed that the state of the clear signal is off, the state of the clear signal is confirmed once again after a predetermined time (for example, 0.1 second) has elapsed. At this time, if the clear signal is off, it is determined that the clear signal is off. On the other hand, if the state of the clear signal is on at this time, the state of the clear signal may be confirmed again after a predetermined time has elapsed. Note that the number of times of reconfirming the state of the clear signal may be one time or may be a plurality of times. Further, it is possible to check twice and check again when the check results do not match.

  When the clear switch 304 is OFF in step S27 (step S27; No), it is determined whether or not a backup flag provided in the game control flag setting unit 592 is ON (step S28). The state of the backup flag is set in the game control flag setting unit 592 or the like when power supply to the game control microcomputer 100 is stopped. The backup flag setting location is backed up by the backup power source, so that the state of the backup flag is saved even when the power supply is stopped. In step S28, for example, if “55H” is set in the game control flag setting unit 592 as the value of the backup flag, it is determined that there is a backup (ON state). On the other hand, if a value other than “55H” is set, it is determined that there is no backup (OFF state).

  If the backup flag is on in step S28 (step S28; Yes), data check of the RAM 507 is performed to determine whether the check result is normal (step S29). In the process of step S29, for example, a checksum is calculated using data stored in a specific area of the RAM 507, and the calculated checksum is compared with the checksum stored in the main checksum buffer. Here, the main checksum buffer stores a checksum calculated by the same processing when the power supply was stopped last time. If the comparison results do not match, the data in the specific area of the RAM 507 is different from the data at the time of stopping the power supply, and therefore it is determined that the check result is not normal.

  When the check result in step S29 is normal (step S29; Yes), for example, the control state of the main board 11 such as the internal state of the game control microcomputer 100 or the sub-side control board (for example, the effect control board 12). A setting at the time of restoration for returning the control state to the state when the power supply is stopped is performed, and the gaming state before the power interruption is restored (step S30). As a specific example, in the process of step S30, the start address of the backup setting table stored in the ROM 506 is set as a pointer, and the contents of the backup setting table are sequentially set in the work area in the RAM 507. Here, the work area of the RAM 507 is backed up by a backup power source, and initialization data for an area that may be initialized among the work areas may be set in the backup time setting table.

  When the clear switch 304 is on in step S27 (step S27; Yes), the backup flag is off in step S28 (step S28; No), or the check result is not normal in step S29. Sometimes (step S29; No), initialization processing corresponding to power-on or system reset that is not during a power failure recovery is executed. In this initialization process, the RAM 507 is cleared (initialized) (step S31), and a work area to be a work area is set (step S32). In the process of step S31, predetermined data (for example, stored data in a random counter provided in the game control counter setting unit 594) may be set to an arbitrary value or a predetermined initial value. Further, the entire area of the RAM 507 may be initialized, or a part of the area may be initialized while the predetermined data is left as it is. When the process of step S31 is executed, the operation state of the random number circuit 509 may be initialized. The initial value may be set in the game control flag setting unit 592, the game control timer setting unit 593, the game control counter setting unit 594, the game control buffer setting unit 595, and the like by the process of step S <b> 32. At this time, a control command (initialization designation command) for initializing each sub-side control board such as the effect control board 12 may be transmitted. For example, the presentation control board 12 displays an image for notifying that the control in the pachinko gaming machine 1 is initialized in the display area of the image display device 5 in response to receiving the initialization designation command. It suffices if initialization notification is executed.

  After the game state before the power interruption is restored in step S30, or after the processing of step S32 is executed, various circuits built in the game control microcomputer 100 are stored based on the stored data in the program management area of the ROM 506. Operation setting is performed (step S33). As an example, in the process of step S33, the first random number initial setting KRS1 and the second random number initial setting KRS2 stored in the program management area are read, and the random number circuit setting process as shown in the flowchart of FIG. 37 is executed. The Note that the process of step S33 may be executed when the process of step S24 or the process of step S25 is executed.

  In the random number circuit setting process shown in FIG. 37, the CPU 505 first makes settings for using the random number circuit 509 based on the bit value in the bit number [3] of the first random number initial setting KRS1 (step S51). In this embodiment, the bit value in the bit number [3] of the first random number initial setting KRS1 is set to “1” in advance, and setting to use the random number circuit 509 is performed corresponding to this bit value. Subsequently, the random number update clock RGK in the random number circuit 509 is set based on the bit value in the bit number [2] of the first random number initial setting KRS1 (step S52). For example, in response to the bit value [2] of the first random number initial setting KRS1 being set to “1” in advance, the random number clock RCLK generated by the random number clock generation circuit 112 is divided by two. As a result, the random number update clock RGK is set.

  After the setting in step S52, the random number update rule is set in the random number circuit 509 based on the bit value in the bit number [1-0] of the first random number initial setting KRS1 (step S53). For example, when the bit value in the bit number [1-0] of the first random number initial setting KRS1 is set to “00” in advance, the random number update designating the update order of the numerical data that becomes the random value in the random number sequence RSN The rule is set so as not to change after the second round. If the bit value in the bit number [1-0] of the first random number initial setting KRS1 is set to “01” in advance, the random number update rule in the random number sequence RSN is set to be changed by software after the second round. Is made. Further, when the bit value [1-0] of the first random number initial setting KRS1 is set to “10” in advance, the random number update rule in the random number sequence RSN is automatically changed after the second round. Is made.

  Subsequently, based on the bit value in the bit number [1] of the second random number initial setting KRS2, the start value at start-up in the numerical data that becomes the random value is determined (step S54). For example, when the bit value [1] of the second random number initial setting KRS2 is set to “0” in advance, the random value start value is set to the default value “0000H”. Further, when the bit value [1] of the second random number initial setting KRS2 is set to “1” in advance, the random number start value is set to a value based on the ID number.

  Further, based on the bit value in the bit number [0] of the second random number initial setting KRS2, it is set whether or not to change the start value of the numerical data serving as the random value every time the system is reset (step S55). For example, when the bit value [0] of the second random number initial setting KRS2 is set to “0” in advance, the pachinko gaming machine 1 is activated when the power is initially turned on (activation after backup is disabled). Regardless of whether the system is reset due to system reset, the start value set in step S54 may be used as it is as the start value in the random number circuit 509. In addition, when the bit value in the bit number [0] of the second random number initial setting KRS2 is set to “1” in advance, a setting for changing the start value of the random number at every system reset is made. For example, when a count value in a predetermined free-run counter such as the free-run counter 554A is stored in a random number start value register built in the game control microcomputer 100 at a predetermined timing such as when a system reset occurs. In the process of step S55, a random number is used by using the stored value of the random number start value register as it is, or by using a value obtained by substituting the stored value into a predetermined arithmetic function (for example, a hash function). Is determined so as to change randomly within a predetermined numerical range (for example, a range including all or part of the numerical data included in the count value permutation RCN generated by the random number generation circuit 553) at each system reset. Just do it.

  After executing the processing of step S55, the bit number [1] or bit number [0] of the random number latch flag register RDFM is read by reading the numerical data stored in the random value register R1D or the random value register R2D, for example. The bit values of the random number latch flag data RDFM1 and the random number latch flag data RDFM0 stored in are set to “0”, and each random number latch flag is cleared to an off state (step S56). As an example, for the random number latch flag data RDFM1 and the random number latch flag data RDFM0, it is determined whether each value is “1” or “0”, and if the value is “1”, the corresponding random value The random number latch flag may be turned off by reading the register. Alternatively, each random number latch flag may be turned off by reading the random number value register R1D and the random number value register R2D regardless of the values of the random number latch flag data RDFM1 and the random number latch flag data RDFM0. Note that the numerical data read from the random value register R1D or the random value register R2D in the process of step S56 is used for determining whether or not to control the big hit gaming state with the special figure display result as “big hit”. It can be discarded (erased) as it is. When the setting by the processing in step S56 is completed, the random number circuit 509 may start the random value generation operation.

  Note that part or all of the setting by the random number circuit setting process may be autonomously performed by the random number circuit 509 based on the stored data in the program management area without the processing of the CPU 505 being involved. In this case, when the game control microcomputer 100 is in the security mode, the random number circuit 509 may not perform the initial setting and may not perform the random value generation operation. Then, when the CPU 505 reads out the user program stored in the ROM 506 in the game control microcomputer 100 and the execution of the game control main process is started, the CPU 505 instructs the random number circuit 509 to perform initial setting, for example. In response to the signal being transmitted, the random number circuit 509 may perform the initial setting and then start the random value generation operation. Alternatively, particularly when the random number circuit 509 is externally attached to the game control microcomputer 100, the random number circuit 509 is independent of the processing in the CPU 505 even when the game control microcomputer 100 is in the security mode. Thus, the random number generation operation may be started after the initial setting based on the stored data in the program management area. The process of step S33 shown in FIG. 36 includes a process of reading the interrupt initial setting KIIS stored in the program management area and setting the priority control of maskable interrupt factors in the reset / interrupt controller 504. May be. When setting the priority order of the maskable interrupt factor, the highest priority interrupt is set according to the bit value in the bit number [3-0] of the interrupt initial setting KIIS. For example, by setting the bit value [3-0] of the interrupt initial setting KIIS to “04H” or “05H” in advance, the interrupt processing due to the interrupt factor generated in the serial communication circuit 511 has the highest priority. Can be executed. Thus, by performing priority control of maskable interrupt factors according to the bit value in bit number [3-0] of interrupt initial setting KIIS, the priority order of interrupt processing can be arbitrarily set, and the degree of freedom of design is increased. be able to.

  After the setting in step S33, random number circuit abnormality inspection processing for inspecting the presence or absence of operation abnormality in the random number circuit 509 is executed (step S34). FIG. 38 is a flowchart showing an example of the random number circuit abnormality inspection process executed in step S34.

  In the random number circuit abnormality inspection process shown in FIG. 38, the CPU 505 first clears the random number clock abnormality determination counter provided in, for example, the game control counter setting unit 594, and the random number clock abnormality determination count that is the count value. The value is initialized to “0” (step S61). Subsequently, the internal information data CIF4 stored in the bit number [4] of the internal information register CIF is read (step S62). Then, it is determined whether or not the read value in step S62 is “1” (step S63). The frequency monitoring circuit 551 provided in the random number circuit 509 compares the input state of the random number clock RCLK at the random number external clock terminal ERC with the internal system clock SCLK. When a frequency abnormality corresponding to the set content as shown in FIG. 11B is detected in the input state of the random number clock RCLK, the bit value “1” is written as the internal information data CIF4.

  Therefore, when it is determined in step S63 that the read value is “1” (step S63; Yes), the random number clock abnormality determination count value is updated to be incremented by 1 (step S64). At this time, it is determined whether or not the count value after the update in step S64 has reached a predetermined clock abnormality determination value (step S65). Here, the clock abnormality determination value may be a numerical value determined in advance in order to determine that the clock abnormality is detected when the frequency monitoring circuit 551 continuously detects the frequency abnormality of the random number clock RCLK. If the clock abnormality determination value has not been reached in step S65, the process returns to step S62, and determination based on the bit value of the internal information data CIF4 is performed again.

  When the clock abnormality determination value is reached in step S65 (step S65; Yes), a predetermined random number clock error process is executed (step S66), and the random circuit abnormality inspection process is terminated. In the random number clock error process, for example, a setting for transmitting a predetermined effect control command to the effect control board 12 is performed, and the effect device detects that a frequency abnormality of the random number clock RCLK has been detected. In addition, the processing may not be continued until a predetermined error canceling procedure (for example, system reset, error canceling switch operation, etc.) is taken, or at the end of random number clock error processing After the random number circuit abnormality inspection process is finished, the game control or the like that is almost the same as the normal time when the random number clock error process is not executed may be executed. Here, when the game control or the like is executed after executing the random number clock error process in step S66, the error occurrence state corresponding to the execution of the random number clock error process is stored, for example, When a customer waiting demo designation command is transmitted based on the processing of step S240 shown in FIG. 43, which will be described later, a customer waiting demonstration designation command for notifying the occurrence of the error may be transmitted. Further, the operation of the CPU 505 may be shifted to the halt state (HALT) without executing the random number clock error process.

  When the read value is determined to be “0” in step S63 (step S63; No), for example, the random value abnormality determination counter provided in the game control counter setting unit 594 or the like is cleared, and the count value is used. A certain random value abnormality determination count value is initialized to “0” (step S67). In the process of step S63, the read value is “0” when the bit value of the internal information data CIF4 read in step S62 is continuously “0” a plurality of times (for example, twice). May be determined.

  Subsequent to the process of step S67, the check value used for checking whether there is an abnormality in the random number value is set to an initial value “0000H” (step S68). Then, the stored numerical data as the random value is read from the random value register 559A serving as the random value register R1D and the random value register 559B serving as the random value register R2D provided in the random number circuit 509 (step S69). For example, in the process of step S69, the bit values of the random number latch selection data RDLS1 and the random number latch selection data RDLS0 stored in the bit number [1] and the bit number [0] of the random number latch selection register RDLS are set to “0”. Specifies fetching random values by. Subsequently, the bit values of the random number acquisition specification data RDLT1 and the random value acquisition specification data RDLT0 stored in the bit number [1] and the bit number [0] of the random value acquisition specification register RDLT are set to “1”. Specifying loading into the random value register R2D or the random value register R1D. Note that setting the bit value in the bit number [1] or bit number [0] of the random number fetch specification register RDLT to “1” instructs the CPU 505 to fetch (latch) numerical data to the random number circuit 509. This corresponds to outputting a latch signal. After that, by turning on the register read signal RRS2 supplied to the random value register R2D or turning on the register read signal RRS1 supplied to the random value register R1D, the numerical data that becomes the stored random value May be read out. Note that the numerical data stored in each of the random value register R2D and the random value register R1D may be read simultaneously to check whether there is an abnormality in the random number value, or after checking whether there is an abnormality in one of the registers. The other register may be checked for abnormality.

  After reading the numerical data in step S69, the read value is set as a random number inspection reference value (step S70). Subsequently, numerical data that becomes a random value is read from the random value register 559A and the random value register 559B (step S71). Note that the read operation in step S71 may be performed in the same procedure as the read operation in step S69. In addition, a sufficient delay time may be provided between the read operation in step S69 and the read operation in step S71 so that the numerical data in the random number sequence RSN generated by the random number circuit 509 changes. After reading the numerical data in step S71, an exclusive OR operation is performed on the random number inspection reference value and the read value in step S71 (step S72). Further, a logical sum operation between the calculation result in step S72 and the check value is executed, and the calculation result is updated to be a new check value (step S73). For example, the check value may be stored in a predetermined area of the RAM 507, and each time the process of step S73 is executed, the calculation result obtained by the process may be saved as a new check value. As a result, changes in all the bits in the numerical data read from the random value register 559A and the random value register 559B are recorded, and if the bit has changed at least once during a plurality of times of reading, it corresponds in the check value. The bit value is “1”.

  Therefore, it is determined whether or not the check value is “FFFFH” (step S74). If it is (step S74; Yes), since the change of the bit value is recognized for all bits, the random number value is normal. The random number circuit abnormality inspection process is terminated by determining that the number has been updated. When it is confirmed that the random number value has been updated normally, the random number latch selection data RDLS1 and the random number latch selection stored in the bit number [1] and the bit number [0] of the random number latch selection register RDLS are selected. The bit value of the data RDLS0 is set to “1”, the random value is taken into the random value register R2D according to the signal input to the input port P1, and the random value register R1D according to the signal input to the input port P0 You may make it instruct | indicate numerical value acquisition. In this embodiment, a wiring for transmitting the first start winning signal SS1 from the first start port switch 22A is connected to the input port P0, and the second start winning signal SS2 from the second start port switch 22B is connected to the input port P1. Are connected. Thereby, when the first start winning signal SS1 is turned on, the random number value is taken into the random value register R1D, while when the second starting winning signal SS2 is turned on, the random value register R2D is entered. It is possible to take in random values.

  When it is determined in step S74 that the check value is other than “FFFFH” (step S74; No), the random number abnormality determination count value is updated to be incremented by 1 (step S75). At this time, it is determined whether or not the count value after the update in step S75 has reached a predetermined random value abnormality determination value (step S76). Here, the random value abnormality determination value is determined so that all bits of the numerical data read from the random value register 559A and the random value register 559B change at least once if the random number circuit 509 is operating normally. It may be a predetermined numerical value so as to be the number of times. If the random number abnormality determination value has not been reached in step S76, the process returns to step S71, and determination for reading numerical data as a random value from the random number circuit 509 and checking for abnormality is performed.

  If the random number abnormality determination value is reached in step S76 (step S76; Yes), a predetermined random value error time process is executed (step S77), and the random number circuit abnormality inspection process is terminated. In the random value error process, for example, a setting for transmitting a predetermined effect control command to the effect control board 12 is performed to notify that an abnormality in the random value is detected by the effect device. Until the error release procedure (for example, system reset, error release switch operation, etc.) is taken, the subsequent processing may not proceed, or the random number circuit error check processing will be performed at the end of the random number error processing. After that, game control or the like that is almost the same as the normal time when the random number error process is not executed may be executed. Here, when the game control or the like is executed after executing the random value error process in step S77, an error occurrence state corresponding to the execution of the random value error process is stored, for example, as will be described later. When a customer waiting demo designation command is transmitted based on the processing of step S240 shown in FIG. 43, a customer waiting demo designation command for notifying the occurrence state of the error may be transmitted. Further, the operation of the CPU 505 may be shifted to the stopped state (HALT) without executing the random value error process.

  As described above, in the random number circuit abnormality inspection process, for example, the numerical data stored in the random number value register R1D (559A) or the random number value register R2D (559B) of the random number circuit 509 is obtained by repeatedly executing the process of step S71. Read multiple times. Then, all the bits of the numerical data read out by executing the processing of step S72 to step S74 are monitored, and an abnormality occurs in the operation state of the random number circuit 509 in step S76 based on the presence or absence of bit data that does not change. Determine whether or not. As a result, it is possible to reliably and easily detect that an abnormality has occurred in the operating state of the random number circuit 509 and prevent fraud.

  The random number circuit abnormality inspection process in step S34 is not limited to that executed by the CPU 505, and the random number circuit abnormality inspection process may be executed by a built-in circuit in the game control microcomputer 100 other than the CPU 505. As an example, the random number circuit 509 has a function of executing a random number circuit abnormality inspection process. When a frequency abnormality of the random number clock RCLK is detected or when an abnormality of the random number value is detected, the CPU 505 May be notified. The random number circuit abnormality inspection process is not limited to the process executed only in step S34. For example, every time a timer interrupt occurs in the game control microcomputer 100, a game control timer interrupt process (see FIG. 39), part or all of the random number circuit abnormality inspection process may be executed. That is, the random number circuit abnormality inspection process in step S34 may be executed after the process in step S35 shown in FIG. 36 is executed. As an example, when the random number circuit abnormality inspection process is executed in the game control timer interrupt process, for example, the processes of steps S61 to S66 shown in FIG. 38 are executed, while the processes of steps S67 to S77 are performed. It may not be executed. The processing of step S67 to step S77 may take a long processing time, for example, to repeatedly execute the processing of step S69 and repeatedly read numerical data from the random number circuit 509. May occur. Therefore, in this case, by executing only the processing of step S61 to step S66, the processing amount in the game control timer interrupt processing can be reduced, and the occurrence of processing failure can be prevented.

  After executing the random number circuit abnormality inspection process as described above in step S34, the interrupt permission state is set (step S35), and the generation of various interrupt requests is awaited. After the process of step S35 is executed, a game control timer interrupt may be generated every 2 milliseconds based on the setting of the CTC 508 in step S25, for example. After executing the process of step S35, the game random number update process is repeatedly executed (step S36).

  Before executing the process of step S35, it is determined whether or not the game start switch 31 is turned on based on the signal state of the switch signal transmitted from the game start switch 31 installed on the main board 11. You may make it do. In this case, the switch signal transmitted from the game start switch 35 may be checked a plurality of times, and it may be determined that the game start switch 31 has been turned on when the switch signal is continuously turned on. In addition, the process of checking the on operation of the game start switch 31 is executed only when starting from an initial state without recovery (cold start), for example, when the processes of steps S31 and S32 are executed. For example, a game control timer interrupt process is performed regardless of the operation of the game start switch 31 at the time of starting to restore the gaming state before power interruption (at the time of hot start), for example, when the process of step S30 is executed. You may make it progress to the process which controls progress of a game. Here, in the RAM 507 provided in the game control microcomputer 100, when an area to be a random counter provided in the game control counter setting unit 594 is backed up by a backup power source, if it is a hot start, before power interruption Since the update of numerical data serving as a random value is started using the stored data in the random counter, it is difficult to specify the random value stored in the random counter from the operation start timing of the pachinko gaming machine 1. On the other hand, at the time of cold start, for example, the random counter is cleared (initialized) in the process of step S31, so that updating of the random number value is started from a certain initial value (for example, “0” or the like) There is a possibility that the random value stored in the random counter is specified from the operation start timing of the pachinko gaming machine 1.

  Therefore, at a cold start, the game start switch 31 is kept waiting until it is turned on, so that it is difficult to specify the random value stored in the random counter from the operation start timing of the pachinko gaming machine 1. As a result, the operation of the pachinko gaming machine 1 is started by connecting a so-called “hanging board” particularly when the random number value for jackpot determination (for example, the random number value MR1 for special figure display result determination) is updated only by software. Even if an illegal signal is input at a timing when a predetermined time has elapsed from the timing, an illegal big hit gaming state can be prevented. Further, when it is determined that the game start switch 31 is not turned on, a game random number update process may be executed to update the random number value stored in the random counter by software. Accordingly, in addition to the elapsed time from the timing when the game start switch 31 is turned on, the elapsed time from the operation start timing of the pachinko gaming machine 1 to when the game start switch 31 is turned on cannot be specified. Even at cold start, it becomes difficult to specify the random value stored in the random counter, and it is possible to reliably prevent actions such as illegally generating a big hit gaming state by aiming or inputting illegal signals it can.

  After entering the interrupt enabled state by executing the process of step S35 in this manner, for example, when a plurality of maskable interrupt factors occur simultaneously in part or all of the CTC 508, random number circuit 509, serial communication circuit 511, etc. Based on the designation by the bit value in the bit number [3-0] of the initial setting KIIS, the reset / interrupt controller 504 accepts an interrupt factor having a high priority. When the reset / interrupt controller 504 receives an interrupt factor, for example, an interrupt request signal in an on state is output to an I class interrupt (IRQ) terminal provided in the CPU 505. When an on-state interrupt request signal is input to the IRQ terminal by the CPU 505, the generated interrupt factor is identified based on, for example, the result of checking the data stored in the internal register, and the vector address corresponding to the identified interrupt factor By executing the program having the first address as the interrupt address, interrupt processing based on each interrupt factor can be started.

  If any of the four types of errors such as an overrun error, break code error, framing error, and parity error occurs during reception of communication data by the first channel transmission / reception circuit included in the serial communication circuit 511, the first A channel receive interrupt occurs. At this time, the CPU 505 may execute a predetermined serial communication error interrupt process. In this serial communication error interrupt processing, for example, the bit values corresponding to the predetermined bit number in the predetermined first channel communication setting register and the predetermined bit number in the second channel communication setting register are both set to “0”. For example, the transmission function and the reception function in the serial communication circuit 511 may be set not to be used. Here, the first channel communication setting register and the second channel communication setting register may be included in the built-in registers of the game control microcomputer 100. Further, when an error occurs during reception of communication data by the first channel transmission / reception circuit, control may be performed to prohibit the payout of game balls by the payout device including the payout motor 51. Thereby, when an abnormality such as a reception error of communication data occurs, it is possible to prevent an excessive payout of game balls that are prize balls.

  In the game control microcomputer 100, for example, based on the fact that the reset / interrupt controller 504 has received an interrupt request from the CTC 508, the CPU 505 executes the game control timer interrupt process shown in the flowchart of FIG. In the game control timer interrupt process shown in FIG. 39, the CPU 505 first executes an interrupt disabled state and then executes a predetermined power-off process (step S91). Further, by executing a predetermined switch process, the state of the detection signal (winning detection signal) input from each switch 21, 22A, 22B, 23, etc. for detecting the game ball via the switch circuit 114 is determined ( Step S92). As an example, in the switch processing, it is determined whether or not the ON state has continued for a predetermined time (for example, 4 milliseconds) in the detection signals from the respective switches 21, 22A, 22B, 23, and the like. In the switch-on buffer provided in the game control buffer setting unit 595, the bit value associated with the switch that has detected the ON state may be set to “1”.

  Subsequent to the switch process in step S92, a predetermined main-side error process is executed to perform an abnormality diagnosis of the pachinko gaming machine 1, and a warning can be generated if necessary according to the diagnosis result (step S93). . For example, in the main-side error processing, settings for notifying the occurrence of an abnormal operation may be performed in response to excessive prize balls, insufficient prize balls, or other operation errors. After that, by executing a predetermined information output process, for example, data such as jackpot information, starting information, probability variation information supplied to a hall management computer installed outside the pachinko gaming machine 1 is output (step) S94).

  Following the information output process, a game random number update process is executed (step S95). Thereafter, the CPU 505 executes special symbol process processing (step S96). In the special symbol process, the value of the special symbol process flag provided in the game control flag setting unit 592 is updated according to the progress of the game in the pachinko gaming machine 1, and the first special symbol display device 4A or the second special symbol is processed. Various processes are selected and executed in order to perform control of the display operation in the display device 4B and setting of opening / closing operation of the special winning opening in the special variable winning ball device 7 in a predetermined procedure.

  Following the special symbol process, the normal symbol process is executed (step S97). The CPU 505 controls the display operation (for example, turning on / off the segment LED) on the normal symbol display 20 by executing the normal symbol process, thereby allowing the normal symbol variable display and the normal variable winning ball apparatus 6B to move. Enables setting of the tilting movement of the blade. After executing the normal symbol process, the CPU 505 executes a prize ball process for setting the number of prize balls according to the input of the winning detection signal based on the execution result of the switch process in step S92, for example (step S98). ). Subsequent to the prize ball process, the main side communication control process is executed, so that a control command is transmitted from the main board 11 to a sub-side control board such as the effect control board 12 or the payout control board 15 or the payout control is performed. Communication control for receiving a control command transmitted from the board 15 is performed (step S99).

  As an example, in the main-side communication control process, serial communication corresponding to the setting in the command transmission table specified by the storage data of the payout transmission command buffer included in the transmission command buffer provided in the game control buffer setting unit 595 The payout control command can be transmitted by sending a transmission operation instruction to the first channel transmission / reception circuit included in the circuit 511. Further, the storage contents of the payout reception command buffer provided in the game control buffer setting unit 595 and the like are checked to determine whether or not the reception command is stored. When the reception command is stored, the reception command is read out. The reception command is stored in the payout reception command buffer based on the first channel reception interrupt generated in response to reception of communication data as a payout notification command by the first channel transmission / reception circuit in the serial communication circuit 511. What is necessary is just to be performed by the interrupt process performed. As another example, in the main-side communication control process, the second channel transmission included in the serial communication circuit 511 corresponding to the setting in the command transmission table specified by the storage data of the effect transmission command buffer included in the transmission command buffer. The production control command can be transmitted, for example, by sending a transmission operation instruction to the circuit. After executing such a main-side communication control process, the game control timer interrupt process is terminated after the interrupt is permitted.

  In the game random number update process executed in step S36 of FIG. 36 or step S95 of FIG. 39, the big hit type determination is performed by updating the stored data in a predetermined area of the random counter included in the game control counter setting unit 594, for example. The random value MR2 for use may be incremented by one. As a result, the random number value MR2 for determining the big hit type is updated so as to be incremented by one every time the random number update process for gaming is executed. In the game random number update processing, among the numerical data indicating the random numbers MR1 to MR5 that are the game random numbers, the numerical data indicating the random values MR3 to MR5 are sequentially set as the random numbers to be updated. Here, for example, for the random values MR3 to MR5, an addition value, an addition determination value, or a maximum determination value may be determined. As an example, the range of the addition value may be set to “0” to “7”, the addition determination value is “8”, and the maximum determination value is “240” corresponding to the reach determination random value MR3. . Corresponding to the random value MR4 for determining the variation pattern type, the range of the addition value may be set to “0” to “7”, the addition determination value is “8”, and the maximum determination value is “242”. Corresponding to the random value MR5 for determining the variation pattern, the range of the addition value may be set to “0” to “7”, the addition determination value is “8”, and the maximum determination value is “998”.

  The added value is a value to be added to each random number value in response to one timer interruption or the like, and the value only needs to be different every time the game random number update process is executed. For example, the addition value is obtained on the basis of numerical data that becomes a random value for determining the addition value, and an area for storing the addition value as a temporary variable may be provided in the RAM 507 or the like. The addition determination value is a value used to acquire an addition value corresponding to each random value by comparison with a random value for determining the addition value. More specifically, after the random value for determining the addition value is read as the initial value of the addition value corresponding to each random value, until it is determined that the current addition value is smaller than the addition determination value, A value obtained by subtracting the addition determination value from the current addition value is updated as a new addition value. The random number determination value is a value used to determine whether each updated random number value obtained by adding the finally obtained addition value is within a range of possible values. When each updated random number value exceeds the corresponding random number determination value, a value obtained by subtracting the random number determination value from the updated random number value is set as a new random number value. For example, the numerical data indicating the random value MR2 may be updated so as to be incremented by one each time a timer interrupt occurs in the game control microcomputer 100.

  In the game random number update process, numerical data indicating a random value for determining an addition value is read, and it is determined whether or not the read value is less than an addition determination value determined for each random value to be updated. If it is less than the addition determination value, the read value is set to the addition value. On the other hand, if it is equal to or greater than the addition determination value, a value obtained by subtracting the addition determination value from the read value is set as the addition value. Thereafter, the addition value is added to the random number value to be updated to obtain a random number value after addition. At this time, it is determined whether the random number value after addition is less than the maximum determination value determined for each random number value to be updated. If it is less than the maximum judgment value, the random number value after addition is set to the updated random number value. On the other hand, if it is equal to or greater than the maximum determination value, a value obtained by subtracting the maximum determination value from the added random number value is set as the updated random value. The updated random number value thus set is set in a predetermined area for storing the random number value to be updated by the random counter, thereby completing the update of the random number value.

  FIG. 40 is a flowchart illustrating an example of the process executed in step S91 of FIG. 39 as the power-off process. In this power-off process, the CPU 505 first determines whether or not the power-off signal is in an on state, that is, whether or not the power-off signal is output from the power monitoring circuit 303 mounted on the power board 10. (Step S111). At this time, if the power-off signal is off and the power-off signal is not output (step S112; No), the backup monitoring timer provided in the game control timer setting unit 593 is cleared and the stored value is used. A backup monitoring timer value is set to “0” as an initial value (step S112). On the other hand, when the power-off signal is on and the power-off signal is output (step S111; Yes), the backup monitoring timer value is updated by 1 (step S113). Then, it is determined whether or not the updated backup monitoring timer value in step S113 has reached a predetermined backup determination value (for example, “2” or the like) (step S114). When the backup determination value is not reached in step S114 (step S114; No), the power-off process is terminated.

  When the backup determination value is reached in step S114 (step S114; Yes), the processing after step S115 is executed as a preparation process for responding to the stop of the power supply. When such a preparation process is executed, the state shifts from a state in which the progress of the game is controlled to a state in which a power supply stop process (a power-off control process) for saving the game state is executed. By executing the preparation process only when the backup judgment value is reached in the process of step S114, even if the power supply voltage drops momentarily due to noise or the like and the power-off signal is turned on, the power supply is erroneously stopped. It is possible to prevent the processing from starting.

  In the power supply stop process, a checksum is calculated and stored, for example, in a main checksum buffer provided in the game control buffer setting unit 595 (step S115). As an example, in the process of step S115, the start address of the predetermined area in the RAM 507 is set as the checksum calculation start address, and the checksum calculation count is set corresponding to the final address of the predetermined area. The predetermined area of the RAM 507 specified by the checksum calculation start address and the address used for setting the checksum calculation count may be a content storage area that is predetermined as a storage area in which the content should be stored even when power supply is stopped. That's fine. Then, the stored data in this content storage area is sequentially read and exclusive OR is calculated. For example, after setting the checksum calculation start address to the pointer, the storage data of the address pointed to by the pointer is read in the RAM 507, and the exclusive OR with the checksum data whose initial value is “00” is calculated. The calculation result is stored as new checksum data. At this time, the pointer value is incremented by 1 and the checksum calculation count is decremented by 1. Subsequently, if the checksum calculation count is a value other than “0”, the stored data at the address pointed to by the pointer is read, and an exclusive OR operation with the checksum data is performed, or the pointer value is set to 1. The process of adding and subtracting 1 from the number of checksum calculations may be repeated until the number of checksum calculations reaches “0”. When the checksum calculation count reaches “0”, each bit value of the checksum data is inverted, and the obtained value is stored in the main checksum buffer and stored. The data stored in the main checksum buffer in this way is used as parity data to be checked when the power is turned on.

  When the checksum data is stored by executing the process of step S115, the backup flag provided in the game control flag setting unit 592 may be set to the on state. Thereafter, access to the RAM 507 is prohibited thereafter, for example, by setting an access prohibition value in a predetermined RAM access register (step S116). When the power supply voltage decreases, the stored contents of the RAM 507 may be erroneously changed due to a runaway operation of the CPU 505 or the like, or signal levels (voltage levels) on various signal lines becoming unstable. There is sex. Therefore, by setting the state in which access to the RAM 507 is prohibited by the processing in step S116, it is possible to prevent erroneous change (damage) of the storage contents in the backup storage area provided in the RAM 507. Further, the CPU 505 performs a clear setting such as setting “00” as clear data to a predetermined output port provided in the game control microcomputer 100 (step S117). Further, the CPU 505 sets the timer interrupt disabled state by setting “00” in the control register of the CTC 508, for example (step S118). Here, the control registers of the CTC 508 may be those included in the built-in registers of the game control microcomputer 100. Note that the clear setting of the output port by the process of step S117 and the setting of the timer interrupt prohibited state by the process of step S118 may be executed before the checksum is calculated by the process of step S115. When the interrupt disabled state is set when the execution of the game control timer interrupt process shown in FIG. 39 is started, the setting of the timer interrupt disabled state by the process of step S118 may not be executed.

  Following the setting in step S118, a loop process for monitoring whether the power-off signal is turned off is entered (step S119). Then, while the power-off signal is in the ON state (step S119; No), the process of step S119 is repeatedly executed and waits. On the other hand, when the power-off signal is turned off in step S119 (step S119; No), a process for clearing the random number latch flag is executed.

  That is, the random number latch flag corresponding to the random value register R1D is turned on according to whether or not the bit value of the random number latch flag data RDFM0 stored in the bit number [0] of the random number latch flag register RDFM is “1”. It is determined whether or not there is (step S120). If this random number latch flag is on (step S120; Yes), the random value register R1D is read to clear the bit value of the random number latch flag data RDFM0 to “0”, and the corresponding random number latch flag is set. An off state is set (step S121). In addition, when the random number latch flag specified by the random number latch flag data RDFM0 is OFF in step S120 (step S120; No), after executing the process of step S121, the bit number [1 of the random number latch flag register RDFM is set. ], It is determined whether or not the random number latch flag corresponding to the random number value register R2D is on (step S122). At this time, if the random number latch flag is on (step S122; Yes), the random value register R2D is read to clear the bit value of the random number latch flag data RDFM1 to “0”, and the corresponding random number latch flag is set. An off state is set (step S123). By such processing in step S121 and step S123, the random number latch flag is turned off, and the random number value register R1D and the random number value register R2D can be set to a state where storage of new numerical data is permitted. Note that the numerical data read from the random value register R1D or the random value register R2D by the processing of step S121 or step S123 determines whether or not to control the big hit gaming state with the special figure display result as “big hit”, etc. It can be discarded (erased) as it is. Further, instead of the processing of step S120 to step S123, each random number latch flag is set by reading the random number value register R1D and the random number value register R2D regardless of the values of the random number latch flag data RDFM0 and the random number latch flag data RDFM1. Processing to turn off may be performed.

  When the random number latch flag specified by the random number latch flag data RDFM1 is OFF in step S122 (step S122; No), or after performing the process of step S123, after setting for a predetermined power failure recovery (Step S124), the process returns to the head of the game control main process. As an example, in the process of step S124, the storage address of the power-off recovery vector table is stored in the stack pointer built in the CPU 505, and is returned (returned) from the game control timer interrupt process. Here, the power-off recovery vector table may be any table that specifies the start address of the control code (game control program) stored in the ROM 506. When returning from an interrupt process such as a game control timer interrupt process, the stored data at the address specified by the stack pointer is read as a return address. Thus, after executing the processing of step S124, the CPU 505 can start (restart) the execution of the game control from the top of the control code stored in the ROM 506.

  FIG. 41 is a flowchart showing an example of processing executed in step S96 shown in FIG. 39 as the special symbol process. In this special symbol process, the CPU 505 first executes a start winning determination process (step S131). FIG. 42 is a flowchart illustrating an example of the start winning determination process executed in step S131.

  When the start winning determination process shown in FIG. 42 is started, the CPU 505 first checks the detection state of the game ball in the first start port switch 22A (step S201). As an example, in the process of step S201, a stored value in a predetermined switch-on buffer provided in the game control buffer setting unit 595 is loaded, and the bit value associated with the first start port switch 22A is “0”. Specify whether it is “1” or not. At this time, if the checked bit value is “0”, the first start port switch 22A indicates that the game ball is not detected and is in an off state, while if it is “1”, the first start port switch 22A. Indicates that the game ball is on due to detection. As another example, in the process of step S201, for example, by confirming the input state of a predetermined port such as the input port P0 included in the PIP 510, it is determined whether or not the detection signal transmitted from the start port switch 22A is on. Identify. At this time, if the detection signal is in the off state, the first start port switch 22A indicates that the game ball is not detected and is in the off state, while if it is on, the first start port switch 22A detects the game ball. It is shown that it is in an ON state by detecting it. In this case, by repeatedly checking the input state of the predetermined port a plurality of times (for example, twice), it is specified that the first start port switch 22A is on when the detection signal is continuously on. May be. Subsequent to the process of step S201, the first start opening winning table 135A is selected and set in the use table (step S202). As an example, in the process of step S202, the storage address (first address) of the first start opening winning table 135A in the ROM 506 is stored in a predetermined table pointer so that the first starting opening winning table 135A can be referred to as a use table. Should be set. Hereinafter, in the process of selecting various tables and setting them in the use table, the same setting may be performed.

  Following the processing in step S202, it is determined whether or not the first start port switch 22A is in the ON state based on the check result in step S201 (step S203). At this time, if the first start port switch 22A is in an ON state (step S203; Yes), a predetermined start port passing process is executed (step S204). In addition, when it is determined in step S203 that the first start port switch 22A is in the OFF state (step S203; No), after the start port passing process is executed in step S204, the second start port switch The detection state of the game ball in 22B is checked (step S205). The process in step S205 may be any process as long as the process in step S201 is adapted to the second start port switch 22B. Subsequently, the second start opening winning table 135B is selected and set in the use table (step S206). Furthermore, based on the check result in step S205, it is determined whether or not the second start port switch 22B is in the ON state (step S207). If the second start port switch 22B is in the ON state (step S207; Yes), the start opening passage process is executed in the same manner as in step S204 (step S208), and then the start winning determination process is terminated. On the other hand, when it is determined in step S207 that the second start port switch 22B is in the OFF state, the start winning determination process is terminated without executing the start port passing process in step S207.

  The start-port passage process executed in step S204 or step S208 may be a process realized by a control code included in a user program (game control process program for game control) prepared in advance as a common process routine. That's fine. In this starting port passage processing, depending on whether the first starting port winning table 135A set in step S202 or the second starting port winning table 135B set in step S206 is used. , One of various processes corresponding to the case where the game ball passes (enters) through the first start winning opening and the various processes corresponding to the case where the game ball passes (enters) through the second start winning opening Can be executed.

  FIG. 43 is a flowchart illustrating an example of processing executed in step S204 or step S208 in FIG. In this starting port passage processing, the CPU 505 first reads the stored storage count value corresponding to the starting winning port through which the game ball has passed (entered) (step S501). That is, when the game ball passes (enters) the first start winning opening, the first held memory count value is read from the game control counter setting unit 594, while the game ball passes (enters) the second start winning opening. If it is, the second hold storage count value is read from the game control counter setting unit 594. At this time, for example, the first reserved storage counter address specified in the first start opening prize table 135A set in the process of step S202 shown in FIG. 42, or the second start opening prize table set in the process of step S206. Corresponding to the second reserved storage counter address specified by 135B, the storage address of the RAM 507, which is the reading source of the reserved storage count value, can be specified.

  Subsequently, it is determined whether or not the read value in the process of step S501 is greater than or equal to a predetermined upper limit value (eg, “4”) (step S502). At this time, if it is less than the upper limit value (step S502; No), the pending storage count value read out in the process of step S501 is updated so as to be incremented by 1 (step S503). Further, the storage position of the holding data in the special figure holding storage unit corresponding to the start winning opening through which the game ball has passed (entered) is specified (step S504). That is, when the game ball passes (enters) the first start winning opening, the storage position of the hold data in the first special figure holding storage unit 591A is specified, while the game ball passes the second start winning opening ( In the case of entering, the storage position of the hold data in the second special figure hold storage unit 591B is specified. At this time, for example, the first special figure reservation storage unit address specified in the first start opening winning table 135A set in the process of step S202 shown in FIG. 42, or the second start opening set in the process of step S206. By adding an address addition value corresponding to the reserved storage count value read out in the processing of step S501 or the like to the second special figure reservation storage unit address specified in the winning table 135B, the storage location of the reserved data is obtained. It suffices if the storage addresses of the 1 special figure reservation storage unit 591A and the second special figure reservation storage unit 592B can be specified.

  After the process of step S504 is executed, a random value register from which numerical data serving as the random value MR1 for determining the special figure display result is read is specified (step S505). That is, when the game ball passes (enters) the first start winning opening, the random number value register R1D is used as a reading source of numerical data, while the game ball passes (enters) the second start winning opening. Uses the random number value register R2D as a reading source of numerical data. At this time, for example, the random number value register R1D address specified in the first start opening prize table 135A set in the process of step S202 shown in FIG. 42, or the second start opening prize table 135B set in the process of step S206. Corresponding to the random number value register R2D address specified in (2), it is only necessary to specify the address of the random number value register from which the numerical data is read out.

  Then, by reading the random value register specified in step S505, numerical data that becomes a random value is extracted (step S506). That is, when the random number value register R1D is set as a reading source in the process of step S505, numerical data is read and extracted from the random number value register 559A as the random number value register R1D included in the random number circuit 509. On the other hand, when the random number value register R2D is set as the reading source in the process of step S505, the numerical value data is read and extracted from the random number value register 559B as the random number value register R2D included in the random number circuit 509. At this time, the random number latch flag corresponding to the random number value register R1D or the random number value register R2D from which the numerical data has been read is turned off. That is, when the random value register R1D is set as the reading source in the process of step S505, the bit value of the random number latch flag data RDFM0 is updated from “1” to “0” by reading the numerical data in the process of step S506. Then, the random number latch flag associated with the random value register R1D is turned off. On the other hand, when the random number value register R2D is set as the reading source in the process of step S505, the bit value of the random number latch flag data RDFM1 is changed from “1” to “0” by reading the numerical data in the process of step S506. The random number latch flag associated with the random value register R2D is turned off. In the process of step S505, numerical data indicating the random number MR2 for determining the big hit type is read and extracted from a random counter or the like provided in the game control counter setting unit 594. Based on the numerical data thus read out, numerical data indicating the random number value MR1 for determining the special figure display result and numerical data indicating the random value MR2 for determining the jackpot type are specified as the pending data in the process of step S504. It is stored in the storage position of the special figure hold storage unit (step S507).

  The numerical data read from the random value register R1D or the random value register R2D is directly stored in the first special figure reservation storage unit 591A or the second special figure reservation storage unit 591B as the random value MR1 for determining the special figure display result. It may be stored, or may be stored after a predetermined processing. As an example, numerical data extracted from the random number circuit 509 is temporarily stored in a 16-bit general-purpose register of the CPU 505 or the like. Subsequently, a refresh register value that is a stored value of a refresh register built in the CPU 505 is read as numerical data that becomes a random number value for processing. In this case, the refresh register value may be added to the upper byte in the general-purpose register, while the lower byte may be left as it is. Here, instead of adding the refresh register value, predetermined arithmetic processing such as subtraction, logical sum, and logical product may be executed. Alternatively, the refresh register value may be added to the lower byte in the general-purpose register. Also, the upper byte and lower byte of the numerical data extracted from the random number circuit 509 may be exchanged and stored as the upper byte or lower byte in the general-purpose register. Furthermore, after the refresh register value is added to the high-order byte or low-order byte in the general-purpose register, or without performing arithmetic processing such as addition to the high-order byte or low-order byte in the general-purpose register, the high-order byte and the low-order byte are switched. It may be. Of the upper byte and lower byte of the numerical data extracted from the random number circuit 509, the data of a specific bit may be replaced with the data of other bits. In this case, for example, in a bus connecting the random value register R1D or the random value register R2D in the random number circuit 509 and the upper byte or lower byte of the general-purpose register, data of a specific bit is replaced with data of another bit. In addition, the wiring may be crossed. Thereafter, the CPU 505 performs an AND operation on the stored value of the general-purpose register and a predetermined logical value (for example, “FFFFH”), or outputs the stored value of the general-purpose register as it is and stores it in a predetermined area of the RAM 507. Thus, numerical data indicating the 16-bit random value MR1 may be set. For example, when setting numerical data indicating a 14-bit random number value, a 14-bit value can be acquired by performing an AND operation on the stored value of the general-purpose register and “7F7FH”. . Further, a logical sum operation may be executed instead of the logical product operation. At this time, the area of the RAM 507 in which numerical data indicating the random value MR1 is stored may be included in, for example, a random counter provided in the game control counter setting unit 594. Alternatively, the stored value of the general-purpose register may be output to the first special figure reservation storage unit 591A or the second special figure reservation storage unit 591B and used as the reservation data indicating the random value MR1.

  Further, numerical data indicating a random value for determining the addition value may be set based on the stored value of the general-purpose register. As an example, when the numerical data indicating the random value for determining the addition value takes a value in the range of “0” to “7”, the logical value of the storage value of the general-purpose register and “C0C0H” is calculated, Numerical data indicating a 4-bit random value may be set by storing it in a predetermined area of the RAM 507.

  Subsequent to the processing in step S507, setting for transmitting a start winning designation command to the effect control board 12 is performed (step S508). That is, when the game ball passes (enters) the first start prize opening, the transmission setting of the first start prize designation command is performed, while when the game ball passes (enters) the second start prize opening. The transmission setting for the second start winning designation command is performed. At this time, for example, the first start winning designation command table address designated in the first start winning prize table 135A set in the process of step S202 shown in FIG. 42, or the second start opening designated in the process of step S206. The second start winning designation command table address designated in the winning table 135B may be set in the buffer area designated by the transmission command pointer in the transmission command buffer provided in the game control buffer setting unit 595. The start winning designation command set in this way is executed from the main board 11 to the effect control board 12 by executing the main side communication control process in step S99 shown in FIG. 39 after the special symbol process process is completed, for example. Is transmitted. Hereinafter, the same setting may be performed in the process of performing the setting for transmitting various control commands to the sub-side control board such as the effect control board 12.

  After executing the process of step S508, the start data is stored (step S510). That is, when the game ball passes (enters) the first start winning opening, the “first” starting data corresponding to the winning to the first starting winning opening is used as the head of the empty entry in the start data storage unit 591C. Set to. On the other hand, when the game ball passes (enters) the second start winning opening, the “second” starting data corresponding to the winning to the second starting winning opening is stored as an empty entry in the start data storage unit 591C. Set to the beginning of. Then, for example, by setting the storage address of the reserved memory count notification command table in the ROM 506 in the buffer area specified by the transmit command pointer in the transmit command buffer, etc., to transmit the reserved memory count notification command to the effect control board 12. Is set (step S511), the process at the time of passing through the start port is terminated.

  If it is determined in step S502 that the read value is greater than or equal to the upper limit value (step S502; Yes), the random number latch flag is cleared by reading the random number value register (step S512), and the process at the time of starting port passage is performed. finish. Here, in the process of step S512, the numerical data stored in the random value register R1D is read in response to the game ball passing (entering) the first start winning opening, while the game ball is in the second start winning prize. Corresponding to the case of passing (entering) the mouth, the numerical data stored in the random value register R2D is read. At this time, similarly to the processing in step S505, for example, the random number value register R1D address specified in the first start opening winning table 135A set in the processing in step S202 shown in FIG. 42, or set in the processing in step S206. In addition, it is only necessary to be able to specify the address of the random value register from which the numerical data is read out, in correspondence with the random value register R2D address specified in the second start opening prize table 135B.

  When the first start winning signal SS1 or the second start winning signal SS2 is input from the first start port switch 22A or the second start port switch 22B to the random number circuit 509 without passing through the CPU 505 or the like, the first special figure Regardless of the number of stored hold data in the hold storage unit 591A or the second special figure hold storage unit 591B, the random number value register R1D or the random value corresponds to the input of the first start winning signal SS1 or the second start winning signal SS2. Numerical data serving as a random value is stored in the register R2D. At this time, the random number latch flag corresponding to the random number value register in which numerical data is stored is turned on, and storage of new numerical data is restricted. Therefore, when the number of stored data is equal to or greater than the upper limit value, if the numerical data stored in the random value register R1D or the random value register R2D is left without being read, the first start winning opening and the second starting winning opening are set. When a new game ball passes (enters), new numerical data corresponding to this game ball pass (entry) cannot be taken in and stored in the random value register R1D or the random value register R2D. The numerical data stored corresponding to the game ball that has passed (entered) may be read out, and an accurate random value may not be acquired. Therefore, even when the number of stored data has reached the upper limit value, the process of step S512 is executed, and the random number latch flag is cleared by reading the random number value register, thereby corresponding to the passage (entrance) of a new game ball. Thus, it is possible to obtain numerical data that is an accurate random value. Note that the numerical data read from the random value register R1D or the random value register R2D by the process of step S512 is not used for the determination process of whether or not the special figure display result is “big hit”, but is discarded as it is. (Erase) is sufficient.

  After the start winning determination process including the above-described start opening passage process is executed in step S131 of FIG. 41, according to the value of the special figure process flag provided in the game control flag setting unit 592, One of the processes in steps S140 to S150 is selected and executed.

  The special symbol normal process of step S140 is executed when the value of the special symbol process flag is “0”. In the special symbol normal process, the first special symbol display device 4A and the second special symbol are based on the presence / absence of reserved data stored in the first special symbol storage unit 591A and the second special symbol storage unit 591B. It is determined whether or not to start the special game using the display device 4B. Also, in the special symbol normal processing, whether the variable display result of the special symbol, the decorative symbol, the color symbol, etc. is set to “big hit” or “small hit” based on the numerical data indicating the random value MR1 for determining the special symbol display result. No is determined (predetermined) before the variable display result is derived and displayed. Further, in the special symbol normal process, in response to the variable display result of the special symbol in the special symbol game, the confirmed special symbol (big hit symbol, the special symbol game by the first special symbol display device 4A and the second special symbol display device 4B) Either a small hit symbol or a lost symbol) is set.

  The variation pattern setting process of step S141 is executed when the value of the special figure process flag is “1”. This variation pattern setting process includes a pre-decision result on whether or not the variable display result is “big hit” or “small hit”, a reach decision result on whether or not the variable display state of the decorative symbol is in the reach state, etc. The process includes determining a variation pattern type as one of a plurality of types, and determining a variation pattern as a plurality of types in accordance with the determination result of the variation pattern type.

  The special symbol variation process of step S142 is executed when the value of the special symbol process flag is “2”. This special symbol variation process includes a process for setting the special symbol to be varied in the first special symbol display device 4A and the second special symbol display device 4B, and an elapsed time after the special symbol starts to vary. It includes processing to measure For example, every time the special symbol variation process is executed in step S142, the value (special diagram variation timer value) in the special diagram variation timer provided in the game control timer setting unit 593 is subtracted by 1 or added by 1, Regardless of whether the game is a special game using the first special graphic in the first special symbol display device 4A or a special game using the second special graphic in the second special symbol display device 4B. The elapsed time is measured by. Further, it is also determined whether or not the measured elapsed time has reached a special figure fluctuation time corresponding to the fluctuation pattern. As described above, the special symbol variation processing uses the special symbol variation in the special symbol game using the first special symbol in the first special symbol display device 4A and the second special symbol in the second special symbol display device 4B. This is a process for controlling the variation of special symbols in the special figure game by a common processing routine. When the elapsed time since the start of the special symbol variation reaches the special symbol variation time, the value of the special symbol process flag is updated to “3”.

  The special symbol stop process in step S143 is executed when the value of the special symbol process flag is “3”. In the special symbol stop process, the first special symbol display device 4A or the second special symbol display device 4B stops the change of the special symbol, and the fixed special symbol which is the variable symbol display result is stopped and displayed. A process for setting is included. Then, a determination is made as to whether one of the big hit flag and the small hit flag provided in the game control flag setting unit 592 is on. If the big hit flag is on, the special process flag The value is updated to “4”, and when the small hit flag is on, the value of the special figure process flag is updated to “8”. When both the big hit flag and the small hit flag are off, the value of the special figure process flag is updated to “0”.

  The pre-opening process for the special winning opening in step S144 is executed when the value of the special figure process flag is “4”. This pre-opening process for the big winning opening is a process for starting the execution of the round in the big winning gaming state and setting the opening for the big winning opening based on the fact that the variable display result is “big hit” Etc. are included. At this time, for example, an upper limit of a period during which the big prize opening is in an open state may be set corresponding to the setting of the maximum number of big prize opening times. As an example, when the maximum value of the number of times of winning the big winning opening is set to “15” corresponding to the 15 round big hit state, the upper limit of the period during which the big winning opening is opened is set to “29 seconds”. On the other hand, if the maximum value for the number of times a big winning opening is opened is set to “2” corresponding to the two round big hit state, the upper limit of the period during which the big winning opening is opened is set to “0.5 seconds”. Set to.

  The special winning opening opening process in step S145 is executed when the value of the special figure process flag is “5”. This process during opening of the big winning opening is based on the process of measuring the elapsed time since the big winning opening is opened, the elapsed time measured, the number of game balls detected by the count switch 23, and the like. Processing for determining whether or not it is time to return the winning opening from the open state to the closed state is included. When the big prize opening is changed from the closed state to the open state, a process for starting the supply of the solenoid driving signal to the solenoid 82 for the big prize opening door may be executed. On the other hand, when returning the prize winning port to the closed state, a process of stopping the supply of the solenoid drive signal to the solenoid 82 for the prize winning door may be executed.

  The special winning opening opening post-processing in step S146 is executed when the value of the special figure process flag is “6”. The post-opening process for the big prize opening includes a process for determining whether or not the number of executions of the round in which the big prize opening is in an open state has reached the maximum number of open big prize openings, This includes a process for making a setting for transmitting an end designation command when hit.

  The big hit end process in step S147 is executed when the value of the special figure process flag is “7”. In the jackpot ending process, an ending effect as an effect operation for informing the end of the jackpot gaming state is executed by an effect electric component (effect device) such as the image display device 5, the speakers 8L and 8R, and the game effect lamp 9. A process of waiting until a waiting time corresponding to a period of time elapses, a process of performing various settings corresponding to the end of the big hit gaming state, and the like.

  The small hit release pre-processing in step S148 is executed when the value of the special figure process flag is “8”. This pre-opening process for small hits is a setting for starting the execution of variable winning action in the small hit game state and opening the big winning opening based on the fact that the variable display result is “small hit”, etc. The processing to perform is included. At this time, for example, the maximum value of the number of times that the big prize opening is opened is “0” because the variable display result is “small hit”, and the upper limit of the period during which the big prize opening is opened is set to “0. “5 seconds” may be set.

  The small hit releasing process in step S149 is executed when the value of the special figure process flag is “9”. In the small hit opening process, the process for measuring the elapsed time since the big prize opening is in the open state, and the timing for returning the big prize opening from the open state to the closed state based on the measured elapsed time, etc. The process etc. which determine whether or not were included are included.

  The small hit end process in step S150 is executed when the value of the special figure process flag is “10”. In this small hit end processing, a period during which an effect operation for notifying the end of the small hit gaming state is executed by an electric component (effect device) for effects such as the image display device 5, the speakers 8L and 8R, and the game effect lamp 9 The process of waiting until the waiting time corresponding to the elapses is included. Here, when the small hit gaming state is finished, the state of the pachinko gaming machine 1 before the small hit gaming state is continued without changing the state of the probability change flag and the short time flag.

  FIG. 44 is a flowchart showing an example of the process executed in step S140 of FIG. 43 as the special symbol normal process. In this special symbol normal process, the CPU 505 first determines whether or not there is a special figure game hold storage by determining whether or not there is valid start data stored in the start data storage unit 591C, for example (step S221). ). Here, if valid start data such as “first” start data or “second” start data is stored in the top entry of the start data storage unit 591C, this indicates that there is a special-purpose game hold storage. ing. Note that the method for determining whether or not the special figure game is stored on hold is not limited to checking the stored contents of the start data storage unit 591C. For example, the total reserved memory count value stored in the game control counter setting unit 594 is a value other than “0”, or at least one of the first reserved memory count value and the second reserved memory count value is “ Corresponding to a value other than “0”, it may be possible to specify that there is a reserved memory of the special figure game.

  When it is determined in step S221 that valid start data is stored, it is determined that there is a special game hold storage (step S221; Yes), the start data is read from the start data storage unit 591C (step S221). S222). Here, the start data stored in association with the hold number “1” in the start data storage unit 591C may be read.

  In this embodiment, the first start condition and the second start condition are not distinguished from each other, and it is assumed that the special game corresponding to the previously established start condition is executed sequentially. On the other hand, for example, the special figure game using the second special figure may be executed with priority over the special figure game using the first special figure. In this case, for example, instead of the process of step S221, it is determined whether or not the second reserved storage count value is “0”. If the second hold storage count value is a value other than “0”, the same process as that performed when the “second” start data is read from the start data storage unit 591C may be executed. On the other hand, when the second reserved memory count value is “0”, it is determined whether or not the first reserved memory count value is “0”. The same processing as when the “first” start data is read from the start data storage unit 591C may be executed. As described above, when one of the special game using the first special figure and the special game using the second special figure is executed with priority over the other, the first reserved memory count value and the second special game are used. Since the special symbol for starting the variable display can be determined based on the reserved storage count value, the configuration of the start data storage unit 591C may not be provided.

  Alternatively, it is determined which one of the first reserved memory count value and the second reserved memory count value is larger, and the special game using a special symbol corresponding to the larger count value is preferentially executed. You may make it do. In this case, the first hold storage count value is compared with the second hold storage count value, and if the first hold storage count value is larger, the “first” start-up is started from the start-up data storage unit 591C. When the second pending storage count value is larger while the same processing as that when the data is read is performed, the “second” start data is read from the start data storage unit 591C The same processing as that described above may be executed. If the first reserved memory count value and the second reserved memory count value match, the special game using the first special figure may be executed with priority, or the second special figure will be used. The special figure game that has been given may be executed with priority. In this way, by giving priority to the special figure game using the special symbol corresponding to the person with the larger reserved memory count value, it is possible to reduce the occurrence of invalid start winnings.

  After the processing of step S222 is executed, the start data stored in the entry lower than the hold number “1” (for example, entries corresponding to the hold numbers “2” to “8”) in the start data storage unit 591C is stored. The contents are shifted up by one entry (step S223). Then, it is determined whether the content of the start data read in step S222 is “first” or “second” (step S224).

  If it is determined in step S224 that the content of the start data is “first” (step S224; first), a special figure game using the first special figure by the first special symbol display device 4A is started. In response to the establishment of the first start condition, the variable special figure designation buffer value stored in the game control buffer setting unit 595 is set to “1” (step S225). On the other hand, when it is determined in step S224 that the content of the start data is “second” (step S224; second), the special game using the second special figure by the second special symbol display device 4B. In response to the establishment of the second start condition for starting the process, the variable special figure designation buffer value is set to “2” (step S226).

  After executing one of the processes in steps S225 and S226, the hold data is read from the special figure hold storage unit corresponding to the start data read in step S222 (step S227). For example, when the start data is “first”, as the hold data stored in association with the hold number “1” in the first special figure hold storage unit 591A, a random value for determining the special figure display result The numerical data indicating MR1 and the numerical data indicating the random value MR2 for determining the jackpot type are respectively read out. On the other hand, when the start data is “second”, as the hold data stored in association with the hold number “1” in the second special figure hold storage unit 591B, the special figure display result determination The numerical data indicating the random number value MR1 and the numerical data indicating the random number value MR2 for determining the jackpot type are respectively read out.

  Subsequent to the processing of step S227, the pending storage number count value corresponding to the start data is updated to be decremented by 1, and the entry (ie, the entry number lower than the hold number “1”) in the special figure hold storage unit corresponding to the start data ( For example, the storage contents of the hold data stored in the hold numbers “2” to “4”) are shifted up by one entry (step S228). For example, when the start data is “first”, the first hold storage count value is decremented by 1, and the storage content of the hold data in the first special figure hold storage unit 591A is shifted upward by one entry. . On the other hand, when the start data is “second”, the second hold storage count value is decremented by 1, and the storage content of the hold data in the second special figure hold storage unit 591B is increased by one entry. Shift to.

  After that, select and set the special figure display result determination table according to the start data as the use table for determining whether the variable display result is “big hit” or “small hit” (Step S229). For example, if the start data is “first”, the first special figure display result determination table 130A shown in FIG. 27A is set as a use table, while if the start data is “second”, FIG. The second special figure display result determination table 130B shown in B) is set as a use table. The CPU 505 refers to the special figure display result determination table set in this way, and based on the numerical data indicating the random number value MR1 for special figure display result determination included in the pending data read in step S227, The special figure display result is determined as one of a plurality of types (step S230). Then, it is determined whether or not the special figure display result determined in step S230 is “big hit” (step S231).

  When it is determined in step S231 that it is not “big hit” (step S231; No), it is determined whether or not the special figure display result is “small hit” (step S232). When it is determined that the game is “small hit” (step S232; Yes), the small hit flag provided in the game control flag setting unit 592 is set to the on state (step S233).

  If it is determined in step S231 that the game is a “hit” (step S231; Yes), the big win flag provided in the game control flag setting unit 592 is set to the on state (step S234). At this time, the jackpot type determination table 131 shown in FIG. 28 is selected and set as a use table for determining the jackpot type as one of a plurality of types (step S235). The CPU 505 refers to the jackpot type determination table 131 set in this manner, and determines the jackpot type based on the numerical data indicating the jackpot type determination random number MR2 included in the pending data read in step S227. One of a plurality of types such as “non-probability change”, “probability change”, and “probability” is determined (step S236). Note that if the variable special figure designation buffer value is set to “2” in step S226, since no decision value is assigned to the big hit type “surprise” in the big hit type decision table 131, the big hit type is “ It is not determined to be “accurate”. Corresponding to the jackpot type determined in step S236 in this way, for example, by setting the jackpot type buffer value which is the stored value of the jackpot type buffer provided in the game control buffer setting unit 595, the decision is made in the process of step S236. The received big hit type is stored (step S237). As an example, if the big hit type is “non-probable change”, the big hit type buffer value may be “0”, “probable change” may be “1”, and “surprise” may be “2”.

  If it is determined in step S232 that it is not “small hit” (step S232; No), or after performing any of the processing in steps S233 and S237, whether to control to the big hit gaming state or the small hit gaming state? A determined special symbol is set in accordance with the result of the prior determination as to whether or not, and further according to the determination result of the jackpot type in the case of the jackpot game state (step S238). As an example, when it is determined in step S232 that the special figure display result is not “small hit”, a lost pattern is obtained corresponding to the pre-determined result indicating that the special figure display result is “lost”. The special symbol of the symbol indicating “−” is set to the confirmed special symbol. On the other hand, if it is determined in step S232 that the special figure display result is “small hit”, the small figure corresponding to the pre-determined result indicating that the special figure display result is “small hit”. The special symbol of the number indicating “5” as the symbol is set as the confirmed special symbol. If it is determined in step S231 that the special figure display result is “big hit”, the big hit symbols “1”, “3”, “7” are set according to the determination result of the big hit type in step S236. Among the special symbols of the numbers indicating "", one of the special symbols is set as the confirmed special symbol. That is, according to the determination result that the big hit type is “non-probable change”, the special symbol indicating the number “3” that becomes the non-probable big hit symbol is set as the confirmed special symbol. Further, according to the determination result that the jackpot type is “probability change”, the special symbol indicating the number “7” that becomes the probability change big hit symbol is set as the confirmed special symbol. In accordance with the determination result that the big hit type is “accuracy”, the special symbol indicating the number of the big hit symbol “1” is set as the confirmed special symbol.

  After the confirmed special symbol is set in step S238, the value of the special symbol process flag is updated to “1” which is a value corresponding to the variation pattern setting process (step S239), and then the special symbol normal process is terminated. . If it is determined in step S221 that no valid start data is stored, and it is determined that there is no special game hold storage (step S221; No), a predetermined demonstration display setting is performed. (Step S240), the special symbol normal process is terminated. In the demonstration display setting in step S240, a customer waiting demonstration designation command for designating demonstration display (demonstration screen display) by displaying a predetermined effect image on the image display device 5, for example, is sent from the main board 11 to the effect control board 12. In contrast, it is determined whether or not the transmission has been completed. At this time, if the transmission has been completed, the demonstration display setting is ended as it is. On the other hand, if not yet transmitted, the transmission setting of the customer waiting demonstration designation command is performed by setting the storage address of the customer waiting demonstration designation command table in the ROM 506 in the transmission command buffer, for example.

  FIG. 45 is a flowchart illustrating an example of a process executed in step S141 of FIG. 41 as the variation pattern setting process. In this variation pattern setting process, the CPU 505 first determines whether or not the big hit flag is on (step S251). At this time, if the big hit flag is on (step S251; Yes), the big hit fluctuation pattern type determination table 133A shown in FIG. 30A is used as a use table for determining any one of a plurality of fluctuation pattern types. Select and set (step S252). At this time, for example, by reading the big hit type buffer value stored in the game control buffer setting unit 595, it is specified whether the big hit type is “non-probability change”, “probability change”, or “surprise change”. May be.

  When the big hit flag is off in step S251 (step S251; No), it is determined whether or not the small hit flag is on (step S253). If the small hit flag is on (step S253; Yes), the small hit variation pattern type determination table 133B shown in FIG. Is selected and set (step S254).

  When the small hit flag is OFF in step S253 (step S253; No), the reach determination table 132 shown in FIG. 29 is used as a use table for determining whether or not the decorative symbol variable display state is to be the reach state. Is selected and set (step S255). At this time, for example, by reading the total reserved memory count value stored in the game control counter setting unit 594, or by adding the first reserved memory count value and the second reserved memory count value, The total number of reserved memories of the game is specified (step S256). Subsequently, for example, numerical data indicating the reach determination random number value MR3 is extracted from a random counter provided in the game control counter setting unit 594 (step S257). Thereafter, by referring to the reach determination table 132 set in step S256, the presence / absence of the reach state is determined based on the reach determination random value MR3 extracted in step S257 (step S258). Then, it is determined whether the determination result in step S258 is “reach” in which the variable display state is the reach state or “non-reach” in which the reach state is not set (step S259).

  When it is determined in step S259 that it is “non-reach” (step S259; non-reach), FIG. 30C shows a use table for determining one of a plurality of types of variation pattern types. The non-reach variation pattern type determination table 133C is selected and set (step S260). At this time, for example, by checking the state (on / off) of the probability change flag and the time reduction flag provided in the game control flag setting unit 592, the game state in the pachinko gaming machine 1 is set to the normal state, the probability change state, and the time reduction state. You may specify which one.

  If it is determined in step S259 that it is “reach” (step S259; reach), the reach variation pattern type determination shown in FIG. 31 is used as a use table for determining one of a plurality of variation pattern types. The table 133D is selected and set (step S261). At this time, it may be specified whether the gaming state in the pachinko gaming machine 1 is the normal state, the probability variation state, or the short-time state, similarly to the case where the process of step S260 is executed.

  After executing any of the processes of steps S252, S254, S260, and S261, a random value MR4 for determining the variation pattern type is extracted from, for example, a random counter provided in the game control counter setting unit 594 (step S262). ). Then, by referring to the use table set in any of steps S252, S254, S260, and S261, based on the random value MR4 for determining the variation pattern type extracted in step S262, a plurality of types of variation pattern types are selected. Either one is determined (step S263).

  Here, in the processes of steps S262 and S263, the variation pattern of the decorative symbol corresponding to the special symbol game executed using the first special symbol by the first special symbol display device 4A based on the establishment of the first start condition. Whether to determine the type, or to determine the variation pattern type of the decorative symbol corresponding to the special symbol game executed using the second special symbol by the second special symbol display device 4B based on the fact that the second start condition is satisfied Regardless, the variation pattern type is determined to be one of a plurality of types using numerical data indicating the common random value MR4 for determining the variation pattern type updated by a common random counter or the like. Further, in the processing of steps S262 and S263, regardless of the determination result of the presence / absence of the reach display state in step S258, numerical data indicating the common random number value MR4 for determining the variation pattern type is used to perform a common processing routine. The variation pattern type can be determined as one of a plurality of types. As an example, in the process of step S263, the variation pattern type may be determined with reference to the determination table stored at the address of the ROM 506 set in the determination table pointer.

  After the variation pattern type is determined in step S263 in this manner, FIG. 32A shows a use table for determining one of a plurality of variation patterns according to the determination result of the variation pattern type. Either the hit variation pattern determination table 134A or the loss variation pattern determination table 134B shown in FIG. 32B is selected and set (step S264). Subsequently, the random value MR5 for determining the variation pattern is extracted from, for example, a random counter provided in the game control counter setting unit 594 (step S265). Then, by referring to the variation pattern determination table set in step S264, the variation pattern is determined as one of a plurality of types based on the variation pattern determination random value MR5 extracted in step S265 (step S266). .

  Here, in the processes of steps S265 and S266, the decorative symbol variation pattern corresponding to the special symbol game executed by the first special symbol display device 4A using the first special symbol when the first start condition is satisfied. Whether or not the variation pattern of the decorative symbol corresponding to the special symbol game executed using the second special symbol is determined by the second special symbol display device 4B based on the fact that the second start condition is satisfied. First, the variation pattern is determined to be one of a plurality of types using numerical data indicating a common random value MR5 for determining the variation pattern updated by a common random counter or the like. Further, in the processes of steps S265 and S266, the numerical data indicating the common random number value MR5 used for determining the fluctuation pattern is used to change according to the common processing routine regardless of the determination result of the presence or absence of the reach display state in step S258. The pattern can be determined as one of a plurality of types. As an example, in the process of step S266, the variation pattern may be determined with reference to the determination table stored at the address of the ROM 506 set in the determination table pointer.

  Following the determination of the variation pattern in step S266, a special figure variation time corresponding to the variation pattern determination result is set (step S267). Thereafter, according to the variable special symbol designation buffer value, the special symbol game using the first special symbol by the first special symbol display device 4A and the special symbol game using the second special symbol by the second special symbol display device 4B. The setting for starting the variation of the special symbol is performed so as to start any of the above (step S268). As an example, if the variable special symbol designation buffer value is “1”, a setting for transmitting a drive signal for updating the display of the first special symbol by the first special symbol display device 4A is performed. On the other hand, if the variable special symbol designation buffer value is “2”, a setting for transmitting a drive signal for updating the display of the second special symbol by the second special symbol display device 4B is performed.

  After executing the process of step S268, settings are made to transmit various commands for starting the change of the special symbol (step S269). For example, when the variation special figure designation buffer value is “1”, the CPU 505 sequentially issues a first variation start command, a variation pattern designation command, and a variable display result notification command from the main board 11 to the effect control board 12. In order to transmit, setting data indicating a storage address (first address) in the ROM 506 of the first variation start command table prepared in advance is set in the transmission command buffer. On the other hand, when the variation special figure designation buffer value is “2”, the CPU 505 sequentially issues a second variation start command, a variation pattern designation command, and a variable display result notification command from the main board 11 to the effect control board 12. In order to transmit, setting data indicating the storage address in the ROM 506 of the second variation start command table prepared in advance is set in the transmission command buffer. When the setting in step S269 is performed, every time the main-side communication control process of step S99 shown in FIG. On the other hand, the first variation start command or the second variation start command, the variation pattern designation command, and the variable display result notification command are sequentially transmitted.

  Following the setting in step S269, the value of the special figure process flag is updated to “2” which is a value corresponding to the special symbol fluctuation process (step S270), and then the fluctuation pattern setting process is terminated.

  FIG. 46 is a flowchart showing an example of the process executed in step S143 of FIG. 41 as the special symbol stop process. In the special symbol stop process, the CPU 505 first determines whether or not the big hit flag is on (step S281). At this time, if the big hit flag is on (step S281; Yes), the big hit start production waiting time is set (step S282). For example, in the process of step S282, a timer initial value determined in advance corresponding to the jackpot start time production waiting time may be set in the game control process timer provided in the game control timer setting unit 593.

  Subsequent to the process of step S282, a setting for transmitting a hit start designation command from the main board 11 to the effect control board 12 is performed (step S283). For example, in the process of step S283, setting data indicating the storage address in the ROM 506 of the hit start specifying command table prepared in advance for transmitting the hit start specifying command may be stored in the transmission command buffer. Thereafter, the big hit flag is cleared and turned off (step S284). In addition, a setting for ending the probability variation state and the time reduction state is performed (step S285). For example, in step S285, processing for clearing the probability variation flag and the time reduction flag to turn it off, processing for clearing the special figure fluctuation count counter for counting the number of times the special figure game is executed in the probability variation state and time reduction status, and the like. It only has to be executed. Then, after updating the value of the special symbol process flag to “4” which is a value corresponding to the pre-opening process for the special winning opening (step S286), the special symbol stop process is terminated.

  If the big hit flag is off in step S281 (step S281; No), it is determined whether the small hit flag is on (step S287). At this time, if the small hit flag is on (step S287; Yes), a small hit start production waiting time is set (step S288). For example, in the process of step S288, a timer initial value determined in advance corresponding to the small hitting start time production waiting time may be set in the game control process timer.

  Subsequent to the process in step S288, as in the process in step S283, a setting for transmitting a hit start designation command from the main board 11 to the effect control board 12 is performed (step S289). Thereafter, the small hit flag is cleared and turned off (step S290). Then, the value of the special figure process flag is updated to “8”, which is a value corresponding to the small hit release pre-processing (step S291).

  If the small hit flag is off in step S287 (step S287; No), the value of the special figure process flag is updated to “0” which is a value corresponding to the special symbol normal process (step S292). . After executing one of the processes in steps S291 and S292, it is determined whether or not to end the probability variation state or the time reduction state (step S293). For example, in the process of step S293, the value of the special figure fluctuation number counter (special figure fluctuation number count value) is updated by, for example, subtracting 1 or adding 1, and the updated special figure fluctuation number count value is a predetermined value. It is determined whether or not the special game state end determination value is met. At this time, if it matches the special game state end determination value, the probability variation state or the time reduction state may be terminated by clearing the probability variation flag or the time reduction flag, etc., and controlled to the normal state. On the other hand, if it does not match the special game state end determination value, the state of the probability variation flag or the time reduction flag may be maintained and the process of step S293 may be ended. After executing the end determination of the probability variation state or the short time state, the special symbol stop process ends. Note that the end determination based on the special figure variation count value may be performed only in the short-time state, and the probability variation state may be continued until the next variable display result becomes “big hit”. . Alternatively, for example, by extracting numerical data indicating a random value for determining the probability change state end from a random counter provided in the game control counter setting unit 594 and referring to a probability change state end determination table stored in advance in the ROM 506 or the like. Further, it may be determined whether or not to end the probability variation state.

  Next, the operation in the effect control board 12 will be described. In the effect control board 12, when the power supply voltage is supplied from the power supply board or the like, the CPU of the effect control microcomputer 120 is activated, and the effect control main process as shown in the flowchart of FIG. 47 is executed. Also in the production control microcomputer 120, the security check process may be executed by the CPU when the power is turned on or the system is reset, and the production control microcomputer 120 may be in the security mode. In this case, after it is determined in the security check process that no unauthorized changes have been made to the ROM, after the security time has elapsed, the process shifts to a user mode in which execution of the effect control main process is started. That's fine. When the effect control main process shown in FIG. 47 is started, the CPU of the effect control microcomputer 120 first executes a predetermined initialization process (step S401) and is built in or externally attached to the effect control microcomputer 120. The RAM is cleared, various initial values are set, and the register of a CTC (counter / timer circuit) built in the microcomputer 120 for effect control is set.

  Thereafter, the effect random number update process is executed (step S402), and numerical data indicating random values counted by a random counter provided in the RAM of the effect control microcomputer 120 as various random values used for effect control. Is updated by software. Subsequently, it is determined whether or not the timer interrupt flag is on (step S403). The timer interrupt flag is set to the on state every time a predetermined time (for example, 2 milliseconds) elapses based on, for example, the CTC register setting in the effect control microcomputer 120.

  On the side of the effect control board 12, an interrupt for receiving an effect control command from the main board 11 is generated separately from the timer interrupt that occurs every time a predetermined time elapses. This interrupt may be an interrupt generated when the received data is full in the serial communication circuit included in the production control microcomputer 120, for example. Alternatively, when a signal line for transmitting an effect control INT signal is wired between the main board 11 and the effect control board 12, an interrupt is generated when the effect control INT signal is turned on. Also good. In response to the occurrence of such an interrupt, the CPU of the production control microcomputer 120 automatically sets the interrupt prohibition, but if a CPU that does not automatically enter the interrupt prohibition state is used, an interrupt prohibition instruction (DI It is desirable to issue an order. The CPU of the effect control microcomputer 120 executes, for example, a predetermined command reception interrupt process in response to an interrupt due to reception data full or an interrupt due to the effect control INT signal being turned on. In this command reception interrupt process, communication data stored in a communication data register or the like provided corresponding to the serial communication circuit of the effect control microcomputer 120 is fetched. Alternatively, in the command reception interrupt process, a predetermined input port that receives a control signal transmitted from the main board 11 via the relay board 18 among the input ports included in the PIP or the like included in the effect control microcomputer 120. A control signal that becomes an effect control command may be captured. The effect control command fetched at this time is stored in an effect control command reception buffer provided in the RAM of the effect control microcomputer 120, for example. As an example, when the production control command has a 2-byte configuration, the first byte (MODE) and the second byte (EXT) are sequentially received and stored in the production control command reception buffer. Thereafter, the CPU of the effect control microcomputer 120 sets the interrupt permission, and then ends the command reception interrupt process.

  If the timer interrupt flag is off in step S403 (step S403; No), the process returns to step S402. On the other hand, if the timer interrupt flag is on in step S403 (step S403; Yes), the timer interrupt flag is cleared and turned off (step S404), and command analysis processing is executed (step S405). . In the command analysis process executed in step S405, for example, after reading various effect control commands transmitted from the game control microcomputer 100 of the main board 11 and stored in the effect control command reception buffer, the reading is performed. Settings and control corresponding to the issued effect control command are performed.

  After executing the command analysis process in step S405, an effect control process is executed (step S406). In the effect control process, for example, an effect image display operation in the display area of the image display device 5, an audio output operation from the speakers 8L and 8R, and a lighting operation in the game effect lamp 9 and the decoration LED are performed. With respect to the control content of the effect operation using the (effect device), determination, determination, setting, and the like according to the effect control command transmitted from the main board 11 are performed.

  FIG. 48 is a flowchart illustrating an example of the process executed in step S406 of FIG. 47 as the effect control process. In the effect control process shown in FIG. 48, the CPU of the effect control microcomputer 120, for example, in accordance with the value of the effect process flag provided in the RAM or the like of the effect control microcomputer 120, includes the following steps S160 to S160. One of the processes in step S166 is selected and executed.

  The decorative symbol variation start waiting process in step S160 is a process executed when the value of the effect process flag is “0”. In the decorative symbol variation start waiting process, the image display device 5 depends on whether one of the first variation start command and the second variation start command is received as the variation start command transmitted from the main board 11. Starts variable display of decorative symbols on the “left”, “middle”, and “right” decorative symbol displays 5L, 5C, and 5R provided in the display area, and variable display of color symbols on the color symbol display unit. The process of determining whether or not to perform is included. At this time, if it is determined to start variable display, the value of the effect process flag is updated to “1”.

  The decorative symbol variation setting process in step S161 is a process executed when the value of the effect process flag is “1”. In this decorative symbol variation setting process, the start of the special symbol game using the first special symbol by the first special symbol display device 4A or the start of the special symbol game using the second special symbol by the second special symbol display device 4B. In order to perform various production operations including variable display of decorative designs and color designs, the final decorative design, temporary stop design, and notice production that will be the final stop design according to the variation pattern and variable display results, etc. The process of determining the presence or absence, etc., and selecting and setting any one of a plurality of types of effect control patterns prepared in advance as the use pattern according to the determination result is included. After such determination and setting are performed, the value of the production process flag is updated to “2”.

  The decorative symbol variation process in step S162 is a process executed when the value of the effect process flag is “2”. In the decorative symbol variation processing, for example, an effect control pattern to be used corresponding to a value of an effect control process timer (effect control process timer value) provided in the RAM of the effect control microcomputer 120 or the like A process for reading out various control data from, and performing various effects control during variable display of decorative symbols is included. Then, in response to, for example, that the effect control process timer value has reached a predetermined variable display end value (for example, “0”) or that a decorative symbol stop command transmitted from the main board 11 has been received. A final decorative symbol as a final stop symbol that is a variable display result of the symbol is displayed in a completely stopped state. If the effect control process timer value is set to the variable display end value and the fixed decorative symbol is displayed in a completely stopped state, the variable display time corresponding to the variation pattern specified by the variation pattern designation command has elapsed. Sometimes, without depending on the effect control command from the main board 11, it is possible to determine and display the variable display result by autonomously deriving and displaying the determined decorative symbol on the effect control board 12 side. When the finalized decorative symbol is displayed as a complete stop, the value of the effect process flag is updated to “3”.

  The decorative symbol variation end process in step S163 is a process executed when the value of the effect process flag is “3”. This decoration symbol variation end process includes a process of determining whether or not a hit start designation command transmitted from the main board 11 has been received. At this time, if it is determined that the hit start designation command has been received, the value of the rendering process flag is updated to “4” when the variable display result specified from the hit start designation command is “big hit”. Is done. On the other hand, when the variable display result specified from the hit start designation command is “small hit”, the value of the effect process flag is updated to “5”. Further, when a predetermined time has elapsed without receiving the hit start designation command, the value of the effect process flag is updated to “0” in response to the variable display result being “lost”.

  The big hit control effect process in step S164 is a process executed when the value of the effect process flag is “4”. In the effect processing during the big hit control, for example, an effect control pattern corresponding to the fact that the variable display result is “big hit” or the like is set, and an effect image based on the set content is displayed in the display area of the image display device 5. Or by outputting sound number data to the sound control board 13 and outputting sound and sound effects from the speakers 8L and 8R, and turning on the game effect lamp 9 and the decoration LED by outputting an electric decoration signal to the lamp control board 14 This includes processing for controlling various performance operations in the big hit gaming state such as turning off / off / flashing. Then, for example, the value of the effect process flag is updated to “6” in response to receiving a hit end designation command transmitted from the main board 11.

  The effect process during small hit control in step S165 is a process executed when the value of the effect process flag is “5”. In the effect process during the small hit control, for example, an effect control pattern is set in response to the variable display result being “small hit”, and an effect image based on the set content is displayed on the image display device 5. Displaying in the area, outputting sound and sound effects from the speakers 8L and 8R by outputting the sound number data to the sound control board 13, and outputting the electric decoration signal to the lamp control board 14 for the game effect lamp 9 and decoration Processing for controlling various performance operations in the small hit gaming state such as turning on / off / flashing the LED is included. Then, for example, the value of the effect process flag is updated to “6” in response to receiving a hit end designation command transmitted from the main board 11.

  The ending effect process in step S166 is a process executed when the value of the effect process flag is “6”. In this ending effect process, an effect control pattern or the like corresponding to the end of the big hit game state or the small hit game state is set, and an effect image based on the set content is displayed in the display area of the image display device 5. In addition, sound and sound effects are output from the speakers 8L and 8R by outputting the sound number data to the sound control board 13, and the game effect lamp 9 and the decoration LED are turned on / off by outputting an electric decoration signal to the lamp control board 14. This includes processing for controlling various performance operations corresponding to the end of the big hit gaming state or the small hit gaming state, such as blinking / flashing. Then, the value of the effect process flag is updated to “0” in response to the end of the effect operation.

  Hereinafter, a specific operation example in the pachinko gaming machine 1 will be described. In the pachinko gaming machine 1, a special figure game using the first special figure by the first special symbol display device 4A and a special figure game using the second special figure by the second special symbol display device 4B are executed, Corresponding to the variable display of special symbols in these special symbol games, the ornaments are displayed on the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, and 5R included in the display area of the image display device 5. Variable display of symbols is executed. And, for example, based on the variable display result in a special game such as a fixed special symbol or the variable display result of a decorative symbol such as a combination of fixed decorative symbols, a predetermined game value such as being controlled to a big hit gaming state is given. It becomes possible. The game value that can be imparted by the pachinko gaming machine 1 is advantageous to a player who is controlled to the big hit game state and the game winning ball is easy to enter (win) by changing the big prize opening from the closed state to the open state. What is necessary is just to be in a state or to generate a right to be in an advantageous state for the player. In addition, for example, the maximum number of rounds that can be executed in the big hit gaming state, the upper limit number of special figure games that can be executed in the short time state, the big hit probability in the probability variation state, and control to the big hit gaming state without being controlled in the normal state Arbitrary items related to the degree of advantage of the game in the pachinko gaming machine 1, such as the number of consecutive times that is the number of times played reaches a predetermined number, or some or all of these can be the gaming value in the pachinko gaming machine 1 .

  In the game control microcomputer 100, for example, the CPU 505 shows the random value MR1 for determining the special figure display result based on the numerical data read from the random value register R1D and the random value register R2D of the random number circuit 509 in step S506 of FIG. Using the numerical data, in step S230 of FIG. 44, the special figure display result is determined to be “big hit”, “small hit”, or “lost”. In the random number circuit 509, for example, the random number sequence change circuit 555 changes the count value permutation RCN output from the random number generation circuit 553 based on a random number update rule set in advance by the setting of the random number sequence change setting circuit 556. A random number sequence RSN obtained by updating numerical data by a predetermined procedure is output. Based on the fact that the first start winning signal SS1 from the first start port switch 22A input to the input port P0 is turned on, the numerical data constituting the random number sequence RSN is stored in the random number value register R1D as a random value. Captured and stored. Further, based on the fact that the second start winning signal SS2 from the second start port switch 22B input to the input port P1 is turned on, the numerical data constituting the random number sequence RSN is stored in the random number value register R2D as a random value. Captured and stored.

  FIG. 49 is a timing chart for explaining the operation of the random number circuit 509. FIG. 49A shows the control clock CCLK generated by the control clock generation circuit 111 mounted on the main board 11. FIG. 49B shows the random number clock RCLK generated by the random number clock generation circuit 112. Note that the various signals shown in FIG. 49 are negative logic signals that are turned off at a high level and turned on at a low level. As shown in FIGS. 49A and 49B, the oscillation frequency of the control clock CCLK and the oscillation frequency of the random number clock RCLK are different from each other. It does not become an integral multiple of the other oscillation frequency.

  As shown in FIG. 49B, the random number clock RCLK falls from the high level to the low level at timings T10, T11, T12,. The random number clock RCLK is supplied to the random number external clock terminal ERC of the game control microcomputer 100 and input to the clock terminal CK in the clock flip-flop 552 provided in the random number circuit 509 shown in FIG. The clock flip-flop 552 responds to the falling edge of the random number clock RCLK input to the clock terminal CK with the latch clock RC0 fed back from the negative phase output terminal (inverted output terminal) Q bar to the D input terminal. Then, it is taken in (latched) and outputted as a random number update clock RGK from the positive phase output terminal (non-inverted output terminal) Q. Thereby, as shown in FIG. 49C, the random number update clock RGK falls from the high level to the low level at the timings T10, T12, T14,..., And is ½ of the oscillation frequency of the random number clock RCLK. The signal has an oscillation frequency of. For example, if the oscillation frequency of the random number clock RCLK is 20 MHz, the oscillation frequency of the random number update clock RGK is 10 MHz. Since the oscillation frequency of the random number clock RCLK is neither an integer multiple nor a fraction of the oscillation frequency of the control clock CCLK, the oscillation frequency of the random number update clock RGK is the oscillation frequency of the control clock CCLK. Different frequency. The random number generation circuit 553 updates the numerical data in the count value permutation RCN in response to, for example, the falling edge of the random number update clock RGK. The random number sequence change circuit 555 changes the numerical data update order in the count value permutation RCN output from the random number generation circuit 553 based on the setting of the random number update rule by the random number sequence change setting circuit 556 as a random number sequence RSN. Output. Thus, the numerical data in the random number sequence RSN is updated in response to the falling edge of the random number update clock RGK, for example, as shown in FIG.

  As described above, the oscillation frequency of the random number clock RCLK generated by the random number clock generation circuit 112 and the oscillation frequency of the control clock CCLK generated by the control clock generation circuit 111 are different from each other. One oscillation frequency does not become an integral multiple of the other oscillation frequency. Therefore, the oscillation frequency of the random number update clock RGK and the latch clock RC0 generated by the clock flip-flop 552 of the random number circuit 509 is ½ of the oscillation frequency of the random number clock RCLK, but the oscillation of the control clock CCLK. The frequency and the oscillation frequency of the internal system clock SCLK that is ½ of the oscillation frequency of the control clock CCLK are different. In this way, the control clock CCLK, the internal system clock SCLK, and the random number update clock RGK are prevented from being synchronized. From the operation timing of the CPU 505, the random number circuit 509 generates the random number generation circuit 553 and the random number sequence change circuit 555. It becomes difficult to specify the update timing of the numerical data in the random number sequence RSN to be performed. As a result, it is possible to reliably prevent aiming and the like based on the result of analyzing the update operation of the numerical data serving as the random number value in the random number circuit 509 from the operation timing of the CPU 505.

  The latch clock RC0 output from the clock flip-flop 552 is an inverted signal of the random number update clock RGK, the oscillation frequency is the same as the oscillation frequency of the random number update clock RGK, and its phase is the same as the phase of the random number update clock RGK and π It differs by (= 180 °). The latch clock RC0 is branched into a latch clock RC1 and a latch clock RC2 at a branch point BR1. Therefore, for example, as shown in FIG. 49E, each of the latch clocks RC0, RC1, and RC2 is an oscillation signal whose signal state changes in a common cycle. The latch clock RC1 is input to the clock terminal CK of the latch flip-flop 557A. The latch clock RC2 is input to the clock terminal CK of the latch flip-flop 557B.

  Thus, the oscillation frequencies of the latch clocks RC1 and RC2 generated by branching the latch clock RC0 are different from the oscillation frequencies of the control clock CCLK and the internal system clock SCLK. Therefore, the control clock CCLK, the internal system clock SCLK, and the latch clocks RC1 and RC2 are prevented from being synchronized, and the random number circuit 509 takes in numerical data as a random value from the operation timing of the CPU 505. It becomes difficult to specify the timing. As a result, it is possible to reliably prevent aiming and the like based on the result of analyzing the operation of fetching numerical data as a random value in the random number circuit 509 from the operation timing of the CPU 505.

  In response to the falling edge of the latch clock RC1, the latch flip-flop 557A takes in (latches) the first start winning signal SS1 transmitted from the first start port switch 22A and supplied to the input port P0. Then, it is output from the output terminal Q as a start winning latch signal SL1. Then, if the capturing method in the random number latch selector 558A is designated as signal input to the input port P0, the start winning latch signal SL1 is output as the random number latch signal LL1. As a result, for example, in the first start winning signal SS1 whose signal state changes between the off state (high level) and the on state (low level) at the timing shown in FIG. 49F, the latch clock RC1 falls. After being taken into the latch flip-flop 557A at timings T11, T13, T15,..., A random number latch signal whose signal state changes between an off state and an on state at timings T11 and T13 as shown in FIG. LL1 is output from the random number latch selector 558A. Here, the first start winning signal SS1 transmitted from the first start opening switch 22A is turned off when the start winning of the game ball at the first start winning opening formed by the normal winning ball apparatus 6A is detected. Change to ON state. The random number latch signal LL1 output from the latch flip-flop 557A via the random number latch selector 558A is supplied to the random number value register 559A serving as the random number value register R1D, and in the random number sequence RSN output from the random number sequence change circuit 555. Used to obtain numerical data. Thus, the latch flip-flop 557A and the random number latch selector 558A acquire numerical data as a random number value using the latch clock RC1 based on the detection of the start winning of the game ball at the first start winning opening. The random number latch signal LL1 is generated separately from the case where the start winning of the game ball at the second start winning opening is detected.

  The latch flip-flop 557B captures (latches) the second start winning signal SS2 transmitted from the second start port switch 22B and supplied to the input port P1 in response to the falling edge of the latch clock RC2. Then, it is output from the output terminal Q as a start winning latch signal SL2. Then, if the capturing method in the random number latch selector 558B is designated as signal input to the input port P1, the start winning latch signal SL2 is output as the random number latch signal LL2. Thereby, for example, in the second start winning signal SS2 in which the signal state changes between the off state (high level) and the on state (low level) at the timing shown in FIG. 49I, the latch clock RC2 falls. After being taken into the latch flip-flop 557B at timings T11, T13, T15,..., A random number latch signal whose signal state changes between an off state and an on state at timings T13 and T15 as shown in FIG. LL2 is output from the random number latch selector 558B. Here, the second start winning signal SS2 transmitted from the second start opening switch 22B is turned off when the start winning of the game ball at the second start winning opening formed by the normal variable winning ball apparatus 6B is detected. Changes from ON to ON. The random number latch signal LL2 output from the latch flip-flop 557B via the random number latch selector 558B is supplied to the random number value register 559B serving as the random number value register R2D, and the random number sequence RSN output from the random number sequence change circuit 555 Used to obtain numerical data. In this way, the latch flip-flop 557B and the random number latch selector 558B acquire numerical data as a random number value using the latch clock RC2 based on the detection of the start winning of the game ball at the second start winning opening. The random number latch signal LL2 is generated separately from the case where the start winning of the game ball at the first start winning opening is detected.

  In this manner, the latch flip-flop 557A and the latch flip-flop 557B each have a common cycle by branching the latch clock RC0 generated by the common clock flip-flop 552 at the branch point BR1. Using the latch clocks RC1 and RC2 whose signal states change, a start winning latch signal SL1 and a start winning latch signal SL2 for obtaining numerical data as a random value are generated. Thereby, the circuit configuration in the random number circuit 509 can be simplified, and the manufacturing cost in the pachinko gaming machine 1 can be reduced.

  The random value register 559A serving as the random value register R1D receives the numerical data in the random number sequence RSN output from the random number sequence change circuit 555 at the falling edge of the random number latch signal LL1 input from the random number latch selector 558A to the clock terminal. In response, the data is fetched (latched), and the numerical data serving as stored data is updated. The random value register 559B serving as the random value register R2D receives the numerical data in the random number sequence RSN output from the random number sequence change circuit 555 at the falling edge of the random number latch signal LL2 input from the random number latch selector 558B to the clock terminal. In response, the data is fetched (latched), and the numerical data serving as stored data is updated.

  For example, as shown in FIG. 49 (G), when a falling edge occurs in which the random number latch signal LL1 changes from the off state to the on state at timing T11, the random number sequence change circuit 555 outputs it at timing T11. As shown in FIG. 49 (H), the numerical data in the random number sequence RSN that has been read is taken into the random value register R1D and acquired as numerical data that becomes a random value. As a result, in the random value register 559A serving as the random value register R1D, the numerical data used as the random number value based on the detection of the start winning of the game ball at the first start winning opening is used as the game at the second starting winning opening. It can be acquired and stored separately from the case where the start winning of the ball is detected.

  For example, as shown in FIG. 49 (J), when a falling edge occurs in which the random number latch signal LL2 changes from the off state to the on state at timing T13, the random number sequence change circuit 555 at timing T13. As shown in FIG. 49 (K), the numerical data in the random number sequence RSN output from is taken into the random value register R2D and acquired as numerical data that becomes a random value. As a result, the random value register 559B serving as the random value register R2D, based on the detection of the start winning of the game ball at the second start winning opening, converts the numerical data used as the random number value into the game at the first starting winning opening. It can be acquired and stored separately from the case where the start winning of the ball is detected.

  Thus, the random value register 559A responds to the falling edge of the start winning latch signal SL1 generated by the latch flip-flop 557A using the latch clock RC1 and the random number latch signal LL1 output from the random number latch selector 558A. The numerical data in the random value RSN is stored. The random value register 559B is responsive to the falling edge of the start winning latch signal SL2 generated by the latch flip-flop 557B using the latch clock RC2 and the random number latch signal LL2 output from the random number latch selector 558B. The numerical data in the random number sequence RSN is stored.

  As described above, in the random number circuit 509, the clock flip-flop 552, the random number generation circuit 553, the random number sequence change circuit 555, and the like acquire numerical data that becomes a random number value based on the start winning of the game ball at the first start winning opening. Based on the combination of the latch flip-flop 557A, the random number latch selector 558A, and the random value register 559A configured as described above, and numerical data that becomes a random value based on the starting winning of the game ball at the second starting winning opening is obtained. The latch flip-flop 557B, the random number latch selector 558B, and the combination of the random number value register 559B are shared. Therefore, the random number update clock RGK output from the clock flip-flop 552 and supplied to the random number generation circuit 553 and used for updating the numerical data in the count value permutation RCN and the numerical data in the random number sequence RSN is the first starting prize opening. A common random number update configuration for acquiring numerical data that is a random value based on a starting winning of a game ball and a configuration that acquires numerical data that is a random value based on a starting winning of a gaming ball at the second starting winning opening This is a clock signal. Thereby, the circuit configuration in the random number circuit 509 can be simplified, and the manufacturing cost of the pachinko gaming machine 1 can be reduced.

  In the random number latch flag register RDFM shown in FIG. 21 (A), numerical data fetching and reading operations in the random value register 559A serving as the random value register R1D, and numerical data in the random value register 559B serving as the random value register R2D. The corresponding bit value changes to “0” and “1” in response to the fetch operation and read operation. FIG. 50 is a timing chart for explaining changes in random number latch flag data RDFM0 and random number latch flag data RDFM1 stored in bit numbers [0] and [1] of random number latch flag register RDFM.

  As shown in FIG. 50A, at the timing T20 when the random number latch signal LL1 or the random number latch signal LL2 falls, numerical data is taken into the random value register R1D or the random value register R2D as shown in FIG. In response to this, the bit values of the random number latch flag data RDFM0 and the random number latch flag data RDFM1 change from “0” to “1” as shown in FIG. For example, when numerical data is stored in the random value register R1D in response to the random number latch signal LL1 being turned on (low level) at the timing T20, the bit value of the random number latch flag data RDFM0 is “0”. By changing from “1” to “1”, the random number latch flag corresponding to the random number value register R1D is turned on. Further, when numerical data is stored in the random value register R2D in response to the random number latch signal LL2 being turned on (low level) at the timing T20, the bit value of the random number latch flag data RDFM1 is “0”. By changing from “1” to “1”, the random number latch flag corresponding to the random number value register R2D is turned on.

  When the random number latch flag is turned on in this manner, storage of new numerical data in the corresponding random number value register R1D or random number value register R2D is restricted. For example, when the bit value of the random number latch flag data RDFM0 changes from “0” to “1”, the random number latch flag corresponding to the random number value register R1D is turned on, and new numerical data is stored in the random number value register R1D. Is limited. When the bit value of the random number latch flag data RDFM1 changes from “0” to “1”, the random number latch flag corresponding to the random number value register R2D is turned on, and new numerical data is stored in the random number value register R2D. Is limited. Therefore, the random number value register R1D and / or the random number value register R2D in which the corresponding random number latch flag is in the ON state captures numerical data corresponding to the input of the first start winning signal SS1 and / or the second starting winning signal SS2. Even when the random number latch signal LL1 and / or the random number latch signal LL2 is input, new numerical data included in the random number sequence RSN cannot be stored.

  Thus, after numerical data is temporarily stored in the random value register R1D or the random value register R2D, before the numerical data is read from the CPU 505 or the like, for example, the first start winning signal SS1 or the second start winning signal SS2 Even when the signal is erroneously turned on due to noise or the like, the numerical data already stored is updated, and it is possible to prevent inaccurate random number reading. Further, the bit values of the random value acquisition specification data RDLT0 and the random value acquisition specification data RDLT1 are intentionally set to “1” from the outside, or the first start winning signal SS1 and the second starting winning signal SS2 are set. It is also possible to prevent an illegal act such as modifying already stored numerical data by intentionally turning it on from the outside. On the other hand, when the numerical data once stored in the random value register R1D or the random value register R2D is not read from the CPU 505 or the like for a long time, the first start prize signal SS1 and the second start prize signal SS2 are thereafter normal. When the ON state is turned on, accurate numerical data corresponding to the passage (entrance) of the game ball at the first start winning opening and the second starting winning opening can be stored in the random value register R1D and the random value register R2D. become unable.

  Therefore, for example, the CPU 505 of the game control microcomputer 100 executes a predetermined random value register reading process as shown in FIG. 50D when a predetermined random number reading condition is satisfied. Then, the random number value register R1D and the random number value register R2D are read to turn off the random number latch flag, thereby setting a state in which storage of new numerical data is permitted. The random value read condition is that when the CPU 505 starts executing the game control in the pachinko gaming machine 1 and / or when the game ball passes (enters) the first start winning opening or the second starting winning opening. What is necessary is just to include that the number of reserved memories of the figure game has reached a predetermined upper limit. In the operation example shown in FIG. 50, in response to the completion of the random value register reading process shown in FIG. 50B at timing T25, the random number latch flag data RDFM0 and the random number latch are shown in FIG. The bit value of the flag data RDFM1 is updated from “1” to “0”, and the corresponding random number latch flag is set to the off state.

  As an example, the CPU 505 executes a predetermined security check process or the like when the system reset of the gaming control microcomputer 100 is canceled based on the start of power supply in the pachinko gaming machine 1, and then executes a user program from the ROM 506. The control code indicating (game control game control program for game control) is read and the execution of the game control is started. At this time, the CPU 505 reads the numerical data stored in the random value register R1D or the random value register R2D by executing the process of step S56 shown in FIG. 37 as the random value register read process, and sets the corresponding random number latch flag. Turn off. In the process of step S56 shown in FIG. 37, the CPU 505 determines whether the random number latch flag is on based on the result of checking the bit values of the random number latch flag data RDFM1 and the random number latch flag data RDFM0. May be read out only. Alternatively, each random number latch flag may be turned off by reading numerical data from both the random value register R1D and the random value register R2D regardless of whether the random number latch flag is on.

  When the pachinko gaming machine 1 is turned on, various power supply voltages gradually rise to specified values, such as the power supply voltage VSL and the power supply voltage VCC shown in FIGS. During such an increase in the power supply voltage, some of the various circuits such as the built-in circuit of the game control microcomputer 100 may operate normally, while the other components may not operate normally. As an example, when the power supply voltage is unstable, the first start prize signal SS1 and the second start prize signal SS2 are erroneously turned on, and the random number circuit 509 causes the random value register R1D and the random value register R2D to There is a possibility that numerical data is captured and stored, and the corresponding random number latch flag is turned on, which limits the storage of new numerical data. Further, after the execution of the game control by the CPU 505 or the like is started and before the switch process of step S92 shown in FIG. 39 is executed, the random number latch signal LL1 and the random number latch signal LL2 are stored in the random value register R1D By inputting to the random value register R2D, it is possible to perform an illegal act of obtaining numerical data indicating the random value MR1 for determining the special figure display result with the special figure display result being “big hit” and controlling it to the big hit gaming state. There is sex. As described above, when the storage of new numerical data is restricted when the random number latch flag is turned on, the game ball passes (enters) the start winning opening such as the first starting winning opening and the second starting winning opening. It is possible to prevent erroneous numerical data due to noise or the like from being taken in and stored in the random value register R1D or the random value register R2D after the start prize is generated, while the power supply voltage is unstable before the start prize is generated. When numerical data is fetched and stored in the random value register R1D or the random value register R2D due to malfunction or fraud, even if a start prize is subsequently generated, it is already stored before the start prize generation timing. There is a possibility that the numerical data is acquired as a random number value and used for determining the special figure display result.

  Therefore, when the system reset in the gaming control microcomputer 100 is released and the gaming control is started, the random number latch flag is set to the off state to allow the storage of new numerical data. As a result, for example, the numerical data stored in the random value register R1D or the random value register R2D in error when the power supply voltage is unstable, such as when the power is turned on in the pachinko gaming machine 1, is acquired as a random value, and the game control It can be prevented from being used for various decisions. In addition, after the execution of the game control is started, an illegal act of inputting a random number latch signal and controlling it to the big hit game state before the state of the first start port switch 22A or the second start port switch 22B is checked. Can be prevented.

  As another example, an on-state power-off signal is output from the power supply monitoring circuit 303 mounted on the power supply board 10 based on a decrease in the predetermined power supply voltage in the pachinko gaming machine 1, such as the power supply voltage VSL. The CPU 505 outputs an on-state power-off signal in step S111 of FIG. 40 (step S111; Yes), and further, after the backup monitoring timer value reaches the backup determination value in step S114, the CPU 505 performs steps S115 to S118. By executing the above process to prepare for an unstable operation or stoppage of the pachinko gaming machine 1 due to a decrease in power supply voltage, the process of step S119 is repeatedly executed until the game control microcomputer 100 enters an operation stop state. The input state of the power-off signal is repeatedly determined. Thereafter, when it is determined during the process of step S119 that the power-off signal is in an off state and is not input, the CPU 505 completes the power-off process after executing the process of step S124 and the game. By returning (returning) from the control timer interrupt process, the execution of the game control is started from the head of the control code indicating the user program (game control process program for game control) stored in the ROM 506. Here, after it is determined in step S119 that the power-off signal has been turned off and is not input, before the power-off processing is terminated and the execution of the game control is started from the beginning of the control code, By executing the processing of step S120 to step S123 as the random value register reading processing, the numerical data stored in the random value register R1D or the random value register R2D is read, and the corresponding random number latch flag is set to the OFF state.

  FIG. 51 is a timing chart illustrating an operation example in the case where the power supply voltage VSL decreases during the execution of game control. First, based on the start of power supply to the pachinko gaming machine 1, for example, at a timing T30 before the timing T31 when the power supply voltage VSL shown in FIG. The power supply voltage VCC shown in (B) reaches a predetermined value VCC1. At this timing T30, the reset signal shown in FIG. 51C changes from the on state to the off state. Subsequently, when the power supply voltage VSL reaches the predetermined value VSL1 at the timing T31, the power-off signal shown in FIG. Thereafter, for example, at timing T32, the bit value of the random number latch flag data RDFM0 shown in FIG. By changing from “1” to “1”, the random number latch flag corresponding to the random number register R1D is turned on.

  After the numerical data is stored in the random value register R1D at the timing T32 in this way, the power supply voltage VSL shown in FIG. 51A becomes the predetermined value VSL1 at the timing T33 before the numerical data is read by the CPU 505 or the like. Suppose that it is lower. At this time, based on the determination that the power-off signal shown in FIG. 51D is on (step S111 in FIG. 40; Yes), is the power-off signal on in step S119? It is repeatedly determined whether or not. Thereafter, for example, at timing T34, when the power supply voltage VSL shown in FIG. 51A returns to the predetermined value VSL1, it is determined in step S119 shown in FIG. 40 that the power-off signal is off and is not input. (Step S119; No). In addition, based on the determination that the bit value of the random number latch flag data RDFM0 is “1” and the random number latch flag is on in step S120 shown in FIG. 40, the process of step S121 is executed. Then, the numerical data stored in the random value register R1D is read, the bit value of the random number latch flag data RDFM0 is updated from “1” to “0”, and the random number latch flag corresponding to the random number register R1D is turned off. Set to state. Thereafter, when the power-off process ends, for example, based on the contents specified in the power-off recovery vector table set in step S124 shown in FIG. 40, the user program stored in the ROM 506 (for game control) The game control main process as shown in FIG. 36 is executed from the beginning by starting the execution of the game control from the beginning of the control code indicating the (game control process program).

  In the random number circuit 509, numerical data that becomes a random number value is captured and stored in the random value register R1D or the random value register R2D in response to the rising edge of the first start winning signal SS1 or the second start winning signal SS2. In such a case, for example, when the switch operating power supply voltage VDD drops below a predetermined switch voltage after the process of step S119 shown in FIG. 40 is repeatedly executed, the normal voltage value is restored. During the restoration to the value, rising edges of the first start winning signal SS1 and the second starting winning signal SS2 occur, and numerical data is captured and stored in all of the random value register R1D and the random value register R2D. May turn on. If such an ON state of the random number latch flag is left unattended, the random number latch flag is in the ON state when the game ball passes (enters) through the first starting winning port and the second starting winning port after the power supply voltage is restored. Therefore, the storage of new numerical data is limited, and the special figure display result is determined based on the numerical data captured during the restoration of the power supply voltage, etc. There arises a problem that determination using numerical data fetched at different timings is performed. Therefore, the CPU 505 of the game control microcomputer 100 reads the random value register R1D and the random value register R2D in step S56 shown in FIG. 37 and step S121 and / or step S123 shown in FIG. The above-described problem can be solved by starting (resuming) the execution of the game control after turning off.

  As another example of the random number value reading condition, there is a case where the reserved memory number of the special figure game has reached a predetermined upper limit value when the game ball passes (enters) the first start winning opening and the second starting winning opening. is there. Here, for example, after it is determined in step S203 shown in FIG. 42 that the first start port switch 22A is on, the read value of the first hold storage counter is set to a predetermined upper limit value in step S502 shown in FIG. (For example, “4”) or more, if it is determined to be greater than or equal to (eg, “4”), all entries (for example, entries corresponding to the holding numbers “1” to “4”) are stored in the first special figure storage unit 591A. Is stored, and the number of reserved data stored in the first special figure reservation storage unit 591A has reached the upper limit storage number, so that new reserved data cannot be stored in the first special figure reservation storage unit 591A. . Further, for example, after it is determined in step S207 shown in FIG. 42 that the second start-up switch 22B is in the ON state, the read value of the first hold storage counter is greater than or equal to a predetermined upper limit value in step S502 shown in FIG. Is determined, the reserved data is stored in all entries in the second special figure storage unit 591B, and the number of stored data in the second special figure storage unit 591B is the upper limit storage number. Therefore, new hold data cannot be stored in the second special figure hold storage unit 591B. In such a case, in general, the starting condition of the special game based on the game ball passing (entering) the first starting prize opening or the second starting prize opening is not established, and the prize ball is paid out. Only done.

  For this reason, it may be considered not to read out numerical data that is a random value generated by the random number circuit 509. However, in the random number circuit 509, in response to the first start winning signal SS1 and the second starting winning signal SS2 being turned on and being input regardless of the number of stored data, the random number value register R1D and the random number circuit 509 Numeric data that is a random number value is fetched and stored in the numeric register R2D, and the corresponding random number latch flag is turned on. Then, when the game ball passes (enters) through the first start winning opening and the second starting winning opening next time, even if the first start winning signal SS1 and the second start winning signal SS2 are turned on and input, Since the storage of new numerical data in the random value register R1D and the random value register R2D is restricted, it is impossible to acquire an accurate random value corresponding to the occurrence of the start winning.

  On the other hand, when the CPU 505 of the game control microcomputer 100 determines in step S502 shown in FIG. 43 that the read value of the holding storage counter is equal to or larger than the predetermined upper limit value (step S502; Yes), the step By executing the processing of S512 and reading the numerical data stored in the random value register R1D or the random value register R2D, the corresponding random number latch flag is set to the OFF state, and the process at the time of passing through the start port is ended. In the process of step S512, the random number value register R1D is read when the first start opening prize table 135A is set in step S202 of FIG. 42, while the second start opening prize is obtained in step S206 of FIG. When the table 135B is set, the random number value register R2D is read. Thus, for example, when a plurality of display devices that variably display special symbols, such as the first special symbol display device 4A and the second special symbol display device 4B, are provided, the reserved memory number of the special symbol game reaches the upper limit value. When a game ball that passes (enters) a start winning opening associated with a special symbol is detected, numerical data is read from the random value register associated with the starting winning opening and new numerical data is stored. On the other hand, the numerical data is not read from the random value register not associated with the starting winning opening. As a result, when a game ball passes (enters) one of a plurality of start winning openings, the operation of updating or obtaining numerical data that becomes a random value corresponding to another starting winning opening is affected. Can not be.

  When the game ball passes (enters) through the first start winning port or the second start winning port, the CPU 505 determines whether or not the game ball has passed (entered) in step S204 or step S208 shown in FIG. Execute common start-up passage processing. Then, in a common processing routine, such as the processing of step S501 to step S512 shown in FIG. 43, regardless of the start winning opening through which the game ball has passed, the processing of step S505 and step S506 in particular is executed. Among the random value register R1D and the random value register R2D included in the 509, numeric data serving as a random value is read out from the random value register corresponding to the first start winning opening or the second starting winning opening through which the game ball has passed. In the pachinko gaming machine 1 provided with a plurality of start winning ports such as the first starting winning port and the second starting winning port, the random number value can be read out by making it possible to read the numerical data as a random value by such a common processing routine. Therefore, it is possible to prevent an excessive increase in the amount of programs for acquiring numerical data.

  In the main board 11, the security check program 506A stored in the ROM 506 or the like is stored in the ROM 506 or the like when initial power is supplied from the power board 10 (when power is turned on without a backup power supply) or when restarting after a system reset occurs. Is read out and executed, the gaming control microcomputer 100 enters the security mode. At this time, as a process corresponding to the security check program 506A, for example, a security check process as shown in FIG. 35 is executed. Here, the security time when the game control microcomputer 100 is in the security mode is set in advance in the bit number [2-0] or the bit number [4-3] of the security time setting KSES stored in the program management area of the ROM 506. Depending on the stored bit value, a time component different from the fixed time can be included.

  For example, if the bit value in the bit number [2-0] of the security time setting KSES is a value other than “000” (step S2 shown in FIG. 35; No), the setting contents as shown in FIG. Correspondingly, in addition to the fixed time, any one of a plurality of extension times that can be selected in advance can be set as a time component included in the security time (step S4). If the bit value [4-3] of the security time setting KSES is a value other than “00” (step S6; No), the short mode or the long mode as shown in FIG. 11C is supported. Then, a variable setting time that changes in a predetermined time range each time the initial setting process is executed based on system reset or power-on can be set as a time component included in the security time (step S8).

  Until the security time set in this way has elapsed (step S14; No), the execution of the game control main process by the user program stored in the ROM 506 is not started. Then, the operation of generating numerical data to be a random number value by the random number circuit 509 may not be started during the period in which the game control microcomputer 100 is in the security mode. As a result, it becomes difficult to specify the operation start timing of the random number circuit 509 or the numerical data to be updated from the operation start timing due to power-on of the pachinko gaming machine 1 or system reset, and the analysis result of the game control processing program By connecting a so-called “hanging board” and inputting a fraud signal at a predetermined timing, it is possible to reliably prevent actions such as illegally generating a big hit gaming state.

  As an example, the bit value in the bit number [2-0] of the security time setting KSES is set to a different value for each model of the pachinko gaming machine 1. In this case, the extension time set in step S4 shown in FIG. 35 can be made different for each model of the pachinko gaming machine 1, and the operation start timing of the random number circuit 509 is determined from the operation start timing of the pachinko gaming machine 1. It becomes difficult to specify. Further, by setting the bit value in the bit number [4-3] of the security time setting KSES to “01” or “10”, the variable setting time set in step S8 is varied for each system reset. This makes it extremely difficult to specify the operation start timing of the random number circuit 509 from the operation start timing of the pachinko gaming machine 1.

  When it is determined in step S14 shown in FIG. 35 that the security time has elapsed (step S14; Yes), the CPU 505 reads the user program stored in the ROM 506, and the game control main process as shown in FIG. Executed. For example, the setting process in step S33 includes a random number circuit setting process as shown in FIG. Here, if the bit value in the bit number [0] of the second random number initial setting KRS2 as shown in FIG. 10B is set to “1”, the random number circuit 509 is instructed by the processing in step S55 shown in FIG. The start value of the numerical data, which is a random value generated in this way, can be changed every time the system is reset. Thereby, even if the operation start timing of the random number circuit 509 can be specified, it becomes difficult to specify numerical data read from the random value register 559A and the random value register 559B included in the random number circuit 509. It is possible to reliably prevent actions such as illegally generating a big hit gaming state by aiming based on the analysis result of the control processing program or inputting a fraud signal at a predetermined timing by connecting a so-called `` hanging board '' it can.

  The random number circuit 509 and the like are provided with a free-run counter 554A that updates a count value serving as initial value determination data separately from the operation of the CPU 505. When the bit value [0] of the second random number initial setting KRS2 is “1”, the free run counter 554A is set at the initial setting based on the setting by the start value initial setting circuit 554 of the random number circuit 509. The start value is randomly determined by using the count value as it is, or by using a value obtained by substituting the count value into a predetermined arithmetic function (for example, a hash function). As a result, it becomes difficult to specify the numerical data as the start value in the random number circuit 509 from the operation mode of the CPU 505, and aiming based on the analysis result of the game control processing program or connecting a so-called “hanging board” to a predetermined timing By inputting the fraud signal at, actions such as illegally generating a big hit gaming state can be reliably prevented.

  The CPU 505 of the game control microcomputer 100 sets the jackpot variation pattern type determination table 133A shown in FIG. 30A in the use table in step S252 shown in FIG. 45, or in step S254, FIG. 30B. After setting the small hit variation pattern type determination table 133B shown in FIG. 30 to the usage table, after setting the non-reach variation pattern type determination table 133C shown in FIG. 30C in the usage table in step S260, or in step S261. After the reach variation pattern type determination table 133D shown in FIG. 31 is set in the usage table, the processing of step S262 and step S263 is executed to determine the variation pattern type as one of a plurality of types prepared in advance. Based on the variation pattern type determined at this time, the hit variation pattern determination table 134A shown in FIG. 32A or the loss variation pattern determination table 134B shown in FIG. 32B is set in the use table in step S264. Later, the process of step S265 and step S266 is executed, and the variation pattern is determined as one of a plurality of types prepared in advance. Thereby, when adding the variation pattern type or changing the occurrence rate, it is only necessary to change the setting of the determined value in the variation pattern type determination table, so that the setting time can be shortened. In addition, when adding a detailed variation pattern or changing the occurrence rate, it is only necessary to change the setting of the determination value in the variation pattern determination table, so that the setting time can be shortened. That is, since the determination ratio of the variation pattern type and the determination ratio of the variation pattern can be set separately, the design change related to the variation pattern type and the distribution of the variation pattern can be easily performed.

  In the setting example of the big hit variation pattern type determination table 133A shown in FIG. 30A, corresponding to the case where the big hit type is “surprising”, the big hit types such as the fluctuation pattern type CA4-1 and the fluctuation pattern type CA4-2. The table data is configured so as to include a variation pattern type that is different from the case where is “non-probability variation” or “probability variation”. In this way, when the big hit type is “accuracy”, it is determined that the variation pattern type or the fluctuation pattern is different from that other than “surprise accuracy”. Despite being controlled in the round big hit state, it is possible to prevent the player from feeling distrusted by performing the same production operation as in the case of being controlled in the 15 round big hit state.

  As described above, in the pachinko gaming machine 1 in the above embodiment, the random number circuit 509 is based on the input of a predetermined signal such as the first start winning signal SS1 or the second starting winning signal SS2 being turned on, for example. When numerical data included in the random number sequence RSN updated by a predetermined procedure by the random number generation circuit 553, the random number sequence change circuit 555, or the like is stored in the random value register R1D (559A) or the random number value register R2D (559B). In addition, by changing the bit value of the random number latch flag data RDFM0 and the random number latch flag data RDFM1 stored in the random number latch flag register RDFM from “0” to “1”, the random number value register R1D storing numerical data (559A) or a random number latch corresponding to the random value register R2D (559B) Lag storage of new numerical data turned on is limited. On the other hand, for example, when the CPU 505 executes the processing of step S506 shown in FIG. 43, numerical data that becomes a random value from the random value register R1D (559A) or the random value register R2D (559B) at the read timing of the random value. Is read, the random number latch flag corresponding to the random value register R1D (559A) or the random value register R2D (559B) from which the numerical data is read is turned off, and storage of new numerical data is permitted. The Thus, the numerical data stored in the random value register R1D (559A) or the random value register R2D (559B) based on the input of the predetermined signal is not altered by noise or the like before being read by the CPU 505 or the like. Numerical data that is an accurate random value can be acquired.

  When execution of game control is started by the CPU 505 of the game control microcomputer 100 or the like, for example, in the process of step S56 shown in FIG. 37 or the process of steps S120 to S123 shown in FIG. (559A) and the random number value register R2D (559B) can be read, and each random number latch flag can be set to an OFF state. As a result, for example, when the power is cut off in the pachinko gaming machine 1 or the power supply voltage is unstable such as when the power is turned on, it is erroneously stored in the random value register R1D (559A) or the random value register R2D (559B). Numerical data can be prevented from being acquired as a random value.

  When a game ball that has passed (entered) through the first start winning opening is detected, and it is determined in step S203 shown in FIG. When a game ball that has passed (entered) through the mouth is detected and it is determined in step S207 shown in FIG. 42 that the second start port switch 22B is on, a start prize in which the game ball has passed (entered) in step S208. Regardless of the mouth, a common start-up passage process is executed. Then, in a common processing routine, such as the processing of step S505 and step S506 shown in FIG. 43, regardless of the start winning opening through which the game ball has passed, the random number value register R1D (559A) and the random number value register R2D included in the random number circuit 509. Among (559B), the numerical data serving as the random number value is read from the random value register corresponding to the first start winning opening or the second starting winning opening through which the game ball has passed. Thereby, in the pachinko gaming machine 1 provided with a plurality of start winning ports such as the first starting winning port and the second starting winning port, for example, an excessive increase in the program amount can be prevented.

  In response to the determination that the read value of the hold storage counter is greater than or equal to the upper limit value in step S502 shown in FIG. 43, the first special figure hold storage unit 591A and the second special figure are read at the read timing of the random value. When the storage number of the storage data in the storage unit 591B reaches the upper limit storage number, in the process of step S512, the random number value register R1D ( 559A) or the random number value register R2D (559B), the corresponding random number latch flag is set to the OFF state by reading the numerical value data to be the random number value. As a result, after the number of stored data in the first special figure reservation storage unit 591A or the second special figure reservation storage unit 591B reaches the upper limit storage number, for example, when the random number value is read out after being less than the upper limit storage number, When this happens, an accurate random value based on the input of a predetermined signal such as the first start winning signal SS1 or the second start winning signal SS2 can be acquired.

  When the bit value [4-3] of the security time setting KSES shown in FIG. 8A, FIG. 11A, and FIG. A variable setting time that changes in a predetermined time range each time the initial setting process is executed is set as a time component included in the security time. Further, when the bit value in the bit number [2-0] of the security time setting KSES shown in FIG. 8A, FIG. 11A and FIG. 11D is set to a value other than “000”, One of a plurality of extension times that can be selected in advance is set as a time component included in the security time. As a result, it becomes difficult to specify the operation start timing of the random number circuit 509 or the numerical data to be updated from the operation start timing due to power-on of the pachinko gaming machine 1 or system reset, and the analysis result of the game control processing program By connecting a so-called “hanging board” and inputting a fraud signal at a predetermined timing, it is possible to reliably prevent actions such as illegally generating a big hit gaming state.

  In the random number circuit 509, the random number sequence changing circuit 555 changes the count value permutation RCN output from the random number generating circuit 553 based on a predetermined random number changing rule, whereby the numerical data is changed to a predetermined update initial value by a predetermined procedure. To a predetermined update final value cyclically. When the bit value at the bit number [0] of the second random number initial setting KRS2 shown in FIGS. 8A and 10B is “1”, the CPU 505 executes the process of step S55 shown in FIG. As a result, the start value of the numerical data to be a random number generated by the random number circuit 509 is changed every time the system is reset. Thereby, even if the operation start timing of the random number circuit 509 can be specified, the numerical data read from the random value register R1D (559A) and the random value register R2D (559B) included in the random number circuit 509 is specified. Therefore, it is possible to reliably prevent aiming based on the analysis result of the game control processing program and input of an illegal signal due to connection of a so-called “hanging board”.

  More specifically, a free run counter 554 provided in the random number circuit 509 or the like updates a count value serving as initial value determination data separately from the operation of the CPU 505 of the game control microcomputer 100. Then, based on the setting by the start value initial setting circuit 554 of the random number circuit 509 and the like, the start value of the numerical data that becomes the random number value is determined using the count value of the free run counter 554. This makes it difficult to specify numerical data that is a random value from the operation mode of the CPU 505 of the game control microcomputer 100, and is based on aiming based on the analysis result of the game control processing program or connection of a so-called “hanging board”. It is possible to reliably prevent an illegal signal from being input.

  In the external bus interface 501 provided in the game control microcomputer 100, the internal resource access control circuit 501A allows external data other than the internal circuit such as the CPU 505 to externally read the internal data of the game control microcomputer 100 such as data stored in the ROM 506. Limited. Thereby, it is possible to prevent a game control processing program such as a game control user program stored in the ROM 506 from being read from the outside of the game control microcomputer 100 and provided for analysis or the like. Further, it is possible to reliably prevent aiming based on the analysis result of the game control processing program and input of an illegal signal due to connection of a so-called “hanging board”.

  In the frequency monitoring circuit 551 of the random number circuit 509 built in or externally attached to the game control microcomputer 100, the input state of the random number clock RCLK from the random number clock generation circuit 112 to the random number external clock terminal ERC is set as the internal system clock SCLK. In comparison, when a frequency abnormality is detected in the random number clock RCLK, the bit value of the internal information data CIF4 stored in the bit number [4] of the internal information register CIF is set to “1”. Then, the CPU 505 determines that the number of times that the read value of the internal information data CIF4 is continuously determined to be “1” in step S63 shown in FIG. 38 has reached the clock abnormality determination value in step S65, for example. When it is determined that an abnormality has occurred in the operation state of the random number circuit 509. Thereby, it is possible to reliably prevent an illegal act by inputting an illegal signal as the random number clock RCLK.

  The CPU 505 of the game control microcomputer 100 performs the steps shown in FIG. 37 as random number value register read processing when the system reset of the game control microcomputer 100 is released based on the start of power supply in the pachinko gaming machine 1 or the like. By executing the processing of S56, the numerical data stored in the random value register R1D (559A) or the random value register R2D (559B) is read, and the corresponding random number latch flag is turned off. As a result, for example, the numerical data stored in the random value register R1D (559A) or the random value register R2D (559B) is erroneously acquired as a random value when the power supply voltage is unstable, such as when the power is turned on. Can be prevented.

  Further, in response to the determination that the power cut-off signal is in the on state in step S111 shown in FIG. Until 100 is in the operation stop state, the process of step S119 is executed to repeatedly determine the input state of the power-off signal. Then, when it is determined in step S119 that the power-off signal has been turned off and is not input, before game control is started from the beginning of the control code stored in the ROM 506 based on the setting in step S124. In addition, the processing of step S120 to step S123 is executed to turn off the random number latch flag that is on. Thus, for example, the numerical data stored in the random value register R1D (559A) or the random value register R2D (559B) erroneously in a state where the power supply voltage is unstable such as when the predetermined power supply voltage such as the power supply voltage VSL is lowered is a random value. Can be prevented from being acquired.

  The present invention is not limited to the above embodiment, and various modifications and applications are possible. For example, in the above embodiment, the pachinko gaming machine 1 provided with the first special symbol display device 4A and the second special symbol display device 4B has been described, but only one special symbol display device is provided. Also good. In this case, for example, the combination of the latch flip-flop 557B, the random number latch selector 558B, and the random value register R2D (559B) included in the random number circuit 509 shown in FIG.

  Further, the first start winning opening formed by the normal winning ball apparatus 6A and the second starting winning opening formed by the ordinary variable winning ball apparatus 6B are not limited to those provided as a plurality of start areas, for example, three A plurality of starting areas as described above may be provided. In this case, a start condition for executing a special game using different special symbols may be established based on the detection of a start winning game ball in each start area. The random number circuit 509 may be provided with a plurality of random value registers such as three or more corresponding to the number of start areas, and a random number latch flag corresponding to each random value register may be provided. Or, for example, a special game using the same special symbol is executed based on the detection of a start winning game ball in a part (at least two) of the starting areas of three or more starting areas. The starting condition for doing so may be satisfied. In addition, even if a start winning of a game ball is detected in any start area among a plurality of start areas, a special game using a common (or one set) special symbol is executed. The start condition may be satisfied. In this case, the start condition for starting the special game may be established in the same order as the order in which the start winnings of the game balls are detected in the plurality of start areas. Alternatively, a priority is given to a plurality of start areas, and a start condition for starting a special game based on detection of a start winning game ball in a start area having a high priority is set as a start area having a low priority. The starting condition based on the detection of the start winning of the game ball may be established with priority.

  In the process of step S119 shown in FIG. 40, it may be determined whether or not the watchdog timer has timed out instead of determining whether or not the power-off signal is in the ON state. For example, a predetermined oscillation signal such as the internal system clock SCLK is supplied to the input terminal of the watchdog timer, and the signal change is counted up. When the value counted by the watchdog timer reaches a predetermined value (time-out value), a time-out signal is output. The time-out signal is logically inverted by a predetermined inversion circuit and then input to the AND circuit as a return signal. The AND circuit takes a logical product of the reset signal and the return signal and supplies the logical product to the reset terminal of the CPU 505. The time-out value in the watchdog timer may be set to, for example, a time when the power supply voltage VSL is lower than the voltage value that can generate the power supply voltage VCC after the power-off signal is turned on. Since the watchdog timer operates using the power supply voltage VCC as a drive voltage, the timeout value is set to be equal to or greater than the value corresponding to the operable period of the watchdog timer. Therefore, when the power supply to the pachinko gaming machine 1 is stopped, if the power supply voltage decreases as it is and the supply is stopped, the watchdog timer The circuit parts of this will not work. When the CPU 505 is executing game control, a timer clear signal may be periodically supplied to the watchdog timer to clear the count value (for example, set to an initial value “0”). The output period of the timer clear signal is set to be shorter than the time required until the watchdog timer times out. Therefore, when the CPU 505 is executing normal game control, a time-out signal is not output from the watchdog timer.

  In this case, during the period in which the process of step S119 is repeatedly executed, the watchdog timer is not supplied to the watchdog timer, and if the power supply voltage VCC is a normal voltage value even after a predetermined time has elapsed, the watchdog timer Timeout occurs at. At this time, based on the return signal supplied to the CPU 505, the processing may be started (restarted) from the beginning of the game control processing program. Even in this case, for example, in the process of step S56 shown in FIG. 37, numerical data can be read from the random value register R1D (559A) and the random value register R2D (559B), and each random number latch flag is set to an OFF state. be able to. Alternatively, when it is determined in the process of step S119 shown in FIG. 40 that a time-out has occurred in the watchdog timer, it is determined that the pachinko gaming machine 1 has recovered from the instantaneous interruption of the power supply voltage, and after step S120 What is necessary is just to make it process. Even in this case, in the processing from step S120 to step S123 shown in FIG. 40, numerical data can be read from the random value register R1D (559A) and the random value register R2D (559B), and each random number latch flag is turned off. Can be set. Thus, for example, the numerical data stored in the random value register R1D (559A) or the random value register R2D (559B) erroneously in a state where the power supply voltage is unstable, such as when an instantaneous interruption occurs in the pachinko gaming machine 1, Can be prevented from being acquired.

  The extension time set in step S4 of FIG. 35 may be determined as one of a plurality of extension times for each system reset, for example, by setting in a user program stored in the ROM 506. In this case, the extension time set in step S4 is defined to be longer than the longest variable setting time that can be set in step S8. Then, after a rough extension time is determined in step S4, a detailed extension time may be determined in step S8. As a result, the security time for entering the security mode when the power of the pachinko gaming machine 1 is turned on or when the system is reset can be greatly changed every time the system is reset. It becomes more difficult to specify the start timing and the numerical data to be updated.

  Further, the extended time to be added to the fixed time may be determined using an ID number assigned to each chip constituting the game control microcomputer 100. As an example, an extension time corresponding to the calculated value is executed by executing a part or all of an operation for performing a predetermined scramble process on the ID number and an operation such as addition / subtraction / multiplication / division using the ID number. May be set. In this case, the extension time may be randomly determined for each system reset, for example, by changing an arithmetic expression used for determining the extension time for each system reset. Furthermore, the count value of the free run counter, the ID number, and the like, for example, the arithmetic expression for determining the extension time using the ID number is determined corresponding to the count value of the free run counter stored at the time of system reset. The extended time may be determined randomly at each system reset by using a combination of the above. In addition, when changing the start value of the random number generated by the random number circuit 509 at each system reset, the start value of the random number can be changed by using a combination of the count value of the free-run counter and the ID number. You may decide.

  The clock signal supplied to the CPU 505 of the gaming control microcomputer 100 and the clock signal supplied to the random number circuit 509 are generated using an oscillation signal generated by one oscillator included in the common clock generation circuit. You may make it do. In this case, for example, a frequency divider for generating the random number clock RCLK and the control clock CCLK is provided, and the latch clocks RC0, RC1, RC2 are synchronized with the control clock CCLK or the internal system clock SCLK. What is necessary is just to set the frequency division ratio etc. in each frequency divider so that it may become difficult to produce. The control clock generation circuit 111 and the random number clock generation circuit 112 may be provided in whole or in part inside the game control microcomputer 100 or outside the game control microcomputer 100. May be.

  The oscillation signal that becomes the random number update clock RGK or the latch clock RC0 may be generated outside the random number circuit 509 such as the random number clock generation circuit 112, for example. Alternatively, a circuit for generating the random number update clock RGK and a circuit for generating the latch clock RC0 may be separately provided in the random number circuit 509. As an example, while generating a random number update clock RGK by a flip-flop similar to the clock flip-flop 552, an inversion circuit for inverting the signal state of the random number update clock RGK is provided, and a signal output from the inversion circuit is latched. It may be used as the clock RC0.

  When restricting external reading of the ROM 506 or the like, for example, the connection terminal for externally reading out the data stored in the ROM 506 in the game control microcomputer 100 cannot be connected to the external device in the provider of the pachinko gaming machine 1. It may be sealed.

  In the above embodiment, as the variation pattern setting process of step S141 shown in FIG. 41, the process shown in the flowchart of FIG. 45 is executed regardless of which of the first start condition and the second start condition is satisfied. Explained. However, the present invention is not limited to this, and when the first start condition is satisfied and when the second start condition is satisfied, a process different from each other is executed, and the variation pattern type is selected from a plurality of types. It is also possible to determine whether or not one of a plurality of types of variation patterns. In this case, the process for determining the variation pattern type and the process for determining the variation pattern are varied depending on which of the first start condition and the second start condition is satisfied, while the variation pattern type The numerical data indicating the random number value MR4 for determination and the numerical data indicating the random value MR5 for determining the variation pattern are common numerical data regardless of which of the first start condition and the second start condition is satisfied. May be used.

  Further, as a variation pattern type determination table such as a big hit variation pattern type determination table, a small hit variation pattern type determination table, a non-reach variation pattern type determination table, or a reach variation pattern type determination table, any one of the first start condition and the second start condition Depending on whether or not is established, it may be prepared in advance that the assignment of the decision value to each variation pattern type is different. Then, in the variation pattern setting process executed in response to the establishment of the first start condition, a variation pattern type determination table corresponding to the establishment of the first start condition is selected as a use table, and a random value for determining the variation pattern type Based on MR4, the variation pattern type is determined as one of a plurality of types. On the other hand, in the variation pattern setting process executed in response to the establishment of the second start condition, a variation pattern type determination table that is different from the case where the first start condition is established according to the establishment of the second start condition. It may be selected as a usage table and the variation pattern type may be determined as one of a plurality of types based on the random value MR4 for determining the variation pattern type common to the case where the first start condition is satisfied.

  Further, regarding the determination process for determining whether or not the variable display state of the decorative symbols is to be the reach state, different processes are executed when the first start condition is satisfied and when the second start condition is satisfied. It may be. In this case, the process for determining whether or not to reach the reach state is made different depending on which of the first start condition and the second start condition is satisfied, while the numerical data indicating the reach determination random value MR3 is Regardless of which of the first start condition and the second start condition is satisfied, the common numerical data may be used. Further, for example, instead of the process in step S236 shown in FIG. 44 in the above embodiment, the process of determining the jackpot type as one of a plurality of types is performed when the first start condition is satisfied and the second start condition Different processing may be executed depending on whether or not is established. In this case, the process for determining the jackpot type is different depending on whether the first start condition or the second start condition is satisfied, while the numerical data indicating the random number MR2 for determining the jackpot type is as follows: Regardless of which of the first start condition and the second start condition is satisfied, common numerical data may be used.

  In the above-described embodiment, the small hit game state is controlled based on the fact that the variable display result is “small hit”, and the game state is not changed after the small hit game state ends. On the other hand, when the variable display result is “big hit”, it is controlled to the two round big hit state based on the fact that the big hit type becomes “surprise”, and after the two round big hit state is finished, it is controlled to the positive change state. Explained as being. However, the present invention is not limited to this, and instead of or in addition to the case where the big hit type is “accurate” or the variable display result is “small hit”, A case of “suddenly normal” may be provided. As an example, “suddenly short time” and “suddenly normal” are included in the jackpot type when the variable display result is “big jackpot”. In this case, the jackpot type determination table 131 includes table data for assigning the random number MR2 for determining the jackpot type to the jackpot type “suddenly short” or “suddenly normal” according to the fluctuation special figure designation buffer value. What is necessary is just to be comprised. When the variable display result is “big hit” and the big hit type is “suddenly short”, the two round big hit state is controlled in the same way as the big hit type is “surprise”, and the two round big hit state ends. After that, unlike the case where the big hit type is “accuracy”, it is controlled to the short time state. On the other hand, when the variable display result is “big hit”, when the big hit type is “suddenly normal”, the two round big hit state is controlled in the same way as when the big hit type is “surprise”, and the two round big hit state ends. After that, unlike the case where the jackpot type is “surprise”, the normal state is controlled. Thereby, a player's expectation with respect to the gaming state controlled after the end of the two round big hit state can be enhanced, and the gaming interest can be improved.

  When such “sudden shortening” and “sudden normal” are provided, a variation pattern type and variation pattern different from those other than “sudden shortening” and “sudden normal” may be determined. As a result, although the big hit type is “suddenly short” or “suddenly normal”, the same effect operation as in the case of being controlled to the 15 round big hit state is performed despite being controlled to the 2 round big hit state. It can prevent the player from feeling distrust. In addition, when the big hit type is "Suddenly short" or "Suddenly normal", when the variable display result is "Small hit", or when the big hit type is "Sudden", the common variation pattern type It may be possible to make a decision. As a result, when determining the fluctuation pattern, the big hit type is “Suddenly short” or “Suddenly normal”, or the variable display result is “Small hit” or the big hit type is “Abrupt”. Regardless of whether this is the case, a common variation pattern determination table can be used, and the data capacity can be reduced.

  In the above-described embodiment, it has been described that the game state such as the probability change state or the time-short state can be controlled after the big hit gaming state based on the variable display result being “big hit”. In the probability variation state and the short-time state, it is described that the control that is advantageous to the player is performed by increasing the possibility of the game ball entering the second start winning opening and easily establishing the second start condition. . However, the present invention is not limited to this. For example, in the probability variation state, the probability variation control is continuously performed, and the advantageous release control that increases the possibility that the game ball enters the second start winning opening is performed. The high base state and the high probability low base state in which the probability variation control is performed but the advantageous release control is not performed may be included. Also, in the short-time state, a low-accuracy base state where the special figure fluctuation time is shortened and advantageous opening control is performed, and a low-accuracy low-base state where the special figure fluctuation time is shortened but advantageous opening control is not performed. May be included. As an example, depending on whether the big hit type is “probability change” or “surprise accuracy”, after the big hit gaming state is finished, it is controlled to either the high probability high base state or the high probability low base state. May be. As another example, depending on whether the big hit type is “probability change” or “surprise accuracy”, the ratio of being controlled to either the high probability high base state or the high probability low base state after the big hit gaming state is ended. , They may be different from each other.

  When the big hit type is “Crush Probability”, when determining the variation pattern type to be one of multiple types, whether to control to the high probability high base state or the high probability low base state after the big hit gaming state ends Accordingly, different variation pattern types may be determined. As an example, when the big hit type is determined to be “surprise” in step S236 shown in FIG. 44, it is determined whether to control to the high probability high base state or the high probability low base state after the big hit gaming state ends. A determination process is performed to At this time, when it is determined to control to the high accuracy low base state, the case where the big hit type is “surprise” and the variable display result is “small hit”, such as the variation pattern type CA4-1. A common variation pattern type is determined. On the other hand, when it is decided to control to the high accuracy and high base state, if the big hit type is “surprise”, such as the fluctuation pattern type CA4-2, the dedicated fluctuation pattern type is determined. Good. As a result, when the big hit type is “surprise” and the high probability low base state is reached after the big hit gaming state is finished, the variable display result is displayed as an effect operation during variable display of the decorative pattern or an effect operation in the two round big hit state. After the production operation common to the case of “small hit” is performed, the highly accurate and low base state can be obtained. On the other hand, when the big hit type is “surprise” and the high probability high base state is reached after the big hit gaming state is finished, the big hit type is “surprise” After the dedicated performance operation is performed only in the case of “

  In the embodiment described above, the “left”, “middle”, and “right” decorative symbol display areas 5L, 5C, and 5R are provided in the display area of the image display device 5, and the decorative symbol display areas 5L, 5C, and 5R are provided. In the above description, it is assumed that one decorative symbol is stopped and displayed so that the final decorative symbol that is the final stop symbol is stopped and displayed on one predetermined effective line. However, the present invention is not limited to this. For example, in the “left”, “middle”, and “right” decorative symbol display areas 5L, 5C, and 5R, three locations of “upper”, “middle”, and “lower” are provided. It is also possible that the decorative symbols can be stopped and displayed, and the finalized decorative symbols that will be the final stopped symbols are stopped and displayed on five or eight active lines.

  In addition, the device configuration of the pachinko gaming machine 1, the data configuration, the processing shown in the flowchart, the various display operations including the display operation of the display image in the display area of the image display device 5, etc. depart from the spirit of the present invention. Changes and modifications can be made arbitrarily without departing from the scope. In addition, the gaming machine of the present invention is not limited to a payout type gaming machine that pays out a predetermined number of prize balls in response to detection of a winning ball, but responds to detection of a winning ball by enclosing the gaming ball. It can also be applied to enclosed game machines that give points.

  In the above embodiment, as an example of the gaming machine, the description has been given using the pachinko gaming machine 1 having a function of variably displaying special symbols and decorative symbols and a function of displaying various effect images. However, at least a part of the configuration and functions of the pachinko gaming machine 1 in the above embodiment can also be applied to other gaming machines such as a slot machine. Hereinafter, a case where the present invention is applied to a slot machine which is an example of another gaming machine will be described.

  FIG. 52 is a front view of a slot machine 700 as an example of a slot machine to which the present invention is applied, and shows a layout of main members. The slot machine 700 is roughly composed of a housing whose front surface is open and a front door pivotally supported at a side end of the housing. Inside the casing of the slot machine 700, a variable display device 701 in which reels RL, RC, and RR having a plurality of types of symbols arranged on the outer periphery are arranged in the horizontal direction is installed. On the outer periphery of the reels RL, RC, RR, for example, “Red 7”, “White 7”, “BAR”, “JAC”, “Watermelon”, “Cherry”, “Bell”, which can be distinguished from each other Are drawn in a predetermined order. The symbols drawn on the outer peripheries of the reels RL, RC, and RR are displayed in upper, middle, and lower three stages. Each reel RL, RC, RR is rotated by reel motors 851L, 851C, 851R (FIG. 53) provided in correspondence to display the symbols of each reel RL, RC, RR continuously changing. At the same time, by stopping the rotation of the reels RL, RC, RR, three consecutive symbols are derived and displayed as display results.

  An image display device 710 having a display function is provided on the front door of the slot machine 700. An operation table 720 on which various input switches and the like for the player to perform various operations are provided on the front door of the slot machine 700 and below the image display device 710. On the back side of the operation table 720, a medal slot 702 into which a medal as a game medium can be inserted in the slot machine 700, a BET switch 703 for setting (BET) the number of bets for one medal, and one game MAXBET switch 704 for setting the maximum number of bets that can be bet (three in this example), medals stored as credits (the number of medals stored as game value owned by the player) Also, a settlement switch 708 for settlement of medals used for setting the bet amount is provided. A medal inserted into the medal insertion slot 702 is detected by a predetermined insertion medal sensor.

  On the front side of the operation table 720, a start lever 705 that is operated when the game is started in the slot machine 700, stop switches 706L and 706C that are operated when the rotation of the reels RL, RC, and RR is stopped. 706R is provided. A medal payout exit 707 through which medals are paid out is provided at the bottom of the operation table 720. Two speakers 711L and 711R for outputting sound effects are provided on the upper left and right of the slot machine 700. In addition, for example, game effect lamps 713 and 714 are provided at predetermined positions such as the left and right front sides of the operation table 720.

  When a game is played in the slot machine 700, first, medals are inserted from the medal insertion slot 702, or credits are used to set the number of bets. To use the credit, the BET switch 703 or the MAXBET switch 704 is operated. When the number of bets is set in this way, one of a plurality of pay lines corresponding to the number of bets becomes valid, and the operation of the start lever 705 becomes valid, that is, the game can be executed. The execution condition is met. Even when a re-gamer winning such as replay occurs in the previous game, the next game can be executed continuously, and the variable display execution condition is satisfied.

  When the start lever 705 is operated in such a state that the game can be executed, based on the fact that the operation is detected by the start lever switch 705A (FIG. 53), the variable display start condition is satisfied, The reels RL, RC, RR rotate, and the symbols of the reels RL, RC, RR continuously change. If any one of the stop switches 706L, 706C, and 706R is operated in this state, the rotation of the corresponding reels RL, RC, and RR is stopped, and the display result is derived and displayed so as to be visible.

  Then, when the rotation of all the reels RL, RC, RR is stopped, one game is finished, and a combination of symbols called a predetermined combination on any activated pay line is assigned to each reel RL, When the display results of RC and RR are stopped, a winning is generated. The types of winning combinations are roughly divided into small roles with medals, re-players that can start the next game without the need to set the number of bets, and special cases that have a transition in gaming state. There is a role, and the winning combination is determined according to the gaming state. In the slot machine 700, an internal lottery is performed to determine whether or not the winning of each combination determined according to the gaming state is allowed based on the random number value extracted at the timing when the start lever 705 is operated. The fact that winning in this internal lottery and winning is permitted is also referred to as “internal winning”. Of the winning of each role, the winning of the small role and the replaying role is valid only in the game for which the winning is determined, but the winning of the special role has the roles allowed to be generated by the internal lottery. It is effective until. In other words, once the occurrence of a special winning combination is allowed, even if the special winning combination cannot be generated in each game, the winning is carried over to the next game.

  The gaming state in the slot machine 700 includes, for example, a regular bonus, a big bonus, and a normal gaming state. In the regular bonus game state, for example, small roles such as JAC, cherry, watermelon, and bell are defined as winning combinations and are subject to lottery in the internal lottery. In the big bonus, special small roles such as cherry, watermelon, and bell, and special bonuses such as regular bonus (or JACIN) are determined as winning roles in a predetermined small role game. It is a lottery target in the internal lottery. In the normal gaming state, for example, small roles such as cherry, watermelon and bell, replay roles such as replay, special roles such as big bonus, regular bonus, etc. are predetermined as winning roles, It is a lottery target in the lottery.

  When a special role winning that becomes a big bonus occurs in the normal gaming state, the gaming state shifts to the big bonus. With the big bonus, a predetermined game called a small role game can be played. The big bonus is ended when the total number of medals given to the player in the big bonus becomes equal to or more than a prescribed number (eg, 466). When a special role winning that becomes a regular bonus occurs in a small role game in a normal gaming state or a big bonus, the gaming state shifts to a regular bonus. The regular bonus ends when 12 games have been consumed or when 8 games have been won (any kind of combination can be used), whichever comes first. In the regular bonus in the normal gaming state, the regular bonus may be terminated when the total number of medals given to the player exceeds a specified number. If the total number of medals awarded to the player during the big bonus exceeds the specified number with the regular bonus in the big bonus, the regular bonus is terminated together with the big bonus.

  In the slot machine 700, when the gaming state is shifted to a special gaming state such as a regular bonus or a big bonus, the player can acquire more medals than the normal gaming state, which is more advantageous to the player than the normal gaming state. It becomes a game state. The determination as to whether or not to control to such a special game state may be made as a determination as to whether or not to give a predetermined game value in the internal lottery. Note that the special gaming state is not limited to a regular bonus or a big bonus, and it can be expected that the player will win more medals than the normal gaming state, and the gaming state may be more advantageous to the player than the normal gaming state. That's fine. As such a gaming state that is more advantageous to the player than the normal gaming state, for example, an operation that satisfies the conditions for deriving notification target winnings that occur on condition that reel deriving conditions (for example, stop order and stop timing) are satisfied By limiting the gaming state (so-called assist time) in which the procedure is notified and the pull-in range of at least one of the reels, the symbols displayed when the stop switches 706L, 706C, and 706R are operated are stopped. Challenge time (CT) that allows control to be easily controlled and allows players to derive a combination of winning symbols, and allow for specific winnings (such as replay winnings and single bonus winnings) Game state (so-called replay time or concentration state) that increases the probability of being played, and further combining these It may be any such tricks state.

  In the slot machine 700, for example, a main board 800, an effect control board 820, an audio control board 832, a lamp control board 833, a reel unit 850 and the like as shown in FIG. 53 are mounted. In addition, in the slot machine 700, other boards such as a power board and a relay board connected to the main board 800 are also mounted. The main board 800 only needs to share at least part of the configuration and function of the main board 11 in the above embodiment. In addition, other control boards such as a power supply board need only have at least a part in common with the configurations and functions of the various control boards in the above embodiment.

  The main board 800 is provided with a game control microcomputer 810. The game control microcomputer 810 is at least partially in common with the configuration and functions of the game control microcomputer 100 in the above embodiment, and represents a CPU and a user program that execute a user program based on the control code. It only needs to be configured to include a ROM that stores control codes, fixed data, and the like, and a RAM that is used by the CPU as a work area. In addition, a random number circuit that is partially or entirely in common with the random number circuit 509 in the above embodiment may be built in or externally attached to the game control microcomputer 810.

  The reel unit 850 includes reel motors 851L, 851C, 851R, a reel lamp 852, a reel sensor 853, and the like. The reel motors 851L, 851C, and 851R are motors for rotating the reels RL, RC, and RR. The reel lamp 852 is provided inside each reel RL, RC, RR, and irradiates a symbol that can be visually recognized by the variable display device 701 among the symbols drawn on each reel RL, RC, RR from the inside of the reel. It is a lamp to do. The reel sensor 853 is a sensor for detecting the rotation state, the number of rotations, and the like of each reel RL, RC, RR.

  An effect control microcomputer 830, a display control unit 831, and the like are mounted on the effect control board 820. The effect control microcomputer 830 is a one-chip microcomputer having the same configuration as part or all of the game control microcomputer 810, for example, and includes a CPU, a ROM, a RAM, a reset / interrupt controller, and the like. Just do it. The display control unit 631 controls the display operation in the image display device 510. The display control unit 631 is a VDP that executes image data processing in accordance with a display control command from the effect control microcomputer 630, or the image display device 510. An effect data memory for storing various effect data used for effect control such as displaying an image on the screen is provided.

  In the effect control microcomputer 830, an instruction for controlling the effect operation by the image display device 710, the speakers 711L and 711R, the game effect lamps 713 and 714, etc. according to the effect control pattern based on the effect control command received from the main board 800, Processing is executed by the CPU. In the display control unit 831, processing of effect data according to the display control command from the effect control microcomputer 830 is executed.

  In a random number circuit built in or externally attached to the game control microcomputer 810 provided in such a slot machine 700, for example, among the configurations shown in FIG. 14, a latch flip-flop 557B, a random number latch selector 558B, and a random value register R2D (559B). ) Is not used. On the other hand, in the game control microcomputer 810, for example, in the configuration shown in FIG. 6, the detection signal from the start lever switch 705A provided in the slot machine 700 is input to the input port P0 provided in the PIP 510.

  Then, in the random number circuit built in or externally attached to the game control microcomputer 810, the random number generation shown in FIG. 14 is performed based on the input of a predetermined signal, for example, that the detection signal from the start lever switch 705A is turned on. When numerical data included in the random number sequence RSN updated by a predetermined procedure by the circuit 553, the random number sequence changing circuit 555, or the like is stored in the random number value register R1D (559A), it is stored in the random number latch flag register RDFM. The random number latch flag corresponding to the random value register R1D (559A) storing numerical data is turned on by changing the bit value of the random number latch flag data RDFM0 from “0” to “1”, etc. Data storage is limited. On the other hand, for example, when the CPU of the game control microcomputer 810 executes a process corresponding to step S506 shown in FIG. 43, the random number value is obtained from the random number value register R1D (559A) at the read timing of the random number value. When the numerical data is read, the random number latch flag corresponding to the random value register R1D (559A) from which the numerical data is read is turned off, and storage of new numerical data is permitted. Thereby, the numerical data stored in the random value register R1D (559A) based on the input of the predetermined signal is not altered by noise or the like until it is read by the CPU of the game control microcomputer 810, Numerical data that is an accurate random value can be acquired.

  Further, when execution of game control is started by the CPU of the game control microcomputer 810 or the like, for example, in processing corresponding to step S56 shown in FIG. 37 or processing corresponding to step S120 and step S121 shown in FIG. Numerical data can be read from the random value register R1D (559A), and each random number latch flag can be set to an OFF state. As a result, for example, numerical data stored in the random value register R1D (559A) erroneously in a state where the power supply voltage is unstable such as when the power is cut off in the slot machine 700 or when the power is turned on is acquired as a random value. Can be prevented.

  Further, when the bit value in the bit number [4-3] of the security time setting KSES is set to a value other than “00”, similar to those shown in FIG. 8A and FIG. 11A and FIG. A variable setting time that changes in a predetermined time range every time the initial setting process is executed based on system reset or power-on is set as a time component included in the security time. In addition, the bit value in the bit number [2-0] of the security time setting KSES is set to a value other than “000” in the same manner as shown in FIG. 8 (A) and FIG. 11 (A) and (D). Sometimes, in addition to the fixed time, one of a plurality of extension times that can be selected in advance is set as a time component included in the security time. This makes it difficult to specify the operation start timing of the random number circuit or the numerical data to be updated from the operation start timing due to power-on of the slot machine 700, system reset, or the like, and is based on the analysis result of the game control processing program. By connecting a so-called “hanging board” and inputting a fraud signal at a predetermined timing, it is possible to reliably prevent acts such as illegally generating a special gaming state.

  In addition, for example, the start value of numerical data that becomes a random value generated by a random number circuit built in or externally attached to the game control microcomputer 810 is changed at each system reset, more specifically for game control. Separately from the operation of the CPU of the microcomputer 810, the start value of the numerical data to be a random value is determined using the count value read from the free run counter that updates the count value to be the initial value determination data, In the external bus interface provided in the control microcomputer 810, internal reading of the game control microcomputer 810 such as data stored in the ROM, such as data stored in the ROM, is restricted by the internal resource access control circuit from being restricted by external circuits other than the internal circuit such as a CPU. Microcomputer 810 The frequency monitoring circuit of the built-in or external random number circuit detects the frequency abnormality in the random number clock by comparing the input state of the random number clock with the internal system clock, or combines some or all of these For example, at least a part of the configuration and functions of the pachinko gaming machine 1 in the above embodiment may be realized in the slot machine 700.

  The slot machine 700 is not limited to a game that can be played using medals and credits. For example, a slot machine that plays a game using pachinko balls, or a game that uses credits without medals being discharged to the outside. The present invention can also be applied to a possible full credit type slot machine, an image type slot machine in which a variable display device displays an image showing a symbol.

  Programs and data for realizing part or all of the configuration and functions of the pachinko gaming machine 1 and the slot machine 700 are limited to a form distributed and provided to a computer device or the like by a detachable recording medium. However, it may be distributed in advance by preinstalling in a storage device such as a computer device. Furthermore, the program and data for realizing the present invention are distributed by downloading from other devices on a network connected via a communication line or the like by providing a communication processing unit. It doesn't matter.

DESCRIPTION OF SYMBOLS 1 ... Pachinko machine 2 ... Game board 3 ... Gaming machine frame 4A, 4B ... Special symbol display device 5 ... Image display device 6A ... Ordinary winning ball device 6B ... Ordinary variable winning ball device 7 ... Special variable winning ball device 8L, 8R ... Speaker 9 ... Game effect lamp 11 ... Main board 12 ... Production control board 13 ... Audio control board 14 ... Lamp control board 15 ... Discharge control board 18 ... Relay board 20 ... Normal symbol display 21 ... Gate switches 22A, 22B ... Start port switch 23 ... Count switch 31 ... Game start switch 41 ... Pass gate 100, 810 ... Game control microcomputer 501 ... External bus interface 501A ... Internal resource access control circuit 502 ... Clock circuit 503 ... Unique information storage circuit 504 ... Reset / Interrupt controller 5 5 ... CPU
506 ... ROM
507 ... RAM
508 ... CTC
509 ... random number circuit 510 ... PIP
511 ... Serial communication circuit 512 ... Address decoding circuit 551 ... Frequency monitoring circuit 552 ... Clock flip-flop 553 ... Random number generation circuit 554 ... Start value setting circuit 554A ... Free-run counter 555 ... Random number sequence change circuit 556 ... Random number sequence change setting circuit 557A, 557B ... Flip-flops for latch 558A, 558B ... Random number latch selectors 559A, 559B ... Random value register 700 ... Slot machine

Claims (2)

A gaming machine capable of playing games,
A game control microcomputer incorporating a control CPU for executing game control in the gaming machine based on the game control processing program;
A random number circuit that is built in or externally attached to the game control microcomputer and generates numerical data to be random values;
The random number circuit includes:
Numeric value updating means for updating and outputting numerical data according to a predetermined procedure;
Random number value storage means for capturing and storing numerical data output from the numerical value updating means as a random number value,
The game control microcomputer is:
Control determining means for making a predetermined determination by the control CPU based on a random number value generated by the random number circuit;
When the numerical data output from the numerical value updating means based on the input of a predetermined signal is stored in the random value storage means, it is turned on and the change of the numerical data stored in the random value storage means is prohibited . On the other hand, when the numerical data stored in the random value storage means is read by the control CPU at the read timing of the random value, a predetermined flag that is turned off and permits storage of new numerical data Including
There are a clock signal for defining an update period of numerical data by the numerical value updating means, and a clock signal for defining an operation period of the control CPU,
A non-volatile memory that is built in the game control microcomputer and stores a control program including the game control processing program;
The game control microcomputer includes a read restriction circuit for restricting external reading of the nonvolatile memory other than by the control CPU.
A gaming machine characterized by that. The predetermined flag is turned off when the gaming control microcomputer recovers from a power-off state based on a decrease in the power supply voltage value.
The gaming machine according to claim 1.

Images