JP5824874B2 - Semiconductor device - Google Patents

Semiconductor device Download PDF

Info

Publication number
JP5824874B2
JP5824874B2 JP2011118909A JP2011118909A JP5824874B2 JP 5824874 B2 JP5824874 B2 JP 5824874B2 JP 2011118909 A JP2011118909 A JP 2011118909A JP 2011118909 A JP2011118909 A JP 2011118909A JP 5824874 B2 JP5824874 B2 JP 5824874B2
Authority
JP
Japan
Prior art keywords
insulating sheet
heat sink
semiconductor device
frame
convex portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2011118909A
Other languages
Japanese (ja)
Other versions
JP2012248660A (en
Inventor
中川 信也
信也 中川
裕史 川島
裕史 川島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2011118909A priority Critical patent/JP5824874B2/en
Publication of JP2012248660A publication Critical patent/JP2012248660A/en
Application granted granted Critical
Publication of JP5824874B2 publication Critical patent/JP5824874B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]

Landscapes

  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

本発明は、例えば電力のスイッチングなどに用いられる半導体装置に関する。   The present invention relates to a semiconductor device used for power switching, for example.

特許文献1には、ヒートシンクに絶縁シートを接着した半導体装置が開示されている。   Patent Document 1 discloses a semiconductor device in which an insulating sheet is bonded to a heat sink.

特開2006−210597号公報JP 2006-210597 A

ヒートシンクに接着された絶縁シートはモールド樹脂に覆われる。そして、モールド樹脂などから絶縁シートに力が及ぼされると、絶縁シートの外周部分がヒートシンクから剥離することがある。絶縁シートが剥離すると、絶縁シートからヒートシンクへの放熱が十分できないことがある。   The insulating sheet bonded to the heat sink is covered with mold resin. When a force is applied to the insulating sheet from a mold resin or the like, the outer peripheral portion of the insulating sheet may be peeled off from the heat sink. When the insulating sheet is peeled off, there is a case where heat radiation from the insulating sheet to the heat sink cannot be sufficiently performed.

本発明は、上述のような課題を解決するためになされたもので、絶縁シートの外周部分の剥離を防止できる半導体装置を提供することを目的とする。   The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a semiconductor device capable of preventing peeling of the outer peripheral portion of an insulating sheet.

本発明に係る半導体装置は、平坦部と該平坦部を囲むように形成された凸部とを有するヒートシンクと、フレームと、下面が該平坦部及び該凸部に接着し、上面全体が該フレームと接した絶縁シートと、該フレームの上面に固定された半導体素子と、該ヒートシンクの該絶縁シートが接着した面と反対の面、及び該フレームの一部を外部に露出するように、該ヒートシンク、該フレーム、該絶縁シート、及び該半導体素子を覆うモールド樹脂と、を備えたことを特徴とする。 The semiconductor device according to the present invention includes a heat sink having a flat portion and a convex portion formed so as to surround the flat portion, a frame, a lower surface bonded to the flat portion and the convex portion, and an entire upper surface of the frame. and an insulating sheet in contact, so as to expose a semiconductor element fixed to the upper surface of the frame, the surface opposite to the insulating sheet of the heat sink is bonded surface, and a portion of said frame to the outside, the heat sink And a mold resin that covers the frame, the insulating sheet, and the semiconductor element.

本発明によれば、絶縁シートの外周部分がヒートシンクから剥離することを防止できる。   According to this invention, it can prevent that the outer peripheral part of an insulating sheet peels from a heat sink.

本発明の実施の形態1に係る半導体装置を示す断面図である。It is sectional drawing which shows the semiconductor device which concerns on Embodiment 1 of this invention. 本発明の実施の形態1に係る半導体装置のヒートシンクの斜視図である。It is a perspective view of the heat sink of the semiconductor device which concerns on Embodiment 1 of this invention. 本発明の実施の形態1に係る半導体装置の変形例を示す断面図である。It is sectional drawing which shows the modification of the semiconductor device which concerns on Embodiment 1 of this invention. 絶縁シート端部を面取り加工したことを示す断面図である。It is sectional drawing which shows having chamfered the insulating sheet edge part. 本発明の実施の形態2に係る半導体装置のうち、ヒートシンクと絶縁シートを示す断面図である。It is sectional drawing which shows a heat sink and an insulating sheet among the semiconductor devices which concern on Embodiment 2 of this invention. 本発明の実施の形態2に係る半導体装置の製造方法を示す図である。It is a figure which shows the manufacturing method of the semiconductor device which concerns on Embodiment 2 of this invention. 本発明の実施の形態3に係る半導体装置のうち、ヒートシンクと絶縁シートを示す断面図である。It is sectional drawing which shows a heat sink and an insulating sheet among the semiconductor devices which concern on Embodiment 3 of this invention.

実施の形態1.
図1は、本発明の実施の形態1に係る半導体装置を示す断面図である。半導体装置10は、フレーム12を備えている。フレーム12は銅で形成されている。フレーム12の表面側について説明する。フレーム12には金属パターン14を介してダイオード16が固定されている。別の金属パターン14にはIGBT18が固定されている。フレーム12の上にはICチップ22が固定されている。ダイオード16、IGBT18、及びICチップ22の必要な電気的接続は、ワイヤ20が担っている。
Embodiment 1 FIG.
FIG. 1 is a cross-sectional view showing a semiconductor device according to the first embodiment of the present invention. The semiconductor device 10 includes a frame 12. The frame 12 is made of copper. The surface side of the frame 12 will be described. A diode 16 is fixed to the frame 12 via a metal pattern 14. An IGBT 18 is fixed to another metal pattern 14. An IC chip 22 is fixed on the frame 12. The wires 20 are responsible for the necessary electrical connections of the diode 16, IGBT 18, and IC chip 22.

フレーム12の裏面側について説明する。フレーム12の裏面には絶縁シート24が接着している。絶縁シート24にはヒートシンク26が接着している。ヒートシンク26は、絶縁シート24と接する面に、凸部26aと平坦部26bを有している。絶縁シート24は、ヒートシンク26の凸部26aに囲まれるように平坦部26b及び凸部26aに接着している。つまり、絶縁シート24の外周部分は凸部26aに接着し、中央部分は平坦部26bに接着している。   The back side of the frame 12 will be described. An insulating sheet 24 is bonded to the back surface of the frame 12. A heat sink 26 is bonded to the insulating sheet 24. The heat sink 26 has a convex portion 26 a and a flat portion 26 b on the surface in contact with the insulating sheet 24. The insulating sheet 24 is bonded to the flat portion 26 b and the convex portion 26 a so as to be surrounded by the convex portion 26 a of the heat sink 26. That is, the outer peripheral portion of the insulating sheet 24 is bonded to the convex portion 26a, and the central portion is bonded to the flat portion 26b.

半導体装置10は、モールド樹脂30を有している。モールド樹脂30は、ヒートシンク26の絶縁シート24が接着した面と反対の面を外部に露出するように、ヒートシンク26、絶縁シート24、ダイオード16、及びIGBT18を覆っている。   The semiconductor device 10 has a mold resin 30. The mold resin 30 covers the heat sink 26, the insulating sheet 24, the diode 16, and the IGBT 18 so that the surface opposite to the surface to which the insulating sheet 24 of the heat sink 26 is bonded is exposed to the outside.

図2は、本発明の実施の形態1に係る半導体装置のヒートシンクの斜視図である。凸部26aは、平坦部26bを囲むように形成されている。凸部26aは、ヒートシンク26の端面(側面)において最も高く形成され、ヒートシンク26の中央部分へ向かうほど低く形成されている。   FIG. 2 is a perspective view of the heat sink of the semiconductor device according to the first embodiment of the present invention. The convex portion 26a is formed so as to surround the flat portion 26b. The convex portion 26 a is formed highest on the end face (side surface) of the heat sink 26, and is formed lower toward the center portion of the heat sink 26.

本発明の実施の形態1に係る半導体装置によれば、絶縁シート24の外周部分がヒートシンク26から剥離することを防止できる。すなわち、絶縁シート24の外周部分は凸部26aによりモールド樹脂30から保護されるため、モールド樹脂30から絶縁シート24の外周部分に大きな力が及ぼされることを回避できる。そのため、絶縁シート24の外周部分の応力を低く維持しその剥離を防止できる。   According to the semiconductor device according to the first embodiment of the present invention, it is possible to prevent the outer peripheral portion of the insulating sheet 24 from being peeled off from the heat sink 26. That is, since the outer peripheral portion of the insulating sheet 24 is protected from the mold resin 30 by the convex portion 26a, it is possible to avoid applying a large force from the mold resin 30 to the outer peripheral portion of the insulating sheet 24. Therefore, the stress at the outer peripheral portion of the insulating sheet 24 can be kept low and the peeling can be prevented.

本発明の実施の形態1に係る半導体装置10によれば、ヒートシンク26に凸部26aを形成するだけで、絶縁シート24の剥離を容易に防止できる。また、凸部26aには絶縁シート24が接着されており、凸部26aとフレーム12との間には絶縁シート24を介している。よって、凸部26aとフレーム12との絶縁距離を確保できる。   According to the semiconductor device 10 according to the first embodiment of the present invention, the insulating sheet 24 can be easily prevented from being peeled off simply by forming the convex portion 26 a on the heat sink 26. An insulating sheet 24 is bonded to the convex portion 26a, and the insulating sheet 24 is interposed between the convex portion 26a and the frame 12. Therefore, an insulation distance between the convex portion 26a and the frame 12 can be secured.

図3は、本発明の実施の形態1に係る半導体装置の変形例を示す断面図である。ヒートシンク40は凸部40aと平坦部40bを備えている。凸部40aは、ヒートシンク40の側面40cよりも外側に突出している。その他の構成は、上述した構成と同様である。   FIG. 3 is a cross-sectional view showing a modification of the semiconductor device according to the first embodiment of the present invention. The heat sink 40 includes a convex portion 40a and a flat portion 40b. The convex portion 40 a protrudes outward from the side surface 40 c of the heat sink 40. Other configurations are the same as those described above.

凸部40aを側面40cよりも外側に突出させると、凸部40aの先端をモールド樹脂に食い込ませることができる。これにより、絶縁シート42の外周部分近傍のモールド樹脂が固定され、モールド樹脂が絶縁シート42に及ぼす力を低減できる。よって絶縁シート42の剥離を防止できる。なお、この効果は、凸部40aの先端がモールド樹脂に食い込むように構成すれば得られるものである。よって、凸部40aが側面40cよりも外側に突出していなくてもよい。   When the convex portion 40a is projected outward from the side surface 40c, the tip of the convex portion 40a can be bitten into the mold resin. Thereby, the mold resin near the outer peripheral portion of the insulating sheet 42 is fixed, and the force exerted on the insulating sheet 42 by the mold resin can be reduced. Therefore, peeling of the insulating sheet 42 can be prevented. This effect can be obtained if the tip of the convex portion 40a is configured to bite into the mold resin. Therefore, the convex part 40a does not need to protrude outward from the side surface 40c.

ヒートシンクにより放熱する対象は、絶縁シートを介してヒートシンクに放熱する半導体素子であれば、ダイオード16やIGBT18に限定されない。   An object to be radiated by the heat sink is not limited to the diode 16 or the IGBT 18 as long as it is a semiconductor element that radiates heat to the heat sink via an insulating sheet.

モールド樹脂から絶縁シートの外周部分に及ぼされる力を緩和するために、絶縁シートの端部を面取り加工してもよい。図4は、絶縁シート44の端部を面取り加工したことを示す断面図である。絶縁シート44の端部に面取り加工を施すことで、モールド樹脂から力を受けづらくなる。なお絶縁シートの端部に面取り加工を施しかつ、モールド樹脂の凸部をモールド樹脂に食い込ませるようにしてもよい。   In order to relieve the force exerted on the outer peripheral portion of the insulating sheet from the mold resin, the end portion of the insulating sheet may be chamfered. FIG. 4 is a cross-sectional view showing that the end portion of the insulating sheet 44 is chamfered. By chamfering the end portion of the insulating sheet 44, it is difficult to receive force from the mold resin. The end portion of the insulating sheet may be chamfered and the convex portion of the mold resin may be bitten into the mold resin.

実施の形態2.
図5は、本発明の実施の形態2に係る半導体装置のうち、ヒートシンクと絶縁シートを示す断面図である。図5に示さない部分は実施の形態1と同様である。
Embodiment 2. FIG.
FIG. 5 is a cross-sectional view showing a heat sink and an insulating sheet in the semiconductor device according to Embodiment 2 of the present invention. Parts not shown in FIG. 5 are the same as those in the first embodiment.

ヒートシンク50に絶縁シート52が接着されている。絶縁シート52の外周部分52aは、ヒートシンク50に圧着している。図6は、本発明の実施の形態2に係る半導体装置の製造方法を示す図である。まず、下金型54にヒートシンク50と絶縁シート52をおく。次いで、上金型56を用いて絶縁シート52の外周部分をヒートシンク50に押し付け、絶縁シート52の外周部分をヒートシンク50に圧着する。   An insulating sheet 52 is bonded to the heat sink 50. An outer peripheral portion 52 a of the insulating sheet 52 is pressure-bonded to the heat sink 50. FIG. 6 shows a method for manufacturing a semiconductor device according to the second embodiment of the present invention. First, the heat sink 50 and the insulating sheet 52 are placed on the lower mold 54. Next, the outer peripheral portion of the insulating sheet 52 is pressed against the heat sink 50 using the upper mold 56, and the outer peripheral portion of the insulating sheet 52 is pressed against the heat sink 50.

本発明の実施の形態2に係る半導体装置によれば、絶縁シート52の外周部分52aがヒートシンク50に圧着されているので、絶縁シート52の剥離を防止できる。なお、本発明の実施の形態2に係る半導体装置は、少なくとも実施の形態1と同程度の変形が可能である。   According to the semiconductor device according to the second embodiment of the present invention, since the outer peripheral portion 52a of the insulating sheet 52 is pressure-bonded to the heat sink 50, peeling of the insulating sheet 52 can be prevented. Note that the semiconductor device according to the second embodiment of the present invention can be modified at least as much as the first embodiment.

実施の形態3.
図7は、本発明の実施の形態3に係る半導体装置のうち、ヒートシンクと絶縁シートを示す断面図である。図7に示さない部分は実施の形態1と同様である。
Embodiment 3 FIG.
FIG. 7 is a cross-sectional view showing a heat sink and an insulating sheet in the semiconductor device according to Embodiment 3 of the present invention. The parts not shown in FIG. 7 are the same as those in the first embodiment.

ヒートシンク60の外周部分には溝60aが形成されている。凸部60bはヒートシンク60の最外周に形成されている。絶縁シート62の外周部分は溝60aの内部に接着している。また、絶縁シート62の外周部分は凸部60bにも接着している。   A groove 60 a is formed in the outer peripheral portion of the heat sink 60. The convex portion 60 b is formed on the outermost periphery of the heat sink 60. The outer peripheral portion of the insulating sheet 62 is bonded to the inside of the groove 60a. The outer peripheral portion of the insulating sheet 62 is also bonded to the convex portion 60b.

本発明の実施の形態3に係る半導体装置によれば、絶縁シート62の外周部分がヒートシンク60の溝60aの内部に接着しているので、アンカー効果を得ることができる。よって絶縁シート62の外周部分の剥離を防止できる。さらに、凸部60bにより絶縁シート62をモールド樹脂から保護できるので、絶縁シート62の剥離防止の効果を高めることができる。   According to the semiconductor device according to the third embodiment of the present invention, since the outer peripheral portion of the insulating sheet 62 is bonded to the inside of the groove 60a of the heat sink 60, an anchor effect can be obtained. Therefore, peeling of the outer peripheral portion of the insulating sheet 62 can be prevented. Furthermore, since the insulating sheet 62 can be protected from the mold resin by the convex portions 60b, the effect of preventing the insulating sheet 62 from peeling off can be enhanced.

本発明の実施の形態3に係る半導体装置では、ヒートシンク60に溝60a及び凸部60bを形成したが本発明はこれに限定されず、例えば溝のみを備える構成としてもよい。なお、本発明の実施の形態3に係る半導体装置は、少なくとも実施の形態1と同程度の変形が可能である。   In the semiconductor device according to the third embodiment of the present invention, the groove 60a and the convex portion 60b are formed in the heat sink 60. However, the present invention is not limited to this, and may be configured to include only the groove, for example. Note that the semiconductor device according to the third embodiment of the present invention can be modified at least as much as the first embodiment.

本発明の実施の形態2及び3に係る半導体装置は、絶縁シートの外周部分を絶縁シートの中央部分よりもヒートシンクに強く接着したことを特徴とする。この特徴を逸脱しない範囲において様々な変形が可能である。   The semiconductor devices according to the second and third embodiments of the present invention are characterized in that the outer peripheral portion of the insulating sheet is more strongly bonded to the heat sink than the central portion of the insulating sheet. Various modifications are possible without departing from this feature.

10 半導体装置、 12 フレーム、 24 絶縁シート、 26 ヒートシンク、 26a 凸部、 26b 平坦部、 60 ヒートシンク、 60a 溝、 60b 凸部   10 semiconductor device, 12 frame, 24 insulating sheet, 26 heat sink, 26a convex part, 26b flat part, 60 heat sink, 60a groove, 60b convex part

Claims (5)

平坦部と前記平坦部を囲むように形成された凸部とを有するヒートシンクと、
フレームと、
下面が前記平坦部及び前記凸部に接着し、上面全体が前記フレームと接した絶縁シートと、
前記フレームの上面に固定された半導体素子と、
前記ヒートシンクの前記絶縁シートが接着した面と反対の面、及び前記フレームの一部を外部に露出するように、前記ヒートシンク、前記フレーム、前記絶縁シート、及び前記半導体素子を覆うモールド樹脂と、を備えたことを特徴とする半導体装置。
A heat sink having a flat portion and a convex portion formed so as to surround the flat portion;
Frame,
An insulating sheet having a lower surface adhered to the flat portion and the convex portion, and an entire upper surface contacting the frame;
A semiconductor element fixed to the upper surface of the frame;
A mold resin that covers the heat sink, the frame, the insulating sheet, and the semiconductor element so that the surface of the heat sink opposite to the surface to which the insulating sheet is bonded and a part of the frame are exposed to the outside. A semiconductor device comprising the semiconductor device.
前記凸部の先端は、尖った形状を有し、前記モールド樹脂に食い込むことを特徴とする請求項1に記載の半導体装置。   The semiconductor device according to claim 1, wherein a tip end of the convex portion has a sharp shape and bites into the mold resin. 前記絶縁シートの端部は面取り加工されたことを特徴とする請求項1又は2に記載の半導体装置。   The semiconductor device according to claim 1, wherein an end portion of the insulating sheet is chamfered. 前記凸部は、前記平坦部から前記ヒートシンクの側面に向かう斜面を有することで、前記ヒートシンクの側面において最も高く形成されたことを特徴とする請求項1又は3に記載の半導体装置。   4. The semiconductor device according to claim 1, wherein the convex portion has an inclined surface from the flat portion toward the side surface of the heat sink, and is formed highest on the side surface of the heat sink. 前記絶縁シートの厚さは、前記ヒートシンクの側面と前記フレームの間で最小になることを特徴とする請求項4に記載の半導体装置。   The semiconductor device according to claim 4, wherein a thickness of the insulating sheet is minimized between a side surface of the heat sink and the frame.
JP2011118909A 2011-05-27 2011-05-27 Semiconductor device Active JP5824874B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2011118909A JP5824874B2 (en) 2011-05-27 2011-05-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011118909A JP5824874B2 (en) 2011-05-27 2011-05-27 Semiconductor device

Publications (2)

Publication Number Publication Date
JP2012248660A JP2012248660A (en) 2012-12-13
JP5824874B2 true JP5824874B2 (en) 2015-12-02

Family

ID=47468861

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011118909A Active JP5824874B2 (en) 2011-05-27 2011-05-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JP5824874B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013062282A (en) * 2011-09-12 2013-04-04 Toyota Motor Corp Semiconductor device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10125826A (en) * 1996-10-24 1998-05-15 Hitachi Ltd Semiconductor device and manufacture thereof
JP2002009220A (en) * 2000-06-23 2002-01-11 Hitachi Ltd Resin-sealed semiconductor device
JP2008300379A (en) * 2007-05-29 2008-12-11 Sumitomo Electric Ind Ltd Power module
JP5001068B2 (en) * 2007-06-01 2012-08-15 三菱電機株式会社 Manufacturing method of heat dissipation member
JP5279632B2 (en) * 2009-06-25 2013-09-04 三菱電機株式会社 Semiconductor module

Also Published As

Publication number Publication date
JP2012248660A (en) 2012-12-13

Similar Documents

Publication Publication Date Title
US8866279B2 (en) Semiconductor device
JP6266168B2 (en) Semiconductor device
JP2015142077A (en) semiconductor device
JP2015142072A (en) semiconductor device
JP6424573B2 (en) Semiconductor device
JP6048238B2 (en) Electronic equipment
JP6602981B2 (en) Semiconductor device
JP2010199494A (en) Semiconductor device and manufacturing method of the same
JP6421549B2 (en) Power module
KR20110102199A (en) Semiconductor device and manufacturing method thereof
JP2018046057A (en) Semiconductor package
JP2016072354A (en) Power module
JP5824874B2 (en) Semiconductor device
JP6834815B2 (en) Semiconductor module
US9521756B2 (en) Power module package and method of fabricating the same
JP2015122453A (en) Power module
JP2010135459A (en) Semiconductor package and heat radiator
JP6048893B2 (en) Resin package
JP2006310609A (en) Semiconductor device
JP2012104542A (en) Lead frame for led light-emitting element, led package using the same and manufacturing method therefor
JP5796394B2 (en) Light emitting device
JP2010087442A (en) Semiconductor device, and method of manufacturing the same
JP2003007933A (en) Resin-sealing semiconductor device
JP6141120B2 (en) Semiconductor device
JP2009267045A (en) Ic chip, package, and semiconductor device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20130612

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20140416

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20140610

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140707

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20150407

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20150422

A911 Transfer to examiner for re-examination before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20150608

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20150915

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20150928

R150 Certificate of patent or registration of utility model

Ref document number: 5824874

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250