JP5812882B2 - Wiring board and electronic device - Google Patents

Wiring board and electronic device Download PDF

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JP5812882B2
JP5812882B2 JP2012011155A JP2012011155A JP5812882B2 JP 5812882 B2 JP5812882 B2 JP 5812882B2 JP 2012011155 A JP2012011155 A JP 2012011155A JP 2012011155 A JP2012011155 A JP 2012011155A JP 5812882 B2 JP5812882 B2 JP 5812882B2
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metal layer
metal
layer
metal plate
wiring board
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JP2013149912A (en
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浩二 早川
浩二 早川
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Kyocera Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

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Description

本発明は、電子部品が搭載される配線基板および電子装置に関するものである。   The present invention relates to a wiring board on which electronic components are mounted and an electronic apparatus.

パワーモジュールまたはスイッチングモジュール等の例えばIGBT(Insulated Gate Bipolar Transistor)などの電子部品が搭載された電子装置に用いられる配線基板として、セラミック基体に金属板が接合された配線基板が用いられる。金属板は、例えば銅(Cu)またはモリブデン(Mo)等を材料とする複数の金属層を、セラミック基体の厚み方向に積層して接着したクラッド材である(例えば、特許文献1を参照。)。クラッド材は、例えばCu−Mo−Cuの3層構造のものが知られており、Moの下部に位置する下部Cu層がセラミック基体に接合されており、Moの上部に位置する上部Cu層が電子部品の搭載領域または電子部品と電気的に接続される配線となる領域である。   A wiring board in which a metal plate is bonded to a ceramic base is used as a wiring board used in an electronic device in which an electronic component such as an IGBT (Insulated Gate Bipolar Transistor) such as a power module or a switching module is mounted. The metal plate is a clad material in which a plurality of metal layers made of, for example, copper (Cu) or molybdenum (Mo) are laminated and bonded in the thickness direction of the ceramic substrate (see, for example, Patent Document 1). . For example, a clad material having a three-layer structure of Cu-Mo-Cu is known, and a lower Cu layer located below Mo is bonded to a ceramic substrate, and an upper Cu layer located above Mo is formed. This is an area for mounting an electronic component or a wiring that is electrically connected to the electronic component.

特開2007−335795号公報Japanese Unexamined Patent Publication No. 2007-335795

上述の配線基板において、例えばCu−Mo−Cuの3層構造のクラッド材からなる金属板は、加熱または冷却されたときに、Mo層の膨張量または収縮量よりもCu層の膨張量または収縮量が大きい。また、下部Cu層はセラミック基に接合されていることによって、セラミック基に拘束されるので、下部Cu層の膨張量または収縮量よりも上部Cu層の膨張量または収縮量の方が大きい。したがって、上部Cu層が膨張または収縮すると、Mo層と下部Cu層とが上部Cu層に引っ張られるような内部応力が金属板に生じて、金属板が変形する。金属板が変形すると、金属板の変形に引っ張られるようにセラミック基体が反ることによって、配線基板が反る。
In the above wiring board, for example, when a metal plate made of a clad material having a three-layer structure of Cu—Mo—Cu is heated or cooled, the amount of expansion or contraction of the Cu layer is larger than the amount of expansion or contraction of the Mo layer. The amount is large. Further, by lower Cu layer which is joined to the ceramic base body, because it is bound to the ceramic base body, it is towards the expansion amount or shrinkage of the upper Cu layer than expansion amount or shrinkage of the lower Cu layer larger . Therefore, when the upper Cu layer expands or contracts, an internal stress is generated in the metal plate such that the Mo layer and the lower Cu layer are pulled by the upper Cu layer, and the metal plate is deformed. When the metal plate is deformed, the wiring board is warped by warping the ceramic base so as to be pulled by the deformation of the metal plate.

本発明の一つの態様による配線基板は、セラミック基体と、セラミック基体に接合されており、複数の第1の金属層と複数の第1の金属層の間に設けられ複数の第1の金属層
よりも熱膨張係数の小さい第2の金属層とを有する金属板とを備えている。複数の第1の金属層のうち上部金属層の厚みは下部金属層の厚みよりも小さく、かつ第2の金属層の厚み以上である
Wiring board according to one aspect of the present invention, the ceramic substrate and is bonded to a ceramic substrate, a plurality of first metal which is provided between the plurality of first metal layers and a plurality of first metal layer and a metal plate having a small thermal expansion coefficient the second metal layer than the layer. The thickness of the upper metal layer of the plurality of first metal layer is lower thickness of the metal layer rather smaller than, and equal to or greater than the thickness of the second metal layer.

本発明の他の態様によれば、電子装置は、上記構成の配線基板と、配線基板の金属板に搭載された電子部品とを備えている。
According to another aspect of the present invention, an electronic apparatus includes a wiring board having the above structure, the electronic components mounted on the metal plate of the wiring board.

本発明の一つの態様による配線基板は、複数の第1の金属層のうち、セラミック基に接合されていることによって拘束された下部金属層に比べて膨張または収縮しやすい上部金属層の厚みが、下部金属層の厚みよりも小さく、かつ第2の金属層の厚み以上である。このような構成とすることによって、上部金属層の膨張量または収縮量と下部金属層の膨張量または収縮量との差が低減されるので、下部金属層が上部金属層に引っ張られるような内部応力が低減される。したがって、上部金属層の収縮または膨張に伴う金属板の変形が低減されてセラミック基体の反りを低減し、配線基板の反りを低減できる。また、上部金属層に例えば銅等の熱伝導率の高い金属材料を用いたときに、金属板の熱伝導率を向上できるので、配線基板の放熱性を向上できる。
Wiring board according to one aspect of the present invention, among the plurality of first metal layer, the thickness of the expansion or contraction tends upper metal layer as compared with the lower metal layer that is constrained by being bonded to the ceramic matrix body but rather smaller than the thickness of the lower metal layer and equal to or more than the thickness of the second metal layer. By adopting such a configuration, the difference between the amount of expansion or contraction of the upper metal layer and the amount of expansion or contraction of the lower metal layer is reduced, so that the inner portion where the lower metal layer is pulled by the upper metal layer is reduced. Stress is reduced. Therefore, the deformation of the metal plate accompanying the contraction or expansion of the upper metal layer is reduced, the warpage of the ceramic substrate is reduced, and the warpage of the wiring board can be reduced. In addition, when a metal material having a high thermal conductivity such as copper is used for the upper metal layer, the thermal conductivity of the metal plate can be improved, so that the heat dissipation of the wiring board can be improved.

本発明の他の態様によれば、電子装置は、上記構成の配線基板と、配線基板の金属板に搭載された電子部品とを備えていることから、配線基板と電子部品との接合強度が高く、長期信頼性に優れたものとなる。
According to another aspect of the present invention, an electronic device includes a wiring board having the above structure, since it is provided with a mounting electronic components to a metal plate of the wiring board, the bonding strength between the wiring board and the electronic component High and excellent long-term reliability.

本発明の参考例の実施形態における電子装置の断面図である。It is sectional drawing of the electronic device in embodiment of the reference example of this invention. 図1のA部の拡大図である。It is an enlarged view of the A section of FIG. 本発明の実施形態における電子装置の金属板の断面図である。It is a cross-sectional view of the metal plate of the electronic device in the implementation of the invention.

以下、本発明の参考例の実施形態および例示的な実施形態について図面を参照して説明する。
DESCRIPTION OF EXEMPLARY EMBODIMENTS Embodiments of the present invention and exemplary embodiments will be described below with reference to the drawings.

参考例の実施形態)
図1および図2を参照して本発明の参考例の実施形態における電子装置について説明する。本実施形態における電子装置は、配線基板1と、配線基板1に搭載された電子部品2とを有している。なお、図1および図2において、電子装置は、仮想のxyz空間内に設けられて、xy平面上に載置されている。また、本実施形態における上方とは仮想のz軸の正方向のことである。また、配線基板1を冷却したときの金属板の収縮による内部応力を二点鎖の矢印で示す。
( Reference embodiment)
An electronic device according to an embodiment of a reference example of the present invention will be described with reference to FIGS. The electronic device in the present embodiment includes a wiring board 1 and an electronic component 2 mounted on the wiring board 1. 1 and 2, the electronic device is provided in a virtual xyz space and is placed on the xy plane. In the present embodiment, the upward direction is the positive direction of the virtual z axis. Also shows an internal stress due to shrinkage of the metal plate when the wiring substrate 1 was cooled by the arrow in double dot chain line.

配線基板1は、セラミック基体11と、セラミック基体11上に設けられた金属板12とを含んでいる。   The wiring board 1 includes a ceramic base 11 and a metal plate 12 provided on the ceramic base 11.

セラミック基体11は、略四角形状であり、金属板12を支持する支持部材として機能する。セラミック基体11は、電気絶縁材料からなり、例えば、酸化アルミニウム質セラミックス,ムライト質セラミックス,炭化ケイ素質セラミックス,窒化アルミニウム質セラミックス,または窒化ケイ素質セラミックス等のセラミックスからなる。これらセラミック材料の中では放熱性に影響する熱伝導性の点に関して、炭化ケイ素質セラミックス,窒化アルミニウム質セラミックス,または窒化ケイ素質セラミックスが好ましく、強度の点に関して、窒化ケイ素質セラミックスまたは炭化ケイ素質セラミックスが好ましい。セラミック基体11が窒化ケイ素質セラミックスのように比較的強度の高いセラミック材料からなる場合、より厚みの大きい金属板12を用いたとしてもセラミック基体11にクラックが入る可能性が低減されるので、小型化を図りつつより大きな電流を流すことができる配線基板1を実現することができる。   The ceramic substrate 11 has a substantially square shape and functions as a support member that supports the metal plate 12. The ceramic substrate 11 is made of an electrically insulating material, for example, ceramic such as aluminum oxide ceramics, mullite ceramics, silicon carbide ceramics, aluminum nitride ceramics, or silicon nitride ceramics. Among these ceramic materials, silicon carbide ceramics, aluminum nitride ceramics, or silicon nitride ceramics are preferred in terms of thermal conductivity that affects heat dissipation, and silicon nitride ceramics or silicon carbide ceramics in terms of strength. Is preferred. When the ceramic substrate 11 is made of a relatively strong ceramic material such as silicon nitride ceramics, the possibility of cracks in the ceramic substrate 11 is reduced even if a thicker metal plate 12 is used. Thus, it is possible to realize the wiring board 1 capable of allowing a larger current to flow while reducing the size.

セラミック基体11の厚みは、薄い方が熱伝導性の点ではよく、例えば約0.1mm〜1m
mであり、配線基板1の大きさまたは用いる材料の熱伝導率または強度に応じて選択すればよい。
The thickness of the ceramic substrate 11 may be smaller in terms of thermal conductivity, for example, about 0.1 mm to 1 m.
m, and may be selected according to the size of the wiring substrate 1 or the thermal conductivity or strength of the material used.

セラミック基体11は、例えば窒化ケイ素質セラミックスからなる場合であれば、窒化ケイ素,酸化アルミニウム,酸化マグネシウム,および酸化イットリウム等の原料粉末に適当な有機バインダー,可塑剤,および溶剤を添加混合し泥漿物に従来周知のドクターブレード法またはカレンダーロール法を採用することによってセラミックグリーンシート(セラミック生シート)を形成し、次にこのセラミックグリーンシートに適当な打ち抜き加工等を施して所定形状となすとともに、必要に応じて複数枚を積層して成形体となし、しかる後、これを窒化雰囲気等の非酸化性雰囲気にて1600〜2000℃の温度で焼成することによって製作される。
If the ceramic substrate 11 is made of, for example, silicon nitride ceramics, a slurry in which a suitable organic binder, plasticizer, and solvent are added to and mixed with raw material powders such as silicon nitride, aluminum oxide, magnesium oxide, and yttrium oxide. A ceramic green sheet (ceramic raw sheet) is formed by adopting a conventionally known doctor blade method or calendar roll method, and then a suitable punching process is applied to the ceramic green sheet to obtain a predetermined shape. If necessary, a plurality of sheets are laminated to form a molded body, and then, this is manufactured by firing at a temperature of 1600 to 2000 ° C. in a non-oxidizing atmosphere such as a nitriding atmosphere.

金属板12は、複数の第1の金属層121と複数の第1の金属層121の間に設けられ複数の第1の金属層121よりも熱膨張係数の小さい第2の金属層122とを含んでいる。本実施形態において金属板12は、2層の第1の金属層121の間に第2の金属層122が設けられた3層構造である。第1の金属層121と第2の金属層122は、セラミック基体11の厚み方向、すなわちz軸方向に積層されている。第1の金属層121は、図2に示すように、第2の金属層122の上方に設けられた上部金属層121aと、第2の金属層122の下方に設けられておりセラミック基体11に接合される面を有する下部金属層121bとを含んでいる。なお、下部金属層1
21bは、セラミック基体11に接合されているので、セラミック基体11によって収縮または膨張が抑制されている。また、図2はセラミック基体11の上面に設けられた金属板12を示しているが、下面に設けられた金属板12では構成が上下方向で逆になるので、セラミック基体11に接合されているのが下部金属層121bになる。
The metal plate 12 includes a plurality of first metal layers 121 and a second metal layer 122 having a smaller thermal expansion coefficient than the plurality of first metal layers 121 provided between the plurality of first metal layers 121. Is included. In this embodiment, the metal plate 12 has a three-layer structure in which a second metal layer 122 is provided between two first metal layers 121. The first metal layer 121 and the second metal layer 122 are laminated in the thickness direction of the ceramic base 11, that is, the z-axis direction. As shown in FIG. 2, the first metal layer 121 is provided above the second metal layer 122 and below the second metal layer 122. The first metal layer 121 is provided on the ceramic base 11. And a lower metal layer 121b having surfaces to be joined. Lower metal layer 1
Since 21b is joined to the ceramic substrate 11, shrinkage or expansion is suppressed by the ceramic substrate 11. FIG. 2 shows the metal plate 12 provided on the upper surface of the ceramic substrate 11. However, the metal plate 12 provided on the lower surface is reversely configured in the vertical direction, and is thus bonded to the ceramic substrate 11. Becomes the lower metal layer 121b.

金属板12は、セラミック基体11の少なくとも1つの主面(上面または下面)に取着され、金属板12上に搭載される電子部品2の発生する熱を放熱するための放熱板として機能する。   The metal plate 12 is attached to at least one main surface (upper surface or lower surface) of the ceramic substrate 11 and functions as a heat radiating plate for radiating heat generated by the electronic component 2 mounted on the metal plate 12.

金属板12の第1の金属層121は、放熱性の観点から、熱伝導率の高い金属材料が用いら
れ、例えば銅等の高熱伝導率の金属材料が好適に用いられる(銅の熱伝導率:395W/m
・K)。銅のインゴット(塊)に圧延加工法または打ち抜き加工法等の機械的加工、またはエッチング等の化学的加工のような金属加工法を施すことによって、例えば厚さが10〜300μmの平板状で所定パターンに形成される。
For the first metal layer 121 of the metal plate 12, a metal material having high thermal conductivity is used from the viewpoint of heat dissipation, and a metal material having high thermal conductivity such as copper is preferably used (heat conductivity of copper). : 395W / m
・ K). By applying a metal processing method such as mechanical processing such as rolling or punching or chemical processing such as etching to a copper ingot (lump), for example, a predetermined plate shape having a thickness of 10 to 300 μm Formed into a pattern.

金属板12の第2の金属層122は、金属板12の熱膨張を抑えるためのものであり、例えば
第1の金属層121が銅である場合には、銅よりも熱膨張係数の小さいモリブデン等の金属
材料を用いて、第1の金属層121と同様の方法で20〜300μmの厚みの平板状で所定パターンに形成される。
The second metal layer 122 of the metal plate 12 is for suppressing the thermal expansion of the metal plate 12. For example, when the first metal layer 121 is copper, molybdenum having a smaller thermal expansion coefficient than copper. By using the same metal material as that of the first metal layer 121, a flat plate having a thickness of 20 to 300 μm is formed in a predetermined pattern.

金属板12は、第1の金属層121と第2の金属層122とを重ねて形成される。具体的には、第1の金属層121のうち下部金属層121b上に第2の金属層122を重ねた後、第2の金属層122上に第1の金属層121のうち上部金属層121aを重ねて金属積層体を形成する。金属積層体は、圧延加工法または打ち抜き加工法等の機械的加工、またはエッチング等の化学的加工のような金属加工法を施すことによって、例えば厚さが0.05〜1mmの平板状で所定パターンに形成された金属板12となる。上部金属層121aの厚みD121aは下部金属層121b
の厚みD121bよりも小さく、下部金属層121bの厚みD121bが60〜90μmであれば、上
部金属層121aの厚みD121aは20〜40μmである。また、セラミック基体11の下面に金属板12が設けられる場合は、図1に示された例のように、金属板12はセラミック基体11の下面のほぼ全面に形成され、配線基板1に搭載された電子部品2の放熱性を高めるようにすることが好ましい。
The metal plate 12 is formed by overlapping a first metal layer 121 and a second metal layer 122. Specifically, after the second metal layer 122 is overlaid on the lower metal layer 121b of the first metal layer 121, the upper metal layer 121a of the first metal layer 121 is overlaid on the second metal layer 122. Are stacked to form a metal laminate. The metal laminate is formed into a predetermined pattern in a flat plate shape having a thickness of 0.05 to 1 mm, for example, by applying a metal processing method such as mechanical processing such as rolling or punching or chemical processing such as etching. The metal plate 12 is formed. The thickness D121a of the upper metal layer 121a is equal to the lower metal layer 121b.
If the thickness D121b of the lower metal layer 121b is 60 to 90 μm, the thickness D121a of the upper metal layer 121a is 20 to 40 μm. Further, when the metal plate 12 is provided on the lower surface of the ceramic substrate 11, the metal plate 12 is formed on almost the entire lower surface of the ceramic substrate 11 and mounted on the wiring board 1 as in the example shown in FIG. It is preferable to improve the heat dissipation of the electronic component 2.

上述の金属板12は、セラミック基体11に接合されて拘束された下部金属層121bに比べ
て膨張または収縮しやすい上部金属層121aの厚みD121aが、下部金属層121bの厚みD121bよりも小さい。このような構成であることから、上部金属層121aの収縮量または膨
張量と、下部金属層121bの収縮量または膨張量との差が低減されているので、上部金属
層121aの収縮または膨張による内部応力F121aと、下部金属層121bの収縮または膨張
による内部応力F121bとの差が低減される。例えば、上部金属層121aと下部金属層121
bとが収縮する場合であれば、図2に示された例のように、上部金属層121aの収縮によ
る内部応力F121aと、下部金属層121bの収縮による内部応力F121bとの差が低減され
る。したがって、下部金属層121bが上部金属層121aに引っ張られるような内部応力が低減されて、金属板12の変形を低減できる。
In the metal plate 12, the thickness D121a of the upper metal layer 121a that is easily expanded or contracted is smaller than the thickness D121b of the lower metal layer 121b, as compared with the lower metal layer 121b bonded and restrained to the ceramic substrate 11. Because of such a configuration, the difference between the amount of contraction or expansion of the upper metal layer 121a and the amount of contraction or expansion of the lower metal layer 121b is reduced, so that the upper metal layer 121a contracts or expands. The difference between the internal stress F121a and the internal stress F121b due to contraction or expansion of the lower metal layer 121b is reduced. For example, the upper metal layer 121a and the lower metal layer 121
2b, the difference between the internal stress F121a caused by the shrinkage of the upper metal layer 121a and the internal stress F121b caused by the shrinkage of the lower metal layer 121b is reduced as in the example shown in FIG. . Therefore, the internal stress that causes the lower metal layer 121b to be pulled by the upper metal layer 121a is reduced, and the deformation of the metal plate 12 can be reduced.

本実施形態において、上部金属層121aの厚みD121aが、第2の金属層122の厚みD122に対して小さくなると、上部金属層121aの内部応力F121aによる第2の金属層122の変
形を低減できる。特に、上部金属層121aの厚みD121aが第2の金属層122の厚みD122よりも小さいときには、上部金属層121aの収縮または膨張によって生じた内部応力F121aによる第2の金属層122の変形がより低減されて、金属板12の変形をさらに低減できる。
In the present embodiment, when the thickness D121a of the upper metal layer 121a is smaller than the thickness D122 of the second metal layer 122 , deformation of the second metal layer 122 due to the internal stress F121a of the upper metal layer 121a can be reduced. In particular, when the thickness D121a of the upper metal layer 121a is smaller than the thickness D122 of the second metal layer 122, the deformation of the second metal layer 122 due to the internal stress F121a caused by the shrinkage or expansion of the upper metal layer 121a is further reduced. Thus, the deformation of the metal plate 12 can be further reduced.

第1の金属層121の材料が銅である場合には、下部金属層121bに用いられる銅は、無酸素銅であることが好ましい。無酸素銅を用いると、金属板12とセラミック基体11とを接合する際に、銅の表面が銅中に存在する酸素によって酸化されることが低減されるとともに、接合材との濡れ性が良好となるので、金属板12とセラミック基体11との接合強度が向上る。
When the material of the first metal layer 121 is copper, the copper used for the lower metal layer 121b is preferably oxygen-free copper. When oxygen-free copper is used, when the metal plate 12 and the ceramic substrate 11 are joined, the copper surface is reduced from being oxidized by oxygen present in the copper, and the wettability with the joining material 3 is reduced. since the better, it increases the bonding strength between the metal plate 12 and the ceramic substrate 11.

なお、金属板12は、銅−モリブデン−銅−モリブデン−銅の5層構造または銅−モリブデン−銅−モリブデン−銅−モリブデン−銅の7層構造であってもよい。このように金属板12が5層構造または7層構造の場合には、上部金属層121aは金属板12の最も上方に位
置する。
The metal plate 12 may have a five-layer structure of copper-molybdenum-copper-molybdenum-copper or a seven-layer structure of copper-molybdenum-copper-molybdenum-copper-molybdenum-copper. Thus, when the metal plate 12 has a five-layer structure or a seven-layer structure, the upper metal layer 121a is positioned at the uppermost position of the metal plate 12 .

金属板12をセラミック基体11に接合した後に、金属板12をエッチングによって金属板12の所定パターン形状に加工する場合は、例えば以下のように加工する。セラミック基体11の上に接合された金属板12の表面にエッチングレジストインクをスクリーン印刷法等の技術を用いて所定パターン形状に印刷塗布してレジスト膜を形成した後、例えばリン酸、酢酸、硝酸、過酸化水素水、硫酸、ふっ酸、塩化第2鉄、塩化第2銅溶液等を単体もしくは混合したエッチング液に浸漬したり、エッチング液を吹き付けたりして金属板12の所定パターン以外の部分を除去し、その後にレジスト膜を除去すればよい。
When the metal plate 12 is processed into a predetermined pattern shape of the metal plate 12 by etching after the metal plate 12 is bonded to the ceramic base 11, for example, the processing is performed as follows. An etching resist ink is printed and applied in a predetermined pattern shape on the surface of the metal plate 12 bonded on the ceramic substrate 11 using a technique such as a screen printing method to form a resist film, and then, for example, phosphoric acid, acetic acid, nitric acid , hydrogen peroxide, sulfuric acid, hydrofluoric acid, ferric chloride, or by immersing the second copper solution and the like chloride alone or mixed etching solution, and or spraying an etching solution, other than the predetermined pattern of the metal plate 12 What is necessary is just to remove a part and to remove a resist film after that.

なお、セラミック基体11に接合された金属板12に導電性が高くかつ耐蝕性およびろう材との濡れ性が良好な金属をめっき法により被着させておくと、金属板12と外部電気回路(図示せず)との電気的接続を良好なものとすることができる。この場合は、内部に燐を8〜15質量%含有させてニッケル−燐のアモルファス合金としておくと、ニッケルからなるめっき層の表面酸化を抑制してろう材との濡れ性等を長く維持することができるので好ましい。ニッケルに対する燐の含有量が8質量%以上15質量%以下であると、ニッケル−燐のアモルファス合金を形成しやすくなってめっき層に対する半田の接着強度を向上させることができる。このニッケルからなるめっき層は、その厚みが1.5μm以上であると、金
属板12の露出した表面を被覆しやすく、金属板12の酸化腐蝕を抑制することができる。また、10μm以下であると、特にセラミック基体11の厚さが300μm未満の薄いものになっ
た場合には、めっき層の内部に内在する内在応力を低減させることができ、金属板12に生じる反り、およびそれによって生じるセラミック基体11の反りまたは割れ等を抑制することができる。
If a metal having high conductivity, corrosion resistance and good wettability with the brazing material is deposited on the metal plate 12 bonded to the ceramic substrate 11 by a plating method, the metal plate 12 and an external electric circuit ( It is possible to improve the electrical connection with the device (not shown). In this case, if an amorphous alloy of nickel-phosphorus is prepared by containing phosphorus in an amount of 8 to 15% by mass, the surface oxidation of the plating layer made of nickel is suppressed and the wettability with the brazing material is maintained for a long time. Is preferable. When the phosphorus content relative to nickel is 8% by mass or more and 15% by mass or less, it is easy to form an amorphous alloy of nickel-phosphorus, and the adhesive strength of the solder to the plating layer can be improved. If the plating layer made of nickel has a thickness of 1.5 μm or more, the exposed surface of the metal plate 12 can be easily covered, and oxidative corrosion of the metal plate 12 can be suppressed. Further, when the thickness is 10 μm or less, particularly when the thickness of the ceramic substrate 11 is less than 300 μm, the internal stress existing in the plating layer can be reduced, and the warpage generated in the metal plate 12 is reduced. Further, warping or cracking of the ceramic substrate 11 caused thereby can be suppressed.

金属板12は、接合金属層等の接合材を介してセラミック基体11に接合される。接合材用のろう材ペーストは、例えば銀および銅粉末,銀−銅合金粉末,またはこれらの混合粉末からなる銀ろう材(例えば、銀:72質量%−銅:28質量%)粉末に、チタン,ハフニウム,ジルコニウムまたはその水素化物等の活性金属を銀ろう材に対して2〜5質量%添加混合し、適当なバインダーと有機溶剤および溶媒とを添加混合し、混練することによって製作される。銀ろう材の接合温度は780℃〜900℃であり、接合温度または接合材3の硬度を低下させる目的でインジウム(In)またはスズ(Sn)を1〜10質量%程度添加しても良い。   The metal plate 12 is bonded to the ceramic base 11 via a bonding material such as a bonding metal layer. The brazing paste for the bonding material is, for example, a silver brazing material (for example, silver: 72% by mass—copper: 28% by mass) made of silver and copper powder, silver-copper alloy powder, or a mixed powder thereof, and titanium. , Hafnium, zirconium or a hydride thereof is added to and mixed with 2 to 5% by mass of the silver brazing material, an appropriate binder, an organic solvent and a solvent are added and mixed, and then kneaded. The joining temperature of the silver brazing material is 780 ° C. to 900 ° C., and indium (In) or tin (Sn) may be added in an amount of about 1 to 10% by mass for the purpose of reducing the joining temperature or the hardness of the joining material 3.

このような配線基板1の上面にダイボンド材4を介して電子部品2を搭載し、電子部品2を複数のボンディングワイヤ5によって金属板12に電気的に接続して電子装置を構成するものとなる。なお、ダイボンド材4は、例えば、金属接合材または導電性樹脂からなる。このような金属接合材は、例えば、半田、金−スズ(Au−Sn)合金、またはスズ−銀−銅(Sn−Ag−Cu)合金等である。電子部品2は、例えば、トランジスタ、CPU(Central Processing Unit)用のLSI(Large Scale Integrated circuit)、IGBT(Insulated Gate Bipolar Transistor)、またはMOS−FET(Metal O
xide Semiconductor - Field Effect Transistor)等の半導体素子である。
An electronic component 2 is mounted on the upper surface of such a wiring board 1 via a die bonding material 4, and the electronic component 2 is electrically connected to a metal plate 12 by a plurality of bonding wires 5 to constitute an electronic device. . The die bond material 4 is made of, for example, a metal bonding material or a conductive resin. Such a metal bonding material is, for example, solder, a gold-tin (Au—Sn) alloy, a tin-silver-copper (Sn—Ag—Cu) alloy, or the like. The electronic component 2 is, for example, a transistor, an LSI (Large Scale Integrated circuit) for a CPU (Central Processing Unit), an IGBT (Insulated Gate Bipolar Transistor), or a MOS-FET (Metal O).
xide Semiconductor-Field Effect Transistor).

本実施形態の配線基板1は、セラミック基体11と、セラミック基体11に接合されており、複数の第1の金属層121と複数の第1の金属層121の間に設けられ複数の第1の金属層121よりも熱膨張係数の小さい第2の金属層122とを有する金属板12とを有している。複数の第1の金属層121のうち、セラミック基11に接合されていることによって拘束された
下部金属層121bに比べて膨張または収縮しやすい上部金属層121aの厚みD121aが下部
金属層121bの厚みD121bよりも小さい。このような構成とすることによって、上部金属層121aの膨張量または収縮量と下部金属層121bの膨張量または収縮量との差が低減されるので、下部金属層121bが上部金属層121aに引っ張られるような内部応力が低減される。したがって、上部金属層121aの収縮または膨張に伴う金属板12の変形が低減されてセ
ラミック基体11の反りを低減し、配線基板1の反りを低減できる。
Wiring board 1 of this embodiment includes a ceramic substrate 11 is joined to the ceramic base 11, a plurality of first provided between the plurality of first metal layer 121 and a plurality of first metal layer 121 And a metal plate 12 having a second metal layer 122 having a smaller coefficient of thermal expansion than the metal layer 121. Among the plurality of first metal layer 121, the thickness D121a of expansion or contraction tends upper metal layer 121a than the lower metal layer 121b constrained by being joined to the ceramic base body 11 of the lower metal layer 121b It is smaller than the thickness D121b. With such a configuration, the difference between the expansion amount or contraction amount of the upper metal layer 121a and the expansion amount or contraction amount of the lower metal layer 121b is reduced, so that the lower metal layer 121b is pulled to the upper metal layer 121a. The internal stress is reduced. Therefore, the deformation of the metal plate 12 due to the contraction or expansion of the upper metal layer 121a is reduced, the warp of the ceramic base 11 is reduced, and the warp of the wiring board 1 can be reduced.

また、本実施形態の配線基板1において、上部金属層121aの厚みD121aが、第2の金属層122の厚みD122に対して小さくなると、上部金属層121aの内部応力F121aによる第2の金属層122の変形を低減できる。特に、上部金属層121aの厚みD121aが第2の金属
層122の厚みD122よりも小さいときには、上部金属層121aの収縮または膨張に伴う第2
の金属層122の変形がより低減されるので、金属板12の変形がさらに低減される。
In the wiring board 1 of the present embodiment, when the thickness D121a of the upper metal layer 121a is smaller than the thickness D122 of the second metal layer 122, the second metal layer 122 due to the internal stress F121a of the upper metal layer 121a. Can be reduced. In particular, when the thickness D121a of the upper metal layer 121a is smaller than the thickness D122 of the second metal layer 122, the second metal layer 121a is contracted or expanded due to the second metal layer 121a.
Since the deformation of the metal layer 122 is further reduced, the deformation of the metal plate 12 is further reduced.

本実施形態の電子装置は、上記構成の配線基板1と、配線基板1の金属板12に搭載された電子部品2とを含んでいることから、配線基板1と電子部品2との接合強度が高く、長期信頼性に優れたものとできる。   Since the electronic device according to the present embodiment includes the wiring board 1 having the above-described configuration and the electronic component 2 mounted on the metal plate 12 of the wiring board 1, the bonding strength between the wiring board 1 and the electronic component 2 is high. High and long-term reliability.

本発明の実施形態)
次に、本発明の実施形態による電子装置について図3を参照しつつ説明する。
(Embodiment of the present invention )
Next, it will be described with reference to FIG. 3 for an electronic device according to the implementation embodiments of the present invention.

本発明の実施形態における電子装置において、上記した参考例の実施形態の電子装置と異なる点は、図3に示された例のように、上部金属層121aの厚みD121aが第2の金属層122の厚みD122以上である点である。なお、金属板12の厚みは上記した参考例の実施形態の電子装置と同じである。本実施形態の配線基板1は、上部金属層121aに例えば銅等の
熱伝導率の高い金属材料を用いたときに、金属板12の熱伝導率を向上できるので、配線基板1の放熱性を向上できる。
The electronic device in the implementation form of the present invention is different from the electronic apparatus of an embodiment of the reference example described above, as in the example shown in FIG. 3, the thickness D121a of the upper metal layer 121a and the second metal layer This is the point that the thickness D122 is 122 or more. The thickness of the metal plate 12 is the same as that of the electronic device according to the embodiment of the reference example described above. The wiring board 1 of this embodiment can improve the thermal conductivity of the metal plate 12 when a metal material having a high thermal conductivity such as copper is used for the upper metal layer 121a. It can be improved.

1・・・・配線基板
11・・・・セラミック基体
12・・・・金属板
121 ・・・第1の金属層
121a ・・上部金属層
121b ・・下部金属層
122 ・・・第2の金属層
2・・・・電子部品
3・・・・接合材
4・・・・ダイボンド材
5・・・・ボンディングワイヤ
1 ... Wiring board
11. ・ Ceramic substrate
12 ... Metal plate
121 ・ ・ ・ First metal layer
121a ..Upper metal layer
121b ..Lower metal layer
122 ... 2nd metal layer 2 ... Electronic parts 3 ... Bonding material 4 ... Die bonding material 5 ... Bonding wire

Claims (2)

セラミック基体と、
該セラミック基体に接合されており、複数の第1の金属層と該複数の第1の金属層の間に設けられ前記複数の第1の金属層よりも熱膨張係数の小さい第2の金属層とを有する金属板とを備えており、
前記複数の第1の金属層のうち上部金属層の厚みが下部金属層の厚みよりも小さく、かつ前記第2の金属層の厚み以上であることを特徴とする配線基板。
A ceramic substrate;
It is bonded to the ceramic substrate, a small second metal of said plurality of coefficient of thermal expansion than the first metallic layer provided between the plurality of first metal layer and the plurality of first metal layers And a metal plate having a layer,
Wiring board, wherein the thickness of the top metal layer of the plurality of first metal layer is rather smaller than the thickness of the lower metal layer and equal to or more than the thickness of the second metal layer.
請求項1記載の配線基板と、該配線基板の前記金属板に搭載された電子部品とを備えていることを特徴とする電子装置。   An electronic device comprising: the wiring board according to claim 1; and an electronic component mounted on the metal plate of the wiring board.
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