JP5800565B2 - データ転送装置及びデータ転送方法 - Google Patents
データ転送装置及びデータ転送方法 Download PDFInfo
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- JP5800565B2 JP5800565B2 JP2011106403A JP2011106403A JP5800565B2 JP 5800565 B2 JP5800565 B2 JP 5800565B2 JP 2011106403 A JP2011106403 A JP 2011106403A JP 2011106403 A JP2011106403 A JP 2011106403A JP 5800565 B2 JP5800565 B2 JP 5800565B2
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Information Transfer Systems (AREA)
- Communication Control (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011106403A JP5800565B2 (ja) | 2011-05-11 | 2011-05-11 | データ転送装置及びデータ転送方法 |
| US13/465,712 US8769166B2 (en) | 2011-05-11 | 2012-05-07 | Data transfer apparatus and data transfer method |
| EP12167363.6A EP2523118B1 (en) | 2011-05-11 | 2012-05-09 | Data transfer apparatus and data transfer method |
| CN201210146271.9A CN102981988B (zh) | 2011-05-11 | 2012-05-11 | 数据传送设备和数据传送方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011106403A JP5800565B2 (ja) | 2011-05-11 | 2011-05-11 | データ転送装置及びデータ転送方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2012238158A JP2012238158A (ja) | 2012-12-06 |
| JP2012238158A5 JP2012238158A5 (cg-RX-API-DMAC7.html) | 2014-06-26 |
| JP5800565B2 true JP5800565B2 (ja) | 2015-10-28 |
Family
ID=46146659
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011106403A Active JP5800565B2 (ja) | 2011-05-11 | 2011-05-11 | データ転送装置及びデータ転送方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US8769166B2 (cg-RX-API-DMAC7.html) |
| EP (1) | EP2523118B1 (cg-RX-API-DMAC7.html) |
| JP (1) | JP5800565B2 (cg-RX-API-DMAC7.html) |
| CN (1) | CN102981988B (cg-RX-API-DMAC7.html) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10505837B1 (en) * | 2013-07-09 | 2019-12-10 | Altera Corporation | Method and apparatus for data re-packing for link optimization |
| US9823864B2 (en) | 2014-06-02 | 2017-11-21 | Micron Technology, Inc. | Systems and methods for throttling packet transmission in a scalable memory system protocol |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2545936B2 (ja) * | 1988-07-18 | 1996-10-23 | 日本電気株式会社 | バスインターフェースユニット |
| US5519839A (en) * | 1992-10-02 | 1996-05-21 | Compaq Computer Corp. | Double buffering operations between the memory bus and the expansion bus of a computer system |
| JPH11102341A (ja) * | 1997-09-29 | 1999-04-13 | Nec Eng Ltd | データ転送システム、データ送信装置、データ受信装置、データ転送方法及びバス調停方法 |
| JP2002278924A (ja) | 2001-03-19 | 2002-09-27 | Oki Electric Ind Co Ltd | データの転送制御システム,転送制御方法およびそのプログラム |
| WO2003036879A1 (de) * | 2001-10-17 | 2003-05-01 | Siemens Aktiengesellschaft | Teilnehmergerät für ein hochperformantes kommunikationssystem |
| EP1367763A1 (de) * | 2002-05-31 | 2003-12-03 | Alcatel | Verfahren der asynchronen Datenpaketübertragung sowie zugehörige Sender und Empfänger |
| US20050034045A1 (en) * | 2003-08-08 | 2005-02-10 | Lueck Andrew W. | System for optimizing PCI-Express communications |
| US20050237329A1 (en) * | 2004-04-27 | 2005-10-27 | Nvidia Corporation | GPU rendering to system memory |
| JP2007265108A (ja) * | 2006-03-29 | 2007-10-11 | Fujitsu Ltd | バスブリッジ |
| US20100191814A1 (en) * | 2008-12-23 | 2010-07-29 | Marco Heddes | System-On-A-Chip Employing A Network Of Nodes That Utilize Receive Side Flow Control Over Channels For Messages Communicated Therebetween |
| JP2010238150A (ja) * | 2009-03-31 | 2010-10-21 | Toshiba Corp | PCIExpress通信システム、及びその通信方法 |
-
2011
- 2011-05-11 JP JP2011106403A patent/JP5800565B2/ja active Active
-
2012
- 2012-05-07 US US13/465,712 patent/US8769166B2/en active Active
- 2012-05-09 EP EP12167363.6A patent/EP2523118B1/en active Active
- 2012-05-11 CN CN201210146271.9A patent/CN102981988B/zh active Active
Also Published As
| Publication number | Publication date |
|---|---|
| JP2012238158A (ja) | 2012-12-06 |
| CN102981988A (zh) | 2013-03-20 |
| EP2523118B1 (en) | 2015-04-08 |
| EP2523118A2 (en) | 2012-11-14 |
| CN102981988B (zh) | 2015-09-09 |
| US8769166B2 (en) | 2014-07-01 |
| US20120290746A1 (en) | 2012-11-15 |
| EP2523118A3 (en) | 2013-07-31 |
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