JP5780392B2 - Waveform display circuit - Google Patents

Description

  The present invention relates to a waveform display circuit for displaying a waveform.

  A waveform display circuit is used for observing waveforms such as voltage and current changing on the time axis. Values such as voltage and current measured by an oscilloscope or the like are input to the waveform display circuit over time. Then, waveforms such as voltage and current are stored in the VRAM as image data. The image data stored in the VRAM is displayed on an appropriate display device (for example, a display). An example of a technique for displaying waveform image data stored in a VRAM is disclosed in Patent Document 1.

  FIG. 4 shows an example of a conventional waveform display circuit. The waveform display circuit 101 includes a waveform data conversion unit 102, an image data write control unit 103, a VRAM arbiter 104, a VRAM 105, and an image data read control unit 106.

  The waveform data conversion unit 102 inputs waveform data from an external oscilloscope or the like. The waveform data is a waveform value on the time axis, and has a minimum value and a maximum value at each time. FIG. 5 shows an example of waveform data, where the X-axis direction indicates the time axis and the Y-axis direction indicates the waveform value. For the time “0”, the waveform data has a minimum value and a maximum value, and for the time “1”, the waveform data has a minimum value and a maximum value.

  The waveform data conversion unit 102 forms an interpolation line by connecting the minimum value and the maximum value of the waveform data at each time. Accordingly, an interpolation line in the Y-axis direction is formed at each time. A waveform is drawn by forming an interpolation line for each time. The drawn waveform is generated as image data. At this time, the waveform data conversion unit 102 generates image data by coloring the drawn waveform.

  The image data write control unit 103 writes the image data generated by the waveform data conversion unit 102 to the VRAM 105 via the VRAM arbiter 104. The VRAM 105 is a DDR memory, and has a column address and a row address. The column address corresponds to the X-axis direction in FIG. 5, and the row address corresponds to the Y-axis direction. Image data is written in a storage area specified by a column address and a row address.

  The image data written in the VRAM 105 is read by the image data read control unit 106 via the VRAM arbiter 104. Then, the read image data is displayed on an appropriate display device (display or the like).

  6A) shows image data written to the VRAM 105, and FIG. 6B) shows image data read from the VRAM 105. The image data is waveform data drawn by forming an interpolation line from the minimum value to the maximum value at each time on the time axis.

  The column address of the VRAM 105 indicates the time axis (X axis) of the waveform data, and the row address indicates the waveform value (interpolation line from the minimum value to the maximum value) input for each time. Therefore, image data is formed by forming interpolation lines in the row address direction in order from column address zero.

  On the other hand, the VRAM 105 is a DDR memory, and can perform burst access for reading and writing a plurality of data at once in the column address direction. Thereby, the reading speed and the writing speed can be increased. Therefore, when writing image data into the VRAM 105 as shown in FIG. 6A), when reading image data from the VRAM 105 as shown in FIG. 6B), burst write and burst read are performed in the column address direction.

JP 2011-85408 A

  As described above, the waveform data is the waveform value for each time (from the minimum value to the maximum value), and the waveform value is acquired for each time. Accordingly, the value of the “0” th waveform is first acquired to form an interpolation line, and then the value of the “1” th waveform is acquired to form an interpolation line.

  On the other hand, since the VRAM 105 is a DDR memory, burst access is performed, but the direction is not the row address direction but the column address direction. Therefore, when the image data write control unit 103 writes image data to the VRAM 105, burst write is performed in the column address direction. However, since waveform data is acquired every time, a mask is used to mask unnecessary column addresses when performing burst write. To write image data.

  FIG. 7 shows this state, in which burst write for four columns is performed in the column address direction. Based on the waveform data acquired first, the image data is written only in the column address “0”. That is, masking is performed so that data is not written between column addresses “1” to “3”, and image data is written to a column address “0”.

  As a result, for column address “0”, image data (interpolation line) is sequentially written from “0” to the last row address “n (n is an integer)” in the row address direction. Thereafter, when the interpolation lines of the column addresses “1”, “2”, and “3” are written, masking is performed so that data is not written to other column addresses. By repeating this process, the image data is stored in the VRAM 105.

  The VRAM 105 can read and write a plurality of data at once by performing burst access, but the burst access direction is the column address direction (that is, the time axis direction). Since waveform data is sequentially input every time, burst writing cannot be performed in the time axis direction. For this reason, when storing image data in the VRAM 105, other column addresses are masked.

  Therefore, the VRAM 105 can increase the writing speed by performing burst write. However, since the burst write direction is the column address direction (time axis direction), the column address other than the write time is used. The mask must be masked to write. For this reason, useless access to the same address occurs. Therefore, the effect of speeding up by burst writing cannot be obtained, and the overall processing speed is slowed down.

  Accordingly, an object of the present invention is to write data for displaying a waveform into a VRAM at high speed.

  In order to solve the above problems, the waveform display circuit of the present invention inputs waveform data having a minimum value and a maximum value as waveform values on the time axis, and outputs the coordinates of the time axis and the values of the waveform. A conversion unit that exchanges coordinates, a column address and a row address, a storage unit that burst-writes the waveform values exchanged by the conversion unit in the direction of the column address, and the storage unit An arithmetic unit that performs an operation of rotating the image data of the waveform by 90 degrees.

  According to this waveform display circuit, the coordinate between the time axis and the waveform value is exchanged by the conversion unit. Thereby, the column address direction of the storage unit and the axis of the waveform value can be matched, and burst write can be performed. Accordingly, the image data can be stored in the storage unit at high speed. And the image data memorize | stored in a memory | storage part can be returned and displayed to an original waveform by rotating 90 degree | times by a calculating part.

  Further, the calculation unit reads the number of data that can be burst read from the data stored in the column address, and performs a calculation that rotates 90 degrees.

  The number of data that can be calculated at one time by the calculation unit is matched with the number of data that can be read from the storage unit by one burst read. As a result, useless reads can be eliminated and the processing speed can be increased.

  According to the present invention, a plurality of pieces of data can be burst-written in the column address direction of the storage unit by performing a conversion in which the time axis and the waveform value axis are switched. Thereby, the time memorize | stored in a memory | storage part can be shortened, and waveform display can be sped up. Further, the original waveform can be displayed by being rotated 90 degrees by the calculation unit.

It is a block diagram of the waveform display circuit of an embodiment. It is a figure explaining conversion to waveform data and access to VRAM. It is a figure explaining an example of matrix calculation. It is a block diagram of the conventional waveform display circuit. It is a figure explaining waveform data. It is a figure explaining the access with respect to the conventional VRAM. It is a figure which shows an example of the writing of the image data with respect to VRAM.

  Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a waveform display circuit 1 of this embodiment. The waveform display circuit 1 is a graphic controller and displays waveform data (waveform data) output from a measuring instrument such as an oscilloscope on a display device (display or the like) not shown.

  The waveform display circuit 1 includes a waveform data converter 2, an image data write controller 3, a VRAM arbiter 4, a VRAM 5, an image data matrix converter 6, and an image data read controller 7. The waveform data conversion unit 2 is a conversion unit that inputs waveform data output from a measuring instrument such as an external oscilloscope and converts it into image data. The waveform data indicates values such as current and voltage on the time axis, and has a minimum value and a maximum value in one time.

  As waveform data, the horizontal axis (X axis) is the time axis direction, and the vertical axis (Y axis) is the waveform value (minimum value to maximum value). The waveform data conversion unit 2 performs coordinate conversion in which the X-axis coordinate and the Y-axis coordinate are exchanged. Therefore, the Y-axis direction is the time-axis direction, and the X-axis direction is the waveform value.

  Then, the waveform data converter 2 forms an interpolation line by connecting the minimum value to the maximum value of the waveform value in the X-axis direction with a straight line. This interpolation line indicates a section from the minimum value to the maximum value of values such as current and voltage. One waveform is drawn by sequentially forming interpolation lines in the time axis (Y-axis) direction. As this waveform, for example, there is a waveform shown in FIG.

  When the waveform data converter 2 forms an interpolation line, the interpolation line is colored. The displayed waveform is not limited to one, and a plurality of waveforms may be displayed. For example, when displaying waveforms measured on different channels of the oscilloscope at the same time, or displaying waveforms measured at different timings simultaneously, each waveform is given a different color. Thereby, each waveform can be visually recognized.

  The waveform data conversion unit 2 inputs waveform data in time order to form an interpolation line. As a result, the waveform data becomes image data. The image data writing control unit 3 stores this image data in the VRAM 5. The image data is written through the VRAM arbiter 4.

  The VRAM 5 is a storage unit that stores data in a storage area specified by a column address and a row address. For example, a DDR memory can be applied to the VRAM 5. The column address corresponds to the X axis, and the row address corresponds to the Y axis. The VRAM 5 can perform burst access in the column address direction. As a result, a plurality of data can be collectively read and written in the column address direction.

  The image data matrix conversion unit 6 is a calculation unit that performs a matrix calculation for exchanging the X-axis coordinates and the Y-axis coordinates of the image data read from the VRAM 5 by the VRAM arbiter 4. The result of the matrix operation performed by the image data matrix converter 6 is stored again in the VRAM 5 by the VRAM arbiter 4.

  The image data read control unit 7 reads image data stored in the VRAM 5. Reading is performed on the image data after the matrix calculation is performed by the image data matrix conversion unit 6. Then, the read image data is output to appropriate display means (display or the like). Thereby, the image data is displayed on the display means.

  The above is the configuration. Next, the operation will be described. A measuring instrument such as an oscilloscope outputs values on the time axis such as measured current and voltage as waveform data. This waveform data is input to the waveform display circuit 1. Since the waveform value (current, voltage, etc.) is output from the measuring device over time, the waveform display circuit 1 inputs waveform data every time.

  Waveform data is sequentially input to the waveform data converter 2. In the waveform data, the X axis is the time axis, and the Y axis is the waveform value (from the minimum value to the maximum value), and the waveform data conversion unit 2 interchanges the coordinates of the X axis and the Y axis. As a result, the time axis becomes the Y axis and the waveform value becomes the X axis. That is, the waveform data is rotated 90 degrees.

  The waveform data conversion unit 2 forms an interpolation line by connecting straight lines from the minimum value to the maximum value of the waveform in the X-axis direction. A color is added to the interpolation line. Thereby, image data is drawn. However, this image data is image data at one point on the time axis (Y axis).

  Waveform data is sequentially input to the waveform data converter 2. The waveform data conversion unit 2 interchanges the X-axis coordinates and the Y-axis coordinates of the sequentially input waveform data to form an interpolation line in the X-axis direction. By performing this process for all waveform data, one waveform is drawn.

  The image data write controller 3 writes the image data converted from the waveform data by the waveform data converter 2 into the VRAM 5. The image data is written through the VRAM arbiter 4. The VRAM 5 has a column address in the X-axis direction and a row address in the Y-axis direction, and performs burst access in which a plurality of data can be collectively read and written in the column address direction (that is, the X-axis direction).

  Here, it is assumed that burst write is performed in which data for four addresses is written in a lump in the X-axis direction. FIG. 2a) shows the order in which the image data is written into the VRAM 5. Since the waveform data conversion unit 2 can replace the X-axis coordinate and the Y-axis coordinate, image data in which an interpolation line is formed in the X-axis direction is input to the image data write control unit 3.

  First, for the row address “0” in the Y-axis (time axis) direction, burst write of data from “0” to “3” is performed in the X-axis (column address) direction. Next, burst write from “4” to “7” is performed in the X-axis direction. Here, it is assumed that the VRAM 5 has 16 (0 to 15) addresses in the row address direction and 16 (0 to 15) addresses in the column address direction. Therefore, the first time “0” image data is written into the VRAM 5 by performing burst write four times. This includes an interpolation line.

  The column address direction (X-axis direction) for performing burst write is the direction of the axis indicating the waveform value. Since the waveform data of the first time “0” can be acquired at a time, burst write can be performed without masking. Similarly, four burst writes are performed in the column address direction for “1” of the next time on the Y axis. As a result, the image data of the next time “1” is written into the VRAM 5. Thereafter, the same burst write is performed up to the “15” th in the row address direction. As a result, waveform data in which one waveform is drawn is stored in the VRAM 5.

  However, in this waveform, as shown in FIG. 2a), the time axis is the Y axis, the waveform value is the X axis, and the waveform is rotated 90 degrees. Therefore, it cannot be displayed on a display device such as a display as it is. Therefore, the image data matrix conversion unit 6 performs a matrix operation for rotating the image data stored in the VRAM 5 by 90 degrees.

  First, the VRAM arbiter 4 collectively reads the data from the column addresses “0” to “3” for the row address “0”. This becomes a burst read. Next, data from “4” to “7” is burst read, and a total of four burst reads are performed.

  Similarly, four burst reads are performed for the row address “1”. This process is repeated and four burst reads are finally performed up to the row address “15”. The situation is shown in FIG.

  Therefore, four data are output from the VRAM arbiter 4 to the image data matrix converter 6 for each burst read. The image data matrix converter 6 performs a matrix operation for rearranging the four data burst-read in the column address direction in the row address direction. As a result, the data from the column address “0” to the column “3” of the column address “0” of the row address read out first from the column “0” of the row address “0” of the column address. Rearranged by “3”. That is, the arrangement direction of the four data read in burst is rotated 90 degrees from the column address direction to the row address direction.

  FIG. 3 shows this state. D0 [0] indicates data of row address “0” and column address “0”, and D0 [1] indicates data of row address “1” and column address “0”. Therefore, four data in the column address direction, which are burst-read from D0 [0] to D0 [3], are rearranged in the row address direction.

  Similarly, the four data burst-read for the row address “1” are rearranged in the row address direction. As described above, the four data burst-read from the VRAM 5 in the column address direction are rearranged in the row address direction.

  For this purpose, the image data matrix conversion unit 6 is provided with a register. By storing the four data burst-read from the VRAM 5 in a register and rearranging the order, a matrix operation function can be achieved. Therefore, the matrix operation for rearranging the four data arranged in the column address direction in the row address direction can be realized in one clock.

  The image data resulting from the matrix calculation by the image data matrix conversion unit 6 is written into the VRAM 5 by the VRAM arbiter 4. The burst read is performed from the VRAM 5 and the result of the matrix operation performed by the image data matrix conversion unit 6 is written into the VRAM 5. Therefore, the matrix operation is sequentially performed, and the result of converting the arrangement direction is written in the VRAM 5.

  FIG. 2 c) shows a state when the result converted by the image data matrix conversion unit 6 is stored in the VRAM 5. Thus, by performing matrix calculation, the waveform of the image data can be rotated 90 degrees, and the waveform is drawn with the time axis as the X axis and the waveform value as the Y axis.

  The image data read control unit 7 reads the image data stored in the VRAM 5 and outputs it to a display device such as a display. The display device displays the image data. The image data at this time is displayed as an original waveform with the time axis as the X axis and the waveform value as the Y axis.

  Therefore, by replacing the X-axis coordinate and the Y-axis coordinate of the waveform data in the waveform data conversion unit 2, the column address direction of the VRAM 5 and the waveform value direction can be matched. Thereby, the waveform value (interpolation line from the minimum value to the maximum value) can be burst-written in the column address direction. Waveform display speed can be increased by the amount of burst writing.

  In order to obtain the maximum effect of burst write, the waveform stored in the VRAM 5 is rotated by 90 degrees. However, by performing matrix calculation by the image data matrix conversion unit 6, the waveform is rotated by 90 degrees and returned to the original state. Can do. Thereby, the image data stored in the VRAM 5 can be displayed as it is.

  In the above, it is desirable that the number of data that the image data matrix conversion unit 6 converts at one time matches the number of data read from the VRAM 5 by burst read. This is because if the number of data to be converted at one time is different from the number of burst read data, useless read from the VRAM 5 occurs. By matching, it is possible to efficiently perform conversion without causing useless reads. As a result, the processing speed can be increased.

  Further, in the above-described example, when burst access is made to the VRAM 5, four data are accessed collectively. Of course, depending on the specifications of the VRAM 5, burst access may be made to two, three, or five or more data at once.

1 Waveform Display Circuit 2 Waveform Data Conversion Unit 3 Image Data Write Control Unit 4 VRAM Arbiter 5 VRAM
6 Image data matrix converter 7 Image data read controller

Claims (2)

A waveform conversion unit that inputs waveform data having a minimum value and a maximum value as waveform values on the time axis, and exchanges the coordinates of the time axis and the coordinates of the waveform value,
A storage unit that has a column address and a row address, and burst-writes the value of the waveform replaced by the conversion unit in the direction of the column address;
A calculation unit that performs a calculation of rotating the image data of the waveform stored in the storage unit by 90 degrees;
A waveform display circuit comprising: 2. The waveform display circuit according to claim 1, wherein the operation unit reads the number of data that can be burst read from the data stored in the column address direction and performs an operation of rotating 90 degrees. .

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