CN106846255B

CN106846255B - Image rotation realization method and device

Info

Publication number: CN106846255B
Application number: CN201611235685.3A
Authority: CN
Inventors: 赵艳云; 张师群; 罗旻; 鲍东山
Original assignee: New Shoreline Beijing Science And Technology Group Co ltd
Current assignee: New Shoreline Beijing Science And Technology Group Co ltd
Priority date: 2017-02-23
Filing date: 2017-02-23
Publication date: 2024-01-16
Anticipated expiration: 2037-02-23
Also published as: CN106846255A

Abstract

The invention discloses a method and a device for realizing image rotation, wherein the method comprises the following steps: determining the reading sequence of the image data according to the source storage format, the source data format and the rotation angle of the image to be rotated; reading each rotating unit in the image data according to the determined reading sequence, and transmitting the rotating units to a rotator; and the rotator rotates the pixels in the read rotating unit according to the rotation angle, and reorganizes the rotating unit after the pixels rotate to obtain an image with a corresponding rotation angle. Through the mode of hardware, the image rotation is realized in a mode of changing the reading sequence, the hardware cost investment is reduced, and the processing speed and the processing efficiency are improved.

Description

Image rotation realization method and device

Technical Field

The invention belongs to the technical field of image processing, and particularly relates to an image rotation realization method and device.

Background

With the development of electronic technology, electronic images are increasingly used, and in the process of using electronic images, rotation operation is often required to be performed on the images so as to facilitate browsing of users.

The existing image rotation technology is realized by multi-purpose software, the image is rotated by the software, the display direction of the image is changed, and the mode can not meet the processing requirements of quick and timeliness of the image rotation operation due to the fact that the data quantity to be processed is relatively large and the response speed is relatively low.

However, the scheme implemented by the hardware is very few, and the mode of processing by using the hardware is limited by the performance of the hardware, so that the method is used in the prior art, and the size of a Random Access Memory (RAM) used by the method is large, so that the chip area is increased, and the method has higher requirement on the hardware.

Therefore, the image rotation implementation scheme in the prior art cannot meet the requirement of rapidly and efficiently completing the image rotation operation under the condition of not increasing hardware investment.

Disclosure of Invention

In view of the above, an object of the present invention is to provide a method and apparatus for implementing image rotation. The following presents a simplified summary in order to provide a basic understanding of some aspects of the disclosed embodiments. This summary is not an extensive overview and is intended to neither identify key/critical elements nor delineate the scope of such embodiments. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is presented later.

The embodiment of the invention provides an image rotation realization method, which comprises the following steps:

determining the reading sequence of the image data according to the source storage format, the source data format and the rotation angle of the image to be rotated;

reading each rotating unit in the image data according to the determined reading sequence, and transmitting the rotating units to a rotator;

and the rotator rotates the pixels in the read rotating unit according to the rotation angle, and reorganizes the rotating unit after the pixels rotate to obtain an image with a corresponding rotation angle.

In some alternative embodiments, when the rotation angle is 180 degrees:

the determining the reading sequence of the image data specifically comprises the following steps: reversing the address sequence of the rotating unit during memory access; in a corresponding manner,

and (3) carrying out pixel rotation on the pixels in the rotation units to be read according to the rotation angles, recombining the rotation units after the pixel rotation to obtain images with corresponding rotation angles, wherein the method specifically comprises the following steps of:

reversing the pixel sequence in each rotation unit;

and reorganizing the pixel-inverted rotation units according to the inverted address sequence to obtain processed image data.

In some alternative embodiments, the pixel sequence in each rotation unit is inverted, specifically including:

sequentially reversing a row of pixels included in each rotation unit; when the sequence inversion is performed, the pixels of the row are divided into a specified number of pixel groups, the sequence of the pixel groups is inverted, and the pixels in the pixel groups are sequentially inverted.

In some alternative embodiments, when the rotation angle is 90 or 270 degrees:

the determining the reading sequence of the image data specifically comprises the following steps: the address sequence of the rotating unit during memory access is converted according to the rotating angle; in a corresponding manner,

the pixels in each rotating unit are subjected to row-column exchange;

and reorganizing the rotation units after the row-column exchange by taking the selected rotation unit group as a unit according to the address sequence after the conversion to obtain the processed image data.

In some alternative embodiments, the pixels in each rotation unit are interchanged in rows and columns, specifically including:

the pixel matrix in each rotating unit is filled in a column-by-column sequence through the rotator, and then is read in a row-by-row sequence, so that the pixels in each rotating unit are subjected to row-column exchange.

The embodiment of the invention also provides an image rotation realizing device, which comprises:

the determining module is used for determining the reading sequence of the image data according to the source storage format, the source data format and the rotation angle of the image to be rotated;

the memory access module is used for reading each rotating unit in the image data according to the determined reading sequence and transmitting the rotating units to the rotator;

a rotator for performing pixel rotation on the pixels in the rotation unit to be read according to the rotation angle;

and the reorganization module is used for reorganizing the rotating units after the pixels rotate to obtain images with corresponding rotation angles.

In some optional embodiments, the determining module is specifically configured to invert an address sequence of the rotation unit when the rotation angle is 180 degrees; in a corresponding manner,

the rotator is specifically configured to invert the pixel sequence in each rotation unit;

the reorganization unit is specifically configured to reorganize the pixel-inverted rotation unit according to the inverted address sequence, so as to obtain processed image data.

In some alternative embodiments, the rotator is specifically configured to sequentially invert a row of pixels included in each rotation unit; when the sequence inversion is performed, the pixels of the row are divided into a specified number of pixel groups, the sequence of the pixel groups is inverted, and the pixels in the pixel groups are sequentially inverted.

In some optional embodiments, the determining module is specifically configured to change an address sequence of the rotation unit when the rotation angle is 90 or 270 degrees according to the rotation angle; in a corresponding manner,

the rotator is specifically configured to exchange pixels in each rotation unit in rows and columns;

the reorganization unit is specifically configured to reorganize the rotation units after the row-column exchange according to the address sequence after the transformation by using the selected rotation unit group as a unit, so as to obtain the processed image data.

In some alternative embodiments, the rotator is specifically configured to fill the pixel matrix in the rotating unit in a column-by-column order, and then read the pixel matrix in each rotating unit in a row-by-row order, so as to implement column-to-row exchange of the pixels in each rotating unit.

According to the image rotation realization method and device provided by the embodiment of the invention, the reading sequence of the image data is determined according to the source storage format, the source data format and the rotation angle of the image to be rotated, the image rotation and data recombination are realized in a mode of changing the reading sequence in a hardware mode, the image data after angle rotation is obtained, the image data is realized in a hardware memory access mode, memory resources are fully multiplexed according to the characteristics of the image data, the requirement on hardware performance is reduced, the hardware cost investment is reduced, and meanwhile, the processing speed and efficiency are improved, and even a large amount of images can be processed in time.

To the accomplishment of the foregoing and related ends, the one or more embodiments comprise the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative aspects and are indicative of but a few of the various ways in which the principles of the various embodiments may be employed. Other benefits and novel features will become apparent from the following detailed description when considered in conjunction with the drawings, the disclosed embodiments are intended to include all such aspects and their equivalents.

Drawings

The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate the invention and together with the embodiments of the invention, serve to explain the invention. In the drawings:

FIG. 1 is a flow chart of an image rotation implementation method in a first embodiment of the invention;

FIG. 2 is a schematic diagram of an image rotation implementation method according to a first embodiment of the present invention;

FIG. 3 is a flowchart of a specific implementation of the image rotation implementation method in the second embodiment of the present invention;

FIG. 4 is a schematic diagram of an original image in a second embodiment of the present invention;

FIG. 5 is a schematic diagram of an image with address flip-flop in accordance with a second embodiment of the present invention;

FIG. 6 is a flowchart of a specific implementation of the image rotation implementation method in the third embodiment of the present invention;

FIG. 7 is a schematic view of an original image in a third embodiment of the present invention;

FIG. 8 is a schematic view of a 90 degree rotated image in accordance with a third embodiment of the present invention;

FIG. 9 is a schematic image of a 270 degree rotation in a third embodiment of the invention;

FIG. 10 is a schematic diagram of a read/write sequence of a rotator according to an embodiment of the present invention;

FIG. 11 is a second schematic diagram of a read/write sequence of a rotator according to an embodiment of the present invention;

FIG. 12 is a third schematic diagram of a read/write sequence of a rotator according to an embodiment of the present invention;

FIG. 13 is a schematic diagram showing the arrangement of blocks during a first read cycle in accordance with an embodiment of the present invention;

FIG. 14 is a schematic illustration of the filling pattern during the first read pass in an embodiment of the present invention;

FIG. 15 is a schematic diagram of a first read sequence in accordance with an embodiment of the present invention;

FIG. 16 is a diagram showing the arrangement of blocks during a second read cycle in accordance with an embodiment of the present invention;

FIG. 17 is a schematic illustration of the filling pattern during the second read cycle in an embodiment of the present invention;

FIG. 18 is a schematic diagram of a second reading mode in the second reading mode according to the embodiment of the present invention;

FIG. 19 is a diagram showing the arrangement of the blocks during the third read cycle according to the embodiment of the present invention;

fig. 20 is a schematic structural diagram of an image rotation realizing apparatus in the embodiment of the present invention.

Detailed Description

The following description and the drawings sufficiently illustrate specific embodiments of the invention to enable those skilled in the art to practice them. Other embodiments may involve structural, logical, electrical, process, and other changes. The embodiments represent only possible variations. Individual components and functions are optional unless explicitly required, and the sequence of operations may vary. Portions and features of some embodiments may be included in, or substituted for, those of others. The scope of embodiments of the invention encompasses the full ambit of the claims, as well as all available equivalents of the claims. These embodiments of the invention may be referred to herein, individually or collectively, by the term "invention" merely for convenience and without intending to voluntarily limit the scope of this application to any single invention or inventive concept if more than one is in fact disclosed.

In order to solve the problems that in the prior art, when an image is rotated through software, the processed data volume is large, the response speed is low and the image rotation cannot be completed quickly and efficiently under the condition of not increasing hardware investment due to the fact that the performance of hardware is limited, the embodiment of the invention provides an image rotation realization method.

The following is a detailed description of specific embodiments.

Example 1

An embodiment of the present invention provides a method for implementing image rotation, the flow of which is shown in fig. 1, the principle of which is shown in fig. 2, and the method includes the following steps:

step S101: and determining the reading sequence of the image data according to the source storage format, the source data format and the rotation angle of the image to be rotated.

As shown in fig. 2, image rotation is achieved by a combination of three hardware modules, direct Memory Access (DMA), rotator, random access memory Controller (RAM Controller). Such as rotation of the screen or rotation of the image display angle caused by movement of the display screen.

And the DMA determines the reading sequence of the image data according to the required rotation angle, the picture source storage format and the picture source data format. The angle required to be rotated may be 90 °, 180 °, 270 °, or the like. The picture source storage format may be a linear picture storage mode (linear mode), a block-format picture storage mode (tile mode), or the like. The picture source data format may be 32bpp,16bpp,8bpp, etc.

Step S102: each rotation unit in the image data is read according to the determined reading order, and is transferred to the rotator.

The DMA reads image data in the double rate synchronous dynamic random access memory (ddr) in the determined order and transfers the image data to the Rotator.

Step S103: the rotator performs pixel rotation on the pixels in the rotation unit to be read according to the rotation angle.

The Rotator is a matrix of row-column conversion that converts each rotation unit in the original picture read from the DMA. The sequence of the image pixels contained in each rotation unit is changed, and the effect of image rotation display is achieved.

Step S104: and recombining the rotating units after the pixel rotation to obtain images with corresponding rotation angles.

RAM Controller is a read-write Controller for on-chip memory that outputs data from a Rotator in unit block order, in Raster scan (register scan) order for display refresh. Therefore, the recombination output of the data is realized, and the output image with the corresponding rotation angle is obtained.

Example two

The second embodiment of the present invention provides a specific implementation flow of an image rotation implementation method, which is described in detail for a 180 degree rotation situation, and the flow is shown in fig. 3, and the method includes the following steps:

step S201: and reversing the address sequence of the rotating unit during memory access according to the source storage format and the source data format of the image to be rotated and the rotation angle of the image by 180 degrees.

This step is handled by DMA. When the pixel is rotated 180 degrees, the order of the pixels is actually reversed according to the original storage format and data format, but since the memory read is not generally one pixel at a time, the address order is reversed in units of rotation units.

Step S202: and transmitting the rotating unit with the address sequence reversed to the rotator.

Step S203: the order of the pixels within each rotation unit is reversed.

After the rotation unit is subjected to the inversion processing of the address sequence, the sequence of each pixel point in the rotation unit also needs to be inverted. Namely, reversing the sequence of one row of pixels contained in each rotation unit; when the order inversion is performed, one line of pixels is divided into a specified number of pixel groups, the order of the pixel groups is inverted, and the order of the pixels in the pixel groups is inverted.

Step S204: and reorganizing the pixel-inverted rotation units according to the inverted address sequence to obtain processed image data.

And (3) reversing the address sequence of the rotating unit and reversing the pixel sequence in the rotating unit, and then reorganizing to obtain reversed image data, wherein the reversed image data corresponds to the image rotated by 180 degrees.

That is, to achieve 180 ° rotation, the following 2 main steps are required:

1> and 0 DEG, reversing the order of addresses taken to ddr;

2> to meet the real-time requirement, the burst length (burst length) of the DMA is the same as that of the ddr. Taking burst length=2 as an example, 256 bits (8 32bpp pixels) of data are taken for each process (transaction). Then the order of two 128 bits out of 256 bits (bits) needs to be reversed; the order of the four 32bit pixels in 128 bits also needs to be reversed.

1> above is implemented by DMA and 2> is implemented by a Rotator. In this scenario, the Rotator does not need to perform row-column conversion, but only needs to rearrange the data of one burst length according to the sequence of pixels.

As shown in fig. 4, which is the original image before rotation, each solid square represents a 256-bit rotation unit. The number "0" represents the start address of one frame image, and the number i between 0 and 64 represents the i-th address. Fig. 5 shows an image after the 1> address sequence reversal processing.

After the 1> process, the order of the data becomes:

63，62，61，…，56，

55，54，53，…，48，

47，46，45，…，40，

39，38，37，…，32，

31，30，29，…，24，

23，22，21，…，16，

15，14，13，…，8，

7，6，5，…，0。

example III

The third embodiment of the invention provides a specific implementation flow of an image rotation implementation method, the flow of which is shown in fig. 6, and the method comprises the following steps:

step S301: and according to the source storage format and the source data format of the image to be rotated and the rotation angle of 90 degrees or 270 degrees of the image, the address sequence of the rotation unit during memory access is converted according to the rotation angle.

This step is handled by DMA. Wherein the 90 degrees and 270 degrees of transformation directions are different. When the rotation is performed at 90 degrees and 270 degrees, the order of each pixel point is actually converted according to the original storage format and data format, and the memory reading is not generally performed by only reading one pixel point at a time, so that the conversion processing of the address order needs to be performed by taking the rotation unit as a unit.

Step S302: and transmitting the rotating units with the addresses converted in sequence to a rotator.

Step S303: and exchanging the pixels in each rotating unit in rows and columns.

In one rotation unit, there is one pixel array, so that not only the order of the rotation units needs to be converted by corresponding angles, but also each pixel in the pixel array in the rotation units needs to be converted by corresponding angles.

Step S304: and reorganizing the rotation units after the row-column exchange by taking the selected rotation unit group as a unit according to the address sequence after the conversion to obtain the processed image data.

The address sequence of the rotating unit is subjected to angle transformation and the pixels in the rotating unit are subjected to angle transformation and reorganization, so that inverted image data can be obtained, and the inverted image data corresponds to an image rotated by 90 degrees or 270 degrees.

That is, for 90 °, 270 ° rotation to be achieved, the following 3 main steps are required:

1> and 0 DEG, the address order taken to the ddr is changed according to the rotation angle;

2> interchange rows and columns in a block of cells (Block); the unit blocks are also referred to as the above-described rotating units.

3> reorganizing the data in each block in the order actually displayed.

1> above is implemented by DMA, 2> is implemented by a Rotator, and 3> is implemented by a RAM Controller.

The functions of a DMA implementation are described as follows:

as shown in fig. 7, which shows the original image before rotation, each thin solid square represents a block, which is the minimum matrix unit that the Rotator can process.

The image after 90 ° rotation is shown in fig. 8. However, in order to facilitate the generation of read and write addresses in the RAM Controller, address translation in 1> should be reorganized in units of "cluster" (the portion enclosed by each thick solid line box in fig. 7) (described in detail when the RAM Controller is introduced). After the 1> process, the order of the data becomes:

56，24，48，16，40，8，32，0，

57，25，49，17，41，9，33，1，

58，26，50，18，42，10，34，2，

59，27，51，19，43，11，35，3，

60，28，52，20，44，12，36，4，

61，29，53，21，45，13，37，5，

62，30，54，22，46，14，38，6，

63，31，55，23，47，15，39，7。

as shown in fig. 9, the image after 270 ° rotation, the order of data becomes:

7，39，15，47，23，55，31，63，

6，38，14，46，21，54，30，62，

5，37，13，45，20，53，29，61，

4，36，12，44，19，52，28，60，

3，35，11，43，18，51，27，59，

2，34，10，42，17，50，26，58，

1，33，9，41，16，49，25，57，

0，32，8，40，15，48，24，56。

the functionality implemented by the Rotator is described as follows:

the Rotator converts the column order in a rotation unit (or block) into row order using a matrix. That is, the pixel matrix in the rotating unit is filled in a column-by-column order, and is read in a row-by-row order. Fig. 10, 11, and 12 are schematic diagrams of the read/write sequence of the rotator. Each cell represents a pixel and may be 32bpp,16bpp,8bpp, etc.

Taking DMA output bit width 256 bits and rotator output 128 bits as an example, the smallest re-used rotation unit (block) is shown in fig. 10, 11, 12, which shows a 90 ° rotation block. Where w 0-wn denote filling in a column-by-column order, and r 0-rn denote reading in a row-by-row order.

Fig. 10, 11 and 12 illustrate that the column-by-column operation is performed with 4 bits/pixel (byte/pixel), 2 bits/pixel (byte/pixel), 1 bit/pixel (byte/pixel) as the minimum pixel unit, respectively. Sequential filling of columns and sequential reading row by row.

In fig. 10, the sequential filling is performed column by column from w0 to w3, each row includes 8 columns, and then the sequential reading is performed row by row from r0 to r7. In fig. 11, the column-by-column sequential filling is performed from w0 to w7, each row includes 16 columns, and then the row-by-row sequential reading is performed from r0 to r 15. In fig. 12, the sequential filling is performed column by column from w0 to w15, each row includes 32 columns, and then the sequential reading is performed row by row from r0 to r 31.

The functions implemented by the RAM Controller are described as follows:

the data output by the Rotator is in block order, but the data output by the RAM Controller is in raster scan, i.e. top to bottom left to right, screen refresh order. Thus, the RAM controller functions to convert the block order into a raster scan order. Depending on the original image data format and type, a block will typically span 4-32 lines of pixels. While an entire line of an entire frame of image spans multiple blocks. The on-chip RAM controlled by the RAM Controller is filled in a block-by-block sequence and fetched in a line-by-line screen refresh sequence. Therefore, the most intuitive idea is to use a ping-pong memory for simultaneous reading and writing.

Meanwhile, in order to reduce the size of the RAM and solve the problem of inconsistent read-write address sequence, a smart read-write address control method is introduced. Fig. 13 to 17 schematically illustrate a memory use cycle of the read/write sequence. In order to simplify the method of calculating the read-write address, the area of the RAM that is reused should be as small as possible. This re-used area contains several blocks, which may be referred to as "clusters". The requirement on the size of the memory can be reduced through multiplexing the memory, and the smart memory multiplexing also improves the utilization rate of the memory.

The process of reading pixels in a cluster is described as follows:

taking 32bpp,linear mode data as an example, one block after matrix conversion contains 4×8 pixels, and one cluster contains 8 blocks.

The specific process of RAM access is as follows:

1> an arrangement of blocks included in a cluster is illustrated in fig. 13. Individual blocks in a cluster are arranged in the manner shown in fig. 13; as shown in fig. 13, from left to right, there are 8 blocks of block0, block1, block2, block3, block4, block5, block6, and block7, respectively, where block0 includes 4×8pixel as an example, and other blocks are similar.

2> is a schematic illustration of the filling sequence in a cluster as shown in FIG. 14. Each cluster contains 8 blocks, such as 8 blocks from left to right in fig. 14, namely block0, block1, block2, block3, block4, block5, block6 and block 7. RAM is W0.0, W0.1, … …, W0.7; w1.0, W1.1, … …, W1.7; … …; w7.0, W7.1, … … W7.7, i.e. column by column. Each block requires 8 write actions, so a cluster requires a total of 64 write actions, see in particular fig. 14.

3> as shown in FIG. 15, a read sequence in a cluster is shown. When all blocks in a cluster are filled, it can start with R0.0, R0.1, … …, R0.7; r1.0, R1.1, … …, R1.7; … …; the order of R7.0, R7.1, … …, R7.7 was read. As shown in fig. 15, the pixels are output in raster scan order when read in this order.

4> the arrangement of blocks in the second cluster after reading the first cluster is shown in FIG. 16. During reading the area that became free due to reading can be used for filling of the second round, i.e. the second cluster. The blocks in the second cluster are arranged in the manner shown in fig. 16, i.e., 8 blocks from top to bottom in fig. 16, namely block0, block1, block2, block3, block4, block5, block6 and block 7.

5> is a schematic illustration of the filling sequence in the second cluster as shown in FIG. 17. The filling sequence of the second round is W0.0, W0.1, … … and W0.7; w1.0, W1.1, … …, W1.7; … …; w7.0, W7.1, … … W7.7, as in the first round of reading sequence. As shown in fig. 17, therefore, a long waiting time is not required from the completion of the first round of reading to the completion of the second round of filling.

6> as shown in FIG. 18, a schematic of the read sequence in the second cluster. The second round of reading begins when the RAM is again full by the second round of filling. As shown in fig. 18, the read order is R0.0, R0.1, … …, R0.7; r1.0, R1.1, … …, R1.7; … …; r7.0, R7.1, … …, R7.7.

7> As shown in FIG. 19, the arrangement of blocks in the third cluster after reading the second cluster. As shown in fig. 19, the vacated region can be used to fill a new round of cluster pixels during the read process. Thus, the arrangement of the blocks in the clsuter is returned to the arrangement of the first round (as shown in fig. 13) and the next cycle of the memory is performed.

The above process loops until all cluster switches are complete.

The read-write address can be intuitively calculated and represented by three counters. The counter that counts the number of lines each block spans is called a unit counter; the counter that counts the number of blocks contained in each cluster is called a block counter (block counter); the counter that counts the number of clusters contained in each lane (one flow-through slot on the chip) is called a cluster counter (cluster counter). The count range for each counter is as follows, and after these counter counts to their respective upper limits, it is reset to 0:

unit_counter＝{0，line_per_block}；

block_counter＝{0，block_per_cluster}；

cluster_counter＝{0，cluster_per_lane}。

the above-mentioned respective expressions are:

cell count = {0, number of rows per block };

block count = {0, number of blocks per cluster };

cluster count = {0, number of clusters per flow-through slot }.

If the image to be rotated is small, the entire image contains only one block, and both block_counter and cluster_counter are 0. In this special case, only the pixels in the block need to be rotated, and the step of reversing or converting the address sequence of the block can be omitted.

In the above fig. 13 to 19, the formula of the write address w0 of the first round, the read address r0 of the first round, the write address w1 of the second round, and the read address r1 of the second round is as follows, and is characterized by the counts of three counters:

w0＝{unit_counter，cluster_counter，block_counter}；

r0＝{block_counter，cluster_counter，unit_counter}；

w1＝{block_counter，cluster_counter，unit_counter}；

r1＝{unit_counter，cluster_counter，block_counter}。

the above-mentioned respective expressions are:

write address w0= { cell count, cluster count, block count };

read address r0= { block count, cluster count, cell count };

write address w1= { block count, cluster count, cell count };

read address r1= { cell count, cluster count, block count }, for the second round.

Through multiplexing of the memory access of the chip, the utilization rate of the chip is improved, the next round of filling is timely carried out by utilizing the idle part after the reading is finished, the processing speed of filling and reading is improved, and the processing waiting time is reduced.

Based on the same inventive concept, an embodiment of the present invention further provides an image rotation implementation apparatus, whose structure is shown in fig. 20, including: a determination module 201, a memory access module 202, a rotator 203, and a reorganization module 204.

A determining module 201, configured to determine a reading sequence of image data according to a source storage format and a source data format of an image to be rotated, and a rotation angle of the image;

a memory access module 202 for reading each rotation unit in the image data according to the determined reading sequence and transmitting the rotation unit to the rotator;

a rotator 203 for performing pixel rotation on the pixels in the rotation unit to be read according to the rotation angle;

and the reorganization module 204 is configured to reorganize the rotated pixel units to obtain images with corresponding rotation angles.

Preferably, the determining module 201 is specifically configured to invert the address sequence of the rotating unit during the memory access when the rotation angle is 180 degrees; in a corresponding manner,

preferably, the rotator 203 is specifically configured to invert the pixel sequence in each rotation unit;

preferably, the reorganizing unit 204 is specifically configured to reorganize the pixel-inverted rotating unit according to the inverted address sequence, so as to obtain the processed image data.

Preferably, the rotator 203 is specifically configured to sequentially invert one row of pixels included in each rotation unit; when the sequence inversion is performed, the pixels of the row are divided into a specified number of pixel groups, the sequence of the pixel groups is inverted, and the pixels in the pixel groups are sequentially inverted.

Preferably, the determining module 201 is specifically configured to change the address sequence of the rotation unit during the memory access according to the rotation angle when the rotation angle is 90 or 270 degrees; in a corresponding manner,

preferably, the rotator 203 is specifically configured to perform column-row exchange on pixels in each rotation unit;

preferably, the reorganizing unit 204 is specifically configured to reorganize the rotation units after the row-column exchange in units of the selected rotation unit group according to the address sequence after the conversion, so as to obtain the processed image data.

Preferably, the rotator 203 is specifically configured to fill the pixel matrix in the rotating unit in a column-by-column order, and then read the pixel matrix in each rotating unit in a row-by-row order, so as to implement column-row exchange of the pixels in each rotating unit.

The method and the device provided by the embodiment of the invention use the reusable matrix for rotation processing. The smart design of the read-write pointer in RAM use reduces the size and chip area. The method used by the invention is realized by hardware, and the response speed of rotation is improved. The application range is wide, and the method can be applied to mobile display chips such as mobile phones, tablet computers and the like.

Unless specifically stated otherwise, terms such as processing, computing, calculating, determining, displaying, or the like, may refer to an action and/or process of one or more processing or computing systems, or similar devices, that manipulates and transforms data represented as physical (e.g., electronic) quantities within the processing system's registers or memories into other data similarly represented as physical quantities within the processing system's memories, registers or other such information storage, transmission or display devices. Information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

It should be understood that the specific order or hierarchy of steps in the processes disclosed are examples of exemplary approaches. Based on design preferences, it is understood that the specific order or hierarchy of steps in the processes may be rearranged without departing from the scope of the present disclosure. The accompanying method claims present elements of the various steps in a sample order, and are not meant to be limited to the specific order or hierarchy presented.

In the foregoing detailed description, various features are grouped together in a single embodiment for the purpose of streamlining the disclosure. This method of disclosure is not to be interpreted as reflecting an intention that the claimed embodiments of the subject matter require more features than are expressly recited in each claim. Rather, as the following claims reflect, invention lies in less than all features of a single disclosed embodiment. Thus the following claims are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate preferred embodiment of this invention.

Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.

The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. The processor and the storage medium may reside as discrete components in a user terminal.

For a software implementation, the techniques described herein may be implemented with modules (e.g., procedures, functions, and so on) that perform the functions described herein. These software codes may be stored in memory units and executed by processors. The memory unit may be implemented within the processor or external to the processor, in which case it can be communicatively coupled to the processor via various means as is known in the art.

The foregoing description includes examples of one or more embodiments. It is, of course, not possible to describe every conceivable combination of components or methodologies for purposes of describing the aforementioned embodiments, but one of ordinary skill in the art may recognize that many further combinations and permutations of various embodiments are possible. Accordingly, the embodiments described herein are intended to embrace all such alterations, modifications and variations that fall within the scope of the appended claims. Furthermore, as used in the specification or claims, the term "comprising" is intended to be inclusive in a manner similar to the term "comprising," as interpreted when employed as a transitional word in a claim. Furthermore, any use of the term "or" in the specification of the claims is intended to mean "non-exclusive or".

Claims

1. An image rotation implementation method, comprising:

step S301: according to the source storage format and the source data format of the image to be rotated and the rotation angle of the image being 90 degrees or 270 degrees, the address sequence of the rotation unit during memory access is converted according to the rotation angle;

step S302: transmitting the rotating unit with the address sequence converted to a rotator;

step S303: the pixels in each rotating unit are subjected to row-column exchange;

step S304: reorganizing the rotation units after the row-column exchange by taking the selected rotation unit group as a unit according to the address sequence after the conversion to obtain processed image data, wherein the method further comprises the steps of performing read-write address control on a pixel matrix in the rotation units, and a memory use cycle process of the address read-write sequence comprises the following steps: step A:

for a first cluster of pixel points in a pixel matrix, writing the memory into the pixel points in the pixel matrix from left to right according to a column-by-column sequence, wherein the memory is written into a block of the pixel points in the pixel matrix each time for 8 times, and one cluster contains 8 blocks;

the memory reads pixel points in the pixel matrix according to a row-by-row sequence, and the memory reads a block of the pixel points in the pixel matrix every time for 8 times;

for the second cluster of the pixel points in the pixel matrix, the memory writes the pixel points in the pixel matrix from top to bottom according to the row-by-row sequence, and the memory writes one block of the pixel points in the pixel matrix each time and reads 8 times in total;

the memory reads pixel points in the pixel matrix according to a column-by-column sequence, and the memory reads a block of the pixel points in the pixel matrix each time and writes the block 8 times in total;

step a is cycled until all clusters in the pixel matrix have completed conversion.