JP5772635B2 - Method for manufacturing silicon carbide single crystal substrate - Google Patents

Description

  The present invention relates to a method for manufacturing a silicon carbide single crystal substrate, and more specifically, a method for manufacturing a silicon carbide single crystal substrate having a crystal plane with a good atomic arrangement from which a work-affected layer or the like formed on a cut surface is removed. About.

  A silicon carbide semiconductor is known as a semiconductor material having excellent thermal and chemical characteristics, a forbidden band width larger than that of a silicon (Si) semiconductor, and also having excellent electrical characteristics. In particular, 4H-type silicon carbide semiconductors have been put into practical use as semiconductor materials for power devices because of their high electron mobility and saturated electron velocity.

  When manufacturing a silicon carbide semiconductor device, it is generally necessary to epitaxially grow the active region of the semiconductor device on the silicon carbide single crystal substrate surface, and the silicon carbide single crystal substrate surface has high-precision flatness and smoothness. At the same time, it is necessary that a crystal plane with a good atomic arrangement appears.

  Therefore, in the manufacturing process of the silicon carbide single crystal substrate, the silicon carbide single crystal ingot is sliced using a wire saw or the like, and the cut surface is polished with a slurry containing diamond abrasive grains. However, fine scratches generated at the time of slicing cannot be removed, and a work-affected layer with disordered crystallinity of silicon carbide remains, and good silicon carbide is obtained using a silicon carbide single crystal substrate having such surface defects. A semiconductor device cannot be manufactured. In the following description, a silicon carbide substrate that has not been subjected to a polishing step or the like having scratches or a work-affected layer remaining on the surface due to slicing and having surface defects, or a polishing step or the like that has not been completed is referred to as a silicon carbide base plate. A substrate in which the surface has high-precision flatness and smoothness through a process and the like, and a crystal surface having a good atomic arrangement appears on the surface is referred to as a silicon carbide single crystal substrate.

  In response to this problem, chemical mechanical polishing (CMP) in which mechanical polishing and chemical polishing are simultaneously performed using a polishing liquid containing colloidal silica abrasive grains, an oxidizing agent, and an additive after polishing with a slurry containing diamond abrasive grains. Chemical Mechanical Polishing) processing is used. As an example of CMP processing, a CMP processing method using a polishing composition in which colloidal silica abrasive grains, vanadate and hydrogen peroxide as an oxygen donor are mixed and a pH adjuster is added has been proposed. (For example, patent document 1).

JP 2008-179655 A

  However, in the polishing of the silicon carbide base plate using the CMP processing method, the polishing rate is very slow, such as several tens to several hundred nm / hour, and in order to complete the polishing of one silicon carbide base plate, it takes 10 hours or more. There is a problem that it takes a long time.

  The present invention has been made to solve such problems, and removes scratches and work-affected layers on the surface of the silicon carbide base plate, so that a crystal plane with a good atomic arrangement appears on the surface of the silicon carbide base plate. An object of the present invention is to obtain a silicon carbide single crystal substrate capable of forming a silicon carbide epitaxial layer having excellent characteristics by CMP in a short time.

A method for manufacturing a silicon carbide single crystal substrate according to the present invention includes a carbonization layer forming step of carbonizing a surface of a silicon carbide base plate to form a carbonized layer, and a carbonization layer removing the carbonized layer formed in the carbonized layer forming step. A layer removal step, and a chemical mechanical polishing step of polishing the surface of the silicon carbide base plate after the carbide layer removal step with a polishing liquid containing abrasive grains and an oxidizing agent.

  By using the production method of the present invention, a silicon carbide single crystal substrate capable of forming a good silicon carbide epitaxial layer by removing the scratches on the surface of the silicon carbide base plate and the work-affected layer almost completely and forming a good silicon carbide epitaxial layer can be obtained in a short time. It can be obtained by CMP processing.

It is process drawing which shows the manufacturing process of the silicon carbide single crystal substrate used in Embodiment 1 of the present invention. It is a cross-sectional TEM image of the grinding surface of a silicon carbide base plate. It is a schematic diagram of the electric discharge machining apparatus of Embodiment 1 of the present invention. It is a cross-sectional SEM image of the silicon carbide base plate surface which performed the carbide layer formation process (P04) by the electrical discharge machining method. It is a cross-sectional schematic diagram of the surface of the silicon carbide base plate before and after performing a carbide layer forming step (P04) by an electric discharge machining method. It is a schematic diagram of the CMP processing apparatus of Embodiment 1 of this invention. It is a schematic diagram of the annealing furnace of Embodiment 2 of this invention. It is process drawing which shows the manufacturing process of the silicon carbide single crystal substrate used in Embodiment 3 of the present invention.

  In the description of the embodiments and the respective drawings, the portions denoted by the same reference numerals indicate the same or corresponding portions. Further, in the present embodiment, a silicon carbide substrate that is not subjected to a polishing process or the like that does not undergo a polishing process or the like that does not pass through a polishing process or the like having a surface defect, a scratch at the time of slicing, and a work-affected layer is called a silicon carbide base plate, A silicon carbide substrate that has completed a manufacturing process such as a polishing process is referred to as a silicon carbide single crystal substrate.

Embodiment 1 FIG.
FIG. 1 is a process diagram showing a method for manufacturing a silicon carbide single crystal substrate according to the first embodiment. A method for manufacturing a silicon carbide single crystal substrate according to Embodiment 1 of the present invention will be described with reference to the process chart of FIG.

<Slicing process (P01)>
A silicon carbide base plate is sliced from a silicon carbide single crystal ingot into a wafer shape using a wire saw. A silicon carbide single crystal ingot having a crystal structure of 4H is used as an example in the case of slicing so that the cut surface of the sliced silicon carbide base plate is inclined by 8 ° from the hexagonal (0001) plane. Let's explain. The thickness of the substrate was 300 μm.

  In the present embodiment, a wire saw is used, but is not particularly limited, and a wheel diamond saw, an ultrasonic cutter or the like can be used, and the thickness of the substrate is 300 μm, but is not particularly limited. It can cut | disconnect to the thickness suitable for the silicon carbide semiconductor device to manufacture, and generally cut | disconnects to 100-500 micrometers. In addition, the case where the angle of the hexagonal (0001) plane is turned off by 8 ° will be described below. However, the off-angle may be set according to the purpose and sliced. In general, the silicon carbide base plate is sliced at an angle of 4 ° or 8 °.

<End face processing step (P02)>
The end face (edge) of the sliced silicon carbide base plate is in a sharply pointed state, and at the same time, fine cracks often remain, and may be cracked or chipped during handling such as transport and alignment in the subsequent process. . Further, it is conceivable that the chipped pieces may damage the surface of other substrates. Therefore, an end face processing step is necessary before the grinding / polishing step. End face processing is performed with a chamfering grindstone using diamond abrasive grains.

<Grinding and polishing process (P03)>
The surface of the silicon carbide base plate subjected to the end face processing is flattened on both sides by a mechanical grinding / polishing process. In general, a process of reducing surface irregularities is called a grinding process, and a process of improving the surface flatness to a mirror surface is called a polishing process. In the present embodiment, the grinding / polishing process is performed in two stages. The first process is called a grinding process, and the subsequent process is called a polishing process.

  In the grinding process, first, the silicon carbide base plate subjected to the end face processing is fixed to the table by vacuum suction, and the table is rotated. Next, a grindstone in which diamond abrasive grains having a particle diameter of 2 μm are bonded by vitrification approaches the table while rotating and is pressed against the silicon carbide base plate.

  Cross-sectional TEM (Transmission Electron Microscope) observation in the vicinity of the surface of the silicon carbide base plate subjected to this grinding step was performed. FIG. 2 is a cross-sectional TEM image of the ground surface of the silicon carbide base plate. From FIG. 2, a work-affected layer 1 having a disordered crystallinity of a depth of several hundreds of nanometers from the surface can be seen. In the silicon carbide base plate produced in the present embodiment, the work-affected layer 1 is the thickest part. About 250 nm. In FIG. 2, the films above the work-affected layer 1 are an organic protective film 2 that protects the surface during TEM observation, and an Au film 3 that serves as a mark for observation.

  In the processing of a single crystal material having high brittleness and high brittleness such as silicon carbide, not only plastic deformation but also brittle fracture occurs preferentially in comparison with the case of processing metal, so that the work-affected layer 1 is formed deep inside the crystal. It is formed. For example, when grinding / polishing is performed using diamond abrasive grains having an abrasive grain size of 500 nm, the work-affected layer 1 having a thickness of about 250 nm, which is half the abrasive grain diameter, is formed.

  The grinding process was performed after the grinding process. In the polishing step, diamond free abrasive grains are dispersed on a metal surface plate or a surface plate on which a nonwoven fabric pad is attached, and a load is applied to the silicon carbide base plate to rub the surfaces of the surface plate and the silicon carbide base plate. By this polishing process, the flatness of the surface of the silicon carbide base plate is improved, but the work-affected layer 1 still exists.

<Carbized layer forming step (P04)>
A carbonized layer is formed by carbonization on the surface of the silicon carbide base plate flattened by the grinding / polishing step (P03). In the present embodiment, the carbonized layer forming step (P04) was performed using an electric discharge machining method. As will be described later, this carbonized layer is not composed of carbon alone, and is a state in which silicon of silicon carbide is deficient and carbon is excessive. Hereinafter, the carbonized layer is referred to as a carbonized layer to distinguish from normal silicon carbide.

  The carbonized layer forming step will be described with reference to FIG. FIG. 3 is a schematic diagram of the electric discharge machining apparatus 4 according to Embodiment 1 of the present invention. Silicon carbide base plate 5 is fixed to stage 6 using a conductive tape, and wire electrode 7 is held at a position close to silicon carbide base plate 5. The part to be subjected to electric discharge machining including the wire electrode 7 is immersed in a dielectric liquid 8 such as deionized water or oil. The wire electrode 7 is a steel wire having a diameter of 50 μm and coated with brass having a thickness of 1 μm.

  A power supply 9 is used between the stage 6 and the wire electrode 7 to apply a pulse voltage of 1 μsec (25% duty) and a pulse voltage of 80 V, and the wire electrode 7 is attached to the silicon carbide base plate 5 at a speed of 0.5 mm / min. The electric discharge machining was performed while moving the surface. The pulse voltage was applied by connecting the wire electrode 7 to (−) and the silicon carbide base plate 5 to (+).

  When a pulse voltage is applied to the wire electrode 7, a minute discharge occurs between the wire electrode 7 and the surface of the silicon carbide base plate 5, resulting in a very high temperature locally, so that the silicon carbide melts, Vaporization occurs. Comparing the vaporization temperatures of carbon and silicon, silicon is lower. Therefore, silicon is vaporized more preferentially by the electric discharge machining method, the surface of the silicon carbide base plate 5 is deficient in silicon, and a silicon carbide layer having excess carbon is formed. It is formed. Here, as described above, a silicon carbide layer that is deficient in silicon and excessive in carbon is referred to as a carbonized layer. By the above mechanism, it is estimated that a carbonized layer is formed on the surface of the silicon carbide base plate 5 subjected to electric discharge machining.

  A carbide layer can be formed on the surface of the silicon carbide base plate 5 by gradually moving the wire electrode 7 while applying a pulse voltage to the entire surface of the silicon carbide base plate 5 by electric discharge machining.

  Further, when the formation of the carbide layer by this electric discharge machining method is examined in detail, part or all of the work-affected layer 1 on the surface of the silicon carbide base plate 5 is heated and melted by the electric discharge machining method, and silicon is preferentially vaporized. By doing so, it changes into a carbonized layer. That is, a work-affected layer 1 having different crystallinity generated by the slicing step (P01) and the grinding / polishing step (P03) is formed on the surface of the silicon carbide base plate 5, and all or a part thereof is a carbonized layer. It becomes.

  The film thickness of the carbonized layer obtained by this alteration varies depending on the distance between the wire electrode 7 and the silicon carbide base plate 5 and the electric discharge machining conditions. Since the thickness of the work-affected layer 1 on the surface of the silicon carbide base plate 5 is about 250 nm, almost all of the work-affected layer 1 having a thickness of 200 nm to 300 nm is melted by electric discharge machining, and silicon is preferentially vaporized to change into a carbonized layer. The electric discharge machining conditions and the like to be described later are adjusted so that the carbonized layer can have a desired thickness.

  In the carbonized layer forming step (P04) by the electric discharge machining method, the work-affected layer 1 formed by the slicing step (P01) and the grinding / polishing step (P03) is removed from the surface of the silicon carbide base plate 5, and the carbonized layer forming step (P04) The surface of the silicon carbide base plate 5 after the above is a carbonized carbon layer in which carbon is excessive because silicon carbide is melted by electric discharge machining and silicon is vaporized more preferentially as described above. It is changing to the layer.

  This carbonized layer is not subjected to a change in crystallinity in the formation process because no mechanical stress is applied as in the machining process such as the slicing process (P01) and the grinding / polishing process (P03). Only changes have occurred. That is, if a part or all of the work-affected layer 1 is altered to a carbonized layer, the thickness of the work-affected layer 1 is reduced or eliminated in the silicon carbide base plate 5 below the carbide layer. The crystallinity of the lower silicon carbide is improved.

  In the present embodiment, the conditions of the electric discharge machining method are a pulse voltage of 80 V, a pulse width of 1 μsec (25% duty), and 0.5 mm / min. It can be determined according to the depth, size, etc. of the formed work-affected layer 1. Specifically, it is preferable to adjust the pulse voltage within a range of 50 V to 300 V, a pulse width of 0.1 to 10 μs, a 10 to 80% duty, and a speed of 0.1 mm / min to 10 mm / min.

  Moreover, although the diameter of the wire electrode 7 was 50 micrometers, it does not specifically limit, The wire electrode of 25 micrometers-500 micrometers is sent so that a suitable electric current may be sent according to the moving speed of the wire electrode 7, and electrical discharge machining will be attained. 7 can be used.

  The surface state of the carbide layer formed by altering the work-affected layer 1 formed in the slicing step (P01) and the grinding / polishing step (P03) is determined between the wire electrode 7 and the silicon carbide base plate 5 at the time of electric discharge machining. Varies depending on the pulse voltage between.

  FIG. 4 is a cross-sectional SEM (Secondary Electron Microscope) image of the surface of the silicon carbide base plate 5 subjected to the carbonization layer forming step (P04) by the electric discharge machining method, and the silicon carbide element when the applied pulse voltage is 100V and 300V. The surface state of the plate 5 is shown. FIG. 5 is a schematic cross-sectional view of the surface of silicon carbide base plate 5 before and after performing a carbide layer forming step (P04) by an electric discharge machining method. As shown in FIG. 4, when the applied voltage is high (FIG. 4 (a)), the surface of the silicon carbide base plate 5 is melted by electric discharge machining, and is formed by re-hardening after silicon is preferentially vaporized. In the vicinity of the estimated carbide layer, the rough surface of the interface between the carbide layer and the underlying silicon carbide substrate 5 is clearly seen, and the unevenness of the interface is large. On the other hand, it can be seen that when the applied voltage is low (FIG. 4B), the roughness of the interface between the carbide layer and the underlying silicon carbide substrate 5 is small, and the unevenness of the interface is small.

  FIG. 5 is a schematic cross-sectional view of the silicon carbide base plate before the carbide layer forming step (P04) by the electric discharge machining method (FIG. 5A), and a cross-sectional schematic view of the silicon carbide base plate 5 after the carbide layer forming step (P04). The figure (FIG.5 (b)) is shown.

  As shown in FIG. 5A, before the carbonized layer forming step (P04), the surface irregularities are large, and the work-affected layer 1 resulting from the slicing step (P01) and the grinding / polishing step (P03) is on the surface. It is formed thick. It is not easy to remove the thick work-affected layer 1 by a CMP process (P05) described later.

  On the other hand, as shown in FIG. 5 (b), after the carbonized layer forming step (P04) performed under appropriate electric discharge machining conditions, the work-affected layer 1 is not seen, and a thin carbonized layer 10 is formed on the surface. The interface roughness 11 which is the unevenness | corrugation of the interface is also thin.

  It is necessary to remove irregularities on the surface of the silicon carbide base plate 5 by a CMP step (P05) to be described later after the carbide layer forming step (P04) by the electric discharge machining method. Considering the processing time of the CMP step (P05) described later, the interface roughness 11 is preferably 100 nm or less.

  The thickness of the interface roughness 11 depends on the applied pulse voltage in the carbonized layer forming step (P04) by the electric discharge machining method. When the applied pulse voltage is lowered, the interface roughness 11 is preferably reduced. On the other hand, in order to remove the work-affected layer 1 formed in the slicing step (P01) and the grinding / polishing step (P03) by the electric discharge machining method, it is necessary to increase the applied voltage. In addition, it is important to reduce the roughness of the interface 11 and to reduce the applied pulse voltage at the time of electric discharge machining that can reliably remove the work-affected layer 1 as much as possible in consideration of the machining time and the like.

<CMP process (P05)>
CMP processing is performed on the surface of the silicon carbide base plate 5 on which the carbonized layer forming step (P04) has been performed by the electric discharge machining method using a polishing liquid containing abrasive grains and an oxidizing agent. FIG. 6 is a schematic diagram of the CMP processing apparatus according to the first embodiment of the present invention.

  In the CMP processing apparatus, a surface plate 13 provided with a pad 12 onto which a polishing liquid 15 is dropped and a head 14 are arranged to face each other, and each of them is configured to rotate independently. Silicon carbide base plate 5 is attached to the lower surface of head 14 with the surface facing downward. Next, the surface plate 13 and the head 14 are opposed to each other, and each is rotated while applying a load to perform CMP processing on the surface of the silicon carbide base plate 5. In the present embodiment, the surface plate 13 has a diameter of 400 mm, and the head 14 has a size capable of attaching the silicon carbide base plate 5 having a diameter of 3 inches.

  In the conventional manufacturing process of a silicon carbide single crystal substrate, the work-affected layer 1 formed in the slicing step (P01), the grinding / polishing step (P03) or the like is removed in the CMP step, and the substrate is flattened. Since the silicon carbide base plate 5 is very hard, it is generally necessary to perform CMP processing for 10 hours or more in the CMP processing using colloidal silica abrasive grains having hardness lower than that of silicon carbide. Therefore, the work-affected layer 1 cannot be removed by short-time CMP processing suitable for mass production, and a good silicon carbide epitaxial layer can be formed on the silicon carbide single crystal substrate thus obtained. There wasn't.

  In the present embodiment, as described above, the surface of the silicon carbide base plate 5 that has undergone the carbonized layer forming step (P04) by the electric discharge machining method, the work-affected layer 1 disappears by the electric discharge machining method, and the carbon-rich carbonization is performed. The layer has a hardness lower than that of silicon carbide having a very high hardness and a hardness close to that of carbon. Therefore, the carbide layer 10 can be removed more easily than the work-affected layer 1 of silicon carbide.

In the present embodiment, CMP processing was performed using a polishing liquid 15 using colloidal silica having a particle diameter of 100 nm as abrasive grains and hydrogen peroxide as an oxidizing agent. In the CMP process, the rotational speed of the surface plate 13 and the head 14 is 50 to 150 rpm, the load is in the range of 150 to 500 gf / cm ² , and the state of the CMP process is observed. Adjusted.

  In the present embodiment, a good mirror surface state can be obtained by performing a CMP process for 3 hours, and the silicon carbide single crystal substrate manufactured in the present embodiment has a scratch on the surface of silicon carbide base plate 5 and processing. Altered layer 1 could be removed almost completely in a short time, and a silicon carbide epitaxial layer having good characteristics could be formed on the surface thereof. In addition, since the CMP process time can be significantly shortened, there is no inconsistency in process time with other semiconductor manufacturing processes, and smooth semiconductor manufacturing can be ensured.

Embodiment 2. FIG.
In the first embodiment, in the carbonized layer forming step (P04), the work-affected layer 1 is eliminated and the carbonized layer 10 is formed by the electric discharge machining method. In the present embodiment, the carbonized layer forming step (P04) is performed. ) Causes the silicon carbide element plate 5 to be annealed in a vacuum to change all or part of the work-affected layer 1 to the carbide layer 10. The other steps are the same as those in the first embodiment.

  As specific examples of the carbonized layer forming step (P04), the electric discharge machining method using electrical energy and the annealing method in vacuum using thermal energy are shown in Embodiments 1 and 2, respectively. It is not limited to these, and it is needless to say that any method can be used as long as it can apply high energy to the silicon carbide base plate 5 to change its composition into the carbon-rich carbide layer 10.

  FIG. 7 is a schematic diagram of annealing apparatus 16 according to the second embodiment of the present invention. Using the annealing apparatus 16 shown in FIG. 7, the silicon carbide base plate 5 subjected to the slicing step (P01), the end face processing step (P02), and the grinding / polishing step (P03) is subjected to a vacuum annealing treatment, and the steps up to here are performed. All or part of the work-affected layer 1 formed in step 1 is altered to the carbonized layer 10.

First, the silicon carbide base plate 5 subjected to the slicing step (P01), the end face processing step (P02), and the grinding / polishing step (P03) is placed on the substrate support 17 and introduced into the annealing furnace 18 of the annealing device 16. . In the present embodiment, 25 silicon carbide base plates 5 are simultaneously installed on the substrate support 17. The air in the annealing furnace 18 is exhausted from the exhaust pipe 19, and the inside of the annealing furnace 18 is evacuated. The degree of vacuum in the annealing furnace 18 is at least 1 Pa or less, preferably 10 ⁻⁴ Pa or less.

  In the annealing furnace 18, a heat insulating material 20 and a heater 21 are provided around the substrate support 17, and the heater 21 is heated by a high frequency induction method using a high frequency coil 22 around the annealing furnace 18, so that silicon carbide element is obtained. Annealing treatment of the plate 5 is performed.

  In the annealing treatment, the surface temperature of the silicon carbide base plate 5 is at least 1500 ° C. or higher, preferably about 1700 ° C. When annealing treatment is performed in which the silicon carbide base plate 5 is heated to a temperature equal to or higher than the vaporization temperature in vacuum, the work-affected layer 1 formed on the surface of the silicon carbide base plate 5 by the slicing step (P01) and the grinding / polishing step (P03). Since at least a part of the surface silicon carbide is decomposed and vaporized, and silicon is vaporized more preferentially, the carbonized layer 10 made of silicon carbide with excess carbon is formed. That is, part or all of the work-affected layer 1 is changed to the carbonized layer 10.

  After the annealing treatment is completed, the temperature of the silicon carbide base plate 5 is lowered, a rare gas such as argon or nitrogen is introduced from the gas introduction pipe 23 to obtain a normal pressure, and then the silicon carbide base plate 5 on which the carbide layer 10 is formed is obtained. It is taken out. Under the annealing treatment conditions of the present embodiment, silicon carbide of about 300 nm from the surface formed the carbide layer 10.

  By performing the annealing treatment of the present embodiment, the carbide layer 10 is formed not only on the surface of the silicon carbide base plate 5 but also on the back surface or the like. A portion where the carbonized layer 10 is not necessary can be reduced by performing an annealing process in oxygen or hydrogen, which will be described later in detail in Embodiment 3, or an oxygen plasma process.

  By performing the same CMP process (P05) as that of the first embodiment on the silicon carbide base plate 5 obtained here, the carbide layer 10 on the surface is removed, and a good mirror surface state is obtained by performing the CMP process for 4 hours. The silicon carbide single crystal substrate manufactured in the present embodiment can remove the scratches on the surface of the silicon carbide base plate 5 and the work-affected layer 1 almost completely in a short time, and the surface is excellent. A characteristic silicon carbide epitaxial layer could be formed.

Embodiment 3 FIG.
FIG. 8 is a process diagram showing a manufacturing process of the silicon carbide single crystal substrate used in the third embodiment of the present invention. In the first embodiment, all or part of the work-affected layer 1 formed by the slicing step (P01) and the grinding / polishing step (P03) is altered to the carbonized layer 10 by the carbonized layer forming step (P04). Thereafter, a CMP step (P05) was performed, but the present embodiment is different in that a carbide layer removing step is provided between the silicon carbide forming step (P04) and the CMP step (P05).

  The carbonized layer forming step (P04) was performed using the electric discharge machining method under the same conditions as in the first embodiment, and then the carbonized layer removing step was performed using the annealing apparatus shown in FIG.

  The silicon carbide base plate 5 subjected to the carbonized layer forming step (P04) by the electric discharge machining method is placed on the substrate support 17 and introduced into the annealing furnace 18 of the annealing device 16. In the present embodiment, 25 silicon carbide base plates 5 are simultaneously installed on the substrate support 17. In order to exhaust the air in the annealing furnace 18 from the exhaust pipe 19 and reduce the residual gas as much as possible, first, the inside of the annealing furnace 18 is evacuated. Next, oxygen gas is supplied from the gas introduction tube 23 to fill the annealing furnace 18 with oxygen gas. At this time, the pressure in the annealing furnace 18 is slightly reduced.

  In the annealing furnace 18, a heat insulating material 20 and a heater 21 are provided around the substrate support 17, and the heater 21 is heated by a high frequency induction method using a high frequency coil 22 around the annealing furnace 18, so that silicon carbide element is obtained. The plate 5 is annealed in an oxygen atmosphere.

  By performing the annealing process under oxygen gas, the carbon component of the carbonized layer 10 on the surface of the silicon carbide base plate 5 becomes carbon dioxide and is removed. The silicon component of the carbide layer 10 becomes silicon dioxide and remains on the surface of the silicon carbide base plate 5, but silicon dioxide is easily removed by a subsequent CMP step (P 05), so that the silicon carbide is finally formed. The surface of the base plate 5 is not contaminated.

  In the present embodiment, the annealing treatment is performed under oxygen gas, but basically the same effect can be obtained even when performed under hydrogen gas. Carbide layer 10 formed on the surface of silicon carbide base plate 5 is removed as hydrocarbon by annealing treatment under hydrogen gas.

  Further, in the present embodiment, the method of removing the carbide layer 10 by performing the annealing process under oxygen gas or hydrogen gas has been described. However, the silicon carbide element is interposed between the carbide layer forming step (P04) and the CMP step (P05). The carbonized layer 10 can also be removed by performing oxygen plasma treatment on the surface of the plate 5, and the same effect can be obtained.

  Furthermore, in the present embodiment, the carbide layer removing step is performed on the silicon carbide base plate 5 that has undergone the carbide layer forming step (P04) using the electric discharge machining method, but the carbonized layer forming step (P04) by vacuum annealing is performed. A similar carbide layer removing step can be performed on the silicon carbide base plate 5 that has undergone the other carbide layer forming step (P04) by applying high energy.

  By performing the CMP process (P05) on the surface of the silicon carbide base plate 5 that has been annealed under oxygen gas or hydrogen gas, or subjected to oxygen plasma treatment, in the same manner as in the first embodiment, two hours The silicon carbide single crystal substrate manufactured in the present embodiment can be made into a good mirror surface state through the CMP process, and the scratches on the surface of the silicon carbide base plate 5 and the work-affected layer 1 are almost completely completed in a short time. Thus, a silicon carbide epitaxial layer having good characteristics could be formed on the surface.

  1 Work-affected layer, 2 Organic protective film, 3 Gold (Au) film, 4 Electric discharge machine 5 Silicon carbide base plate, 6 stage, 7 Wire electrode, 8 Dielectric liquid, 9 Power supply, 10 Carbonized layer, 11 Rough interface 12 pad, 13 surface plate, 14 head, 15 polishing liquid, 16 annealing apparatus, 17 substrate support, 18 annealing furnace, 19 exhaust pipe, 20 heat insulating material, 21 heater, 22 high frequency coil, 23 gas introduction pipe.

Claims (7)

A carbonized layer forming step of forming a carbonized layer by carbonizing the surface of the silicon carbide base plate;
A carbonized layer removing step of removing the carbonized layer formed in the carbonized layer forming step;
A chemical mechanical polishing step of polishing the surface of the silicon carbide base plate after the carbide layer removing step with a polishing liquid containing abrasive grains and an oxidizing agent;
A method for manufacturing a silicon carbide single crystal substrate comprising: The method for producing a silicon carbide single crystal substrate according to claim 1, wherein the carbide layer forming step is performed by heating to a temperature higher than a vaporization temperature of silicon. The method for manufacturing a silicon carbide single crystal substrate according to claim 1, wherein the carbide layer forming step is a step of performing electric discharge machining. The method for manufacturing a silicon carbide single crystal substrate according to claim 1, wherein the carbide layer forming step is a step of annealing in vacuum. The method for producing a silicon carbide single crystal substrate according to claim 1 , wherein the carbide layer removing step is an annealing treatment step in oxygen. Carbide layer removing step, the method for manufacturing the silicon carbide single crystal substrate according to claim 1, characterized in that the annealing step in hydrogen. The method for manufacturing a silicon carbide single crystal substrate according to claim 1 , wherein the carbonized layer removing step is an oxygen plasma treatment.

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