JP5750088B2 - Game machine - Google Patents

Description

  The present invention relates to a technique for preventing illegal acts of gaming machines.

  A gaming machine such as a slot machine or a pachinko machine may be composed of a plurality of control boards in order to distribute the control burden. In these gaming machines, the control boards are connected to each other by a signal line, and a command is transmitted from one control board to the other control board, so that the processes executed by each control board are interlocked and executed by each control board. It realizes that the processing becomes the operation of an integrated gaming machine.

  For example, the gaming machine described in Patent Document 1 has a game content that gives a predetermined profit to a player when a predetermined role continuously wins in a game. In such a gaming machine, The winning itself is controlled by the main control board, and the profit granting by the continuous winning of the predetermined role is controlled by the sub-control board. Specifically, every time a winning occurs, the main control board transmits a command notifying the occurrence of winning and the type of winning to the sub control board. The sub-control board counts the number of consecutive winnings in a predetermined combination based on the command transmitted from the main control means, and counts when receiving a command indicating that the predetermined combination has not been won. When the counted number of winnings reaches a predetermined value, the player is given a predetermined profit.

  In addition, the gaming machine described in Patent Document 2 includes a means for detecting a communication error on a control board that receives a command. Specifically, the gaming machine described in Patent Document 2 includes a command data storage unit that stores a regular command in advance on a control board on the receiving side, and compares the received command with data stored in the command data storage unit. . According to such a configuration, when the received command is altered or missing, it does not match when collated with the data stored in the command data storage unit, so that it can be detected as a communication error.

JP 2012-081176 A JP 2001-058067 A

  By the way, in recent years, fraudulent acts that obstruct command communication have prevailed against the gaming machine described in Patent Document 1. For example, in the gaming machine described in Patent Document 1, even if the consecutive winning of the predetermined role is interrupted, if the communication of the command indicating that the predetermined role has not been won is interrupted, the continuous winning of the predetermined role is continued. If it is, the sub-control board can be misidentified, so that it is easy to obtain a profit by consecutive winning of a predetermined role. Specifically, when a predetermined combination is not won, a command indicating that the predetermined combination has not been won is transmitted / received by intentionally radiating radio waves to the communication path between the main control board and the sub-control board. Interfering can be mentioned. In addition, the reception function of the sub control board is instantaneously malfunctioned by a method such as instantaneously shorting the power supply of the sub control board at the moment when a command indicating that the predetermined role is not won is transmitted. A method is also mentioned.

  If such illegal acts are left unattended, it will cause a great deal of damage to the hall where the gaming machine is installed. Since the error detection method described in Patent Document 2 can detect command alteration / missing, such an illegal act can be detected as a communication error. However, in the conventional gaming machine, even when a command alteration or disappearance is detected, no strict response is performed. This is because the control information modification or loss may occur spontaneously even when the communication means is operating normally. This is because the player who plays the game correctly is disadvantaged.

  An object of this invention is to provide the game machine which can solve the said problem.

  The inventor conducted intensive studies to solve the above problem, and found that when the communication of the command (control information) is hindered by the illegal action, the command is relatively largely lost. This is because control information is transferred in units of a predetermined configuration data in a communication circuit provided between control boards, and a spontaneous communication error is received in units of configuration data due to a framing error during data transfer. On the other hand, in the case of the above-mentioned fraudulent act, it is considered that a failure occurs in the communication circuit for a longer time than a naturally occurring one, so that a plurality of configuration data cannot be received continuously. The inventor has focused on the fact that the configuration data is transmitted at regular intervals via the communication circuit, and has reached the present invention.

  The present invention includes a first control unit that transmits control information, a second control unit that performs control based on the control information received from the first control unit, and the predetermined configuration data as a transfer unit. A gaming machine comprising communication means for transferring data from the first control means to the second control means, wherein the first control means comprises control information generating means for generating the control information; and A transmission unit that transmits the control information generated by the control information generation unit one by one at a predetermined transmission interval in units of the configuration data via the communication unit, and the second control unit includes: A receiving means for receiving the control information in units of the configuration data via the communication means, and a state in which the reception interval at which the receiving means receives the configuration data exceeds a first determination time is defined as a first communication error. First communication to detect And a error detection unit, the first determination time is a game machine, wherein said more than twice of the length of the transmission interval of the configuration data by the transmitting means.

  Even in the case of a communication error that occurs spontaneously or in the case of a communication error due to fraudulent activity, the configuration data reception interval will be longer than normal due to failure to receive the configuration data. When it is caused by fraud, it is often impossible to continuously receive a plurality of pieces of configuration data, so that the reception interval of the configuration data is longer than that naturally occurring. For this reason, in the present invention, by setting the first determination time to an appropriate length and eliminating a reception interval that occurs due to a spontaneous communication error, only communication errors caused by fraud Can be detected as the first communication error.

  As a specific configuration of the present invention, the first communication error detection unit includes a reception state confirmation unit that determines whether the reception unit has received the configuration data at regular intervals, and the reception state confirmation unit. Comprises a non-reception count counting means for counting the number of times of continuous determination that the configuration data has not been newly received, and the count count of the non-reception count counting means corresponds to the first determination time. A configuration is proposed in which the first communication error is detected when the number of times reached. In such a configuration, the first communication error detection means can be suitably realized.

  In the present invention, a second communication error detecting means for detecting an event different from the first communication error as a second communication error, and an error counting means for counting the number of detection times of the second communication error Initializing means for initializing the error counting means upon establishment of a predetermined condition, and when the first communication error is detected, or when the number of counts of the error counting means reaches the first number of detections. A configuration comprising a first error processing execution means for executing the first error processing is proposed.

  In such a configuration, in addition to the first communication error, the second communication error is also detected, and the first error processing is performed based on the detection of each communication error, resulting in fraud. It is possible to more reliably control communication errors. Here, since the second communication error cannot distinguish between a communication error caused by fraud and a spontaneous communication error, if the first communication error process is executed immediately upon detection of the second communication error, a harmful effect occurs. However, in this configuration, the first communication error is set only when the error counting means and the initialization means are appropriately set, and the second communication error is detected at a frequency that cannot occur due to a spontaneous communication error. Such an adverse effect can be eliminated by executing the processing.

Further, in the above configuration, the second communication error detection unit detects, as the second communication error, a state where a reception interval at which the reception unit receives the configuration data exceeds a second determination time. Therefore, it is proposed that the second determination time is longer than the transmission interval of the configuration data by the transmission unit and shorter than the first determination time.

In such a configuration, since the first communication error and the second communication error are both based on the reception interval of the configuration data, the first communication error detection means and the second communication error detection means are: A means for monitoring the reception interval of the configuration data can be shared. Therefore, according to this configuration, there is an advantage that the first communication error and the second communication error can be detected with a simple configuration.

  Further, in the above configuration, the first control unit transmits control information including an error correction code, and the second communication error is detected based on the error detection code. It is proposed to be an information error.

  In such a configuration, not only when the configuration data cannot be received, but also when the configuration data is modified, it is possible to control as a communication error caused by fraud.

  Further, in the above configuration, a second error process different from the first error process when the count number of the error counter means reaches a second detection number less than the first detection number. It is proposed to include second error processing execution means for executing.

  In such a configuration, regarding the detection of the second communication error, the second error process is executed before the first error process is executed. In this way, if error processing is executed in stages, a relatively light error processing is executed before severe error processing such as game interruption is executed, so that the level of the game machine operation is not affected. It is possible to deal with communication errors.

  Further, in the present invention, the control information generation unit generates specific control information when the control information to be transmitted by the transmission unit does not exist, and the transmission unit includes the specific control information. By transmitting information, a configuration is proposed in which the configuration data is transmitted without interruption at the transmission intervals over a plurality of transmission periods of the control information.

  In such a configuration, since the first communication error detecting means can be validated over a plurality of control information reception periods, it is possible to continuously monitor communication errors caused by fraudulent acts. Further, in such a configuration, even when all the configuration data of the control information cannot be received by the second control unit, it can be detected by the first communication error detection unit.

  As described above, according to the present invention, it becomes possible to detect only a communication error that is considered to be caused by fraud as the first communication error. Therefore, strict countermeasures are taken based on the detection of the first communication error. Even if it is taken, there is no penalty for a player who is playing correctly. For this reason, in the gaming machine of the present invention, it is possible to appropriately control fraudulent acts that interfere with communication of control information.

FIG. 3 is a perspective view of the slot machine 1 according to the first embodiment. 2 is a perspective view showing an outline of the slot machine 1 with a front door 3 opened. FIG. 3 is a block diagram showing a control circuit of the slot machine 1. FIG. It is a chart explaining the contents of a command. 3 is a block diagram showing a control circuit related to communication between a main control board 14 and a sub control board 15. FIG. It is a flowchart which shows the control content of a main control process. It is a flowchart which shows the control content of a command transmission process. (A) is a flowchart which shows the control content of a sub control process, (B) is a flowchart which shows the control content of a communication error process. (A) is a timing chart showing a case where communication error processing is executed, and (B) is a timing chart showing a case where communication error processing is not executed. (A) is a timing chart showing a case where a command is normally received, and (B) is a timing chart showing a case where a severe communication error is detected. It is a timing chart which shows the case where a minor communication error is detected. It is a flowchart which shows the control content of a communication error detection process. It is a flowchart which shows the control content of the communication error detection process which continues from FIG. 10 is a flowchart illustrating control contents of communication error detection processing according to the second embodiment. 10 is a timing chart illustrating a case where a minor communication error is detected in the third embodiment. 10 is a flowchart illustrating control details of communication error detection processing according to the third embodiment. In Example 4, (A) is a timing chart which shows the case where a command is received normally, (B) is a timing chart which shows the case where a serious communication error is detected. In Example 4, it is a timing chart which shows the case where a minor communication error is detected. In the fourth embodiment, (A) is a timing chart showing a case where communication error processing is executed, and (B) is a timing chart showing a case where communication error processing is not executed. 10 is a flowchart illustrating control details of communication error detection processing according to the fourth embodiment. It is a flowchart which shows the control content of the communication error detection process following FIG. It is a flowchart which shows the control content of the communication error detection process following FIG.

Embodiments of the present invention are described according to the following examples.
In the following first to fourth embodiments, the first control means according to the present invention corresponds to the main microcomputer 30 of the main control board 14. The second control means according to the present invention corresponds to the sub microcomputer 31 of the sub control board 15. The communication means according to the present invention corresponds to the serial communication circuits 32 and 33 and the signal line 16 of the main control board 14 and the sub control board 15. The control information according to the present invention corresponds to a command transmitted from the main control board 14 to the sub control board 15. The receiving means according to the present invention corresponds to the receiving buffer 34 of the sub microcomputer 31.

  In this embodiment, the present invention is applied to a slot machine. As shown in FIGS. 1 and 2, the housing 2 of the slot machine 1 is opened forward and is covered by the front door 3 from the front. As shown in FIG. 1, a visual recognition window 4 for visually recognizing three reels 9 arranged inside the housing 2 is provided at the center of the front door 3. A horizontally long rectangular liquid crystal display 10 is disposed above the viewing window 4. Further, on the front side of the front door 3, various switches such as bet switches 5 a and 5 b, a start switch 6, a stop switch 7, and a checkout switch 8 used for game operation are disposed below the viewing window 4. The front door 3 is provided with a plurality of speakers 11 and effect lamps 12 at appropriate positions.

  In addition, as shown in FIG. 2, the main control board 14 and the sub control board 15 are installed inside the housing 2 in a state where the main control board 14 and the sub control board 15 are housed in the case. The main control board 14 and the sub control board 15 constitute a control device of the slot machine 1, and commands (in one direction) from the main control board 14 to the sub control board 15 via the signal line 16 connecting the boards. Control information) is transmitted. Inside the housing 2, a power box 19 including a power-on switch 18 and a hopper unit 20 are disposed below the reel 9. A front door opening detection sensor 22 that detects opening of the front door 3 is provided on the right side of the housing 2. The front door opening detection sensor 22 is disposed so as to face the reflecting plate 23 provided on the front door 3 and optically detects the opening of the front door 3.

Next, a control circuit for controlling the operation of the slot machine 1 will be described with reference to FIG.
The main control board 14 controls the progress of the game, and includes a main microcomputer 30, a random number generation circuit, a latch circuit, and a serial communication circuit 32. The main microcomputer 30 includes a CPU, a RAM, a ROM, an I / O port, and the like, and includes the above-described start switch 6, stop switch 7, bet switches 5a and 5b, settlement switch 8, and front door opening detection sensor 22. Is input to the I / O port of the main microcomputer 30. Signals are output from the main microcomputer 30 to a motor for driving the reel 9, a motor for driving the hopper unit 20, and an external signal output board for transmitting a signal to the outside through the I / O port. Is done. The main microcomputer 30 transmits various commands to the sub-control board 15 via the serial communication circuit 32. The command transmitted from the main control board 14 to the sub control board 15 is sent only in one direction, and no command is sent from the sub control board 15 to the main control board 14. The main microcomputer 30 generates an interrupt to the CPU at intervals of 1.8 milliseconds. A command transmission process, which will be described later, is executed every time this interrupt occurs. The RAM of the main microcomputer 30 has a storage area as a transmission buffer for temporarily storing commands to be transmitted. The CPU of the main microcomputer 30 generates a command and stores the generated command in the transmission buffer. Note that the transmission buffer can store a plurality of commands. The main microcomputer 30 transmits commands in the order stored in the transmission buffer.

  The sub-control board 15 controls effects relating to games in accordance with commands received from the main control board 14, and includes a sub-microcomputer 31, a serial communication circuit 33, a random number generation circuit, a latch circuit, An audio control circuit, an image control circuit, and an LED drive circuit are provided. The sub microcomputer 31 includes a CPU, a RAM, a ROM, an I / O port, and the like. The ROM of the sub microcomputer 31 stores fixed data relating to a wide variety of effect patterns. The RAM of the sub microcomputer 31 is provided with a reception buffer 34 (see FIG. 5) for receiving a command transmitted from the main control board 14. The serial communication circuits 32 and 33 of the main control board 14 and the sub control board 15 are interconnected by a signal line 16, and a command transmitted from the main control board 14 is transmitted to the serial communication circuits 32 of both control boards 14 and 15. , 33 to the reception buffer 34. The CPU of the sub microcomputer 31 generates interrupts at intervals of 1.2 milliseconds. The command buffered in the reception buffer 34 is acquired every time this interrupt occurs. Then, the CPU of the sub microcomputer 31 executes processing corresponding to the acquired command. Specifically, the audio control circuit outputs a sound from the speaker by outputting a signal from the I / O port to the audio control circuit, and the image control by outputting a signal from the I / O port to the image control circuit. The circuit outputs an image to the liquid crystal display and outputs a signal from the I / O port to the LED driving circuit, so that the LED driving circuit turns on the effect lamp.

  In the present embodiment, information that can specify the state of the slot machine 1 is output from the main control board 14 and the sub control board 15 to the external signal output board. The external signal output board outputs a signal necessary for an external device such as a computer installed in order to centrally manage the operating state of the gaming machine in a game hall or the like. In this embodiment, the number of game media inserted, the number of game media paid out, a signal indicating that a bonus has occurred, an error has occurred, etc. are sent from the main control board 14 via the external signal output board. Output to an external device. In this embodiment, the sub-control board 15 is also configured to output various signals to an external device via the external signal output board.

  FIG. 4A shows a data format of a command transmitted from the main control board 14 to the sub control board 15. This command corresponds to control information according to the present invention. As shown in FIG. 4A, the command is 5-byte data in which 5 pieces of 1-byte configuration data form one set. That is, the command is meaningful by a plurality of configuration data. The configuration data constituting the command includes a communication unit for normally performing communication and a data unit for storing information of the main control board 14. Specifically, as shown in FIG. 4B, the configuration data “ST” at the head of the command constitutes a communication unit, and a fixed value indicating the head of the command is stored. The second and third configuration data “DATA1” and “DATA2” constitute a data part, and store values corresponding to the type and contents of the command. The fourth component data “CH” stores a checksum that is an error correction code. Specifically, the configuration data “CH” stores the lower 1 byte when “DATA1” and “DATA2” are added. The fifth configuration data “EN” configures the communication unit, and stores a fixed value indicating the end of the command.

  FIG. 4C shows a specific example of the data portion of the command (“DATA1” and “DATA2”). In the figure, “h” means a hexadecimal number. In this embodiment, a plurality of types of commands including an internal winning command, a left reel stop command, a middle reel stop command, a right reel stop command, a winning determination command, a power-on command, a door command, and an active command are sent from the main control board 14. Transmit to the control board 15. The internal winning command is a command that can specify the lottery result of the winning lottery process, and is transmitted when the start switch 6 is operated and the winning lottery process is executed. The left reel stop command is a command that can specify the stop position of the left reel, and is transmitted when the left reel stops. The middle reel stop command is a command that can specify the stop position of the middle reel, and is transmitted when the middle reel stops. The right reel stop command is a command that can specify the stop position of the right reel, and is transmitted when the right reel stops. The winning determination command is a command that can specify the presence / absence of a winning and the type of winning, and is transmitted when all the reels are stopped and the stop symbol determining process is performed. The power-on command is transmitted when the supply of power to the main control board 14 is started and the initial setting at the start-up in the main control board 14 is completed. The door command is a command indicating the detection state of the front door opening detection sensor 22, that is, ON (open state) / OFF (closed state), when the power is turned on, at the end of one game (after the game is over, the bet of the next game). Sent when the detection state of the front door opening detection sensor 22 changes (ON to OFF, OFF to ON) until the setting of the number can be started). The active command is a command that can specify whether or not an error has occurred in the main control board 14 and the type of error. Here, commands other than the active command are generated and transmitted according to the progress of the game and the operating state of the switch and sensor, whereas the active command is generated and transmitted regularly during the period when these commands are not transmitted. Sent. That is, the active command corresponds to specific control information according to the present invention.

  FIG. 5 is a block diagram showing a control circuit related to communication between the main control board 14 and the sub control board 15. In the present embodiment, the configuration data is transmitted in series in a predetermined order at predetermined intervals at a predetermined interval using a single signal line 16 (serial communication) in a main sequence by the main control board 14. To the sub-control board 15.

  Specifically, the main microcomputer 30 outputs the configuration data stored in the transmission buffer from the data bus terminal. The data bus terminal of the main microcomputer 30 and the data bus terminal of the serial communication circuit 32 are connected via a data bus on the main control board 14. The serial communication circuit 32 of the main control board 14 is for outputting the configuration data input to the data bus terminal from the connection terminal bit by bit in a predetermined communication procedure. When the configuration data is input to the data bus terminal, the serial communication circuit 32 of the main control board 14 temporarily stores the input data in the transmission data register, and the serial / parallel conversion unit stores the configuration data stored in the transmission register. Each bit is output from the connection terminal by a predetermined communication procedure. At this time, the serial communication circuit 32 of the main control board 14 initializes the transmission data register.

Data output from the main control board 14 is input to the connection terminal of the serial communication circuit 33 of the sub control board 15 through the signal line 16. When 1-bit data is input to the connection terminal, the serial-parallel conversion unit of the serial communication circuit 33 of the sub-control board 15 sequentially stores the input data in the reception data register. When one piece of configuration data is stored in the reception data register (that is, when one byte of data is stored), the serial communication circuit 33 of the sub control board 15 converts the data stored in the reception data register into data. Output from the bus terminal to the outside. At this time, the serial communication circuit 33 of the sub-control board 15 initializes the reception data register. The configuration data output from the data bus terminal of the serial communication circuit 33 on the sub control board 15 is input to the data bus terminal on the sub microcomputer 31 via the data bus on the sub control board 15. When the configuration data is input to the data bus terminal, the sub microcomputer 31 stores the configuration data input to the reception buffer 34 which is a storage area secured on the RAM of the sub microcomputer 31.
As described above, data transmitted from the main microcomputer 30 in units of configuration data is sent to the reception buffer 34 of the sub microcomputer 31 via the serial communication circuits 32 and 33 of both control boards 14 and 15 and the signal line 16. Received in units of configuration data. That is, in this embodiment, the serial communication circuits 32 and 33 and the signal line 16 correspond to communication means according to the present invention, and the reception buffer 34 constitutes reception means according to the present invention.

FIG. 6 shows the control contents of the main control processing that constitutes the main routine in the control contents of the CPU of the main control board 14. Details of steps S100 to S108 executed in the main control process are as follows.
S100: Wait until a predetermined number (the number of medals required to execute one game) is set.
S101: Wait until the start switch 6 is operated.
S102: When the start switch 6 is operated, the latch circuit extracts the random number generated by the random number generation circuit. It is determined whether or not winning of the winning combination is allowed based on the extracted random number value.
S103: The rotation of each reel 9 is started, and when the reel 9 reaches a predetermined rotation speed, the operation of the stop switch 7 is validated.
S104: Wait until the player operates the stop switch 7.
S105: When the player operates the stop switch 7, the reel 9 corresponding to the operated stop switch 7 stops rotating.
S106: Wait until all the reels 9 stop rotating.
S107: It is determined whether or not the display result derived by the reel 9 is in a predetermined mode. Specifically, it is determined whether or not the combination of symbols displayed on the winning line matches the combination of symbols determined as a predetermined winning combination. Is determined.
S108: A process according to the determination result of the stop symbol determination process is performed. Specifically, when it is determined that a winning has occurred, the number of payouts corresponding to the winning is added to the credit, and when the credit exceeds a predetermined number (50), the surplus medal is paid out. put out.

  FIG. 7 shows the contents of command transmission processing executed by the CPU of the main microcomputer 30. This command transmission process is executed every time the aforementioned interrupt occurs, that is, at an interval of 1.8 milliseconds. In the command transmission process, first, it is determined whether or not all the configuration data constituting the command has been transmitted, that is, whether or not the command is being transmitted (S200). If it is determined that the command is being transmitted, the process proceeds to step S203. If it is determined that the command is not being transmitted, the process proceeds to step S201. In step S201, it is determined whether or not the transmission buffer is empty. If it is determined that the transmission buffer is empty, an active command is generated and stored in the transmission buffer (S202), and the process proceeds to step S203. If it is determined that the transmission buffer is not empty, the process directly proceeds to step S203. In step S203, one byte (configuration data) of the command stored in the transmission buffer is output from the data bus terminal, transmitted to the sub control board 15 via the serial communication circuit 32, and the command transmission processing is terminated. .

  Thus, the CPU of the main microcomputer 30 generates a command according to the progress of the game according to the execution state of the main control process, and stores it in the transmission buffer. Further, the CPU of the main microcomputer 30 determines whether or not the detection state of the front door opening detection sensor 22 has changed every time the above-described interruption occurs, and generates a door command and stores it in the transmission buffer. To do. Then, when the transmission buffer becomes empty, the CPU of the main microcomputer 30 generates an active command and stores it in the transmission buffer, thereby transmitting the command to the sub-control board 15 without interruption. It is always transmitted to the sub-control board 15 at intervals of 1.8 milliseconds. That is, the control information generation means according to the present invention is mainly realized by the main control process and the command transmission process. Further, the transmission means according to the present invention is mainly realized by the above step S203.

  FIG. 8A shows the control contents of the CPU of the sub microcomputer 31 and the control contents of the sub control process constituting the main routine. As shown in FIG. 8A, in this sub-control processing, the CPU of the sub-microcomputer 31 has received a predetermined number (5) of configuration data, that is, has received one command. Whether or not one command has been received, processing corresponding to the received command is executed (S302). For example, when an internal winning command is received, an effect based on the result of the combination lottery process is started. Specifically, the left reel corresponding image, the middle reel corresponding image, and the right reel corresponding image are displayed on the liquid crystal display 10. When a left reel stop command, middle reel stop command, and right reel stop command are received, an effect corresponding to each reel is performed. Specifically, when a left reel stop command is received, the left reel corresponding image is deleted. If the winning combination corresponding to the result of the winning lottery process is not realized based on the stop position, the effect started based on the reception of the internal winning command is stopped. When the winning determination command is received, the effect started based on the reception of the internal winning command is ended. Furthermore, when there is a prize, an effect is executed according to the type of prize. When a power-on command is received, if no communication error has occurred at the time of reception, the sub-control board 15 executes an initialization process. When the door command is received, the front door 3 is informed that it is open. Specifically, the fact is displayed on the liquid crystal display 10. In addition, when an active command indicating an error state is received, notification is performed in such a manner that the type of error can be specified. Specifically, an error code corresponding to the type of error is displayed on the liquid crystal display 10.

  FIG. 8B shows the control contents of communication error processing executed by the CPU of the sub microcomputer 31. This communication error process corresponds to the first error process according to the present invention, and is executed when a communication error described later is detected. Specifically, in such communication error processing, a communication error display indicating the occurrence of a communication error is displayed on the liquid crystal display 10 (S401), and it is determined whether or not an error cancellation condition is satisfied (S402). Then, the communication error display (S401) is continued until it is determined that the error cancellation condition is satisfied. While this communication error display (S401) continues, no other image is displayed on the liquid crystal display 10. In this embodiment, when the power is turned on again and the front door 3 is opened, an error cancellation condition for ending the communication error process is set. Specifically, the initialization process is executed only when the power-on command and the door command are received and the door command indicates that the front door 3 is opened, and the communication error process is completed by the initialization. To do. In other words, during the execution of the communication error process, even if only the power-on command is received, the initialization process is not performed and the communication error process is not terminated. In this embodiment, since the error cancellation condition is configured in this way, the locked front door 3 must be opened when the communication error process is terminated. For this reason, when communication error processing is executed due to fraud, it is possible to prevent a person who has performed fraud from canceling communication error processing. In addition, even if a fraudster can open the front door 3, it is obviously unnatural that someone other than the attendant of the game hall opens the front door 3 during business hours. Because it attracts the attention of third parties, including attendants at the amusement hall, it is possible to realize early detection of fraud.

  The CPU of the sub microcomputer 31 executes a communication error detection process every time the aforementioned interrupt occurs. In the communication error detection process, a communication error is detected based on data received from the main control board 14, and the communication error process is executed according to the content of the detected communication error. That is, the communication error detection process realizes the first communication error detection process and the second communication error detection process according to the present invention. Specifically, in the communication error detection process, the CPU of the sub microcomputer 31 determines whether or not the reception buffer 34 has received new configuration data (new configuration data) at intervals of 1.2 milliseconds at which an interrupt occurs. And the number of times of continuous determination that new configuration data has not been received is counted, thereby monitoring the configuration data reception interval. As described above, since the configuration data is always transmitted from the main control board 14 at intervals of 1.8 milliseconds, when communication is normally performed, at least twice (2) in the communication error detection process. New configuration data is confirmed in the reception buffer 34 once every .4 milliseconds). In other words, in the communication error detection process, when the reception of new configuration data cannot be confirmed continuously twice or more, the communication is not normally performed. In this way, the communication error detecting means detects a case where the reception of the configuration data cannot be confirmed continuously twice or more as a communication error.

  Here, in this embodiment, in the communication error detection process, a case where the reception of the configuration data cannot be confirmed three times or more is regarded as a severe communication error, and a case where the reception of the configuration data cannot be confirmed twice is a minor communication error. Detect as distinct. The case where reception of configuration data cannot be confirmed three or more times consecutively corresponds to a state where configuration data has not been received for 3.6 milliseconds, and two pieces of configuration data to be received at 1.8 millisecond intervals. This is a case where continuous reception was not possible. Most communication errors that occur spontaneously cannot receive the configuration data independently. Therefore, if the configuration data cannot be received in succession two times, there is a very high possibility that it is caused by fraud. For this reason, in this embodiment, such a case is detected by distinguishing a severe communication error, and when a severe communication error is detected, a communication error process is immediately executed. That is, the severe communication error corresponds to the first communication error according to the present invention, and the determination time of 3.6 milliseconds related to the detection of the severe communication error is the first determination time according to the present invention. Equivalent to.

  On the other hand, the case where a minor communication error is detected means that the configuration data has not been received for 2.4 milliseconds, and the configuration data to be received from the main control board 14 side at intervals of 1.8 milliseconds is This is a case where only one message cannot be received due to the cause. Such an event may be due to fraud, but may have occurred spontaneously. For this reason, in this embodiment, simply detecting a minor communication error does not execute communication error processing, and if a minor communication error is repeated at a frequency that is not considered to be a spontaneous occurrence, Communication error processing is to be executed. Specifically, as shown in FIG. 9A, the CPU of the sub-microcomputer 31 counts the number of minor communication errors detected as an error count, and performs communication error processing when the error count reaches three times. At the same time, the detection interval of the minor communication error is measured by a timer, and as shown in FIG. 9B, when the minor communication error is not detected for a predetermined time, the error count is initialized (0 times). That is, the minor communication error corresponds to the second communication error according to the present invention, and the determination time of 2.4 milliseconds related to the detection of the minor communication error is the second determination time according to the present invention. Equivalent to. The error count corresponds to the error counting means according to the present invention, and three error counts correspond to the first number of detections according to the present invention. The timer constitutes initialization means for error counting means according to the present invention.

Next, the execution mode of the communication error detection process will be described using a timing chart.
FIG. 10A is a timing chart when the winning determination command and the active command are normally transmitted and received. In such an example, the main control board 14 transmits a winning determination command and an active command at intervals of 1.8 milliseconds for each configuration data. On the other hand, when the sub control board 15 executes the communication error detection process at intervals of 1.2 milliseconds and confirms the configuration data in the reception buffer 34, the sub control board 15 sets the reception count to the initial value “5” and stores the configuration data. If it cannot be confirmed, 1 is subtracted from the reception count. This reception count is for counting the number of times that the reception of the configuration data cannot be continuously confirmed in the communication error detection process. When this reception count becomes “3”, a minor communication error occurs, and the reception count becomes “2”. Will cause a severe communication error. That is, this reception count constitutes the non-reception frequency counting means according to the present invention. In the example of FIG. 10A, since the configuration data has been normally received, the reception count does not become 3 or less, and the communication error process is not executed.

  FIG. 10B is a timing chart when a severe communication error is detected. In such an example, although the winning determination command and the active command are transmitted from the main control board 14, two component data (“05” and “01”) of the winning determination command are continuously received for some reason. Do not reach 34. In this case, the sub-control board 15 determines that there is no new configuration data (Err) in the reception buffer 34 at the timing (T2, T4) at which two configuration data that have not arrived should be received, and the reception count is subtracted. Is done. For this reason, in such an example, the reception count is subtracted to “2” at time T4 in the figure, resulting in a severe communication error, and communication error processing is executed at time T5 in the figure.

  FIG. 11 is a timing chart when a minor communication error is detected. In such an example, although the winning determination command and the active command are transmitted from the main control board 14, the winning buffer determination command and the active command configuration data (“05”, “08”) are received by one unit for some reason. Do not reach 34. In this case, the sub-control board 15 determines that there is no configuration data (Err) in the reception buffer 34 at the timing (T2, T10) at which two configuration data that have not arrived should be received, and the reception count is subtracted. The For this reason, in such an example, at the time of T3 in the figure, the reception count is subtracted to “3”, resulting in a minor communication error, the error count is added to 1, and a timer for measuring a predetermined time is set. Operate. At time T10 in the figure, the reception count is again subtracted to “3” to cause a minor communication error, the error count is added to 2, and the timer is reset to the initial setting for a predetermined time. Start the measurement from the beginning. In this example, a minor communication error is detected before the timer expires the predetermined time, so the error count is 2. However, if the timer expires before the minor communication error is detected, the error count Is reset to zero.

  As described above, in this embodiment, the CPU of the sub-microcomputer 31 determines whether or not new configuration data has been received at regular intervals (1.2 millisecond intervals), and continuously receives configuration data. The configuration data reception interval is monitored by counting the number of times it is determined that it is not, and when the configuration data reception interval exceeds twice the configuration data transmission interval, a serious communication error is detected. As described above, such a severe communication error is not a spontaneous communication error, but is highly likely to be a communication error caused by fraud. Therefore, based on the detection of such a severe communication error, it is severe. Even if the communication error process is executed, the player who is playing the game correctly is not disturbed. Therefore, according to the slot machine 1 of the present embodiment, it is possible to appropriately control fraudulent acts that interfere with command communication.

  Further, in this embodiment, when the sub microcomputer 31 detects a minor communication error when the configuration data reception interval exceeds the configuration data transmission interval, and detects this minor communication error at a certain frequency or more, The same communication error process as the communication error process is executed. Minor communication errors may be caused by fraud and may occur spontaneously. Thus, communication error processing is performed only when the detection frequency exceeds a certain frequency. If executed, the communication error process can be executed only when it is considered that the communication error is caused by an illegal act, and an illegal act that cannot be detected as a severe communication error can be appropriately controlled. In addition, since the light communication error and the heavy communication error differ only in the determination criteria of the reception interval of the configuration data, this embodiment has an advantage that two types of communication errors can be detected with a simple configuration. .

  In the present embodiment, the main microcomputer 30 is configured so that the configuration data is constantly transmitted at intervals of 1.8 milliseconds by generating and transmitting an active command when no command exists in the transmission buffer. Therefore, there is an advantage that the sub-microcomputer 31 can always execute the communication error detection process and monitor fraud without interruption.

Next, the control process of the communication error detection process will be described.
12 and 13 are flowcharts showing the control contents of the communication error detection process executed by the CPU of the sub microcomputer 31. FIG. In the communication error detection process, the CPU of the sub microcomputer 31 first subtracts the reception count (S501), and then determines whether or not the reception count is 1 (S502). If it is determined that the reception count is 1, the communication error process (see FIG. 8B) is executed (S503), and the communication error detection process is terminated. If it is determined in step S502 that the reception count is not 1, if the timer for resetting the error count is not 0, 1 is subtracted from the timer (S601), and new configuration data is stored in the reception buffer 34. It is determined whether or not (S601). If it is determined that there is no new configuration data in the reception buffer 34, the process proceeds to step S607. If it is determined that there is configuration data in the reception buffer 34, the process proceeds to step S603. In step S603, it is determined whether or not the reception count is 2. If it is determined that the reception count is not 2, the reception count is set to the initial value “5”, and the process proceeds to step S607. On the other hand, when it is determined that the reception count is 2, 1 is added to the error count (S604), and it is determined whether or not the error count is 3 (S605). If it is determined that the error count is 3, communication error processing (see FIG. 8B) based on three minor communication error detections is executed (S609), and the communication error detection processing is terminated. On the other hand, if it is determined in step S605 that the error count is not 3, an initial value (predetermined time) is set in the timer (S606), and the process proceeds to step S607. In step S607, it is determined whether or not the timer is 0, that is, whether or not the measurement of the set time has expired. If it is determined that the timer is not 0, the communication error detection process is terminated and the timer is 0. If it is determined that there is an error, the error counter is initialized to 0 (S608), and the communication error detection process is terminated.

  In the control content of the communication error detection process, the first communication error detection means according to the present invention is mainly realized by steps S501, S502, S602, and S610. The second communication error detecting means according to the present invention is mainly realized by steps S501, S602, S603, and S610. Also, the reception state confirmation means according to the present invention is mainly realized by step S602. Further, the non-reception frequency counting means according to the present invention is mainly realized by steps S501 and S610. Further, the error counting means according to the present invention is mainly realized by step S604. The initialization unit according to the present invention is mainly realized by steps S601, S606, S607, and S608. The first error processing execution means according to the present invention is mainly realized by steps S503 and S609.

  In this embodiment, the communication error detection process of the first embodiment is partially changed. Specifically, in the first embodiment, communication error processing (see FIG. 8B) is performed when a severe communication error is detected and when an error count for counting the number of detections of minor communication errors reaches three. Run. In this embodiment, in addition to the execution of the communication error process, a warning process different from the communication error process is executed when the error count reaches twice. In this warning process, the sub-control board 15 notifies the external device via the external signal output board that the communication state in the machine is defective. This warning process is a kind of error process, but even if the warning process is executed, the game can continue as usual, there is no special error release condition, and the effect on the player compared to the communication error process Is mild. In this way, in this embodiment, warning processing is executed before execution of the communication error processing, so if the attendant of the game hall checks the machine based on such warning processing, before execution of the communication error processing, It is possible to deal with communication errors with ease. That is, such warning processing corresponds to the second error processing according to the present invention, and two error counts correspond to the second number of detections according to the present invention. In the present embodiment, portions common to the first embodiment are denoted by the same reference numerals as those in the first embodiment and description thereof is omitted.

  FIG. 14 is a flowchart illustrating the control contents in the second half of the communication error processing according to the second embodiment. As can be seen from comparison with the communication error processing of the first embodiment (see FIG. 13), in this embodiment, it is determined whether or not the error count is 2 in step S605a, and the error count is determined to be 2. A warning process is executed (S605b). That is, the second error processing execution means according to the present invention is mainly realized by such steps S605a and S605b. The other control contents of the communication error detection process are the same as those in the first embodiment (see FIGS. 12 and 13) including the first half of the control contents.

  In this embodiment, the communication error detection process of the first embodiment is partially changed. Specifically, in the first embodiment, a minor communication error and a severe communication error are detected according to the length of the configuration data reception interval. On the other hand, in this embodiment, a case where the checksum (error correction code) of the command does not match is detected as a minor communication error, and a communication error detection based on the reception interval of the configuration data is performed only in the case of a severe communication error. And That is, in this embodiment, when the CPU of the sub microcomputer 31 receives the configuration data “CH” in which the checksum is stored, the checksum is checked, and if the checksum does not match, it is detected as a minor communication error. To do. The number of minor communication errors detected is counted as an error count as in the first embodiment, and communication error processing is executed when the error count reaches three. In this embodiment, since the error in the content of the configuration data is detected as a minor communication error instead of the reception interval of the configuration data, not only when the configuration data cannot be received, but also when the configuration data is modified, There is an advantage that it can be controlled. In the present embodiment, portions common to the first embodiment are denoted by the same reference numerals as those in the first embodiment and description thereof is omitted.

  FIG. 15 is a timing chart when a minor communication error is detected in this embodiment. In such an example, although the winning determination command and the active command are transmitted from the main control board 14, the winning buffer determination command and the active command configuration data (“05”, “08”) are received by one unit for some reason. Do not reach 34. In this case, the sub-control board 15 determines that there is no configuration data (Err) in the reception buffer 34 at the timing (T2, T10) at which the two configuration data that have not arrived should be received. When the configuration data “CH” storing the checksum is received at T5 and T13 in the figure, the checksum value is checked, a minor communication error occurs due to the checksum mismatch, and an error count is added respectively. The

  FIG. 16 is a flowchart illustrating the control contents in the second half of the communication error processing according to the present embodiment. As can be seen from comparison with the communication error processing (see FIG. 13) of the first embodiment, in this embodiment, in step S603a, whether the configuration data of the reception buffer 34 is the configuration data “CH” of the fourth byte of the command. Determine whether or not. If it is determined that the configuration data “CH” is the fourth byte, it is determined whether the checksum matches the data portion received immediately before (S603b), and it is determined that the checksum does not match. In this case, 1 is added to the error count (S604). The other control contents of the communication error processing are the same as those of the first embodiment (see FIGS. 12 and 13) including the first half of the control contents.

  In the present embodiment, the command transmission mode is changed from that in the first embodiment, and the communication error detection process is partially changed accordingly. Specifically, in the first embodiment, the main control board 14 constantly transmits configuration data at 1.8 millisecond intervals by generating an active command, whereas in the present embodiment, the main control board 14 The active command is not generated / transmitted, and depending on the situation, there is a pause period in which the main control board 14 does not transmit the command. In this embodiment, in order to cope with such a suspension period, the sub microcomputer 31 is prevented from detecting a communication error based on the reception interval of the configuration data during the suspension period.

  Specifically, the sub microcomputer 31 includes a count flag that manages whether communication error detection is valid / invalid, and detects a communication error only when the count flag is valid. The count flag becomes valid when the configuration data “ST” indicating the head of the command is received, and becomes invalid when the configuration data “EN” indicating the end of the command is received. That is, in the present embodiment, the sub microcomputer 31 receives new configuration data at intervals of 1.2 milliseconds until receiving configuration data from the beginning to the end of one command. It is determined whether or not. Then, as in the first embodiment, when the reception of the configuration data cannot be confirmed three or more times consecutively, it is detected as a severe communication error, and the communication error process is immediately executed. In addition, when the reception of the configuration data cannot be confirmed twice consecutively, it is detected as a minor communication error, and the communication error process is executed when the error count reaches three times. Here, in this embodiment, when the configuration data “ST” and “EN” at the beginning or end of the command cannot be received normally, the communication error detection processing is not normally executed. If the data “ST” and “EN” cannot be confirmed, a communication error is immediately set. As described above, the present invention can also be applied to a configuration having a pause period in which the main control board 14 does not transmit a command. In this embodiment, communication error detection is enabled / disabled based on the configuration data of the beginning and end of the command. However, instead of this configuration, the main control is performed before and after the transmission of the command. A signal for switching between valid / invalid of communication error detection may be separately transmitted from the substrate 14.

Next, the execution mode of the communication error detection process will be described using a timing chart.
FIG. 17A is a timing chart when the winning determination command is normally transmitted and received. In such an example, the main control board 14 transmits a winning determination command for each configuration data at an interval of 1.8 milliseconds, and thereafter stops command transmission. In this case, the sub-microcomputer 31 switches the count flag from invalid (N) to valid (Y) at the time (T1) of receiving the first configuration data “ST” of the winning determination command, and 1.2 mm The presence or absence of configuration data in the reception buffer 34 is confirmed at intervals of seconds. Then, at the time (T7) when the terminal configuration data “EN” is received, the count flag switches from valid (Y) to invalid (N), and the sub microcomputer 31 stops detecting the communication error. For this reason, after receiving the winning determination command (T8 to T15), the sub microcomputer 31 does not detect the communication data and does not execute the communication error process even if it does not receive the configuration data.

  FIG. 17B is a timing chart when a severe communication error is detected. In such an example, the main control board 14 pauses the command transmission after transmitting the winning determination command, as in FIG. Here, in this example, the two pieces of configuration data (“05”, “01”) of the winning determination command do not reach the reception buffer 34 continuously. In this case, since the count flag is valid (Y) at the time when the first configuration data “ST” of the winning determination command is received, the sub microcomputer 31 does not reach the two configuration data that have not arrived. At the timing (T2, T4) at which the data is to be received, it is determined that there is no new configuration data (Err) in the reception buffer 34, and the reception count is subtracted. For this reason, in such an example, the reception count is subtracted to “2” at time T4 in the figure, resulting in a severe communication error, and communication error processing is executed at time T5 in the figure.

  FIG. 18 is a timing chart when a minor communication error is detected. In such an example, the main control board 14 transmits a winning determination command, transmits an active command after pausing the command transmission. In this example, the composition data (“05”, “08”) of the winning determination command and the active command does not reach the reception buffer 34 by one unit for some reason. In such a case, the sub-microcomputer 31 is not receiving the configuration data because the count flag is valid (Y) while the winning determination command and the active command are being received (T1 to T7, T11 to T15). Reception ("05", "08") is reflected in the reception count, and a minor communication error occurs at time points T3 and T13 in the figure, and an error count is added. Further, the sub microcomputer 31 counts from the time when the configuration data “EN” at the end of the winning determination command is received to the time when the configuration data “ST” at the beginning of the active command is received (T8 to T10). Since the flag is invalid (N), the error count is not added even if the configuration data is not received.

  In the present embodiment, the period between the reception of the configuration data at the end of the command and the reception of the configuration data at the beginning of the next command, that is, the period during which communication error detection is suspended is the error count. The timer for resetting is stopped. For example, the timing chart of FIG. 19A is an example in which a minor communication error is detected when commands A, C, and D are received, and a communication error process is executed with an error count of 3 when command D is received. is there. In such an example, the timer operates only while receiving the configuration data of each command, and stops the timer during a period when the configuration data is not received. Specifically, the timer operates at Ta1, Ta2,..., Tax in the drawing, and after initial setting, operates at Tb1,. In FIG. 19A, the timer does not expire the predetermined time, and the error count reaches three times when the command D is received. For example, as shown in FIG. When Tb1,..., Tbx reach a predetermined time, the error count is reset to 0 when the timer measurement expires.

Next, a control process of the communication error detection process according to the fourth embodiment will be described.
20, 21, and 22 are flowcharts showing the control contents of the communication error detection process executed by the CPU of the sub microcomputer 31. In the communication error detection process, the CPU of the sub-microcomputer 31 first determines whether or not the count flag is Y (valid) (S701), and determines that the count flag is N (invalid). The process proceeds to step S801. On the other hand, if it is determined that the count flag is Y, the reception count is subtracted (S702), and then it is determined whether or not the reception count is 1 (S703). If it is determined that the reception count is 1, the communication error process is executed (S704), and the communication error detection process is terminated. If it is determined in step S703 that the reception count is not 1, the process proceeds to step S801.

  In step S801, it is determined whether or not the count flag is Y. If it is determined that the count flag is N, the process proceeds to step S803 as it is, and if it is determined that the count flag is Y, the timer is If it is not 0, 1 is subtracted from the timer (S802), and then the process proceeds to step S803. In step S803, it is determined whether new configuration data is stored in the reception buffer. If it is determined that there is no configuration data in the reception buffer 34, the process proceeds to step S904. If it is determined that there is configuration data in the reception buffer 34, the process proceeds to step S804. In step S804, it is determined whether or not the configuration data in the reception buffer 34 is data received as the first (first byte) configuration data of the command. If it is determined that the data is the first configuration data, the process proceeds to step S809. If it is determined that the data is not the first configuration data, the process proceeds to step S805. In step S805, it is determined whether the configuration data in the reception buffer 34 is data received as configuration data at the end (fifth byte) of the command. If it is determined that it is the last data, it is determined whether the received configuration data is the configuration data “EN” at the end of the command (S806), and it is determined that it is not the configuration data “EN” at the end. Shifts to step S812, and if it is determined that the data is the terminal configuration data, the count flag is set to N (S807), and the process shifts to step S808. In step S808, it is determined whether or not the reception count is 2. If it is determined that the reception flag is 2, the process proceeds to step S901. If it is determined that the reception flag is not 2, the process proceeds to step S811. To do. In step S809, it is determined whether the received configuration data is the first configuration data “ST” of the command. If it is determined that the received configuration data is not the first configuration data “ST”, the process proceeds to step S812. If it is determined that there is, the count flag is set to Y (S810), the initial value (5) is set to the reception count in step S811, and the process proceeds to step S904. In step S812, the communication error process is executed. Subsequently, the count flag is set to N (S813), and the communication error detection process ends.

  In step S901, 1 is added to the error count, and then in step S902, it is determined whether or not the error count is 3. If it is determined that the error count is not 3, an initial value is set in the timer (S903), and the process proceeds to step S904. In step S904, it is determined whether or not the timer is 0, that is, whether or not the measurement of the set time has been completed. If it is determined that the timer is not 0, the communication error detection process is terminated and the timer is 0. If it is determined that there is an error, the error counter is initialized (S905), and the communication error detection process is terminated. On the other hand, if it is determined in step S902 that the error count is 3, the communication error process is executed (S906), and the communication error detection process is terminated.

  Note that the gaming machine of the present invention is not limited to the above embodiment, and various modifications can be made without departing from the spirit of the present invention. For example, in the above embodiment, the present invention is applied to a slot machine, but the present invention can be similarly applied to a gaming machine such as a pachinko machine. In the above embodiment, the present invention is applied to the communication between the main control board and the sub control board of the slot machine, but the present invention is limited to the communication between the main control board and the sub control board. is not. The present invention is particularly effective for a configuration in which control information is transmitted in one direction from the first control unit to the second control unit. However, the present invention has a configuration in which control information is transmitted in both directions. Is also applicable.

  In the above embodiment, the communication means of the present invention is constituted by the serial communication circuits 32 and 33 of both control boards 14 and 15, and the signal line 16. However, the communication means of the present invention is a parallel communication system. It can also be configured by a communication circuit. In the above embodiment, the control information (command) is 5-byte data, and each control information is divided into 1-byte unit data and transmitted. However, the control information according to the present invention has a variable length. Alternatively, the size of the control information and the configuration data may be equalized, and the control information may be transmitted as one configuration data without being divided. Moreover, in the said Example, the 1st determination time which concerns on this invention is set to 2 times (3.6 milliseconds) of the transmission interval (1.8 milliseconds) of composition data, and two pieces of composition data are continued. However, the first determination time according to the present invention should be set to a length that can sufficiently eliminate a spontaneous communication error. Depending on the specifications, a value other than twice the transmission interval of the configuration data may be set.

  Further, in the above embodiment, when a severe communication error (first communication error) is detected, a communication error is displayed on the liquid crystal display 10. However, the contents and release conditions of the first error processing according to the present invention are displayed. Can be set as appropriate. In the above embodiment, when a minor communication error (second communication error) is detected at a high frequency, the communication error processing (first error processing) is performed. When a communication error is detected once or at a low frequency, error processing that is milder than communication error processing may be executed.

  In the above embodiment, the timer for resetting the error count (error counting means) is initialized every time a minor communication error is detected. However, when the second minor communication error is detected, the timer is initialized. Instead, the error count may be initialized when the timer expires the predetermined time before detecting the third minor communication error. Further, instead of expiration of the timer measurement, an error count may be initialized when a predetermined command is received a predetermined number of times.

  In the third embodiment, the case where the checksum of the command does not match is detected as a minor detection error. However, instead of or in addition to the checksum check, the configuration data having a fixed value in the command However, it may be determined whether it is a normal value. For example, in the command of the first embodiment, the head configuration data “ST” stores “AA (hexadecimal number)” which is a fixed value for any command. Therefore, when the CPU of the sub microcomputer 31 receives the configuration data of the first byte, it can detect the occurrence of a communication error by determining whether or not the received configuration data is “AA”. .

1 slot machine (game machine)
2 Housing 3 Front door 4 Viewing window 5a, 5b Bet switch 6 Start switch 7 Stop switch 8 Settlement switch 9 Reel 10 Liquid crystal display 11 Speaker 12 Production lamp 14 Main control board 15 Sub control board 16 Signal line 18 Power switch 18 DESCRIPTION OF SYMBOLS 19 Power supply box 20 Hopper unit 22 Front door open detection sensor 23 Reflector 30 Main microcomputer (first control means)
31 Sub-computer (second control means)
32, 33 Serial communication circuit 34 Reception buffer (reception means)

Claims (6)

First control means for transmitting control information;
Second control means for performing control based on the control information received from the first control means;
A gaming machine comprising communication means for transferring data from the first control means to the second control means as a unit of transfer of predetermined configuration data,
The first control means includes
Control information generating means for generating the control information;
A transmission unit that transmits the control information generated by the control information generation unit one by one at a predetermined transmission interval in the configuration data unit via the communication unit;
The second control means includes
Receiving means for receiving the control information in units of the configuration data via the communication means;
A first communication error detecting means for detecting, as a first communication error, a state in which a reception interval at which the receiving means receives the configuration data exceeds a first determination time;
Wherein the first determination time, are two times or more the length der of the transmission interval of the configuration data by the transmission means,
Furthermore, a second communication error detecting means for detecting an event different from the first communication error as a second communication error,
Error counting means for counting the number of detection times of the second communication error;
Initialization means for initializing the error counting means upon establishment of a predetermined condition;
First error processing execution means for executing the first error processing when the first communication error is detected or when the number of counts of the error counting means reaches the first detection count;
Gaming machine according to claim Rukoto equipped with. The second communication error detection means detects a state where a reception interval at which the reception means receives the configuration data exceeds a second determination time as the second communication error,
The gaming machine according to claim 1 , wherein the second determination time is longer than the transmission interval of the configuration data by the transmission unit and shorter than the first determination time. The first control means transmits control information including an error correction code,
The gaming machine according to claim 1 , wherein the second communication error is an error in the control information detected based on the error detection code. Second error processing for executing second error processing different from the first error processing when the number of counts of the error counting means reaches a second number of detections less than the first number of detections The gaming machine according to any one of claims 1 to 3 , further comprising execution means. First control means for transmitting control information;
Second control means for performing control based on the control information received from the first control means;
A gaming machine comprising communication means for transferring data from the first control means to the second control means as a unit of transfer of predetermined configuration data,
The first control means includes
Control information generating means for generating the control information;
A transmission unit that transmits the control information generated by the control information generation unit one by one at a predetermined transmission interval in the configuration data unit via the communication unit;
The second control means includes
Receiving means for receiving the control information in units of the configuration data via the communication means;
A first communication error detecting means for detecting, as a first communication error, a state in which a reception interval at which the receiving means receives the configuration data exceeds a first determination time;
Wherein the first determination time, are two times or more the length der of the transmission interval of the configuration data by the transmission means,
The control information generation means generates specific control information when the control information to be transmitted by the transmission means does not exist.
The transmission unit, by transmitting the specific control information, over a plurality of transmission periods of the control information, the gaming machine characterized that you sent without rest the configuration data in the transmission interval. The first communication error detecting means is
Reception state confirmation means for determining whether the reception means has received the configuration data at regular intervals;
The reception state confirmation means comprises a non-reception frequency counting means for counting the number of times of continuous determination that the configuration data has not been newly received;
6. The first communication error according to claim 1 , wherein the first communication error is detected when the number of counts of the unreceived number counting means reaches a number corresponding to the first determination time . The gaming machine according to any one of the above.

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