JP5704009B2 - Power converter - Google Patents

Description

  The present invention relates to a power converter, and more particularly to a technique for detecting a line current.

  Patent Document 1 describes a three-phase inverter. Such a three-phase inverter converts an input DC voltage into an AC voltage. Such conversion is realized by appropriately switching conduction / non-conduction of the switching element of the inverter. As a result, two voltage vectors having magnitudes are respectively employed over a predetermined period as vectors of voltages output from the inverter.

  In Patent Document 1, a current flowing on the output side of the three-phase inverter, that is, a three-phase line current is detected using a direct current flowing on the input side of the three-phase inverter. Such detection is performed by matching a direct current and a line current based on the voltage vector of the inverter. For example, in a predetermined cycle, a direct current is detected during a period in which the above-described two voltage vectors are employed, and these are detected as two-phase line currents determined based on the two voltage vectors. The remaining one-phase line current is calculated based on the relationship that the sum of the three-phase line currents is zero.

Japanese Patent No. 2004-304925 Japanese Patent No. 2010-288359 Japanese Patent No. 2003-189670 Japanese Patent No. 2002-119062 Japanese Patent No. 10-155278 Japanese Patent No. 3-230767 Japanese Patent No. 2004-64903 Japanese Patent No. 2005-45848

  However, in the technique described in Patent Document 1, when a period in which a voltage vector having a magnitude is adopted is shorter than a predetermined value, correction for increasing this period is performed. This is performed to ensure a period for detecting a direct current. However, when the period in which the voltage vector is employed is shorter than a predetermined value, distortion occurring in the line voltage and line current output from the inverter becomes significant when such correction is performed for all of the period.

  Then, an object of this invention is to provide the power converter device which can detect a line current, reducing the distortion of a line voltage and a line current.

  The first mode of the power converter according to the present invention is the first and second AC lines (Pu, Pv, Pw) through which line currents (iu, iv, iw) flow and DC currents (Idc) flow, respectively. Two DC lines (LH, LL), upper switching elements (S1 to S3) provided between each of the AC lines and the first DC line, each of the AC lines and the second DC A switching signal is output to the lower switching element (S4 to S6) provided between the line and the upper switching element and the lower switching element. Of the six switching patterns in which only a line is electrically connected to one of the first and second DC lines and two AC lines are electrically connected to the other, the first switching pattern is adopted over the first period. , Of the six switching patterns, the first switching pattern. A second switching pattern different from the first DC line is adopted over a second period, and a third switching pattern in which all of the AC lines are electrically connected to the first DC line or the second DC line A switching signal generator (31) employed over a period of 3; a DC current detector (4) for detecting the DC current (Idc); and a DC current average for obtaining an average value (Idc_ave) of the DC current When the first period is longer than the predetermined period and the second period is shorter than the predetermined period, the direct current flowing in the first period is converted to the direct current Based on the relationship that the integration of the average value of the DC currents in the predetermined period is equal to the integration of the DC currents flowing in the first and second periods. DC current flowing during the period of The direct current flowing during the period is estimated as one of the line currents determined based on the first switching pattern, and the direct current flowing during the second period is estimated as the second current A line current acquisition unit (31) configured to estimate the other one of the line currents determined based on the switching pattern.

  A second aspect of the power converter according to the present invention is the power converter according to the first aspect, wherein the DC current average value acquisition unit (33) is one of the first and second periods. When the current is longer than the predetermined period, the product of the DC current detected in the first period and the first period, the DC current detected in the second period, and the second The average value of the direct currents is calculated by dividing the sum of the period and the multiplication value by the period.

  The 3rd aspect of the power converter device concerning this invention is a power converter device concerning the 1st or 2nd aspect, Comprising: The said switching signal generation part (31) is a correction | amendment part which correct | amends the said 1st period. (311), and when both the first period and the second period are shorter than the predetermined period, the switching signal generator (31) is corrected to a value equal to or greater than the predetermined period. In the first period, the first switching pattern is adopted, and the line current acquisition unit (32) detects the corrected direct current flowing in the first period by the direct current detection unit, and the direct current On the basis of the relationship that the integral of the average value of the average value in the predetermined period is equal to the integral of the direct current flowing in the first and second periods, and calculating the direct current flowing in the second period, The direct current flowing in the first period Current is estimated as one of the line currents determined based on the first switching pattern, and the direct current flowing in the second period is determined based on the second switching pattern. It is estimated as the other one of the line currents.

  The 4th aspect of the power converter device concerning this invention is a power converter device concerning a 3rd aspect, Comprising: The said 1st period before correction | amendment is longer than a said 2nd period.

  A fifth aspect of the power conversion device according to the present invention is the power conversion device according to the third or fourth aspect, wherein the switching signal generation unit (31) increases the first period. The third switching pattern is employed in the reduced third period.

  According to the 1st aspect of the power converter device concerning this invention, even if it is a case where the direct current in a 2nd period cannot be detected with appropriate precision because the 2nd period is shorter than a predetermined period, The DC current in the second period can be estimated without performing correction that increases the period, and as a result, two line currents flowing in a predetermined cycle can be obtained. Therefore, it is possible to detect the two line currents by reducing the distortion of the line voltage and the line current of the AC line as compared with the case of performing the correction for increasing the second period.

  According to the 2nd aspect of the power converter device concerning this invention, the integration circuit etc. which average a direct current become unnecessary, and can reduce manufacturing cost.

  According to the 3rd aspect of the power converter device concerning this invention, compared with the case where both the 1st and 2nd period are correct | amended to the value more than a predetermined period, the line voltage and line current distortion of AC line And two line currents can be detected.

  According to the 4th aspect of the power converter device concerning this invention, compared with the case where the smaller one is corrected among the 1st and 2nd periods, the distortion of the line voltage of an AC line and a line current are reduced. be able to.

  According to the 5th aspect of the power converter device concerning this invention, compared with the case where the 2nd period is reduced, the distortion of the line voltage of an alternating current line and a line current can be reduced.

It is a figure which illustrates an example of a notional structure of an inverter. It is a figure which illustrates an example of a notional structure of an inverter. It is a voltage vector diagram. It is a figure which shows the electric current which flows through an inverter. It is a figure which shows the electric current which flows through an inverter. It is a figure which shows the electric current which flows through an inverter. It is a figure which shows the electric current which flows through an inverter. It is a figure which shows the electric current which flows through an inverter. It is a figure which shows the electric current which flows through an inverter. It is a figure which shows the electric current which flows through an inverter. It is a figure which shows the electric current which flows through an inverter. It is a figure which shows a typical example of conduction / non-conduction of a switching element, and a direct current. It is a figure which shows a typical example of conduction / non-conduction of a switching element, and a direct current. It is a voltage vector diagram. It is a flowchart which shows an example of the line current acquisition method. It is a flowchart which shows an example of the correction method of a period. It is a figure which illustrates an example of a notional structure of an inverter. It is a flowchart which shows an example of the line current acquisition method. It is a figure which illustrates an example of a notional structure of an inverter.

First embodiment.
<Configuration>
As shown in FIG. 1, the power conversion device 1 is connected to DC lines LH and LL and AC lines Pu, Pv and Pw. The power conversion device 1 is, for example, an inverter, converts a DC voltage applied between the DC lines LH and LL into an AC voltage, and outputs the AC voltage to the AC lines Pu, Pv and Pw. Here, the potential applied to the DC line LL is lower than the potential applied to the DC line LH. The power converter 1 is not limited to an inverter, and may be a converter that converts an AC voltage applied to the AC lines Pu, Pv, and Pw to a DC voltage and outputs the DC voltage to the DC lines LH and LL. . Below, the power converter device 1 is demonstrated as an inverter typically.

  The inverter 1 includes switching elements S1 to S6 and diodes D1 to D6. The switching elements S1 to S6 are, for example, insulated gate bipolar transistors or field effect transistors. Switching elements S1 to S3 are provided between each of AC lines Pu, Pv, and Pw and DC line LH. Below, each switching element S1-S3 is also called an upper switching element, and switching element S1-S3 is collectively called an upper switching element group. The anodes of the diodes D1 to D3 are connected to the AC lines Pu, Pv and Pw, respectively, and the diodes D1 to D3 are connected in parallel to the switching elements S1 to S3, respectively.

  Each of the switching elements S4 to S6 is provided between each of the AC lines Pu, Pv, Pw and the DC line LL. Hereinafter, each of the switching elements S4 to S6 is also referred to as a lower switching element, and the switching elements S4 to S6 are collectively referred to as a lower switching element group. The anodes of the diodes D4 to D6 are connected to the DC line LL, and the diodes D4 to D6 are connected in parallel with the switching elements S4 to S6, respectively. The diodes D1 to D6 may be parasitic diodes of the switching elements S1 to S6.

  A switching signal S is supplied from the control unit 3 to the switching elements S1 to S6. The switching elements S1 to S6 are turned on by the switching signal S. When the control unit 3 provides the switching signals S to the switching elements S1 to S6 at appropriate timing, the inverter 1 converts the DC voltage into the AC voltage. The control of the inverter 1 will be described in detail later.

  The inverter 1 can drive an inductive load 2, for example. Inductive load 2 is connected to AC lines Pu, Pv, Pw. The inductive load 2 is, for example, a motor. When an AC voltage is applied to the inductive load 2 by the inverter 1, a substantially sinusoidal AC current flows through the inductive load 2. Ideally, sinusoidal line currents iu, iv, and iw flow through the AC lines Pu, Pv, and Pw, respectively. As a result, the inductive load 2 is driven. Here, the direction of the line current flowing from the inverter 1 to the inductive load 2 is defined as positive, and the direction of the line current flowing from the inductive load 2 to the inverter 1 is defined as negative.

  The direct current Idc flowing through the direct current lines LH and LL is detected by the direct current detection unit 4 and output to the control unit 3. In the illustration of FIG. 1, the DC current detection unit 4 is provided on the DC line LL. Note that the DC current detection unit 4 may be provided on the DC line LH.

  The direct current detection unit 4 includes, for example, a shunt resistor R41 and a detection unit 41. In the illustration of FIG. 1, the shunt resistor R41 is provided on the DC line LL. The detection unit 41 detects, for example, a voltage applied to the shunt resistor R41, and obtains a direct current Idc based on the resistance value of the shunt resistor R41 and the detected voltage. The detection unit 41 outputs the value of the DC current Idc (hereinafter, the value itself is also expressed as the DC current Idc for the sake of simplicity. The same applies to other quantities). The detection unit 41 may detect the voltage of the shunt resistor R41 and output the detected voltage to the control unit 3, and the control unit 3 may calculate the direct current Idc. The DC current detection unit 4 does not need to detect using a shunt resistor, and an arbitrary DC current detection sensor can be adopted. For example, a current sensor such as Hall CT may be used.

  In addition, a direct current average value acquisition unit 5 that acquires an average value (hereinafter referred to as a direct current average value) Idc_ave of the direct current Idc is provided. The direct current average value acquisition unit 5 includes, for example, a shunt resistor R41 and a detection unit 51. The detection unit 51 is a primary filter such as a smoothing circuit composed of a resistor and a capacitor, for example. The detection unit 51 averages the direct current Idc flowing through the shunt resistor R41, and outputs the averaged direct current Idc_ave to the control unit 3. The detection unit 51 may output the voltage of the shunt resistor R41 to the control unit 3, and the control unit 3 may calculate the direct current average value Idc_ave.

  The DC current average value acquisition unit 5 does not necessarily detect and average the DC current Idc flowing through the shunt resistor R41. For example, the DC current Idc input from the detection unit 41 is used as illustrated in FIG. You may average.

  The control unit 3 includes a switching signal generation unit 31 and a line current acquisition unit 32. The line current acquisition unit 32 receives the direct current Idc, the direct current average value Idc_ave, and the switching signal S. The line current acquisition unit 32 acquires the three-phase line currents iu, iv, iw using these. A specific acquisition method will be described in detail later.

  The switching signal generator 31 generates a switching signal S. The switching signal S is generated as follows, for example. That is, for example, based on the line currents iu, iv, and iw calculated by the line current acquisition unit 32, phase voltage command values for the phase voltages Vu, Vv, and Vw applied to the AC lines Pu, Pv, and Pw are generated. It is generated by comparing the phase voltage command value with the carrier waveform. Since the generation of the phase voltage command value based on the line currents iu, iv, iw and the generation of the switching signal S based on the comparison between the phase voltage command value and the carrier waveform are known techniques, detailed description thereof will be omitted.

  In the example of FIG. 1, the switching signal generation unit 31 includes a correction unit 311. Although details of the correction unit 311 will be described later, it is not an essential requirement.

  Here, the control unit 3 includes a microcomputer and a storage device. The microcomputer executes each processing step (in other words, a procedure) described in the program. The storage device is composed of one or more of various storage devices such as a ROM (Read Only Memory), a RAM (Random Access Memory), a rewritable nonvolatile memory (EPROM (Erasable Programmable ROM), etc.), and a hard disk device, for example. Is possible. The storage device stores various information, data, and the like, stores a program executed by the microcomputer, and provides a work area for executing the program. It can be understood that the microcomputer functions as various means corresponding to each processing step described in the program, or can realize that various functions corresponding to each processing step are realized. Further, the control unit 3 is not limited to this, and various procedures executed by the control unit 3 or various means or various functions implemented may be realized by hardware.

<Control of inverter 1>
The inverter 1 is controlled by the switching signal S as described below. First, the upper switching element and the lower switching element connected to the same AC line are electrically connected to each other exclusively. That is, the switching elements S1 and S4 conduct exclusively with each other, the switching elements S2 and S5 conduct exclusively with each other, and the switching elements S3 and S6 conduct exclusively with each other. This is to prevent the DC lines LH and LL from being short-circuited and a large current from flowing through the switching elements S1 to S6.

  Accordingly, there are eight types of patterns as the switching patterns of the switching elements S1 to S6. When “1” and “0” indicate that the upper and lower switching elements are conductive, and the switching patterns of the respective phases are shown side by side, the switching patterns of the switching elements S1 to S6 are the following eight types. That is, the switching pattern is (000) (001) (010) (011) (100) (101) (110) (111). For example, the switching pattern (001) is employed when the lower switching elements S4 and S5 are conductive and the upper switching element S3 is conductive.

  Further, the vector of the voltage (voltage applied to the AC lines Pu, Pv, Pw) output from the inverter 1 when these switching patterns are adopted, the above-described number sequence is grasped as a binary number, This is expressed as a decimal number and expressed as voltage vectors V0 to V7, respectively.

  FIG. 3 is a voltage vector diagram showing the positional relationship between the voltage vectors V0 to V7. The voltage vectors V1 to V6 are arranged such that their start points coincide with the center point and their end points are radially directed outward. When the end points of the voltage vectors V1 to V6 are connected, a regular hexagon is formed. In the switching pattern corresponding to the voltage vectors V0 and V7, the AC lines Pu, Pv and Pw are short-circuited with each other, so that the voltage vectors V0 and V7 have no magnitude. Therefore, the voltage vectors V0 and V7 are arranged at the center point. Hereinafter, the voltage vectors V0 and V7 are also called zero voltage vectors, and the voltage vectors V1 to V6 are also called non-zero voltage vectors. As can be understood from the above description, in the non-zero voltage vectors V1 to V6, one of the AC lines Pu, Pv, and Pw is electrically connected to one of the DC lines LH and LL, and two ACs The line conducts with the other. In the zero voltage vectors V0 and V7, all of the AC lines Pu, Pv and Pw are electrically connected to the DC line LH or the DC line LL. Hereinafter, as illustrated in FIG. 3, regions between two adjacent non-zero voltage vectors in the circumferential direction are referred to as regions R <b> 1 to R <b> 6.

  Now, the control unit 3 predetermines the two non-zero voltage vectors Vi and Vj (i, j = 1 to 6, i ≠ j) and the zero voltage vector V0 (or voltage vector V7) constituting each region R1 to R6. It adopts suitably in the period T. In other words, two different switching patterns among the six switching patterns (001) (010) (011) (100) (101) (110) and the switching pattern (000) (or the switching pattern (100)). It is adopted in a predetermined cycle. An average voltage vector V in the predetermined period T is expressed by a combination of the voltage vectors. Therefore, the voltage vector V is hereinafter referred to as a combined voltage vector. For example, the voltage vectors V0, V4, V6 constituting the region R1 in the predetermined period T are employed over the periods t0, t4, t6 (t0, t4, t6 ≧ 0, T = t0 + t4 + t6), respectively. In other words, switching patterns (000), (100), and (110) are employed in the periods t0, t4, and t6, respectively. The combined voltage vector V at this time is expressed by the following equation.

  V = (t0 · V0 + t4 · V4 + t6 · V6) / T (1)

  The control unit 3 appropriately adjusts the periods t0, t4, and t6 for each predetermined period T and adopts the voltage vectors V0, V4, and V6, thereby maintaining the voltage vector V at a constant size and the region R1. The direction of the voltage vector V can be rotated around the center point. Similarly, the control unit 3 appropriately employs the voltage vectors V0 (V7), V2, and V6 in the region R2. The same applies to the regions R3 to R6. As a result, the direction of the synthesized voltage vector V can be rotated while keeping the magnitude constant. Therefore, a three-phase AC voltage is output to the AC lines Pu, Pv, and Pw. The magnitude of the combined voltage vector V corresponds to the amplitude of the three-phase AC voltage output from the AC lines Pu, Pv, Pw, and the reciprocal of the angular velocity corresponds to the period of the three-phase AC voltage. Therefore, if the magnitude and the angular velocity are constant, the three-phase AC voltage is a symmetric three-phase AC voltage.

  As described above, the control unit 3 sets the non-zero voltage vectors Vi and Vj and the zero voltage vector which are different from each other for each predetermined period T to the periods ti (≧ 0), tj (≧ 0), t0 (or t7, or t0 + t7). ). In other words, switching patterns (001) (010) (011) (100) (101) (110) in which two switching elements belonging to one of the upper and lower switching element groups and one of the switching elements belonging to the other conduct. ), Two different switching patterns are employed over the periods ti and tj, respectively, and switch patterns (000) and (100) for conducting three switching elements belonging to only one of the upper and lower switching element groups. At least one of them is employed over at least the periods t0 and t7.

<Calculation method of line current>
Consider the current flowing through the inverter 1 when each of the switching patterns described above is employed. Since the switching pattern corresponds to the voltage vector as described above, the following description will be made using the voltage vector. 4 to 11 show currents flowing through the inverter 1 when the voltage vectors V0 to V7 are employed, respectively. As shown in FIGS. 4 and 11, when the zero voltage vectors V0 and V7 are adopted, the AC lines Pu, Pv and Pw are short-circuited to each other, so that no DC current Idc flows through the DC lines LH and LL.

  As shown in FIG. 5, when the non-zero voltage vector V1 is employed, the upper switching element S3 and the lower switching elements S4 and S5 are conducted. Therefore, the DC current Idc flowing through the DC line LH flows through the AC line Pw in the positive direction as the line current iw via the switching element S3. The line current iw branches in the inductive load 2. The two branched currents flow in the negative direction through the AC lines Pu and Pv as line currents iu and iv, respectively. The line currents iu and iv are merged in the DC line LL via the switching elements S4 and S5, respectively, and flow as a DC current Idc. Therefore, when the non-zero voltage vector V1 is adopted, the direct current Idc is equal to the line current iw.

  As shown in FIG. 7, when the non-zero voltage vector V3 is employed, the upper switching elements S2 and S3 and the lower switching element S4 are conducted. Therefore, the DC current Idc flowing through the DC line LH branches and flows through the AC lines Pv and Pw in the positive direction as line currents iv and iw via the switching elements S2 and S3, respectively. The line currents iv and iw are combined in the inductive load 2 and flow in the negative direction through the AC line Pu as the line current iu. The line current iu flows through the DC line LL as the DC current Idc via the switching element S4. Therefore, when the non-zero voltage vector V3 is adopted, the direct current Idc is equal to the negative line current iu. In the following, in order to express a negative line current, a minus is given to the sign.

  As shown in FIGS. 6 and 8 to 10, the direct current Idc and the line current are also associated when the other non-zero voltage vectors V 2 and V 4 to V 6 are employed. In FIG. 3, a line current corresponding to each non-zero voltage vector is appended together with a symbol.

  As shown in FIG. 3, when the non-zero voltage vectors V1 to V6 are employed, the direct current Idc corresponds to one of the line currents iu, iv, and iw. Therefore, the direct current Idc can be estimated as a line current of a phase determined based on the non-zero voltage vector. For example, the DC current Idc is detected as the line current iu during the period when the non-zero voltage vector V4 is employed (see also FIG. 8).

  Further, as described above with respect to the control of the inverter 1, the non-zero voltage vectors Vi and Vj are employed over the periods ti and tj, respectively, for each predetermined period T. Moreover, as can be understood from FIG. 3, the phase of the line current that matches the direct current Idc is different from each other for the non-zero voltage vectors Vi and Vj employed in the regions R1 to R6. For example, considering the non-zero voltage vectors V4 and V6 employed in the region R1, the DC current Idc corresponds to the u-phase line current in the period t4 when the non-zero voltage vector V4 is employed, and the non-zero voltage vector V6 is employed. Period t6 direct current Idc corresponds to w-phase line current -iw. Therefore, the DC current Idc can be detected as two different phase currents in the periods ti and tj within the predetermined period T. Since the sum of the three-phase line currents iu, iv, and iw is zero, the remaining one-phase line current can be calculated from the detected two-phase line current. Therefore, a three-phase line current is calculated for each predetermined period T.

  However, in reality, at least one of the periods ti and tj may be shorter than the period necessary for detecting the DC current Idc, and the DC current Idc cannot be detected appropriately during that period. This will be described below.

  FIG. 12 shows an example of conduction / non-conduction of the switching elements S1 to S3 and the direct current Idc in the predetermined period T. In the illustration of FIG. 12, voltage vectors V0, V4, V6, and V7 are employed over periods t0, t4, t6, and t7, respectively. That is, FIG. 12 shows an example in the region R1. In the illustration of FIG. 12, the switching elements S1 to S3 are non-conductive at the beginning of the predetermined period T. Then, the switching element S1 is turned on when the period t0 has elapsed from the start of the predetermined period T, the switching element S2 is turned on when the period t4 has elapsed from the time when the switching element S1 starts to be turned on, and the switching element S2 is turned on. When the period t6 has elapsed since the start of conduction, the switching element S3 is conducting.

  And as illustrated in FIG. 12, the direct current Idc pulsates transiently by switching between conduction / non-conduction of the switching elements S1 to S3. Such transient pulsation decreases with the passage of time, and the DC current Idc becomes stable. In the example of FIG. 12, the period from pulsation to stability is represented by a period t11. In general, the direct current Idc is detected while avoiding such a period t11.

  However, as illustrated in FIG. 13, if the period t6 is shorter than the period t11, the DC current Idc in the period t6 cannot be detected with appropriate accuracy.

  Further, if the detected value of the direct current Idc is converted from analog to digital, the conversion also requires a period t13. Therefore, even if the transient pulsation is very small and the period t11 is negligibly small, the DC current Idc cannot be detected in the period t6 when the period t6 is shorter than the period t13.

  On the other hand, in the example of FIG. 13, the period t4 is longer than the period tref necessary for detecting the DC current Idc (in the example of FIG. 13, the sum of the periods t11 and t13). Therefore, by detecting the DC current Idc in the period t12 excluding the first period t11 and the last period t13 in the period t4, the DC current Idc can be detected with appropriate accuracy. Therefore, in the example of FIG. 13, the value of the one-phase line current iu can be acquired in the predetermined period T, but the other two-phase line currents iv and iw cannot be acquired with appropriate accuracy. For example, when both the periods ti and tj are shorter than the period tref in the predetermined period T, even a one-phase line current cannot be detected with appropriate accuracy in the predetermined period T.

  In Patent Document 1, in order to avoid such a situation, when the periods ti and tj are shorter than the period tref, correction is performed to increase the period.

  The event that the periods ti and tj are shorter than the period tref occurs, for example, when the combined voltage vector V is positioned in the vicinity of each of the non-zero voltage vectors V1 to V6 or in the vicinity of the zero voltage vector V0. For example, referring to FIG. 14, when combined voltage vector V is located in region R1 and in the vicinity of non-zero voltage vector V4, period t6 is shorter than period tref. In FIG. 14, only one of the periods ti and tj indicates a region shorter than the period tref by hatching, and both the periods ti and tj indicate regions shorter than the period tref by sandy hatching.

  FIG. 15 shows an example of a flowchart of the line current acquisition method according to this embodiment. The flowchart in FIG. 15 is repeatedly executed, for example, every predetermined period T. Here, a period T [k] (k is a natural number) is defined and described as each continuous period having a predetermined period T. In step ST1, the line current acquisition unit 32 estimates whether only one of the periods ti and tj is shorter than the period tref in a certain period T [k−1], for example, in the next period T [k]. To do. Such estimation is performed as follows, for example. That is, for example, the switching signal S output in the period T [k] is input from the switching signal generation unit 31 to the line current acquisition unit 32 in the period T [k−1]. The line current acquisition unit 32 obtains the periods ti and tj in the next period T [k] based on the switching signal S, and compares and estimates each of the periods ti and tj and the period tref.

  In the example of FIG. 15, in step ST1, the line current acquisition unit 32 performs the first estimation as to whether both the periods ti and tj are smaller than the period tref and only one of the periods ti and tj. The second estimation of whether or not the period tref is shorter and the third estimation of whether or not both the periods ti and tj are longer than the period tref are performed. In other words, the line current acquisition unit 32 determines that the period a, when both the periods ti, tj are smaller than the period tref, the case where only one of the periods ti, tj is shorter than the period tref, and the periods ti, tj. Both cases are divided into cases c and longer than the period tref. However, in the highest concept in the present embodiment, it is only necessary to perform an operation when a positive estimation is made in the second estimation.

  If a positive estimation is made in the second estimation in step ST1, the line current detection unit 32 detects a one-phase line current in the following manner in step ST2. First, the line current detection unit 32 detects the DC current Idc using the DC current detection unit 4 in a period longer than the period tref among the periods ti and tj in the period T [k]. Here, description will be made on the assumption that the period ti is longer than the period tref. Therefore, the direct current Idc in the period ti is detected in step ST2. In the example of FIG. 13, the direct current Idc is detected in the period t4. Then, the line current detection unit 32 estimates the detected direct current Idc as a line current of a phase determined based on the non-zero voltage vector Vi. In the example of FIG. 13, the DC current Idc is estimated as the u-phase line current iu.

  Next, in step ST3, the line current acquisition unit 32 detects another one-phase line current by paying attention to the following relationship. That is, attention is paid to the relationship that the integration of the DC current average value Idc_ave in the predetermined period T is equal to the sum of the integration of the DC current Idc in the period ti and the integration of the DC current Idc in the period tj. Based on this, the following equation is established.

  T · Idc_ave = ti · Idci + tj · Idcj (2)

  Here, Idci represents the DC current Idc in the period ti, and Idcj represents the DC current Idc in the period tj. Rearranging the equation (2) with respect to the direct current Idcj, the following equation is derived.

  Idcj = (T · Idc_ave−ti · Idci) / tj (3)

  The line current acquisition unit 32 calculates the direct current Idcj based on the equation (3). Note that the DC current average value Idc_ave employed here is preferably an average value in a predetermined period before the period T [k−1]. Then, the line current acquisition unit 32 estimates the calculated DC current Idcj as a phase line current determined based on the non-zero voltage vector Vj. For example, in the illustration of FIG. 13, the calculated DC current Idc is estimated as the w-phase line current -iw. At this time, as the value of the line current iw, a value obtained by negating the sign of the calculated direct current Idc is adopted. Thereby, a two-phase line current is acquired. The remaining one-phase line current can be obtained from the two-phase line current based on the relationship that the sum of the three-phase line currents is zero.

  In the example of FIG. 15, one-phase line current is acquired in step ST2, and the other one-phase line current is acquired in step ST3. However, after obtaining DC currents Idci and Idcj in steps ST2 and ST3, Two-phase line currents may be estimated from the DC currents Idci and Idcj, respectively. This is the same in the description to be described later.

  As described above, even if the period tj is less than the period tref, the line currents iu, iv, and iw are obtained in the predetermined period T without performing correction that increases the period tj to a value equal to or greater than the period tref. Can do. On the other hand, if the period tj is increased as in Patent Document 1, for example, the line voltage output from the inverter 1 is distorted corresponding to the period tj. For example, since the switching pattern (110) is employed in the period t6, the phase voltages Vu and Vv take a high potential, and the phase voltage Vw takes a low potential. Therefore, in the period t6, the line voltage Vuv (= Vu−Vv) takes zero, the line voltage Vvw (= Vv−Vw) takes the DC voltage Vdc (voltage between the DC lines LH and LL), and the line voltage Vvw (= Vv−Vw) takes a negative value of the DC voltage Vdc. When the period t6 is increased, the period during which the line voltages Vuv, Vvw, Vwu take the above values is extended, and the waveforms of the line voltages Vuv, Vvw, Vwu are distorted. As a result, distortion occurs in the line current. On the other hand, according to the main line current acquisition method, the line currents iu, iv, and iw can be acquired while suppressing such distortion. This will be explained with reference to the voltage vector diagram of FIG. 14. It is not necessary to correct the periods ti and tj in the shaded area, and the distortion of the phase voltage and line current in this area is reduced.

  From the viewpoint of detection accuracy of line current, it is desirable that the difference between the DC current average value Idc_ave before the period T [k−1] and the DC current average value Idc_ave during the period T [k] is small. This is because in the above-described line current acquisition method, the DC current average value Idc_ave in the period T [k] is regarded as the DC current average value Idc_ave before the period T [k−1]. Reduction of the difference can be realized, for example, by operating the motor at a substantially constant speed. On the other hand, in this case, the DC current average value Idc_ave before the period T [k−1] does not necessarily have to be adopted. For example, the DC current detected by the averaging circuit and before the time point when step ST3 is executed is used. The average value Idc_ave may be adopted.

  Further, as described above, in the example of FIG. 15, in step ST1, the line current acquisition unit 32 performs the first estimation as to whether both the periods ti and tj are shorter than the period tref. If a positive estimation is made in the first estimation of step ST1, in step ST4, the correction unit 311 corrects only one of the periods ti and tj to a value greater than or equal to the period tref. Such correction is realized by any known method. For example, when the switching signal S is generated by comparing the phase voltage command values Vu *, Vv *, Vw * and the carrier, the command values Vu *, Vv *, Vw * may be corrected so that the period ti increases. . As a result, the switching signal generator 31 adopts the corresponding voltage vector in the corrected period.

  Next, step ST2 described above is executed to acquire a one-phase line current. In step ST2, the line current acquisition unit 32 detects the direct current flowing in the period corrected in step ST4 in the periods ti and ij using the direct current detection unit 4, and acquires a one-phase line current. To do. In step ST3, the direct current in the remaining period is calculated to acquire another one-phase line current. Thereby, for example, as compared with the case where both the periods ti and tj are corrected to a value equal to or longer than the period tref as in Patent Document 1, the distortion of the line voltage and the line current output from the inverter 1 is reduced to reduce the three-phase. Line current can be obtained. To explain this in correspondence with the voltage vector diagram of FIG. 14, it is sufficient to correct only one of the periods ti and tj in the sandy region, and this region is compared with the case where both the periods ti and tj are corrected. The distortion of the line voltage and line current can be reduced.

  In step ST4, it is desirable that the correction unit 311 performs correction to increase the larger period of the periods ti and tj to a value equal to or greater than the period tref. For example, as illustrated in FIG. 16, in step ST11, the correction unit 311 compares the magnitude relationships between the periods ti and tj. When the period ti is longer than the period tj in step ST11, the correction unit 311 corrects the period ti to be equal to or longer than the predetermined period tref in step ST12. When the period tj is longer than the period ti in step ST11, the period tj is corrected to be equal to or longer than the predetermined period tref in step ST13. Note that when the periods ti and tj are equal to each other, either step ST12 or ST13 may be executed. Thereby, distortion of the line voltage and line current output from the inverter 1 can be suppressed.

  In addition, it is desirable to reduce the period in which the zero voltage vector is employed by the amount that either one of the periods ti and tj is increased. This is because the distortion of the line voltage and the line current is less when the period of the zero voltage vector having no magnitude is reduced than when the period when the non-zero voltage vector having the magnitude is adopted is reduced. Because it is small.

  In the example of FIG. 15, as described above, in step ST1, the line current acquisition unit 32 performs the third estimation as to whether both the periods ti and tj are longer than the period tref. If a positive estimation is made in the third estimation in step ST1, the DC current Idc detected in the periods ti and tj in step ST5 is determined based on the non-zero voltage vectors Vi and Vj, respectively. Estimated as current. Then, the remaining one-phase line current is calculated from these two-phase line currents. As a result, a three-phase line current can be obtained. In step ST5, it is not always necessary to detect the direct current Idc in both periods ti and tj. The DC current Idc may be detected in one of the periods ti and tj, and the DC current Idc in the other may be calculated based on the formula (3).

Second embodiment.
In the illustration of FIG. 17, the control unit 3 includes a direct current average value acquisition unit 33 as compared to the illustration of FIG. 1. The direct current average value acquisition unit 33 receives the direct current Idc from the direct current detection unit 4 and the switching signal S from the switching signal generation unit 31, and calculates the direct current average value Idc_ave based on these. A specific calculation method will be described in detail later.

  FIG. 18 shows an example of a flowchart of the line current acquisition method according to this embodiment. As a point different from the flowchart of FIG. 15, step ST6 is executed after step ST5. That is, step ST6 is executed when both the periods ti and tj are longer than the period tref.

  In step ST6, the direct current average value acquisition unit 33 calculates the direct current average value Idc_ave based on the equation (2). When the formula (2) is arranged with respect to the direct current average value Idc_ave, the following formula is derived.

  Idc_ave = (ti · Idci + tj · Idcj) / T (4)

  The direct current average value acquisition unit 33 calculates the direct current average value Idc_ave based on the equation (4). Here, the acquisition of the periods ti, tj and the DC currents Idci, Idcj is realized by the DC current average value acquisition unit 33 performing the same operation as in steps ST1, ST5 described with reference to FIG. On the other hand, since the line current acquisition unit 32 acquires the periods ti, tj and the direct currents Idci, Idcj in step ST5, these may be given to the direct current average value acquisition unit 33. As a result, the redundant calculation in the line current acquisition unit 32 and the direct current average value acquisition unit 33 can be omitted.

  Further, either the calculation of the DC current average value Idc_ave based on the equation (4) (step ST6) or the estimation of the line current of the phase determined based on the non-zero voltage vectors Vi and Vj (step ST5) is executed first. It doesn't matter.

  According to such a power converter, the DC current average value Idc_ave is calculated by the calculation function of the control unit 3. Therefore, unlike the first embodiment, there is no need to provide the direct current acquisition unit 5 constituted by, for example, a primary filter, and the manufacturing cost can be reduced.

  In the illustration in FIG. 19, a DC voltage detection unit 6 is further provided as compared with the illustration in FIG. 17. The DC voltage detector 6 detects a DC voltage Vdc between the DC lines LH and LL. In the illustration of FIG. 19, a smoothing capacitor C1 is provided between the DC lines LH and LL. The DC voltage detector 6 detects the voltage across the smoothing capacitor C1, for example.

  Also in such a power converter, the DC current average value Idc_ave is calculated in step ST6 of FIG. More specifically, in step ST6, the direct current average value acquisition unit 33 calculates the direct current average value Idc_ave by paying attention to the following relationship. Focus on the relationship that the power on the input side and the power on the output side of the inverter 1 are equal. If the power on the output side is Pout, the direct current average value Idc_ave is expressed by the following equation.

  Idc_ave = Pout / Vdc (5)

  The DC voltage Vdc is known because it is detected by the DC voltage detector 6. On the other hand, the power Pout on the output side can be expressed by the following three expressions.

Pout = Vα · iα + Vβ · iβ (6)
Pout = Vd · id + Vq · iq (7)
Pout = 3Vrms · Irms · cosθ (8)

  Here, Vα and Vβ represent two axes of the fixed coordinate system, the so-called α-axis and β-axis voltages, respectively, and iα and iβ represent the α-axis current and the β-axis current, respectively. Vd and Vq represent the two axes of the rotating coordinate system, the so-called d-axis and q-axis voltages, respectively, and id and iq represent the d-axis current and the q-axis current, respectively. Vrms and Irms represent effective values of the phase voltages Vu, Vv, and Vw and the line currents iu, iv, and iw, respectively, and θ represents a phase difference between the phase voltage and the line current.

  The voltages Vα, Vβ, Vd, Vq and the currents iα, iβ, id, iq apply known transformations (for example, absolute transformations) to the phase voltages Vu, Vv, Vw and the line currents iu, iv, iw. Can be obtained. Further, it can be understood that the phase voltages Vu, Vv, and Vw are known. This is because, for example, the command values of the phase voltages Vu, Vv, Vw are grasped as approximate values of the phase voltages Vu, Vv, Vw themselves, and if this is adopted, they are known, or the phase voltages Vu, Vv, Vw are detected. It becomes known by providing a detection unit. Therefore, the effective value Vrms and the phase of the phase voltage are known. On the other hand, since the line currents iu, iv, iw can be acquired in step ST5, the effective value Irms and the current phase are also known. Therefore, the effective values Vrms and Irms are known, and the phase difference θ can also be calculated.

  As described above, any variable used on the right side of the equations (6) to (8) can be acquired at the time of step ST6. Therefore, the direct current average value acquisition unit 33 calculates the direct current average value Idc_ave based on an expression obtained by substituting any of the expressions (6) to (8) into the expression (5). Thus, the DC current average value Idc_ave can be calculated by the arithmetic function of the control unit 3.

  However, as can be understood from a comparison between FIG. 17 and FIG. 19, the DC voltage detection unit 6 is not required in the calculation of the DC current average value Idc_ave using the equation (4), and the manufacturing cost is low.

DESCRIPTION OF SYMBOLS 1 Inverter 4 DC current detection part 5,33 DC current average value acquisition part 31 Switching signal generation part 32 Line current acquisition part LH, LL Input line Pu, Pv, Pw AC line S1-S6 Switching element

Claims (5)

Three AC lines (Pu, Pv, Pw) each carrying a line current (iu, iv, iw),
First and second DC lines (LH, LL) through which a DC current (Idc) flows;
Upper switching elements (S1 to S3) provided between each of the AC lines and the first DC line;
Lower switching elements (S4 to S6) provided between each of the AC lines and the second DC line;
A switching signal is output to the upper switching element and the lower switching element, and only one AC line of the AC lines is electrically connected to one of the first and second DC lines in a predetermined cycle. Of the six switching patterns in which the two AC lines are electrically connected to the other, the first switching pattern is adopted over the first period, and the sixth switching pattern is different from the first switching pattern. The second switching pattern is adopted over the second period, and the third switching pattern in which all of the AC lines are electrically connected to the first DC line or the second DC line is used over the third period. A switching signal generator (31) to be employed;
A direct current detector (4) for detecting the direct current (Idc);
DC current average value acquisition unit (5, 33) for acquiring the average value (Idc_ave) of the DC current;
When the first period is longer than a predetermined period and the second period is shorter than the predetermined period, the direct current flowing in the first period is detected using the direct current detection unit, and the direct current Based on the relationship that the integral of the average value of the current in the predetermined period is equal to the integral of the direct current flowing in the first and second periods, a direct current flowing in the second period is calculated, The direct current flowing in the first period is estimated as one of the line currents determined based on the first switching pattern, and the direct current flowing in the second period is A power converter comprising: a line current acquisition unit (31) that estimates as another one of the line currents determined based on a second switching pattern.   The DC current average value acquisition unit (33) is configured to detect the DC current detected in the first period and the first time when both the first period and the second period are longer than the predetermined period. The average value of the DC currents is calculated by dividing the sum of the product of the period and the product of the DC current detected in the second period and the second period by the period. The power conversion device according to claim 1. The switching signal generation unit (31) includes a correction unit (311) for correcting the first period,
When both of the first period and the second period are shorter than the predetermined period, the switching signal generation unit (31) performs the first period in the first period corrected to a value equal to or greater than the predetermined period. The switching pattern of
The line current acquisition unit (32) detects the DC current flowing in the corrected first period by the DC current detection unit, and the integration of the average value of the DC currents in the predetermined period is the first current. 1 and a DC current flowing in the second period is calculated based on a relationship that is equal to an integral of the DC current flowing in the first period and the second period, and the DC current flowing in the first period is The line current determined based on the switching pattern is estimated as one line current, and the direct current flowing in the second period is determined based on the second switching pattern. The power conversion device according to claim 1, wherein the power conversion device is estimated as one of the other line currents.   The power converter according to claim 3, wherein the first period before correction is longer than the second period.   5. The power conversion device according to claim 3, wherein the switching signal generation unit (31) employs the third switching pattern in the third period reduced by an increase of the first period. 6. .

Images