JP5660936B2 - Light emitting element drive circuit - Google Patents

Description

  According to the present invention, in a light emitting element driving circuit in which a dimming circuit, a switching regulator, and a light emitting element are combined, stable operation can be performed even if the lighting time of the light emitting element is extremely shortened when the light emitting element is subjected to pulse dimming. The present invention relates to a light emitting element driving circuit.

  For example, an LED, which is a light emitting element, is a point light emitting element. Therefore, when used as a backlight of a liquid crystal display that requires light emission as a surface, it is necessary to arrange a number of LEDs two-dimensionally and to light them with the same brightness. . For this reason, a plurality of LEDs are connected in series and are driven by the current of a constant current source. In this case, the anode voltage of the LED is generated by a step-up switching regulator so that the LED can be driven with a constant current.

  In addition, in the LED driving circuit which is a light emitting element driving circuit, when the brightness of the LED is subjected to pulse dimming with a PWM signal or the like, a method of repeatedly turning on / off the LED at a cycle of 100 Hz or more is used, but the LED is turned off. At the same time, the step-up switching regulator is also stopped to reduce the power consumption of the entire circuit.

  A conventional LED driving circuit having the above function is shown in FIG. Reference numeral 10 denotes a load circuit, which is composed of a circuit in which a plurality of LEDs are connected in series. A dimming circuit 20 turns on / off a constant current supplied to the load circuit 10 by a pulse dimming signal P1. The dimming circuit 20 includes a constant current source 21 connected in series to the load circuit 10 and inverters INV1 and INV2 that shape the pulse dimming signal P1 (dimming PWM signal) input from the input terminal 22. The constant current source 21 is turned on / off by the output of the inverter INV2, whereby each LED of the load circuit 10 is dimmed on / off. 30 is a step-up switching regulator that detects the voltage VK on the cathode side of the LED 11 on the ground side of the load circuit 10 and applies it to the anode side of the LED 12 on the power source side so that the voltage VK becomes a reference voltage VREF1 described later. The voltage VA to be controlled is controlled.

  The step-up switching regulator 30 takes in the cathode voltage VK of the LED 11 on the ground side of the load circuit 10 via the switch SW1 and the resistor RNF1, compares it with the reference voltage VREF1 of the voltage source 31, and detects the difference as an error voltage. An error amplifier 32 to be amplified, a PWM conversion circuit 33 for generating a step-up PWM signal corresponding to the output voltage level of the error amplifier 32, and a step-up output from the PWM conversion circuit 33 when the pulse dimming signal P1 is “H”. The AND gate AND1 that passes the PWM signal, the NMOS transistor M1 that is switched by the boosted PWM signal that is output from the AND gate AND1, and the power source voltage that flows from the VIN voltage source 34 to the transistor M1 when the transistor M1 is turned on. Energy is stored by current Includes an inductor L1 to accumulate in the capacitor C1 for rectifying and outputting the current of the energy rectifying element D1 when the transistor M1 is turned off. Here, the transistor M1, the inductor L1, the rectifier element D1, and the capacitor C1 constitute a chopper type booster circuit (voltage generation circuit).

  In this step-up switching regulator 30, the voltage VA supplied to the anode of the LED 12 on the power supply side of the load circuit 10 becomes longer as the ON time of the transistor M1, that is, the “H” period of the step-up PWM signal output from the PWM conversion circuit 33 is longer. Becomes higher. The “H” period of the step-up PWM signal output from the PWM conversion circuit 33 becomes longer as the output voltage of the error amplifier 32 is higher. The output voltage of the error amplifier 32 becomes higher as the voltage VK on the cathode side of the LED 11 on the ground side of the load circuit 10 is lower than the reference voltage VREF1. Therefore, the boost switching regulator 30 performs a negative feedback operation so that the voltage VK is equal to the reference voltage VREF1, and the voltage VA supplied to the load circuit 10 is controlled.

  The switch SW1 of the step-up switching regulator 30 is switched to the a side when the pulse dimming signal P1 is “H”, and is switched to the b side when it is “L”. Thus, when the pulse dimming signal P1 drives each LED, the boosting switching regulator 30 performs a boosting operation. When the pulse dimming signal P1 does not drive each LED, the boosting switching regulator 30 is driven. Since the step-up operation is stopped, power saving is achieved.

  The capacitor CNF1 of the step-up switching regulator 30 is a phase compensation capacitor, and forms a low-pass filter with the resistor RNF1. If the charge accumulated in the capacitor CNF1 is discharged while each LED of the load circuit 10 is turned off, it is necessary to recharge the capacitor CNF1 when each LED is switched to the on state. In some cases, the output voltage VA of the step-up switching regulator 30 falls below the control target value, and the LEDs cannot be sufficiently lit. The switch SW2 is for preventing this, and during the period when the pulse dimming signal P1 is “L”, the terminal on one side of the capacitor CNF1 is opened to prevent the discharge of the charge of the capacitor CNF1.

  As described above, each LED of the load circuit 10 is dimmed by the dimming circuit 20 and set to a luminance corresponding to the content of the pulse dimming signal P1 (PWM duty). During this time, in the step-up switching regulator 30, the transistor M1 is switched by the PWM signal output from the PWM conversion circuit 33 only during the “H” period of the pulse dimming signal P1. Further, the switch SW1 detects the cathode voltage VK of the diode 11 and sends it to the error amplifier 32 only during the “H” period of the pulse dimming signal P1. Further, the switch SW2 performs phase compensation by connecting the capacitor CNF1 only during the “H” period of the pulse dimming signal P1. An example similar to the LED driving circuit described above is disclosed in Patent Document 1.

JP2011-009253A

  In recent years, in order to reduce the power consumption of a liquid crystal panel and increase the contrast ratio, there has been a demand for an operation in which a current is passed through an LED for a short time and the LED is lit as dark as possible. For this reason, when the brightness of the LED is controlled by the pulse dimming described above, it is required that the LED drive circuit operates normally even if the LED lighting time is extremely shortened.

  For example, in the case where the frequency of the pulse dimming signal P1 is 200 Hz and the lighting time ("H" period) is lit only about 0.1% (PWM duty ratio is 0.1) in the entire cycle, the LED lighting time is about It becomes about 5 μs. On the other hand, the switching frequency of the transistor M1 (the frequency of the step-up PWM signal of the PWM conversion circuit 33) is often set to 400 kHz to 1 MHz. If the transistor M1 is operated at 500 kHz, one cycle is about 2 μs. For this reason, the step-up switching regulator 30 can be switched only about twice during the time when the LED is lit.

  FIG. 7 shows the current IL1 flowing through the inductor L1 in FIG. 6 when the LED is switched from the unlit state to the lit state. In the “L” period of the pulse dimming signal P1, that is, in a state where the LED is turned off, the boosting switching regulator 30 also stops operating, so the current IL1 flowing through the inductor L1 is zero. As shown in FIG. 7A, when the pulse dimming signal P1 changes to “H” and the LED switches to the lighting state, the current IL1 of the inductor L1 gradually increases with each switching of the transistor M1. As shown in FIG. 7B, when the “H” period of the pulse dimming signal P1 is short and the number of times of switching of the transistor M1 is small, the current IL1 of the inductor L1 is a target value sufficient to light the LED. The pulse dimming signal P1 is changed to “L” before reaching the threshold value, the switching operation of the transistor M1 is stopped, and the primary side (voltage source 34 side) power is sufficiently switched to the secondary side (LED side). I can't send it.

  As a result, the output voltage VA of the step-up switching regulator 30 gradually decreases, and a sufficient voltage cannot be applied to each LED of the load circuit 10, and the LED does not light up. Here, there is a problem even if the method of simply extending the operation time of the step-up switching regulator 30 is taken even after the LED is turned off. That is, the step-up switching regulator 30 detects the voltage VK on the cathode side of the LED 11 and performs a negative feedback operation. However, when the LED is not lit, the potential difference between the anode and cathode decreases, Since the voltage VK fluctuates greatly at the moment when the constant current source 21 stops its operation, the negative feedback control of the step-up switching regulator 30 cannot be normally performed based on the voltage VK.

  The present invention provides a light emitting element driving circuit that improves the above problems and controls the output voltage of the switching regulator to an appropriate value even when the light emitting element has a shorter lighting time so that the light emitting element can be normally lit. It is the purpose.

In order to achieve the above object, a light emitting element driving circuit according to a first aspect of the present invention includes a load circuit composed of one light emitting element or two or more light emitting elements connected in series, and a first pulse dimming signal. The load circuit operates when the first logic is turned on, and is stopped when the first pulse dimming signal is the second logic that turns off the light emitting element. A dimming circuit having a constant current source for supplying a first voltage applied to the constant current source when the first pulse dimming signal is the first logic, An error amplifier whose input side is connected to ground when the first pulse dimming signal is the second logic as compared with a reference voltage, and a phase connected between the input side and the output side of the error amplifier A first capacitor for compensation, and the error amplifier PWM conversion circuit for generating a PWM signal having a duty corresponding to the result of the compare, and the voltage applied to the load circuit and generates a voltage VA having an adjusted supply voltage in response to the PWM signal output from the PWM conversion circuit A switching regulator including a generation circuit; a first comparator that compares the first voltage with a second reference voltage that is higher than the first reference voltage; and the first pulse dimming signal includes the first pulse dimming signal. According to the comparison result of the first comparator at the first timing when the logic changes from the first logic to the second logic and the length of the first logic period of the first pulse dimming signal. A delay circuit that generates a second pulse dimming signal that delays or does not delay the first pulse dimming signal, and the second pulse dimming signal output from the delay circuit is the first logic Sometimes the first The voltage generation circuit generates a voltage while the connection of the capacitor remains as it is, and the first capacitor is disconnected from the circuit and the voltage generation of the voltage generation circuit stops at the second logic. The delay circuit of the pulse width expansion circuit includes a first logic period of the first pulse dimming signal in which the voltage VA is a necessary and sufficient value. When the time is longer than the time, or the first logic of the first pulse dimming signal is shorter than the first time, and the first voltage at the first timing is equal to or higher than the second reference voltage. In this case, the first pulse dimming signal is output as it is as the second pulse width dimming signal, and the first logic period of the first pulse dimming signal is greater than the first time. Short and said first tie When the first voltage at the time of ming is lower than the second reference voltage, the second pulse adjustment is obtained by extending the first logic period of the first pulse dimming signal by a second time. An optical signal is output.
The invention according to claim 2 is the light emitting element drive circuit according to claim 1, wherein the delay circuit of the pulse width expansion circuit has a longer period in which the first voltage is equal to or higher than the second reference voltage. The second time is shortened.
According to a third aspect of the present invention, in the light emitting element driving circuit according to the first or second aspect, the error amplifier is replaced with a transconductance amplifier, and the first capacitor is connected between the input side and the ground side of the PWM conversion circuit. The output of the transconductance amplifier is cut off or the operation of the transconductance amplifier is stopped when the second pulse dimming signal is the second logic. To do.
According to a fourth aspect of the present invention, in the light emitting element driving circuit according to any one of the first to third aspects, gate means connected between the PWM conversion circuit and the voltage generation circuit is provided, and the gate The means is characterized in that when the second pulse dimming signal is the first logic, the output signal of the PWM conversion circuit is input to the voltage generation circuit.

  According to the present invention, when the first logic period of the first pulse dimming signal is shorter than the first time and the first voltage at the first timing is lower than the second reference voltage. Since the second pulse dimming signal obtained by extending the first logic period of the first pulse dimming signal by a second time is output, the light emitting element is turned on using the first pulse dimming signal. Even when the time is extremely shortened and the light emitting element is lit in a dark state, the switching regulator that supplies voltage to the light emitting element can be stably operated.

It is a circuit diagram of the LED drive circuit of the 1st Example of this invention. It is an operation | movement waveform diagram of the LED drive circuit of FIG. It is an operation | movement waveform diagram of the LED drive circuit of FIG. It is a circuit diagram of the LED drive circuit of the 2nd Example of this invention. It is a circuit diagram of the LED drive circuit of the 3rd Example of this invention. It is a circuit diagram of the conventional LED drive circuit. FIG. 7 is an operation waveform diagram of the LED drive circuit of FIG. 6.

<First embodiment>
FIG. 1 shows an LED drive circuit according to a first embodiment of the present invention. The same components as those described with reference to FIG. In this embodiment, a pulse width expansion circuit 40 is added to the conventional LED driving circuit shown in FIG. The pulse width expansion circuit 40 includes a comparator 42 that compares the voltage VK on the cathode side of the LED 11 with a voltage source 41 of the reference voltage VREF2. The reference voltage VREF2 has a relationship of VREF2> VREF1 with respect to the reference voltage VREF1 of the error amplifier 32. Further, it has a latch circuit 43 that holds the logic of the output voltage of the comparator 42 when the pulse dimming signal P1 is switched from “H” to “L”. Furthermore, it has a delay circuit 44 inserted in the path for transmitting the pulse dimming signal P1 to the switch SW2 and the AND gate 34. 44a is a control terminal of the delay circuit 44.

The delay circuit 44 performs the following operation.
(A) When the “H” period of the pulse dimming signal P1 is longer than the predetermined time T1, the pulse dimming signal P2 is obtained regardless of whether the control terminal 44a is “H” or “L”. The pulse dimming signal P1 is output as it is. This period T1 is a time during which the voltage VA becomes a necessary and sufficient value by the boosting operation in the period T1.
(B) Even if the “H” period of the pulse dimming signal P1 is shorter than the predetermined time T1, if the control terminal 44a is “L”, the pulse dimming signal P1 is output as it is as the pulse dimming signal P2. .
(C) When the “H” period of the pulse dimming signal P1 is shorter than the predetermined time T1 and the control terminal 44a is “H”, the pulse dimming signal P1 is switched from “H” to “L”. Also, after maintaining the “H” state for the delay time tdf from the timing of the switching, the pulse dimming signal P2 that switches from “H” to “L” is output.

  That is, when the “H” period of the pulse dimming signal P1 is longer than the predetermined time T1, or even if the “H” period of the pulse dimming signal P1 is shorter than the predetermined time T1, the voltage VK on the cathode side of the LED 11 is When the voltage is higher than the reference voltage VREF2 (VK ≧ VREF2), the output of the comparator 42 is “L”. Therefore, when the pulse dimming signal P1 is switched from “H” to “L”, the Q output of the latch circuit 43 is output. Becomes "L" and the control terminal 44a becomes "L", so that the delay circuit 44 outputs the pulse dimming signal P1 as it is as the pulse dimming signal P2, and the same operation as the conventional one is performed.

  On the other hand, when the “H” period of the pulse dimming signal P1 is shorter than the predetermined time T1 and the cathode-side voltage VK is lower than the reference voltage VREF2 (VK <VREF2), the output of the comparator 42 becomes “H”. Therefore, when the pulse dimming signal P1 is switched from “H” to “L”, the output of the latch circuit 43 becomes “H” and the control terminal 44a becomes “H”. The “H” period of the optical signal P2 is extended by the delay time tdf as compared with the “H” period of the pulse dimming signal P1, and the switch SW2 is turned on correspondingly, and the step-up switching regulator 30 is increased by the delay time tdf. Continue to operate. Thus, the control target value of the voltage VK is switched from the reference voltage VREF1 to the reference voltage VREF2.

  As described above, the LED driving circuit of the present embodiment is configured such that the length of the “H” period of the pulse dimming signal P1 and the voltage on the cathode side of the LED 11 when the pulse dimming signal P1 changes from “H” to “L”. The operating state is switched according to the level of VK. FIG. 2 shows the voltage and current of each part of FIG. 1 when the pulse dimming signal P1 is input. VFB is a voltage of the resistor RNF1 and the inverting input terminal of the comparator 42, and IC1 is a current flowing through the capacitor CNF1. Further, the “H” period of the pulse dimming signal P1 is tph, and the “L” period is tpl. tdf is the delay time of the delay circuit 44 as described above. This will be described in detail below.

  First, when the pulse dimming signal P1 is “H” and the LED of the load circuit 10 is lit, the voltage VK becomes the reference voltage VREF1 when the boosting switching regulator 30 is in a steady state after a certain period of time has elapsed after startup. It becomes equal voltage (VK = VREF1). For this reason, the current IC1 flowing through the capacitor CNF1 becomes almost 0, and the output voltage of the error amplifier 32 converges to a constant value (almost 0V). When the pulse dimming signal P1 is set to a constant frequency and the “H” period is longer than the above-described time T1, the step-up switching regulator 30 maintains the above state. This state is shown in FIG.

Next, when the pulse dimming signal P1 is set to a constant frequency and the “H” period of the pulse dimming signal P1 is shorter than the time T1, the pulse dimming signal P1 is switched from “H” to “L”. If VK <VREF2 immediately before, the output of the comparator 42 becomes “H”, the Q output of the latch circuit 43 becomes “H”, the control terminal 44a becomes “H”, and the delay circuit 44 The pulse dimming signal P2 to be output continues to be in the “H” state only during the delay time tdf even after the pulse dimming signal P1 changes from “H” to “L”. At this time, the voltage VFB is lowered to the ground potential by switching the switch SW1 to the b side, but the switch SW2 is kept on, so that the capacitor CNF1 is charged only during the delay time tdf. . At this time, since the switch SW1 is switched to the b side, the output voltage of the error amplifier 32 is VREF1, and the charge Qtdf accumulated in the capacitor CNF1 is as follows. RNF1 is the resistance value of the resistor RNF1.

  As a result, the output voltage of the error amplifier 32 is raised more than when the step-up switching regulator 30 is in the convergence state when the pulse dimming signal P1 is in the “H” state. To increase the output voltage of the error amplifier 32, the PWM conversion circuit 33 increases the duty ratio of the boost PWM signal and increases the output voltage VA of the boost switching regulator 30. This state is shown in FIG.

この電流ＩＣ１(t)の向きは、式（１）の電荷Ｑtdfの流れる向きとは逆向きであり、エラーアンプ３２の出力電圧を引き下げ、電圧ＶＡを低下させる。 Next, when the pulse modulation signal P1 becomes “H” again after this, it leads to an increase in the cathode voltage VK of the LED 11, and the value of the voltage VFB also becomes higher by dVREF than the reference voltage VREF1. During this “H” period tph, the following current IC1 (t) flows through the capacitor CNF1.

The direction of the current IC1 (t) is opposite to the direction in which the charge Qtdf flows in Expression (1), and the output voltage of the error amplifier 32 is lowered to lower the voltage VA.

As a result, in order for the fixed time to elapse while the periodic pulse dimming signal P1 is input and the output voltage of the error amplifier 32 converge within a fixed voltage width, the period between the time tph and the time tdf Therefore, the charge flowing into and out of the capacitor CNF1 needs to be balanced. For this reason, the voltage VK changes during the time tph of “H”, but the average voltage VKav during this period converges to a value represented by the following equation.

  Thus, the value of the average VKav of the voltage VK is obtained when the pulse dimming signal P1 is fixed in the “H” state from the state of FIG. 2A to the state of (b) (VK = It is higher than VREF1) by tdf / tph.

  The anode-side voltage VA of the LED 12 continues to increase during the delay time tdf because the constant current source 21 stops operating, but decreases during the time tph, and during the total period of “tph + tdf”. , The state fluctuates within a certain voltage range. The above state is shown in FIG.

  On the other hand, when the time tph of the “H” period of the pulse dimming signal P1 is further shortened, when the above operation proceeds and the pulse dimming signal P1 changes from “L” to “H”, the cathode side of the LED 11 The voltage VK becomes higher and reaches the second reference voltage VREF2 (VK ≧ VREF2). Then, since the output voltage of the comparator 42 becomes “L” when the pulse dimming signal P1 changes from “H” to “L”, the Q output of the latch circuit 43 becomes “L”. For this reason, the delay circuit 44 does not delay the pulse dimming signal P1, the pulse dimming signal P2 = P1, the pulse dimming signal P2 becomes “L”, and at the same time the switch SW2 is turned off, and the step-up switching The regulator 30 also stops operating.

  As a result, while VK ≧ VREF2, the voltage VA decreases while the pulse dimming signal P1 is “H”, and when VK <VREF2 again, the delay time of the delay circuit 44 becomes tdf. VA rises. That is, the pulse dimming signal P2 is repeated when the “H” period of the pulse dimming signal P1 is extended and when it is not extended. The above state is shown in FIGS.

ＶＫavtphは、ＬＥＤ点灯時における出電圧ＶＫの平均値である。ＶＫavtph≒ＶＲＥＦ２とし、ＶＲＥＦ１＝０．６Ｖ，ＶＲＥＦ２＝１．２Ｖ，ｔｐｈ＝４μｓ，ｔｄｆ＝８μｓの場合、Ｍｓ＝２回となる。 The repetition interval is obtained by equalizing the electric charge accumulated in the capacitor CNF1 during the “H” period extension and the electric charge discharged from the capacitor CFN1 when not extending. When the interval “H” of the pulse dimming signal in which the pulse dimming signal P1 is extended to “H” is Ms, this interval Ms is obtained as follows.

VKavtph is an average value of the output voltage VK when the LED is lit. When VKavtph≈VREF2, VREF1 = 0.6V, VREF2 = 1.2V, tph = 4 μs, tdf = 8 μs, Ms = 2 times.

  When the “H” period is further shortened, when VK = VREF2 is reached, the operation shifts to an operation in which the extended state of the “H” period and the non-extended state are repeated at regular intervals. In this state, the voltage VK is controlled within a certain voltage range from the reference voltage VREF2.

  Since the switching operation of the step-up switching regulator 30 is always ensured by the delay time tdf in the extended state, the step-up switching regulator 30 can secure a sufficient number of switches and is sufficient to drive the load to the inductor L1. Current can flow.

  As is clear from the above, in the LED drive circuit of this embodiment, even when the “H” period of the pulse dimming signal P1 is shortened, when the pulse dimming signal P1 becomes “H” again. Since the output voltage VA of the step-up switching regulator 30 is high and the cathode-side voltage VK of the LED 11 exceeds the reference voltage VREF1 and is close to the reference voltage VREF2, the brightness of the LED does not decrease.

  Therefore, even if the lighting time of the LED is set to a time shorter than one cycle of the switching frequency of the step-up switching regulator 30, it becomes possible to operate stably without changing the brightness of the LED during lighting. .

<Second embodiment>
FIG. 4 shows an LED drive circuit according to a second embodiment of the present invention. In the first embodiment described above, the case where the step-up switching regulator 30 operates during the “L” period of the pulse dimming signal P1 may or may not be repeated at regular intervals. The frequency may change every three times, and there may be a case where irregular noise is generated due to the operation of the step-up switching regulator 30 from the wiring to the power source or the like. Ideally, it is desirable that the step-up switching regulator 30 is always operated every time the pulse dimming signal P1 becomes “H”.

  The second embodiment is intended to solve this problem, and a comparator 45 is newly provided. During the period in which the voltage VK on the cathode side of the LED 11 is equal to or higher than the reference voltage VREF2 (VK ≧ VREF2). The output voltage of 45 is set to “H”, the capacitor C2 is charged via the resistor R1, and the control terminal 44b of the delay circuit 44 is controlled by the voltage generated in the capacitor C2 to change the delay time tdf. It is what you want to do. Here, as the state of VK ≧ VREF2 continues longer, the voltage of the capacitor C2 increases and the delay time tdf of the delay circuit 44 is shortened. As a result, the delay time tdf is shortened as the ratio tdf / tph increases, and it is possible to converge to a state in which the step-up switching regulator 30 operates every time the pulse dimming signal P1 is “H”.

<Third embodiment>
FIG. 5 shows an LED drive circuit according to a third embodiment of the present invention. In the LED driving circuits of the first and second embodiments, the error amplifier 32 is used. In this embodiment, this is replaced with a transconductance amplifier 32A that performs voltage / current conversion. When this configuration is adopted, the resistor RNFB1 can be omitted. In this case, the switch SW4 in the first embodiment is connected between the input side of the PWM conversion circuit 33 and the output terminal of the transconductance amplifier 32A, and the phase compensation capacitor CNF2 is connected to the input side of the PWM conversion circuit 33. Connect to ground. Although the switch SW4 is used in FIG. 5, the same effect can be obtained even when the current output of the transconductance amplifier 32A is stopped when the pulse dimming signal P2 output from the delay circuit 44 is "L". Can be obtained.

<Other examples>
In each of the above embodiments, the load circuit 10 is not limited to a circuit in which a plurality of LEDs are connected in series, and can be applied to a case where there is one LED. The step-up switching regulator 30 is not limited to this, and the same operation is possible even when a step-down switching regulator is used.

10: Load circuit, 11, 12: LED
20: Dimming circuit, 21: Constant current source 30, 30A: Step-up switching regulator, 31: Voltage source, 32: Error amplifier, 33: Pulse conversion circuit, 34: Voltage source 40, 40A: Pulse width expansion circuit, 41 : Comparator, 42: Voltage source, 43: Latch circuit, 44: Delay circuit, 44a, 44a: Control terminal, 45: Comparator

Claims (4)

A load circuit comprising one light emitting element or two or more light emitting elements connected in series;
The operation is performed when the first pulse dimming signal is in the first logic for turning on the light emitting element, and the operation is stopped when the first pulse dimming signal is in the second logic for turning off the light emitting element. A dimming circuit having a constant current source for supplying a constant current to the load circuit;
When the first pulse dimming signal has the first logic, the first voltage to be applied to the constant current source is taken into the input side and compared with the first reference voltage, and the first pulse dimming is performed. When the signal is the second logic, an error amplifier whose input side is connected to the ground, a first capacitor for phase compensation connected between the input side and the output side of the error amplifier, and the error amplifier A PWM conversion circuit that generates a PWM signal having a duty according to the comparison result, and a voltage that generates a voltage VA adjusted in a power supply voltage according to the PWM signal output from the PWM conversion circuit and applies the voltage VA to the load circuit A switching regulator including a generation circuit;
A first comparator that compares the first voltage to a second reference voltage that is higher than the first reference voltage; and the first pulse dimming signal is from the first logic to the second logic. The first pulse dimming signal is changed according to the comparison result of the first comparator at the first timing when the first timing is changed and the length of the first logic period of the first pulse dimming signal. A delay circuit that generates a second pulse dimming signal that is delayed or not delayed, and the second pulse dimming signal output from the delay circuit is of the first logic, and A pulse in which the voltage generation circuit generates a voltage while the connection remains as it is, and the generation of the voltage of the voltage generation circuit is stopped while the first capacitor is disconnected from the circuit in the second logic. A width expansion circuit,
The delay circuit of the pulse width expansion circuit is configured such that the first logic period of the first pulse dimming signal is longer than a first time when the voltage VA is a necessary and sufficient value , or the first When the first logic of the pulse dimming signal is shorter than the first time and the first voltage at the first timing is greater than or equal to the second reference voltage, the second pulse The first pulse dimming signal is output as it is as a width dimming signal, and the first logic period of the first pulse dimming signal is shorter than the first time and at the first timing. When the first voltage of the first pulse is lower than the second reference voltage, the second pulse dimming signal obtained by extending the first logic period of the first pulse dimming signal by a second time Output,
A light-emitting element driving circuit.
In the light emitting element drive circuit according to claim 1,
The light emitting element driving circuit according to claim 1, wherein the delay circuit of the pulse width expansion circuit shortens the second time as the period of the first voltage equal to or higher than the second reference voltage is longer. In the light emitting element drive circuit according to claim 1 or 2,
When the error amplifier is replaced with a transconductance amplifier and the first capacitor is replaced with a connection between the input side and the ground side of the PWM conversion circuit, and the second pulse dimming signal is the second logic A light emitting element driving circuit characterized in that the output of the transconductance amplifier is cut off or the operation of the transconductance amplifier is stopped. In the light emitting element drive circuit according to any one of claims 1 to 3,
Gate means connected between the PWM conversion circuit and the voltage generation circuit is provided, and the gate means outputs an output signal of the PWM conversion circuit when the second pulse dimming signal is the first logic. Is input to the voltage generation circuit.

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