JP5646914B2 - Manufacturing method of tunnel junction element - Google Patents

Description

  The present invention relates to a method for manufacturing a tunnel junction element, for example, a method for manufacturing a tunnel junction element in which a tunnel insulating film and a ferromagnetic layer are formed on a semiconductor layer.

  As a tunnel junction element, it is known that a ferromagnetic material is provided on a semiconductor layer, and a tunnel insulating film capable of tunneling carriers is provided between the semiconductor layer and the ferromagnetic material. By using such a tunnel junction element, carriers spin-polarized from a ferromagnetic material can be injected into the semiconductor. Thus, by providing the tunnel insulating film, the spin injection efficiency is increased.

Non-Patent Document 1 describes a technique of forming a tunnel insulating film made of Al ₂ O ₃ on a semiconductor layer and a ferromagnetic layer on the tunnel insulating film in order to inject spin-polarized carriers into the light emitting diode. ing.

Appl. Phys. Lett. Vol. 81, pp694-696 (2002)

  According to Non-Patent Document 1, a semiconductor layer, a tunnel insulating film, and a ferromagnetic layer are formed using a multi-chamber MBE (Molecular Beam Epitaxy) method. Thus, after forming the semiconductor layer, the tunnel insulating film and the ferromagnetic layer are formed without exposing the surface of the semiconductor layer to the atmosphere. In order to realize spin injection into the semiconductor layer, the semiconductor layer, the tunnel insulating film, and the ferromagnetic layer are required to be manufactured with high quality.

  However, when the tunnel insulating film is formed after exposing the surface of the semiconductor layer to the atmosphere, unevenness is generated at the interface between the tunnel insulating film and the semiconductor layer. The tunnel insulating film is thin enough to allow carriers to tunnel. For this reason, when the unevenness | corrugation of the interface of a tunnel insulating film and a semiconductor layer is so large that it cannot disregard with respect to the film thickness of a tunnel insulating film, the spin polarization rate of the carrier inject | poured into a semiconductor layer will become small. For example, when a tunnel junction element and a semiconductor device are integrated, the tunnel insulating film and the ferromagnetic layer may not be finished after the surface of the semiconductor layer is exposed to the atmosphere. For example, when the tunnel insulating film is formed after patterning on the surface of the semiconductor layer, or when the tunnel insulating film is formed after ion implantation is performed on the semiconductor layer, the surface of the semiconductor layer is exposed to the atmosphere. A tunnel insulating film will be formed. For example, in the case where devices for forming the semiconductor layer and the tunnel insulating film are different, after the semiconductor layer is formed, the substrate on which the semiconductor layer is formed is taken out of the device and introduced into the device for forming the tunnel insulating film. For this reason, the surface of the semiconductor layer is exposed to the atmosphere. Thus, even when a tunnel insulating film is formed on the surface of a semiconductor layer exposed to the atmosphere, there is a need to provide a tunnel junction element that can inject carriers with a high spin polarization into the semiconductor layer. Yes.

  The present invention has been made in view of the above problems, and even when a tunnel insulating film is formed on the surface of a semiconductor layer exposed to the atmosphere, a tunnel capable of injecting carriers having a high spin polarization rate into the semiconductor layer. An object is to provide a junction element.

The present invention includes exposing the surface of the semiconductor layer to the atmosphere after exposing the surface of the semiconductor layer to the reducing gas, exposing the surface of the semiconductor layer to a reducing gas, and exposing the surface to the reducing gas. without exposing, forming a tunnel insulating film using ALD on said surface of said semiconductor layer, viewed including the steps, a to form the ferromagnetic layer on the tunnel insulating film, the semiconductor layer, A GaAs layer, an AlGaAs layer, or an InGaAs layer, and the tunnel insulating film is an aluminum oxide film, a hafnium oxide film, a zirconium oxide film, a titanium oxide film, or a magnesium oxide film, and the reducing gas passes through the tunnel insulating film. A method for manufacturing a tunnel junction element, wherein the metal compound gas is a raw material gas to be formed . According to the present invention, even when the tunnel insulating film is formed on the surface of the semiconductor layer exposed to the atmosphere by removing the oxide film formed on the surface of the semiconductor layer with the reducing gas, the semiconductor layer In addition, a tunnel junction element capable of injecting carriers having a large spin polarization can be provided.

  In the above configuration, the interface between the tunnel insulating film and the semiconductor layer may be flatter than the surface before the surface is exposed to the reducing gas.

  In the above configuration, the step of exposing the surface to the reducing gas may be performed in the same chamber as the step of forming the tunnel insulating film.

  In the above configuration, the step of exposing the semiconductor layer to the atmosphere may be a step of performing at least a part of a manufacturing process of a semiconductor device on the semiconductor layer.

In the above configuration, the tunnel insulating film may be made of aluminum oxide, and the reducing gas may be trimethylaluminum.

In the above configuration, the semiconductor layer may be a GaAs layer or an AlGaAs layer .

  According to the present invention, it is possible to provide a tunnel junction element that can inject carriers having a high spin polarization rate into a semiconductor layer even when a tunnel insulating film is formed on the surface of the semiconductor layer exposed to the atmosphere. .

FIG. 1A to FIG. 1D are cross-sectional views of the manufacturing process of the semiconductor device according to the first embodiment. 2A is a TEM observation photograph of sample A, and FIG. 2B is a TEM observation photograph of sample B. FIG. 3A to FIG. 3D are cross-sectional views illustrating a sample manufacturing method according to the second embodiment. FIG. 4 is a block diagram of an evaluation system for evaluating spin polarization using the sample according to the second embodiment. FIG. 5 is a cross-sectional view of a sample showing light emission of the sample according to Example 2. FIG. 6 is a diagram illustrating spectral characteristics of counterclockwise circularly polarized light σ ₊ and clockwise circularly polarized light σ ₋ . FIG. 7 is a diagram showing the polarization rate P with respect to the magnetic field H. FIG. 8A to 8C are cross-sectional views (part 1) illustrating the manufacturing process of the semiconductor device according to the third embodiment. FIG. 9A to FIG. 9C are cross-sectional views (part 2) illustrating the manufacturing process of the semiconductor device according to the third embodiment.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1A to FIG. 1D are cross-sectional views of the manufacturing process of the semiconductor device according to the first embodiment. As shown in FIG. 1A, the surface of the semiconductor layer 10 is exposed to the atmosphere. For example, when the apparatus for forming the semiconductor layer 10 on the substrate is different from the apparatus for forming the tunnel insulating film 12, the surface of the semiconductor layer 10 is exposed to the atmosphere. For example, when the tunnel insulating film 12 and the ferromagnetic layer 14 are formed during the manufacturing process of the semiconductor device, the surface of the semiconductor layer 10 is exposed to the atmosphere. An oxide film 11 is formed on the surface of the semiconductor layer 10.

  As shown in FIG. 1B, the substrate is introduced into a chamber of an apparatus for forming a tunnel insulating film. For example, it is introduced into an ALD (Atomic Layer Deposition) apparatus. The surface of the semiconductor layer 10 is exposed to a metal compound gas. Thereby, the oxide film 11 on the surface of the semiconductor layer 10 is removed. As shown in FIG. 1C, after that, the tunnel insulating film 12 having a film thickness that allows carriers to tunnel is formed on the surface of the semiconductor layer 10 without exposing the surface of the semiconductor layer 10 to the atmosphere. In the chamber of the ALD apparatus, a metal compound gas and an oxidizing gas are alternately supplied to the surface of the semiconductor layer 10. When the metal compound gas is supplied to the surface of the semiconductor layer 10, one atomic layer is formed on the surface of the semiconductor layer 10. Thereafter, when the oxidizing gas is supplied, the metal layer is oxidized. In this way, metal oxide layers are formed one atomic layer at a time as the tunnel insulating film 12. As shown in FIG. 1D, a ferromagnetic layer 14 is formed on the tunnel insulating film 12.

A GaAs layer was used as the semiconductor layer 10, an Al ₂ O ₃ (aluminum oxide) film was used as the tunnel insulating film 12, and an Fe layer was used as the ferromagnetic layer 14, and a sample was prepared as follows. As shown in FIG. 1A, a GaAs oxide film is formed on the surface of the GaAs layer which is the semiconductor layer 10. A degreasing process was performed on the GaAs substrate on which the GaAs layer was formed. In the degreasing step, acetone was used for ultrasonic cleaning for 1 minute. Next, ultrasonic cleaning was performed for 1 minute using ethanol. Thereafter, acetone and ethanol were volatilized using a nitrogen blow.

As shown in FIG. 1B, the GaAs substrate was introduced into the chamber of the ALD apparatus, and the inside of the chamber was evacuated. After the substrate temperature was raised to 350 ° C., the inside of the chamber was purged with high-purity nitrogen. Here, purging with an inert gas such as nitrogen is for removing impurities desorbed by heating and impurities in the atmosphere. After the chamber was evacuated again, a metal compound gas was supplied to the surface of the GaAs layer. The conditions for supplying the metal compound gas are as follows.
Supply gas: Trimethylaluminum (TMA)
Gas flow rate: 200sccm
Gas flow time: 0.1 second Gas purge time: 4 seconds Number of gas flows: 30 times As gas purge, TMA gas was replaced by flowing N ₂ gas while supplying TMA (gas flow). That is, the gas flow of TMA for 0.1 second was performed 30 times, and the gas purge with N ₂ for 4 seconds was performed during the gas flow.

Next, as shown in FIG. 1C, an Al ₂ O ₃ film (aluminum oxide film) was formed as a tunnel insulating film 12 on the GaAs layer. The Al ₂ O ₃ film is formed in an amorphous state. The conditions for forming the Al ₂ O ₃ film are as follows.
Source gas: trimethylaluminum (TMA), water Gas flow rate: TMA is 200 sccm, water is 200 sccm
Gas flow time: TMA is 0.1 second, water is 0.1 second Gas purge time: 4 seconds Gas flow frequency: TMA and water are alternately 10 times Film thickness: 1 nm
As a gas purge, the gas was replaced by flowing N ₂ gas while alternately supplying TMA and water.

As shown in FIG. 1D, the substrate was taken out from the ALD apparatus and introduced into an EB (Electron Beam) vapor deposition apparatus. An Fe layer was formed as the ferromagnetic layer 14. The formation conditions of Fe are as follows.
Deposition rate: 0.2 nm / second Vacuum degree: 6.0 × 10 ⁻⁷ Torr
Film thickness: 20nm
In order to prevent oxidation of the Fe layer, an Au layer was formed on the Fe layer. The formation conditions of the Au layer are as follows.
Deposition rate: 0.4 nm / second Vacuum degree: 6.0 × 10 ⁻⁷ Torr
Film thickness: 10nm

  As a sample prepared as described above, sample B was used as a sample, and as a comparative example, a sample in which the oxide film was not removed with the metal compound gas in FIG. Cross-sectional TEM (Transmission Electron Microscope) observation of Samples A and B was performed.

2A is a TEM observation photograph of sample A, and FIG. 2B is a TEM observation photograph of sample B. As shown in FIG. 2A, in the sample A that is not treated with the metal compound gas, a region 50 that is observed white is arranged between the GaAs layer and the Al ₂ O ₃ film while being in the same arrangement as the lattice image of the GaAs layer. Observed. This region 50 is an oxide film of a GaAs layer. As shown in FIG. 2B, in the sample B not treated with the metal compound gas, the region 50 is not observed between the GaAs layer and the Al ₂ O ₃ film, and there is almost no oxide film of the GaAs layer. I understand that. In addition, the interface between the GaAs layer and the Al ₂ O ₃ film is flat. As described above, by processing using the metal compound gas, a GaAs oxide film is hardly formed at the interface between the GaAs layer and the Al ₂ O ₃ film. The interface between the GaAs layer and the Al ₂ O ₃ film is flat.

  According to the first embodiment, the surface of the semiconductor layer 10 exposed to the atmosphere is exposed to the metal compound gas, and then the tunnel insulating film 12 is formed, so that the oxide film forms the interface between the semiconductor layer 10 and the tunnel insulating film 12. There is little and can be flat.

  Example 2 is an example in which it was confirmed that the carriers injected through the tunnel insulating film were spin-polarized. In Example 2, it was confirmed that the carriers injected into the semiconductor layer were spin-polarized by measuring the polarization of light generated by electroluminescence using an LED (Light Emitting Diode).

FIG. 3A to FIG. 3D are cross-sectional views illustrating a sample manufacturing method according to the second embodiment. Referring to FIG. 3A, an epitaxial layer 22 having a structure as shown in Table 1 was formed on the GaAs substrate 20 using the MBE method. Referring to Table 1, a p-type GaAs buffer layer having a thickness of 200 nm and a doping concentration of 2 × 10 ¹⁸ cm ⁻³ is formed on a p-type GaAs substrate. A p-type AlGaAs layer having a thickness of 200 nm, a doping concentration of 2 × 10 ¹⁸ cm ⁻³ , and an Al composition ratio of 0.3 is formed on the p-type GaAs buffer layer. A p-type GaAs layer having a thickness of 100 nm and a doping concentration of 2 × 10 ¹⁸ cm ⁻³ is formed on the p-type AlGaAs layer. An n-type AlGaAs layer having a thickness of 60 nm, a doping concentration of 1 × 10 ¹⁷ cm ⁻³ , and an Al composition ratio of 0.1 is formed on the p-type GaAs layer. An n-type AlGaAs layer having a film thickness of 30 nm, a doping concentration of 1 × 10 ¹⁸ cm ⁻³ , and an Al composition ratio of 0.1 is formed on the n-type AlGaAs layer.

  Referring to FIG. 3B, the GaAs substrate 20 is cleaved to 10 mm × 10 mm. A back electrode 28 made of AuZn having a thickness of 150 nm is formed on the back surface of the GaAs substrate 20 by EB vapor deposition. In order to obtain an ohmic junction, heat treatment is performed at a temperature of 420 ° C. for 7 minutes. As a result, Zn diffuses into the GaAs substrate 20 and an ohmic junction between the back electrode 28 and the GaAs substrate 20 is obtained. In this step, the surface of the epitaxial layer 22 is exposed to the atmosphere.

Next, as described in FIG. 1B of the first embodiment, the surface of the epitaxial layer 22 is exposed to the metal compound gas in the ALD apparatus. Thereafter, as described in FIG. 1C, an Al ₂ O ₃ film having a thickness of 1 nm is formed as the tunnel insulating film 12 by using the ALD method. As described in FIG. 1D, the EB vapor deposition method is used to form the Fe layer 26 having a thickness of 20 nm. An Au layer (not shown) having a thickness of 10 nm is formed on the Fe layer by EB vapor deposition.

Referring to FIG. 3C, a mesa is formed using an Ar ion milling method and a photolithography method. The size of the mesa is 300 μm × 300 μm. Referring to FIG. 3D, an insulating film 25 made of SiO ₂ having a thickness of 400 nm is formed by sputtering and photolithography. The pad electrode 27 is formed using EB vapor deposition and photolithography. The pad electrode 27 is formed of a Cr layer having a thickness of 20 nm as an adhesion layer and an Au layer having a thickness of 500 nm as a low resistance layer. Thereafter, the back electrode 28 is pressure-bonded to the chip carrier using Ag paste. Wire bonding is performed using gold wires so as to connect the pad electrode 27 and the back electrode 28 to the lead-out leads. Thus, the sample according to Example 2 is completed.

  FIG. 4 is a block diagram of an evaluation system for evaluating spin polarization using the sample according to the second embodiment. As shown in FIG. 4, the sample 62 is provided in the cooler 60 and is cooled to 8K to 9K. The light 65 emitted from the sample 62 passes through the lens 64 after passing through the window 61 of the cooler. The light 65 is a mixture of clockwise circularly polarized light and counterclockwise circularly polarized light. In the light 67 that has passed through the Soleil-Babinet phase compensation plate (3 / 4λ plate) 66, clockwise circularly polarized light is converted into linearly polarized light (P wave), and counterclockwise circularly polarized light is converted into linearly polarized light (S wave). Is done. A polarization beam splitter 68 is used to separate linearly polarized light (P wave) and linearly polarized light (S wave). The linearly polarized light (P wave) is split by the spectroscope 72. The linearly polarized light (S wave) is split by the spectroscope 70.

  FIG. 5 is a cross-sectional view of a sample showing light emission of the sample according to Example 2. In FIG. 5, a p-type AlGaAs layer 32, a p-type GaAs layer 34, an n-type AlGaAs layer 35 and an n-type GaAs layer 36 are shown as the epitaxial layer 22. Other reference numerals are the same as those in FIG. 3A to FIG. When a negative voltage is applied to the pad electrode 27 and a positive voltage is applied to the back electrode 28 with the magnetic field H applied to the sample, spin-polarized electrons 52 are injected from the Fe layer 26 into the epitaxial layer 22. Holes 54 are injected from the GaAs substrate 20 into the epitaxial layer 22. In the p-type GaAs layer 34, the electrons 52 and the holes 54 are combined to emit electroluminescence light 56. When electrons injected into the epitaxial layer 22 are spin-polarized, the electroluminescence light 56 has an intensity difference between clockwise circularly polarized light and counterclockwise circularly polarized light. Therefore, by measuring the light intensities of the linearly polarized light (S wave) and the linearly polarized light (P wave) by the method of FIG. 4, the clockwise and counterclockwise circularly polarized light of the electroluminescence light 56 is obtained. Can measure the intensity difference. Therefore, it can be confirmed whether the electrons injected into the epitaxial layer 22 are spin-polarized.

FIG. 6 is a diagram illustrating spectral characteristics of counterclockwise circularly polarized light σ ₊ and clockwise circularly polarized light σ ₋ . The sample temperature is 8K, the magnetic field H is 3T, and the applied voltage is 2.4V. The center wavelength of the luminescence light is 833 nm, and the slit width of the spectrometer is 50 μm. When the light intensity at the peak of the left-handed circularly polarized light σ ₊ and the right-handed circularly polarized light σ ₋ is I ₊ and I ₋ , the polarization rate P was calculated by the following equation.
P = (I ₊ -I ₋ ) / (I ₊ + I ₋ ) × 100%

  FIG. 7 is a diagram showing the polarization rate P with respect to the magnetic field H. FIG. In FIG. 7, the solid line (EL23) indicates the polarization rate P when 2.3V is applied between the pad electrode 27 and the back electrode 28, and the broken line (EL22) indicates the polarization rate P when 2.2V is applied. As shown in FIG. 7, a maximum polarization rate of about 4% was obtained.

  When light passes through the ferromagnetic material, it is circularly polarized. Therefore, the intensity of the circularly polarized light of the photoluminescence light from the sample 62 is separated in order to separate the circularly polarized light caused by the spin polarization of electrons injected into the epitaxial layer 22 or the circularly polarized light when passing through the ferromagnetic material. Was measured by the same method as in FIG. The sample 62 was emitted by laser excitation. The laser used was linearly polarized light, the wavelength was 750 nm, and the excitation light intensity was 2 μW. Other measurement methods are the same as those of the electroluminescence light, and the description is omitted. A dotted line (PL) in FIG. 7 indicates the polarization rate P with respect to the magnetic field H of the photoluminescence light. As shown in FIG. 7, although the photoluminescence light is also circularly polarized, the polarization rate P is smaller than that of the electroluminescence light. From this, in the sample according to Example 2, it was confirmed that the spin-polarized electrons 52 from the Fe layer 26 were injected into the epitaxial layer 22.

  According to Example 1 and Example 2, as shown in FIG. 1B, after the substrate is introduced into the ALD apparatus, the surface of the semiconductor layer exposed to the atmosphere is exposed to the metal compound gas. As shown in FIG. 1C, the tunnel insulating film 12 is then formed on the surface of the semiconductor layer 10 without exposing the surface to the atmosphere. Thereby, an interface having almost no oxide film could be formed between the semiconductor layer 10 and the tunnel insulating film 12 as shown in FIG. Further, as shown in FIG. 7, it was confirmed that spin-polarized carriers could be injected into the semiconductor layer (epitaxial layer 22) through the tunnel insulating film 12.

  In Examples 1 and 2, the interface between the tunnel insulating film 12 and the semiconductor layer 10 is flatter than the surface before the surface of the semiconductor layer 10 is exposed to the reducing gas. Thereby, spin-polarized carriers can be injected into the semiconductor layer 10 via the tunnel insulating film 12.

  In Examples 1 and 2, the metal compound gas has been described as an example of the reducing gas, but other reducing gases such as hydrogen gas may be used. By using a metal compound gas as the reducing gas, it can be shared with the source gas used when forming the tunnel insulating film. Further, trimethylaluminum has been described as the metal compound gas. Trimethylaluminum is highly reactive and is used as a raw material for the aluminum oxide film, so it is preferably used for reducing the oxide film. Moreover, since only methane gas and water are produced | generated after reaction, it is preferable also from a viewpoint of safety.

  Although the example using the ALD method for forming the tunnel insulating film has been described, the tunnel insulating film may be formed using, for example, a MOCVD (Metal Organic Chemical Vapor Deposition) method or a sputtering method. In order to form a thin film such as a tunnel insulating film, it is preferable to use the ALD method.

  In the case where pin holes are formed in the tunnel insulating film 12, when the upper surface of the tunnel insulating film 12 is exposed to the atmosphere, the surface of the semiconductor layer 10 is oxidized through the pin holes. According to the second embodiment, the pinhole of the tunnel insulating film 12 can be suppressed by using the ALD method for the tunnel insulating film 12. Thereby, after the upper surface of the tunnel insulating film 12 is exposed to the atmosphere, the ferromagnetic layer 14 can be formed on the upper surface of the tunnel insulating film 12. Therefore, the tunnel insulating film 12 and the ferromagnetic layer 14 can be formed using different apparatuses.

  The step of exposing the surface of the semiconductor layer to the reducing gas is preferably performed in the same chamber as the step of forming the tunnel insulating film. Thereby, after exposing the surface of the semiconductor layer to the reducing gas, the tunnel insulating film can be formed without exposing the surface of the semiconductor layer to the atmosphere.

In addition to Al ₂ O ₃ (aluminum oxide), HfO (hafnium oxide), ZrO (zirconium oxide), TiO ₂ (titanium oxide), MgO (magnesium oxide), or the like can be used as the tunnel insulating film. In addition to TMA, AlCl ₃ or AlBr ₃ can be used as the source gas of Al ₂ O ₃ and the reducing gas. As it and the reducing gas as a source gas of _{HfO, HfCl 4, HfI 4,} Hf (NMe 2) 4 or Hf _{(NEt 2) 4} may be used. ZrCl ₄ , ZrI ₄ , Zr (NMe ₂ ) ₄ or Zr (NEt ₂ ) ₄ can be used as a ZrO source gas and a reducing gas. TiCl ₄ , TiI ₄ , Ti (OMe ₂ ) ₄ or Ti (OEt ₂ ) ₄ can be used as a source gas of TiO ₂ and a reducing gas. Me is a methyl group and Et is an ethyl group. Hf (NMe ₂ ) ₄ , Zr (NMe ₂ ) ₄ or Ti (OMe ₂ ) ₄ is preferable from the viewpoint of safety because it has high reactivity and only produces methane gas and water after the reaction.

  As the semiconductor layer, InAs, GaN, Si, Ge, InP, GaP, SiC, Graphene, diamond, or a mixed crystal thereof can be used in addition to GaAs and AlGaAs. In particular, semiconductors such as GaAs, AlGaAs, InAs, and InGaAs are most utilized as compound semiconductor devices, and an oxide film is easily formed on the surface. Therefore, it is preferable to use Example 1 and Example 2. The semiconductor layer may be a semiconductor substrate.

  As the ferromagnetic layer, permalloy (Py), CoFeB, CoFe, FePt or CoPt can be used in addition to Fe. In particular, since CoFeB is used for a tunnel magnetoresistive element and has a high spin injection rate, it is preferably used as a ferromagnetic layer. FePt and CoPt are used as perpendicular magnetic memory materials and are preferably used as ferromagnetic layers.

  Example 3 is an example in which a tunnel insulating film is formed after a semiconductor device manufacturing process is performed. 8A to 9C are cross-sectional views illustrating the manufacturing steps of the semiconductor device according to the third embodiment. As shown in FIG. 8A, ion implantation and heat treatment are performed on the P-type silicon semiconductor substrate 40 to form N-type source and drain regions 42. As shown in FIG. 8B, a gate oxide film 47 is formed on the semiconductor substrate 40 between the source and drain regions 42. A gate electrode 48 is formed on the gate oxide film 47. As shown in FIG. 8C, a mask 49 having an opening is formed on the source and drain regions 42. In the above process, the surface of the semiconductor substrate 40 is exposed to the atmosphere. Therefore, an oxide film is formed on the surface of the semiconductor substrate 40.

Referring to FIG. 9A, the semiconductor substrate 40 is introduced into the ALD apparatus and the surface of the semiconductor substrate 40 in the opening of the mask 49 is exposed to TMA gas. Thereby, the oxide film on the surface of the semiconductor substrate 40 is removed. Thereafter, an Al ₂ O ₃ film (aluminum oxide film) is formed as the tunnel insulating film 44 in the ALD apparatus. As shown in FIG. 9B, the ferromagnetic layer 46 is formed on the tunnel insulating film 44 by using the EB vapor deposition method. Then, as shown in FIG. 4C, the mask 49 is removed. Thereby, an FET (Field Effect Transistor) having a source and a drain made of a ferromagnetic material is completed.

  In the method of manufacturing a semiconductor device according to the third embodiment, a tunnel insulating film 44 is formed on the source and drain regions 42 into which ions have been implanted. Further, after patterning the surface of the semiconductor layer, the tunnel insulating film 44 is formed. Therefore, unlike Non-Patent Document 1, the tunnel insulating film 44 cannot be formed on the semiconductor layer in advance. In the case where the tunnel insulating film 44 is formed on the source and drain regions 42 subjected to ion implantation, the tunnel layer is previously formed on the semiconductor layer for reasons other than the case where the tunnel insulating film 44 is formed after patterning on the surface of the semiconductor layer. In some cases, it is difficult to form the insulating film 44. For example, when a substrate on which the tunnel insulating film 44 is previously formed on the semiconductor layer is subjected to a heat treatment or the like at a high temperature, the tunnel insulating film 44 may be deteriorated. For these reasons, the tunnel insulating film 44 is formed on the surface of the semiconductor substrate 40 after a part of the manufacturing process of the semiconductor device is performed. Therefore, the surface of the semiconductor substrate 40 is exposed to the atmosphere. Thus, it has been difficult to form a high-quality tunnel insulating film 44 in the conventional methods for forming the tunnel insulating film 44. According to the third embodiment, since the surface of the semiconductor substrate 40 is exposed to the reducing gas before the tunnel insulating film 44 is formed, the high-quality tunnel insulating film 44 can be formed. Thus, it is preferable that the step of exposing the semiconductor layer to the atmosphere is a step of performing at least a part of the manufacturing process of the semiconductor device on the semiconductor layer.

  The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the specific embodiments, and various modifications and changes can be made within the scope of the gist of the present invention described in the claims. It can be changed.

10 Semiconductor layer 12 Tunnel insulating film 14 Ferromagnetic layer

Claims (6)

Exposing the surface of the semiconductor layer to the atmosphere;
Exposing the surface of the semiconductor layer to a reducing gas;
Forming a tunnel insulating film on the surface of the semiconductor layer using the ALD method without exposing the surface of the semiconductor layer to the atmosphere after the step of exposing the surface to a reducing gas;
Forming a ferromagnetic layer on the tunnel insulating film;
Only including,
The semiconductor layer is a GaAs layer, an AlGaAs layer or an InGaAs layer,
The tunnel insulating film is an aluminum oxide film, a hafnium oxide film, a zirconium oxide film, a titanium oxide film, or a magnesium oxide film,
The method of manufacturing a tunnel junction element, wherein the reducing gas is a metal compound gas that is a raw material gas for forming the tunnel insulating film .   2. The method of manufacturing a tunnel junction element according to claim 1, wherein an interface between the tunnel insulating film and the semiconductor layer is flatter than the surface before the surface is exposed to the reducing gas. 3. The method of manufacturing a tunnel junction element according to claim 1, wherein the tunnel insulating film is made of aluminum oxide, and the reducing gas is trimethylaluminum . 4. The method of manufacturing a tunnel junction element according to claim 3, wherein the semiconductor layer is a GaAs layer or an AlGaAs layer .   5. The method of manufacturing a tunnel junction element according to claim 1, wherein the step of exposing the surface to a reducing gas is performed in the same chamber as the step of forming the tunnel insulating film.   6. The tunnel junction element manufacturing method according to claim 1, wherein the step of exposing the semiconductor layer to the atmosphere is a step of subjecting the semiconductor layer to at least a part of a manufacturing process of a semiconductor device. Method.

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