JP5646070B2 - Gate driving circuit for power semiconductor device and method for driving power semiconductor device - Google Patents

Description

  The present invention relates to a gate drive circuit for a power semiconductor element mainly used in a power converter.

  Power semiconductor elements such as IGBTs and MOSFETs are used in power converters such as so-called inverters that convert direct current into alternating current or alternating current into direct current. In such a power semiconductor device, the current flowing from the collector to the emitter in the IGBT and from the drain to the source in the MOSFET is charged and discharged between the gate and the emitter or between the gate and the source to change the voltage therebetween. Control.

  As a conventional gate drive circuit for a power semiconductor element, there is, for example, one disclosed in Patent Document 1. In the gate drive circuit described in Patent Document 1, a constant current circuit and a current mirror circuit are used to drive an insulated gate transistor that is a power semiconductor element, and a constant current is supplied to the gate terminal of the insulated gate transistor. It was. In order to perform switching of the insulated gate transistor, a cutoff circuit is connected between the constant current circuit and the current mirror circuit. By turning on this cutoff circuit, the insulated gate transistor is turned on, and by turning off the cutoff circuit, insulation is achieved. The gate type transistor is turned off.

JP 2003-318713 A

  In such a power semiconductor element drive circuit, when a power semiconductor element having a built-in gate resistor is driven by, for example, creating a resistor on the power semiconductor element, the voltage drop of the gate resistance is reduced. Therefore, there is a problem that the voltage of the constant current circuit is insufficient and the constant current cannot be supplied to the gate current. In addition, if a high voltage source is used as the constant current circuit voltage source in order to allow a constant current to flow through the gate current, the loss of the drive circuit increases and the life of the power semiconductor element decreases. Will be invited.

  The present invention has been made to solve the above problems, and even when a gate resistor is built in the power semiconductor element, it can be driven with a constant current, and the loss of the drive circuit is small. An object of the present invention is to obtain a gate drive circuit for a power semiconductor element that can suppress a reduction in the life of the power semiconductor element.

The present invention provides a gate driving circuit for a power semiconductor device having an output connected to a gate terminal of the power semiconductor device and including a gate current limiting circuit for limiting the gate current of the power semiconductor device, and is controlled by a control signal. The power semiconductor element is turned on using the first voltage source as an input to the gate current limiting circuit, and the voltage at the gate terminal of the power semiconductor element is the first voltage at a predetermined timing after the power semiconductor element is turned on. The voltage is switched so that the voltage is lower than the voltage of the source.

  Since the power semiconductor element gate drive circuit according to the present invention is configured as described above, the gate drive circuit can be driven with a constant current, the loss of the gate drive circuit is small, and the lifetime reduction of the power semiconductor element can be suppressed. A gate drive circuit for a power semiconductor element can be obtained.

It is a figure which shows the gate drive circuit of the semiconductor element for electric power by Embodiment 1 of this invention. It is a figure which shows an example of the power conversion system to which the gate drive circuit of the semiconductor element for electric power by this invention is applied. It is a figure which shows an example of the current limiting circuit of the gate drive circuit of the semiconductor element for electric power by Embodiment 1 of this invention. It is a figure which shows the example of operation | movement of the current limiting circuit of the gate drive circuit of the semiconductor element for electric power by Embodiment 1 of this invention. It is a sequence diagram explaining operation | movement of the gate drive circuit of the semiconductor element for electric power by Embodiment 1 of this invention. It is a figure which shows the relationship between the gate voltage and drain current of a power semiconductor device. It is a figure which shows the gate drive circuit of the semiconductor element for electric power by Embodiment 2 of this invention. It is a sequence diagram explaining operation | movement of the gate drive circuit of the semiconductor element for electric power by Embodiment 2 of this invention. It is a figure which shows an example of the delay circuit of the gate drive circuit of the semiconductor element for electric power by Embodiment 2 of this invention. It is a block diagram which shows the gate drive circuit of the semiconductor element for electric power by Embodiment 3 of this invention. It is a detailed circuit diagram which shows the gate drive circuit of the semiconductor element for electric power by Embodiment 3 of this invention. It is a sequence diagram explaining operation | movement of the gate drive circuit of the semiconductor element for electric power by Embodiment 3 of this invention.

Embodiment 1 FIG.
A power semiconductor element gate drive circuit according to Embodiment 1 of the present invention will be described below with reference to the drawings. 1 is a diagram showing a configuration of a gate drive circuit 100 for a power semiconductor device according to a first embodiment of the present invention. The power semiconductor device gate drive circuit 100 is not limited to the first embodiment, and any of the gate drive circuits of the other embodiments can be used in various power converters. For example, the power conversion shown in FIG. It can be used for the gate drive circuit of the system. The example of the power conversion system shown in FIG. 2 is a three-phase inverter system that converts AC power from a system power source into DC power by a rectifier circuit and then converts the AC power to AC power output to a motor load or the like. Here, the gate drive circuits 100a, 100b, 100c, 100d, 100e, and 100f and the power semiconductor elements 1a, 1b, 1c, 1d, 1e, and 1f in FIG. 2 are shown in FIG. 1 and FIGS. This corresponds to the gate drive circuit 100 and the power semiconductor element 1.

  Here, the MOSFET 1 is used as the voltage-driven power semiconductor element 1 driven by the gate drive circuit, but the power semiconductor element 1 is not limited to the MOSFET, and other voltage-driven power semiconductors such as IGBTs. An element may be sufficient. In addition, although the diode 2 is connected to MOSFET1 in antiparallel, the body diode of MOSFET1 can be substituted for this.

  Next, the detailed configuration and operation of the gate drive circuit 100 for the power semiconductor element shown in FIG. 1 will be described. Insulation signal transmission element 10 (photocoupler) that receives a control signal and outputs an insulated signal to drive a power semiconductor element 1 (hereinafter referred to as MOSFET 1) such as a MOSFET having a built-in gate resistor 3 on a semiconductor chip And HVIC). Further, a gate current limiting circuit 7 having an output connected to the gate terminal 50 of the MOSFET 1 is provided. Here, the gate terminal 50 is connected to the gate of the MOSFET 1 through the built-in gate resistor 3. The gate current limiting circuit 7 limits the gate current flowing from the insulating signal transmission element 10 toward the gate of the MOSFET 1 when the MOSFET 1 is turned on. When the MOSFET 1 is turned off, the gate current flows through the diode 6 whose anode is connected to the gate terminal 50 and whose cathode is connected to the insulated signal transmission element 10, so that the current is not limited. A resistor may be connected in series with the diode 6. Further, even when an abnormal current flows, such as an arm short circuit, by the clamp diode 4 having the anode connected between the gate terminal 50 and the gate current limiting circuit 7 and the cathode connected to the clamp voltage source 5, the gate voltage of the MOSFET 1 can be reduced. The rise is suppressed. An example of the gate current limiting circuit 7 is shown in FIG. The gate current limiting circuit 7 shown in FIG. 3 is a general current limiting circuit. The current flowing through the resistor 19 is detected, and the transistor 18 generates a voltage at the base resistance of the transistor 20 to control the base voltage of the transistor 20, thereby controlling the collector current of the transistor 20.

  Further, the inverting input terminal is connected to the connection point between the gate terminal 50 and the gate current limiting circuit 7, the reference voltage source 9 (Vref) is connected to the non-inverting input terminal, and the voltage of the inverting input terminal is the voltage of the non-inverting input terminal. A comparator 8 is provided to turn off the voltage source changeover switch 11 when the voltage exceeds. As a voltage source of the insulating signal transmission element 10, a first voltage source 13 and a second voltage source 15 are provided. Here, the voltage of the first voltage source 13 is higher than the voltage of the second voltage source 15. Therefore, while the voltage source changeover switch 11 is on, the output voltage of the insulation signal transmission element 10 is determined by the first voltage source 13, and when the voltage source changeover switch 11 is off, the output voltage of the insulation signal transmission element 10 Is determined by the second voltage source 15. A diode 14 is used so that current does not flow from the first voltage source 13 to the second voltage source 15 when the voltage source changeover switch 11 is on. The bypass capacitor 12 and the bypass capacitor 16 are connected in case the output impedance of the first voltage source 13 and the second voltage source 15 is high.

  The operation will be described in detail with reference to the sequence diagram shown in FIG. When the control signal shown in FIG. 5A is applied to the insulation signal transmission element 10, the output voltage of the insulation signal transmission element 10 becomes a High signal as shown in FIG. 5B. At this time, since the gate voltage of the MOSFET 1 is smaller than the reference voltage 9 of the comparator 8, the voltage source changeover switch 11 is turned on. Therefore, the output voltage of the insulating signal transmission element 10 becomes the voltage of the first voltage source 13. The gate current limiting circuit 7 receives the voltage of the first voltage source 13, and the gate of the MOSFET 1 is charged and the gate voltage rises by this voltage. As shown in FIG. 5C, the gate current is limited to a constant current. By making the gate current constant, effects such as low noise and low loss can be obtained. As shown in FIG. 4, the gate current limiting circuit 7 requires a constant bias voltage in order to flow a constant current. Since the MOSFET 1 has a built-in gate resistor 3 on the chip, a voltage drop is caused by the product of the gate current and the built-in gate resistor 3 when turned on. If the bias voltage actually applied is lower than the bias voltage required by the gate current limiting circuit 7 due to the voltage drop, the gate current does not become a constant current, and the effect of constant current driving cannot be obtained. However, in the gate drive circuit according to the first embodiment of the present invention shown in FIG. 1, the first voltage source 13 is set to a voltage at which a sufficient bias voltage can be applied to the gate current limiting circuit 7, thereby providing a built-in gate resistance. 3, the MOSFET 1 can be driven with a constant current.

  When the gate voltage rises and becomes higher than the reference voltage 9 of the comparator 8, the voltage source changeover switch 11 is turned off, and the output voltage of the insulation signal transmission element 10, that is, the input voltage of the gate current limiting circuit 7 is the second voltage. This is the voltage of the voltage source 15. As a result, the voltage at the gate terminal 50 becomes the voltage of the second voltage source 15 after the gate current stops flowing. As shown by the drain current Id in FIG. 5F and the drain-source voltage Vds in FIG. 5G, the MOSFET 1 has a mirror period in which the gate voltage Vgs shown in FIG. If it exceeds, switching is completed and it is turned on completely. The reference voltage Vref of the comparator 8 is set between the voltage obtained by adding the voltage drop of the built-in gate resistor 3 to the mirror voltage, which is the gate voltage in the mirror period, and the second voltage source 15. Since the mirror voltage (gate voltage in the mirror period) varies depending on the main current (drain current) as shown in FIG. 6, the value of Vref needs to be set based on the maximum drain current that can be passed through the MOSFET 1.

  When the first voltage source 13 is always output from the insulation signal transmission element 10 without providing the voltage source changeover switch 11, the insulation signal transmission element 10, the gate current limiting circuit 7, and the diode 4 are output from the first voltage source 13. Since the current continues to flow with the clamping voltage source 5, the loss of the gate drive circuit 100 increases. Further, when the voltage of the clamping voltage source 5 is increased, the current does not flow, but the gate voltage of the MOSFET 1 is increased, so that the life of the gate oxide film of the MOSFET 1 is reduced.

  According to the gate drive circuit 100 of the power semiconductor element of the first embodiment of the present invention, after the turn-on of the MOSFET 1 is finished by the voltage source changeover switch 11, the output voltage of the insulation signal transmission element 10 is changed to the first voltage. By reducing the voltage of the source 13 to the voltage of the second voltage source 15, that is, by reducing the voltage at the gate terminal 50, an increase in the loss of the gate driving circuit 100 and a decrease in the lifetime of the gate oxide film are suppressed.

Embodiment 2. FIG.
A gate drive circuit for a power semiconductor device according to a second embodiment of the present invention will be described with reference to FIG. 7, the same reference numerals as those in FIG. 1 denote the same or corresponding parts. Further, the description of the same components as those in Embodiment 1 is omitted. In the first embodiment, the switching timing of the voltage source changeover switch 11 is determined by the gate voltage of the MOSFET 1, but in the second embodiment, the signal output from the insulating signal transmission element 10 is sent to the voltage source through the delay circuit 22. The difference is that the changeover switch 11 is switched.

  FIG. 8 is a sequence diagram showing the operation of the gate drive circuit of the power semiconductor element of FIG. The delay circuit 22 delays the ON command of the output of the insulating signal transmission element 10 by a delay time Td from the ON timing of the control signal. An example of a general delay circuit 22 is shown in FIG. An ON timing delayed by a delay time Td from the input voltage as shown in FIG. 8D by delaying the rise of the input voltage by the RC charging circuit using the resistor 24 and the capacitor 25 and shaping the waveform by the inverters 26 and 27. Output the waveform. The diode 23 inserted in parallel with the resistor 23 is for preventing the falling from being delayed. The delay time Td is set to a timing at which the gate voltage Vgs is larger than the mirror voltage and smaller than the voltage of the voltage source 15. By setting the first voltage source 13 to a voltage at which a sufficient bias voltage can be applied to the gate current limiting circuit 7, the MOSFET 1 can be driven with a constant current even when the built-in gate resistor 3 is provided.

  According to the gate drive circuit 100 for the power semiconductor element of the second embodiment of the present invention, by appropriately setting the delay time Td of the delay circuit 22, the voltage source changeover switch 11 can After the turn-on of the MOSFET 1 is completed, that is, at the timing when the mirror period of the MOSFET 1 is exceeded, the output voltage of the insulating signal transmission element 10 can be lowered to the second voltage source 15. As a result, an increase in the loss of the gate drive circuit 100 and a decrease in the lifetime of the gate oxide film are suppressed.

Embodiment 3 FIG.
A power semiconductor element gate drive circuit according to a third embodiment of the present invention will be described with reference to FIGS. 10, 11 and 12. FIG. A description of the same components as those in the above embodiments is omitted. FIG. 10 shows a block diagram of a gate drive circuit for a power semiconductor device according to the third embodiment. The gate current stop circuit 28 stops the gate current limiting circuit 7 and turns on the gate charging circuit 29 after the gate voltage of the MOSFET 1 reaches the voltage of the clamping voltage source 5 based on the output signal of the insulation signal transmission element 10. Let The first voltage source 13 of the insulated signal transmission element 10 is set to a voltage that can give a sufficient bias voltage to the gate current limiting circuit 7. The voltage of the clamping voltage source 5 and the voltage of the second voltage source 15 (see FIG. 11) of the gate charging circuit 29 are set to a voltage lower than the voltage of the first voltage source 13. Hereinafter, for simplicity, the voltage of the clamping voltage source 5 and the voltage of the second voltage source 15 are described as being set to the same voltage. However, the voltage of the clamping voltage source 5 and the voltage of the second voltage source 15 are only required to be set lower than the voltage of the first voltage source 13. The voltage of the source 15 does not necessarily have to be the same.

  An example of a detailed circuit is shown in FIG. 11, and a sequence diagram for explaining the operation is shown in FIG. When the ON control signal enters the insulation signal transmission element 10, the insulation signal transmission element 10 outputs a voltage obtained by subtracting the voltage drop of the insulation signal transmission element 10 from the first voltage source 13. This voltage is output from the insulation signal transmission element 10 while the control signal is on. Since the gate current limiting circuit 7 limits the gate current, the MOSFET 1 is charged with a constant current. When the gate voltage Vgs reaches the gate threshold voltage shown in FIG. 6, the drain current Id of the MOSFET 1 starts to flow. Thereafter, a mirror period in which the gate voltage Vgs becomes constant is entered, and the drain voltage Vds decreases. After the drain voltage Vds drops, the gate voltage rises again, and when the voltage reaches the voltage of the clamping voltage source 5 plus the forward drop voltage of the diode 4, the diode 4 is turned on. When the diode 4 is turned on, a current flows toward the clamping voltage source 5, so that the gate voltage is clamped and the rise of the gate voltage stops.

  On the other hand, the output voltage of the insulating signal transmission element 10 is input to a time constant circuit composed of a resistor 30 and a capacitor 31. Since the voltage at the connection point between the resistor 30 and the capacitor 31 rises with a certain time constant, as shown in FIGS. 12D and 12E, the transistor 41 is turned on after the delay time Td, and the transistor 36 Turn off. When the transistor 36 is turned off, the base potential of the transistor 43 is lowered and the transistor 43 is turned on. When the transistor 43 is turned on, the base potential of the transistor 20 of the gate current limiting circuit 7 rises, and the energization of the gate current limiting circuit 7 is stopped. Since no current flows through the path of the first voltage source 13, the insulation signal transmission element 10, the gate current limiting circuit 7, the diode 4, and the clamping voltage source 5, it is possible to suppress excessive power consumption in the gate driving circuit 100. it can.

  Here, as shown in FIG. 12, the delay time Td is set after the timing at which the gate voltage is clamped by the diode 4, but the delay time Td may be set at a predetermined timing exceeding the mirror period. Further, the gate current stop circuit 28 stops the gate current limiting circuit 7 and at the same time turns on the transistor 45 of the gate charging circuit 29, so that the second voltage source 15 connected to the gate charging circuit 29 is connected to the gate terminal 50. Is supplied with voltage. For this reason, a sufficient voltage can be continuously applied to the gate of the MOSFET 1. Therefore, for example, it is possible to prevent the gate voltage from being lowered due to the resistance provided between the gate and the source of the MOSFET 1. Since the gate charging circuit 29 is not intended to switch the MOSFET 1, the value of the resistor 46 is set to a larger value than the normal gate resistance. At this time, the voltage supplied to the gate terminal 50 is a voltage lower than the voltage of the first voltage source 13, so that the lifetime reduction of the gate oxide film is also suppressed.

  According to the gate driving circuit 100 for the power semiconductor element according to the third embodiment of the present invention, the delay time Td is set to be the timing exceeding the mirror period, and the gate current stop circuit 28 stops the gate current limiting circuit 7. At the same time, the transistor 45 of the gate charging circuit 29 is turned on so that a sufficient voltage is continuously applied to the gate of the MOSFET 1. As a result, as in the first and second embodiments, an increase in the loss of the gate drive circuit 100 and a decrease in the lifetime of the gate oxide film are suppressed.

  In any of the above embodiments, the power semiconductor element may be formed of silicon. Alternatively, a wide band gap semiconductor having a larger band gap than silicon may be used. Examples of the wide band gap semiconductor include silicon carbide, a gallium nitride-based material, and diamond.

  Since the power semiconductor element formed of such a wide band gap semiconductor has high voltage resistance and high allowable current density, the power semiconductor element can be downsized. By using elements, it is possible to reduce the size of a semiconductor device incorporating these elements.

  Further, since the heat resistance is high, the heat dissipating fins of the heat sink can be downsized and the water cooling portion can be down cooled, so that the semiconductor element can be further downsized. Furthermore, since the power loss is low, the efficiency of the power semiconductor element can be increased, and further, the efficiency of the semiconductor device can be increased.

1: Power semiconductor element 5: Clamping voltage source 7: Gate current limiting circuit 8: Comparator 9: Reference voltage source 10: Insulation signal transmission element 11: Voltage source changeover switch 13: First voltage source 15: Second Voltage source 28: Gate current stop circuit 29: Gate charging circuit 100: Gate drive circuit

Claims (9)

In the gate drive circuit of the power semiconductor element, the output is connected to the gate terminal of the power semiconductor element, and the gate drive circuit includes a gate current limiting circuit that limits the gate current of the power semiconductor element.
A first voltage source controlled by a control signal is used as an input to the gate current limiting circuit to turn on the power semiconductor element, and at a predetermined timing after the power semiconductor element is turned on, A gate drive circuit for a power semiconductor element, wherein the voltage at the gate terminal is switched so as to be lower than the voltage of the first voltage source.   The gate current limiting circuit further includes a second voltage source having a voltage lower than the voltage of the first voltage source, and the gate current limiting is performed at a predetermined timing after the power semiconductor element is turned on. 2. The gate drive circuit for a power semiconductor element according to claim 1, wherein the circuit input is switched from the first voltage source to the second voltage source.   The input of the gate current limiting circuit is switched from the first voltage source to the second voltage source after the voltage of the gate terminal of the power semiconductor element reaches a predetermined voltage. 3. A gate drive circuit for a power semiconductor device according to 2.   After a predetermined delay time from the ON timing of the voltage of the first voltage source controlled by the control signal or the control signal, the input of the gate current limiting circuit is connected from the first voltage source to the second voltage source. 3. The power semiconductor element gate drive circuit according to claim 2, wherein the gate drive circuit is switched to a voltage source. A gate charging circuit connected to the gate terminal of the power semiconductor element, and a gate current stop circuit for stopping the operation of the gate current limiting circuit at a predetermined timing after the power semiconductor element is turned on,
The gate current stop circuit stops the operation of the gate current limiting circuit, and at the same time, a voltage lower than the voltage of the first voltage source is applied from the gate charging circuit to the gate terminal of the power semiconductor element. A gate drive circuit for a power semiconductor device according to claim 1.   2. The gate drive circuit for a power semiconductor element according to claim 1, wherein the predetermined timing after the power semiconductor element is turned on is a timing exceeding a mirror period of the power semiconductor element.   7. The gate drive circuit for a power semiconductor element according to claim 1, wherein the power semiconductor element is formed of a wide band gap semiconductor.   8. The gate drive circuit for a power semiconductor device according to claim 7, wherein the wide band gap semiconductor is one of silicon carbide, a gallium nitride-based material, and diamond. An output of a power semiconductor element, wherein an output is connected to a gate terminal of the power semiconductor element, and a gate driving circuit including a gate current limiting circuit that limits a gate current of the power semiconductor element drives a gate of the power semiconductor element. In the driving method,
A first voltage source controlled by a control signal is used as an input to the gate current limiting circuit to turn on the power semiconductor element, and at a predetermined timing after the power semiconductor element is turned on, A method for driving a power semiconductor element, wherein the power semiconductor element is driven by switching so that a voltage at a gate terminal is lower than a voltage of the first voltage source.

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